Merge git://git.kernel.org/pub/scm/linux/kernel/git/sfrench/cifs-2.6

[pandora-kernel.git] / arch / arm / Kconfig

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 0fb17bb..ce00c57 100644 (file)
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -17,6 +17,10 @@ config ARM
          Europe.  There is an ARM Linux project with a web page at
          <http://www.arm.linux.org.uk/>.
 
+config GENERIC_TIME
+       bool
+       default n
+
 config MMU
        bool
        default y
@@ -95,7 +99,7 @@ config ARCH_MTD_XIP
 
 config VECTORS_BASE
        hex
-       default 0xffff0000 if MMU
+       default 0xffff0000 if MMU || CPU_HIGH_VECTOR
        default DRAM_BASE if REMAP_VECTORS_TO_RAM
        default 0x00000000
        help
@@ -205,6 +209,7 @@ config ARCH_IMX
 config ARCH_IOP32X
        bool "IOP32x-based"
        depends on MMU
+       select PLAT_IOP
        select PCI
        help
          Support for Intel's 80219 and IOP32X (XScale) family of
@@ -213,6 +218,7 @@ config ARCH_IOP32X
 config ARCH_IOP33X
        bool "IOP33x-based"
        depends on MMU
+       select PLAT_IOP
        select PCI
        help
          Support for Intel's IOP33X (XScale) family of processors.
@@ -220,6 +226,7 @@ config ARCH_IOP33X
 config ARCH_IXP4XX
        bool "IXP4xx-based"
        depends on MMU
+       select GENERIC_TIME
        help
          Support for Intel's IXP4XX (XScale) family of processors.
 
@@ -362,6 +369,9 @@ source "arch/arm/mach-netx/Kconfig"
 config ARCH_ACORN
        bool
 
+config PLAT_IOP
+       bool
+
 source arch/arm/mm/Kconfig
 
 #  bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
@@ -616,9 +626,10 @@ config LEDS_CPU
 
 config ALIGNMENT_TRAP
        bool
+       depends on CPU_CP15_MMU
        default y if !ARCH_EBSA110
        help
-         ARM processors can not fetch/store information which is not
+         ARM processors cannot fetch/store information which is not
          naturally aligned on the bus, i.e., a 4 byte fetch must start at an
          address divisible by 4. On 32-bit ARM processors, these non-aligned
          fetch/store instructions will be emulated in software if you say
@@ -647,11 +658,12 @@ config ZBOOT_ROM_BSS
        hex "Compressed ROM boot loader BSS address"
        default "0"
        help
-         The base address of 64KiB of read/write memory in the target
-         for the ROM-able zImage, which must be available while the
-         decompressor is running.  Platforms which normally make use of
-         ROM-able zImage formats normally set this to a suitable
-         value in their defconfig file.
+         The base address of an area of read/write memory in the target
+         for the ROM-able zImage which must be available while the
+         decompressor is running. It must be large enough to hold the
+         entire decompressed kernel plus an additional 128 KiB.
+         Platforms which normally make use of ROM-able zImage formats
+         normally set this to a suitable value in their defconfig file.
 
          If ZBOOT_ROM is not enabled, this has no effect.
 
@@ -846,7 +858,7 @@ source "drivers/base/Kconfig"
 
 source "drivers/connector/Kconfig"
 
-if ALIGNMENT_TRAP
+if ALIGNMENT_TRAP || !CPU_CP15_MMU
 source "drivers/mtd/Kconfig"
 endif
 
@@ -867,6 +879,8 @@ endif
 
 source "drivers/scsi/Kconfig"
 
+source "drivers/ata/Kconfig"
+
 source "drivers/md/Kconfig"
 
 source "drivers/message/fusion/Kconfig"