+ tmp = 0x20;
+ wl1251_reg_write32(wl, CFG_PLL_SYNC_CNT, tmp);
+
+ if (wl->chip_id != CHIP_ID_1251_PG10 &&
+ wl->chip_id != CHIP_ID_1251_PG11) {
+ /* PG 1.2: read clock request time */
+ init_data = wl1251_reg_read32(wl, CLK_REQ_TIME);
+
+ /*
+ * PG 1.2: set the clock request time to be
+ * ref_clk_settling_time - 1ms = 4ms
+ */
+ if (init_data > 0x21)
+ tmp = init_data - 0x21;
+ else
+ tmp = 0;
+ wl1251_reg_write32(wl, CLK_REQ_TIME, tmp);
+ }