- SH_HWBLK_CLK("tlb0", -1, I_CLK, HWBLK_TLB, CLK_ENABLE_ON_INIT),
- SH_HWBLK_CLK("ic0", -1, I_CLK, HWBLK_IC, CLK_ENABLE_ON_INIT),
- SH_HWBLK_CLK("oc0", -1, I_CLK, HWBLK_OC, CLK_ENABLE_ON_INIT),
- SH_HWBLK_CLK("l2c0", -1, SH_CLK, HWBLK_L2C, CLK_ENABLE_ON_INIT),
- SH_HWBLK_CLK("ilmem0", -1, I_CLK, HWBLK_ILMEM, CLK_ENABLE_ON_INIT),
- SH_HWBLK_CLK("fpu0", -1, I_CLK, HWBLK_FPU, CLK_ENABLE_ON_INIT),
- SH_HWBLK_CLK("intc0", -1, I_CLK, HWBLK_INTC, CLK_ENABLE_ON_INIT),
- SH_HWBLK_CLK("dmac0", -1, B_CLK, HWBLK_DMAC0, 0),
- SH_HWBLK_CLK("sh0", -1, SH_CLK, HWBLK_SHYWAY, CLK_ENABLE_ON_INIT),
- SH_HWBLK_CLK("hudi0", -1, P_CLK, HWBLK_HUDI, 0),
- SH_HWBLK_CLK("ubc0", -1, I_CLK, HWBLK_UBC, 0),
- SH_HWBLK_CLK("tmu0", -1, P_CLK, HWBLK_TMU0, 0),
- SH_HWBLK_CLK("cmt0", -1, R_CLK, HWBLK_CMT, 0),
- SH_HWBLK_CLK("rwdt0", -1, R_CLK, HWBLK_RWDT, 0),
- SH_HWBLK_CLK("dmac1", -1, B_CLK, HWBLK_DMAC1, 0),
- SH_HWBLK_CLK("tmu1", -1, P_CLK, HWBLK_TMU1, 0),
- SH_HWBLK_CLK("flctl0", -1, P_CLK, HWBLK_FLCTL, 0),
- SH_HWBLK_CLK("scif0", -1, P_CLK, HWBLK_SCIF0, 0),
- SH_HWBLK_CLK("scif1", -1, P_CLK, HWBLK_SCIF1, 0),
- SH_HWBLK_CLK("scif2", -1, P_CLK, HWBLK_SCIF2, 0),
- SH_HWBLK_CLK("scif3", -1, B_CLK, HWBLK_SCIF3, 0),
- SH_HWBLK_CLK("scif4", -1, B_CLK, HWBLK_SCIF4, 0),
- SH_HWBLK_CLK("scif5", -1, B_CLK, HWBLK_SCIF5, 0),
- SH_HWBLK_CLK("msiof0", -1, B_CLK, HWBLK_MSIOF0, 0),
- SH_HWBLK_CLK("msiof1", -1, B_CLK, HWBLK_MSIOF1, 0),
- SH_HWBLK_CLK("meram0", -1, SH_CLK, HWBLK_MERAM, 0),
-
- SH_HWBLK_CLK("i2c0", -1, P_CLK, HWBLK_IIC, 0),
- SH_HWBLK_CLK("rtc0", -1, R_CLK, HWBLK_RTC, 0),
-
- SH_HWBLK_CLK("atapi0", -1, SH_CLK, HWBLK_ATAPI, 0),
- SH_HWBLK_CLK("adc0", -1, P_CLK, HWBLK_ADC, 0),
- SH_HWBLK_CLK("tpu0", -1, B_CLK, HWBLK_TPU, 0),
- SH_HWBLK_CLK("irda0", -1, P_CLK, HWBLK_IRDA, 0),
- SH_HWBLK_CLK("tsif0", -1, B_CLK, HWBLK_TSIF, 0),
- SH_HWBLK_CLK("icb0", -1, B_CLK, HWBLK_ICB, CLK_ENABLE_ON_INIT),
- SH_HWBLK_CLK("sdhi0", -1, B_CLK, HWBLK_SDHI0, 0),
- SH_HWBLK_CLK("sdhi1", -1, B_CLK, HWBLK_SDHI1, 0),
- SH_HWBLK_CLK("keysc0", -1, R_CLK, HWBLK_KEYSC, 0),
- SH_HWBLK_CLK("usb0", -1, B_CLK, HWBLK_USB, 0),
- SH_HWBLK_CLK("2dg0", -1, B_CLK, HWBLK_2DG, 0),
- SH_HWBLK_CLK("siu0", -1, B_CLK, HWBLK_SIU, 0),
- SH_HWBLK_CLK("veu1", -1, B_CLK, HWBLK_VEU2H1, 0),
- SH_HWBLK_CLK("vou0", -1, B_CLK, HWBLK_VOU, 0),
- SH_HWBLK_CLK("beu0", -1, B_CLK, HWBLK_BEU, 0),
- SH_HWBLK_CLK("ceu0", -1, B_CLK, HWBLK_CEU, 0),
- SH_HWBLK_CLK("veu0", -1, B_CLK, HWBLK_VEU2H0, 0),
- SH_HWBLK_CLK("vpu0", -1, B_CLK, HWBLK_VPU, 0),
- SH_HWBLK_CLK("lcdc0", -1, B_CLK, HWBLK_LCDC, 0),
+ SH_HWBLK_CLK(HWBLK_TLB, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
+ SH_HWBLK_CLK(HWBLK_IC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
+ SH_HWBLK_CLK(HWBLK_OC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
+ SH_HWBLK_CLK(HWBLK_L2C, &div4_clks[DIV4_SH], CLK_ENABLE_ON_INIT),
+ SH_HWBLK_CLK(HWBLK_ILMEM, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
+ SH_HWBLK_CLK(HWBLK_FPU, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
+ SH_HWBLK_CLK(HWBLK_INTC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
+ SH_HWBLK_CLK(HWBLK_DMAC0, &div4_clks[DIV4_B], 0),
+ SH_HWBLK_CLK(HWBLK_SHYWAY, &div4_clks[DIV4_SH], CLK_ENABLE_ON_INIT),
+ SH_HWBLK_CLK(HWBLK_HUDI, &div4_clks[DIV4_P], 0),
+ SH_HWBLK_CLK(HWBLK_UBC, &div4_clks[DIV4_I], 0),
+ SH_HWBLK_CLK(HWBLK_TMU0, &div4_clks[DIV4_P], 0),
+ SH_HWBLK_CLK(HWBLK_CMT, &r_clk, 0),
+ SH_HWBLK_CLK(HWBLK_RWDT, &r_clk, 0),
+ SH_HWBLK_CLK(HWBLK_DMAC1, &div4_clks[DIV4_B], 0),
+ SH_HWBLK_CLK(HWBLK_TMU1, &div4_clks[DIV4_P], 0),
+ SH_HWBLK_CLK(HWBLK_FLCTL, &div4_clks[DIV4_P], 0),
+ SH_HWBLK_CLK(HWBLK_SCIF0, &div4_clks[DIV4_P], 0),
+ SH_HWBLK_CLK(HWBLK_SCIF1, &div4_clks[DIV4_P], 0),
+ SH_HWBLK_CLK(HWBLK_SCIF2, &div4_clks[DIV4_P], 0),
+ SH_HWBLK_CLK(HWBLK_SCIF3, &div4_clks[DIV4_B], 0),
+ SH_HWBLK_CLK(HWBLK_SCIF4, &div4_clks[DIV4_B], 0),
+ SH_HWBLK_CLK(HWBLK_SCIF5, &div4_clks[DIV4_B], 0),
+ SH_HWBLK_CLK(HWBLK_MSIOF0, &div4_clks[DIV4_B], 0),
+ SH_HWBLK_CLK(HWBLK_MSIOF1, &div4_clks[DIV4_B], 0),
+ SH_HWBLK_CLK(HWBLK_MERAM, &div4_clks[DIV4_SH], 0),
+
+ SH_HWBLK_CLK(HWBLK_IIC, &div4_clks[DIV4_P], 0),
+ SH_HWBLK_CLK(HWBLK_RTC, &r_clk, 0),
+
+ SH_HWBLK_CLK(HWBLK_ATAPI, &div4_clks[DIV4_SH], 0),
+ SH_HWBLK_CLK(HWBLK_ADC, &div4_clks[DIV4_P], 0),
+ SH_HWBLK_CLK(HWBLK_TPU, &div4_clks[DIV4_B], 0),
+ SH_HWBLK_CLK(HWBLK_IRDA, &div4_clks[DIV4_P], 0),
+ SH_HWBLK_CLK(HWBLK_TSIF, &div4_clks[DIV4_B], 0),
+ SH_HWBLK_CLK(HWBLK_ICB, &div4_clks[DIV4_B], CLK_ENABLE_ON_INIT),
+ SH_HWBLK_CLK(HWBLK_SDHI0, &div4_clks[DIV4_B], 0),
+ SH_HWBLK_CLK(HWBLK_SDHI1, &div4_clks[DIV4_B], 0),
+ SH_HWBLK_CLK(HWBLK_KEYSC, &r_clk, 0),
+ SH_HWBLK_CLK(HWBLK_USB, &div4_clks[DIV4_B], 0),
+ SH_HWBLK_CLK(HWBLK_2DG, &div4_clks[DIV4_B], 0),
+ SH_HWBLK_CLK(HWBLK_SIU, &div4_clks[DIV4_B], 0),
+ SH_HWBLK_CLK(HWBLK_VEU2H1, &div4_clks[DIV4_B], 0),
+ SH_HWBLK_CLK(HWBLK_VOU, &div4_clks[DIV4_B], 0),
+ SH_HWBLK_CLK(HWBLK_BEU, &div4_clks[DIV4_B], 0),
+ SH_HWBLK_CLK(HWBLK_CEU, &div4_clks[DIV4_B], 0),
+ SH_HWBLK_CLK(HWBLK_VEU2H0, &div4_clks[DIV4_B], 0),
+ SH_HWBLK_CLK(HWBLK_VPU, &div4_clks[DIV4_B], 0),
+ SH_HWBLK_CLK(HWBLK_LCDC, &div4_clks[DIV4_B], 0),
+};
+
+#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
+
+static struct clk_lookup lookups[] = {
+ /* main clocks */
+ CLKDEV_CON_ID("rclk", &r_clk),
+ CLKDEV_CON_ID("extal", &extal_clk),
+ CLKDEV_CON_ID("dll_clk", &dll_clk),
+ CLKDEV_CON_ID("pll_clk", &pll_clk),
+
+ /* DIV4 clocks */
+ CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
+ CLKDEV_CON_ID("umem_clk", &div4_clks[DIV4_U]),
+ CLKDEV_CON_ID("shyway_clk", &div4_clks[DIV4_SH]),
+ CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),
+ CLKDEV_CON_ID("b3_clk", &div4_clks[DIV4_B3]),
+ CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),
+ CLKDEV_CON_ID("irda_clk", &div4_enable_clks[DIV4_IRDA]),
+ CLKDEV_CON_ID("siua_clk", &div4_reparent_clks[DIV4_SIUA]),
+ CLKDEV_CON_ID("siub_clk", &div4_reparent_clks[DIV4_SIUB]),
+
+ /* DIV6 clocks */
+ CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]),
+
+ /* MSTP clocks */
+ CLKDEV_CON_ID("tlb0", &mstp_clks[HWBLK_TLB]),
+ CLKDEV_CON_ID("ic0", &mstp_clks[HWBLK_IC]),
+ CLKDEV_CON_ID("oc0", &mstp_clks[HWBLK_OC]),
+ CLKDEV_CON_ID("l2c0", &mstp_clks[HWBLK_L2C]),
+ CLKDEV_CON_ID("ilmem0", &mstp_clks[HWBLK_ILMEM]),
+ CLKDEV_CON_ID("fpu0", &mstp_clks[HWBLK_FPU]),
+ CLKDEV_CON_ID("intc0", &mstp_clks[HWBLK_INTC]),
+ CLKDEV_CON_ID("dmac0", &mstp_clks[HWBLK_DMAC0]),
+ CLKDEV_CON_ID("sh0", &mstp_clks[HWBLK_SHYWAY]),
+ CLKDEV_CON_ID("hudi0", &mstp_clks[HWBLK_HUDI]),
+ CLKDEV_CON_ID("ubc0", &mstp_clks[HWBLK_UBC]),
+ {
+ /* TMU0 */
+ .dev_id = "sh_tmu.0",
+ .con_id = "tmu_fck",
+ .clk = &mstp_clks[HWBLK_TMU0],
+ }, {
+ /* TMU1 */
+ .dev_id = "sh_tmu.1",
+ .con_id = "tmu_fck",
+ .clk = &mstp_clks[HWBLK_TMU0],
+ }, {
+ /* TMU2 */
+ .dev_id = "sh_tmu.2",
+ .con_id = "tmu_fck",
+ .clk = &mstp_clks[HWBLK_TMU0],
+ },
+ CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]),
+ CLKDEV_CON_ID("rwdt0", &mstp_clks[HWBLK_RWDT]),
+ CLKDEV_CON_ID("dmac1", &mstp_clks[HWBLK_DMAC1]),
+ {
+ /* TMU3 */
+ .dev_id = "sh_tmu.3",
+ .con_id = "tmu_fck",
+ .clk = &mstp_clks[HWBLK_TMU1],
+ }, {
+ /* TMU4 */
+ .dev_id = "sh_tmu.4",
+ .con_id = "tmu_fck",
+ .clk = &mstp_clks[HWBLK_TMU1],
+ }, {
+ /* TMU5 */
+ .dev_id = "sh_tmu.5",
+ .con_id = "tmu_fck",
+ .clk = &mstp_clks[HWBLK_TMU1],
+ },
+ CLKDEV_CON_ID("flctl0", &mstp_clks[HWBLK_FLCTL]),
+ {
+ /* SCIF0 */
+ .dev_id = "sh-sci.0",
+ .con_id = "sci_fck",
+ .clk = &mstp_clks[HWBLK_SCIF0],
+ }, {
+ /* SCIF1 */
+ .dev_id = "sh-sci.1",
+ .con_id = "sci_fck",
+ .clk = &mstp_clks[HWBLK_SCIF1],
+ }, {
+ /* SCIF2 */
+ .dev_id = "sh-sci.2",
+ .con_id = "sci_fck",
+ .clk = &mstp_clks[HWBLK_SCIF2],
+ }, {
+ /* SCIF3 */
+ .dev_id = "sh-sci.3",
+ .con_id = "sci_fck",
+ .clk = &mstp_clks[HWBLK_SCIF3],
+ }, {
+ /* SCIF4 */
+ .dev_id = "sh-sci.4",
+ .con_id = "sci_fck",
+ .clk = &mstp_clks[HWBLK_SCIF4],
+ }, {
+ /* SCIF5 */
+ .dev_id = "sh-sci.5",
+ .con_id = "sci_fck",
+ .clk = &mstp_clks[HWBLK_SCIF5],
+ },
+ CLKDEV_CON_ID("msiof0", &mstp_clks[HWBLK_MSIOF0]),
+ CLKDEV_CON_ID("msiof1", &mstp_clks[HWBLK_MSIOF1]),
+ CLKDEV_CON_ID("meram0", &mstp_clks[HWBLK_MERAM]),
+ CLKDEV_CON_ID("i2c0", &mstp_clks[HWBLK_IIC]),
+ CLKDEV_CON_ID("rtc0", &mstp_clks[HWBLK_RTC]),
+ CLKDEV_CON_ID("atapi0", &mstp_clks[HWBLK_ATAPI]),
+ CLKDEV_CON_ID("adc0", &mstp_clks[HWBLK_ADC]),
+ CLKDEV_CON_ID("tpu0", &mstp_clks[HWBLK_TPU]),
+ CLKDEV_CON_ID("irda0", &mstp_clks[HWBLK_IRDA]),
+ CLKDEV_CON_ID("tsif0", &mstp_clks[HWBLK_TSIF]),
+ CLKDEV_CON_ID("icb0", &mstp_clks[HWBLK_ICB]),
+ CLKDEV_CON_ID("sdhi0", &mstp_clks[HWBLK_SDHI0]),
+ CLKDEV_CON_ID("sdhi1", &mstp_clks[HWBLK_SDHI1]),
+ CLKDEV_CON_ID("keysc0", &mstp_clks[HWBLK_KEYSC]),
+ CLKDEV_CON_ID("usb0", &mstp_clks[HWBLK_USB]),
+ CLKDEV_CON_ID("2dg0", &mstp_clks[HWBLK_2DG]),
+ CLKDEV_CON_ID("siu0", &mstp_clks[HWBLK_SIU]),
+ CLKDEV_CON_ID("veu1", &mstp_clks[HWBLK_VEU2H1]),
+ CLKDEV_CON_ID("vou0", &mstp_clks[HWBLK_VOU]),
+ CLKDEV_CON_ID("beu0", &mstp_clks[HWBLK_BEU]),
+ CLKDEV_CON_ID("ceu0", &mstp_clks[HWBLK_CEU]),
+ CLKDEV_CON_ID("veu0", &mstp_clks[HWBLK_VEU2H0]),
+ CLKDEV_CON_ID("vpu0", &mstp_clks[HWBLK_VPU]),
+ CLKDEV_CON_ID("lcdc0", &mstp_clks[HWBLK_LCDC]),