Merge branch 'sched-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...

[pandora-kernel.git] / arch / powerpc / platforms / cell / Kconfig

diff --git a/arch/powerpc/platforms/cell/Kconfig b/arch/powerpc/platforms/cell/Kconfig
index e1e2f6a..c14d7d8 100644 (file)
--- a/arch/powerpc/platforms/cell/Kconfig
+++ b/arch/powerpc/platforms/cell/Kconfig
@@ -25,6 +25,19 @@ config PPC_IBM_CELL_BLADE
        select PPC_UDBG_16550
        select UDBG_RTAS_CONSOLE
 
        select PPC_UDBG_16550
        select UDBG_RTAS_CONSOLE
 

+config PPC_CELLEB
+       bool "Toshiba's Cell Reference Set 'Celleb' Architecture"
+       depends on PPC_MULTIPLATFORM && PPC64
+       select PPC_CELL
+       select PPC_CELL_NATIVE
+       select PPC_RTAS
+       select PPC_INDIRECT_IO
+       select PPC_OF_PLATFORM_PCI
+       select HAS_TXX9_SERIAL
+       select PPC_UDBG_BEAT
+       select USB_OHCI_BIG_ENDIAN_MMIO
+       select USB_EHCI_BIG_ENDIAN_MMIO
+

 menu "Cell Broadband Engine options"
        depends on PPC_CELL
 
 menu "Cell Broadband Engine options"
        depends on PPC_CELL
 


@@ -54,6 +67,13 @@ config SPU_FS_64K_LS
          uses 4K pages. This can improve performances of applications
          using multiple SPEs by lowering the TLB pressure on them.
 
          uses 4K pages. This can improve performances of applications
          using multiple SPEs by lowering the TLB pressure on them.
 

+config SPU_TRACE
+       tristate "SPU event tracing support"
+       depends on SPU_FS && MARKERS
+       help
+         This option allows reading a trace of spu-related events through
+         the sputrace file in procfs.
+

 config SPU_BASE
        bool
        default n
 config SPU_BASE
        bool
        default n


@@ -63,6 +83,22 @@ config CBE_RAS
        depends on PPC_CELL_NATIVE
        default y
 
        depends on PPC_CELL_NATIVE
        default y
 

+config PPC_IBM_CELL_RESETBUTTON
+       bool "IBM Cell Blade Pinhole reset button"
+       depends on CBE_RAS && PPC_IBM_CELL_BLADE
+       default y
+       help
+         Support Pinhole Resetbutton on IBM Cell blades.
+         This adds a method to trigger system reset via front panel pinhole button.
+
+config PPC_IBM_CELL_POWERBUTTON
+       tristate "IBM Cell Blade power button"
+       depends on PPC_IBM_CELL_BLADE && PPC_PMI && INPUT_EVDEV
+       default y
+       help
+         Support Powerbutton on IBM Cell blades.
+         This will enable the powerbutton as an input device.
+

 config CBE_THERM
        tristate "CBE thermal support"
        default m
 config CBE_THERM
        tristate "CBE thermal support"
        default m


@@ -87,4 +123,18 @@ config CBE_CPUFREQ_PMI
          processor will not only be able to run at lower speed,
          but also at lower core voltage.
 
          processor will not only be able to run at lower speed,
          but also at lower core voltage.
 

+config CBE_CPUFREQ_SPU_GOVERNOR
+       tristate "CBE frequency scaling based on SPU usage"
+       depends on SPU_FS && CPU_FREQ
+       default m
+       help
+         This governor checks for spu usage to adjust the cpu frequency.
+         If no spu is running on a given cpu, that cpu will be throttled to
+         the minimal possible frequency.
+

 endmenu
 endmenu

+
+config OPROFILE_CELL
+       def_bool y
+       depends on PPC_CELL_NATIVE && (OPROFILE = m || OPROFILE = y)
+