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Pull asus into release branch
[pandora-kernel.git]
/
arch
/
i386
/
kernel
/
io_apic.c
diff --git
a/arch/i386/kernel/io_apic.c
b/arch/i386/kernel/io_apic.c
index
f003a4c
..
b3ab8ff
100644
(file)
--- a/
arch/i386/kernel/io_apic.c
+++ b/
arch/i386/kernel/io_apic.c
@@
-343,7
+343,7
@@
static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t cpumask)
break;
entry = irq_2_pin + entry->next;
}
break;
entry = irq_2_pin + entry->next;
}
-
set_native_irq_info(irq, cpumask)
;
+
irq_desc[irq].affinity = cpumask
;
spin_unlock_irqrestore(&ioapic_lock, flags);
}
spin_unlock_irqrestore(&ioapic_lock, flags);
}
@@
-736,7
+736,7
@@
failed:
return 0;
}
return 0;
}
-int __init irqbalance_disable(char *str)
+int __
dev
init irqbalance_disable(char *str)
{
irqbalance_disabled = 1;
return 1;
{
irqbalance_disabled = 1;
return 1;
@@
-1281,11
+1281,9
@@
static void ioapic_register_intr(int irq, int vector, unsigned long trigger)
trigger == IOAPIC_LEVEL)
set_irq_chip_and_handler_name(irq, &ioapic_chip,
handle_fasteoi_irq, "fasteoi");
trigger == IOAPIC_LEVEL)
set_irq_chip_and_handler_name(irq, &ioapic_chip,
handle_fasteoi_irq, "fasteoi");
- else {
- irq_desc[irq].status |= IRQ_DELAYED_DISABLE;
+ else
set_irq_chip_and_handler_name(irq, &ioapic_chip,
handle_edge_irq, "edge");
set_irq_chip_and_handler_name(irq, &ioapic_chip,
handle_edge_irq, "edge");
- }
set_intr_gate(vector, interrupt[irq]);
}
set_intr_gate(vector, interrupt[irq]);
}
@@
-1356,7
+1354,6
@@
static void __init setup_IO_APIC_irqs(void)
}
spin_lock_irqsave(&ioapic_lock, flags);
__ioapic_write_entry(apic, pin, entry);
}
spin_lock_irqsave(&ioapic_lock, flags);
__ioapic_write_entry(apic, pin, entry);
- set_native_irq_info(irq, TARGET_CPUS);
spin_unlock_irqrestore(&ioapic_lock, flags);
}
}
spin_unlock_irqrestore(&ioapic_lock, flags);
}
}
@@
-2587,7
+2584,7
@@
static void set_msi_irq_affinity(unsigned int irq, cpumask_t mask)
msg.address_lo |= MSI_ADDR_DEST_ID(dest);
write_msi_msg(irq, &msg);
msg.address_lo |= MSI_ADDR_DEST_ID(dest);
write_msi_msg(irq, &msg);
-
set_native_irq_info(irq, mask)
;
+
irq_desc[irq].affinity = mask
;
}
#endif /* CONFIG_SMP */
}
#endif /* CONFIG_SMP */
@@
-2671,7
+2668,7
@@
static void set_ht_irq_affinity(unsigned int irq, cpumask_t mask)
dest = cpu_mask_to_apicid(mask);
target_ht_irq(irq, dest);
dest = cpu_mask_to_apicid(mask);
target_ht_irq(irq, dest);
-
set_native_irq_info(irq, mask)
;
+
irq_desc[irq].affinity = mask
;
}
#endif
}
#endif
@@
-2877,7
+2874,6
@@
int io_apic_set_pci_routing (int ioapic, int pin, int irq, int edge_level, int a
spin_lock_irqsave(&ioapic_lock, flags);
__ioapic_write_entry(ioapic, pin, entry);
spin_lock_irqsave(&ioapic_lock, flags);
__ioapic_write_entry(ioapic, pin, entry);
- set_native_irq_info(irq, TARGET_CPUS);
spin_unlock_irqrestore(&ioapic_lock, flags);
return 0;
spin_unlock_irqrestore(&ioapic_lock, flags);
return 0;