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OMAP4: clock: Add dummy clock nodes for interface clocks
[pandora-kernel.git]
/
arch
/
arm
/
mach-omap1
/
clock_data.c
diff --git
a/arch/arm/mach-omap1/clock_data.c
b/arch/arm/mach-omap1/clock_data.c
index
edefb34
..
aa8558a
100644
(file)
--- a/
arch/arm/mach-omap1/clock_data.c
+++ b/
arch/arm/mach-omap1/clock_data.c
@@
-1,7
+1,7
@@
/*
* linux/arch/arm/mach-omap1/clock_data.c
*
/*
* linux/arch/arm/mach-omap1/clock_data.c
*
- * Copyright (C) 2004 - 2005, 2009
Nokia c
orporation
+ * Copyright (C) 2004 - 2005, 2009
-2010 Nokia C
orporation
* Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
* Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
*
* Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
* Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
*
@@
-27,13
+27,6
@@
* Omap1 clocks
*-------------------------------------------------------------------------*/
* Omap1 clocks
*-------------------------------------------------------------------------*/
-/* XXX is this necessary? */
-static struct clk dummy_ck = {
- .name = "dummy",
- .ops = &clkops_dummy,
- .flags = RATE_FIXED,
-};
-
static struct clk ck_ref = {
.name = "ck_ref",
.ops = &clkops_null,
static struct clk ck_ref = {
.name = "ck_ref",
.ops = &clkops_null,
@@
-389,8
+382,7
@@
static struct uart_clk uart1_16xx = {
/* Direct from ULPD, no real parent */
.parent = &armper_ck.clk,
.rate = 48000000,
/* Direct from ULPD, no real parent */
.parent = &armper_ck.clk,
.rate = 48000000,
- .flags = RATE_FIXED | ENABLE_REG_32BIT |
- CLOCK_NO_IDLE_PARENT,
+ .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
.enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
.enable_bit = 29,
},
.enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
.enable_bit = 29,
},
@@
-430,8
+422,7
@@
static struct uart_clk uart3_16xx = {
/* Direct from ULPD, no real parent */
.parent = &armper_ck.clk,
.rate = 48000000,
/* Direct from ULPD, no real parent */
.parent = &armper_ck.clk,
.rate = 48000000,
- .flags = RATE_FIXED | ENABLE_REG_32BIT |
- CLOCK_NO_IDLE_PARENT,
+ .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
.enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
.enable_bit = 31,
},
.enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
.enable_bit = 31,
},
@@
-443,7
+434,7
@@
static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */
.ops = &clkops_generic,
/* Direct from ULPD, no parent */
.rate = 6000000,
.ops = &clkops_generic,
/* Direct from ULPD, no parent */
.rate = 6000000,
- .flags =
RATE_FIXED |
ENABLE_REG_32BIT,
+ .flags = ENABLE_REG_32BIT,
.enable_reg = OMAP1_IO_ADDRESS(ULPD_CLOCK_CTRL),
.enable_bit = USB_MCLK_EN_BIT,
};
.enable_reg = OMAP1_IO_ADDRESS(ULPD_CLOCK_CTRL),
.enable_bit = USB_MCLK_EN_BIT,
};
@@
-453,7
+444,7
@@
static struct clk usb_hhc_ck1510 = {
.ops = &clkops_generic,
/* Direct from ULPD, no parent */
.rate = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */
.ops = &clkops_generic,
/* Direct from ULPD, no parent */
.rate = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */
- .flags =
RATE_FIXED |
ENABLE_REG_32BIT,
+ .flags = ENABLE_REG_32BIT,
.enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
.enable_bit = USB_HOST_HHC_UHOST_EN,
};
.enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
.enable_bit = USB_HOST_HHC_UHOST_EN,
};
@@
-464,7
+455,7
@@
static struct clk usb_hhc_ck16xx = {
/* Direct from ULPD, no parent */
.rate = 48000000,
/* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */
/* Direct from ULPD, no parent */
.rate = 48000000,
/* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */
- .flags =
RATE_FIXED |
ENABLE_REG_32BIT,
+ .flags = ENABLE_REG_32BIT,
.enable_reg = OMAP1_IO_ADDRESS(OTG_BASE + 0x08), /* OTG_SYSCON_2 */
.enable_bit = 8 /* UHOST_EN */,
};
.enable_reg = OMAP1_IO_ADDRESS(OTG_BASE + 0x08), /* OTG_SYSCON_2 */
.enable_bit = 8 /* UHOST_EN */,
};
@@
-474,7
+465,6
@@
static struct clk usb_dc_ck = {
.ops = &clkops_generic,
/* Direct from ULPD, no parent */
.rate = 48000000,
.ops = &clkops_generic,
/* Direct from ULPD, no parent */
.rate = 48000000,
- .flags = RATE_FIXED,
.enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
.enable_bit = 4,
};
.enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
.enable_bit = 4,
};
@@
-484,7
+474,6
@@
static struct clk usb_dc_ck7xx = {
.ops = &clkops_generic,
/* Direct from ULPD, no parent */
.rate = 48000000,
.ops = &clkops_generic,
/* Direct from ULPD, no parent */
.rate = 48000000,
- .flags = RATE_FIXED,
.enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
.enable_bit = 8,
};
.enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
.enable_bit = 8,
};
@@
-494,7
+483,6
@@
static struct clk mclk_1510 = {
.ops = &clkops_generic,
/* Direct from ULPD, no parent. May be enabled by ext hardware. */
.rate = 12000000,
.ops = &clkops_generic,
/* Direct from ULPD, no parent. May be enabled by ext hardware. */
.rate = 12000000,
- .flags = RATE_FIXED,
.enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
.enable_bit = 6,
};
.enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
.enable_bit = 6,
};
@@
-515,7
+503,6
@@
static struct clk bclk_1510 = {
.ops = &clkops_generic,
/* Direct from ULPD, no parent. May be enabled by ext hardware. */
.rate = 12000000,
.ops = &clkops_generic,
/* Direct from ULPD, no parent. May be enabled by ext hardware. */
.rate = 12000000,
- .flags = RATE_FIXED,
};
static struct clk bclk_16xx = {
};
static struct clk bclk_16xx = {
@@
-530,36
+517,34
@@
static struct clk bclk_16xx = {
};
static struct clk mmc1_ck = {
};
static struct clk mmc1_ck = {
- .name = "mmc_ck",
+ .name = "mmc
1
_ck",
.ops = &clkops_generic,
/* Functional clock is direct from ULPD, interface clock is ARMPER */
.parent = &armper_ck.clk,
.rate = 48000000,
.ops = &clkops_generic,
/* Functional clock is direct from ULPD, interface clock is ARMPER */
.parent = &armper_ck.clk,
.rate = 48000000,
- .flags =
RATE_FIXED |
ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
+ .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
.enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
.enable_bit = 23,
};
static struct clk mmc2_ck = {
.enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
.enable_bit = 23,
};
static struct clk mmc2_ck = {
- .name = "mmc_ck",
- .id = 1,
+ .name = "mmc2_ck",
.ops = &clkops_generic,
/* Functional clock is direct from ULPD, interface clock is ARMPER */
.parent = &armper_ck.clk,
.rate = 48000000,
.ops = &clkops_generic,
/* Functional clock is direct from ULPD, interface clock is ARMPER */
.parent = &armper_ck.clk,
.rate = 48000000,
- .flags =
RATE_FIXED |
ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
+ .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
.enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
.enable_bit = 20,
};
static struct clk mmc3_ck = {
.enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
.enable_bit = 20,
};
static struct clk mmc3_ck = {
- .name = "mmc_ck",
- .id = 2,
+ .name = "mmc3_ck",
.ops = &clkops_generic,
/* Functional clock is direct from ULPD, interface clock is ARMPER */
.parent = &armper_ck.clk,
.rate = 48000000,
.ops = &clkops_generic,
/* Functional clock is direct from ULPD, interface clock is ARMPER */
.parent = &armper_ck.clk,
.rate = 48000000,
- .flags =
RATE_FIXED |
ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
+ .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
.enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
.enable_bit = 12,
};
.enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
.enable_bit = 12,
};
@@
-577,7
+562,6
@@
static struct clk virtual_ck_mpu = {
remains active during MPU idle whenever this is enabled */
static struct clk i2c_fck = {
.name = "i2c_fck",
remains active during MPU idle whenever this is enabled */
static struct clk i2c_fck = {
.name = "i2c_fck",
- .id = 1,
.ops = &clkops_null,
.flags = CLOCK_NO_IDLE_PARENT,
.parent = &armxor_ck.clk,
.ops = &clkops_null,
.flags = CLOCK_NO_IDLE_PARENT,
.parent = &armxor_ck.clk,
@@
-586,7
+570,6
@@
static struct clk i2c_fck = {
static struct clk i2c_ick = {
.name = "i2c_ick",
static struct clk i2c_ick = {
.name = "i2c_ick",
- .id = 1,
.ops = &clkops_null,
.flags = CLOCK_NO_IDLE_PARENT,
.parent = &armper_ck.clk,
.ops = &clkops_null,
.flags = CLOCK_NO_IDLE_PARENT,
.parent = &armper_ck.clk,