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KVM: ARM: Fix API documentation for ONE_REG encoding
[pandora-kernel.git]
/
Documentation
/
virtual
/
kvm
/
api.txt
diff --git
a/Documentation/virtual/kvm/api.txt
b/Documentation/virtual/kvm/api.txt
index
c09d183
..
59fd9e6
100644
(file)
--- a/
Documentation/virtual/kvm/api.txt
+++ b/
Documentation/virtual/kvm/api.txt
@@
-1814,22
+1814,22
@@
ARM registers are mapped using the lower 32 bits. The upper 16 of that
is the register group type, or coprocessor number:
ARM core registers have the following id bit patterns:
is the register group type, or coprocessor number:
ARM core registers have the following id bit patterns:
- 0x40
02
0000 0010 <index into the kvm_regs struct:16>
+ 0x40
20
0000 0010 <index into the kvm_regs struct:16>
ARM 32-bit CP15 registers have the following id bit patterns:
ARM 32-bit CP15 registers have the following id bit patterns:
- 0x40
02
0000 000F <zero:1> <crn:4> <crm:4> <opc1:4> <opc2:3>
+ 0x40
20
0000 000F <zero:1> <crn:4> <crm:4> <opc1:4> <opc2:3>
ARM 64-bit CP15 registers have the following id bit patterns:
ARM 64-bit CP15 registers have the following id bit patterns:
- 0x40
03
0000 000F <zero:1> <zero:4> <crm:4> <opc1:4> <zero:3>
+ 0x40
30
0000 000F <zero:1> <zero:4> <crm:4> <opc1:4> <zero:3>
ARM CCSIDR registers are demultiplexed by CSSELR value:
ARM CCSIDR registers are demultiplexed by CSSELR value:
- 0x40
02
0000 0011 00 <csselr:8>
+ 0x40
20
0000 0011 00 <csselr:8>
ARM 32-bit VFP control registers have the following id bit patterns:
ARM 32-bit VFP control registers have the following id bit patterns:
- 0x40
02
0000 0012 1 <regno:12>
+ 0x40
20
0000 0012 1 <regno:12>
ARM 64-bit FP registers have the following id bit patterns:
ARM 64-bit FP registers have the following id bit patterns:
- 0x40
02
0000 0012 0 <regno:12>
+ 0x40
30
0000 0012 0 <regno:12>
4.69 KVM_GET_ONE_REG
4.69 KVM_GET_ONE_REG