virt/kvm/ioapic.c

   1 /*
   2  *  Copyright (C) 2001  MandrakeSoft S.A.
   3  *  Copyright 2010 Red Hat, Inc. and/or its affiliates.
   4  *
   5  *    MandrakeSoft S.A.
   6  *    43, rue d'Aboukir
   7  *    75002 Paris - France
   8  *    http://www.linux-mandrake.com/
   9  *    http://www.mandrakesoft.com/
  10  *
  11  *  This library is free software; you can redistribute it and/or
  12  *  modify it under the terms of the GNU Lesser General Public
  13  *  License as published by the Free Software Foundation; either
  14  *  version 2 of the License, or (at your option) any later version.
  15  *
  16  *  This library is distributed in the hope that it will be useful,
  17  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19  *  Lesser General Public License for more details.
  20  *
  21  *  You should have received a copy of the GNU Lesser General Public
  22  *  License along with this library; if not, write to the Free Software
  23  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  24  *
  25  *  Yunhong Jiang <yunhong.jiang@intel.com>
  26  *  Yaozu (Eddie) Dong <eddie.dong@intel.com>
  27  *  Based on Xen 3.1 code.
  28  */
  29
  30 #include <linux/kvm_host.h>
  31 #include <linux/kvm.h>
  32 #include <linux/mm.h>
  33 #include <linux/highmem.h>
  34 #include <linux/smp.h>
  35 #include <linux/hrtimer.h>
  36 #include <linux/io.h>
  37 #include <linux/slab.h>
  38 #include <linux/export.h>
  39 #include <asm/processor.h>
  40 #include <asm/page.h>
  41 #include <asm/current.h>
  42 #include <trace/events/kvm.h>
  43
  44 #include "ioapic.h"
  45 #include "lapic.h"
  46 #include "irq.h"
  47
  48 #if 0
  49 #define ioapic_debug(fmt,arg...) printk(KERN_WARNING fmt,##arg)
  50 #else
  51 #define ioapic_debug(fmt, arg...)
  52 #endif
  53 static int ioapic_service(struct kvm_ioapic *vioapic, int irq,
  54                 bool line_status);
  55
  56 static unsigned long ioapic_read_indirect(struct kvm_ioapic *ioapic,
  57                                           unsigned long addr,
  58                                           unsigned long length)
  59 {
  60         unsigned long result = 0;
  61
  62         switch (ioapic->ioregsel) {
  63         case IOAPIC_REG_VERSION:
  64                 result = ((((IOAPIC_NUM_PINS - 1) & 0xff) << 16)
  65                           | (IOAPIC_VERSION_ID & 0xff));
  66                 break;
  67
  68         case IOAPIC_REG_APIC_ID:
  69         case IOAPIC_REG_ARB_ID:
  70                 result = ((ioapic->id & 0xf) << 24);
  71                 break;
  72
  73         default:
  74                 {
  75                         u32 redir_index = (ioapic->ioregsel - 0x10) >> 1;
  76                         u64 redir_content;
  77
  78                         if (redir_index < IOAPIC_NUM_PINS)
  79                                 redir_content =
  80                                         ioapic->redirtbl[redir_index].bits;
  81                         else
  82                                 redir_content = ~0ULL;
  83
  84                         result = (ioapic->ioregsel & 0x1) ?
  85                             (redir_content >> 32) & 0xffffffff :
  86                             redir_content & 0xffffffff;
  87                         break;
  88                 }
  89         }
  90
  91         return result;
  92 }
  93
  94 static void rtc_irq_eoi_tracking_reset(struct kvm_ioapic *ioapic)
  95 {
  96         ioapic->rtc_status.pending_eoi = 0;
  97         bitmap_zero(ioapic->rtc_status.dest_map, KVM_MAX_VCPUS);
  98 }
  99
 100 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic);
 101
 102 static void rtc_status_pending_eoi_check_valid(struct kvm_ioapic *ioapic)
 103 {
 104         if (WARN_ON(ioapic->rtc_status.pending_eoi < 0))
 105                 kvm_rtc_eoi_tracking_restore_all(ioapic);
 106 }
 107
 108 static void __rtc_irq_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
 109 {
 110         bool new_val, old_val;
 111         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 112         union kvm_ioapic_redirect_entry *e;
 113
 114         e = &ioapic->redirtbl[RTC_GSI];
 115         if (!kvm_apic_match_dest(vcpu, NULL, 0, e->fields.dest_id,
 116                                 e->fields.dest_mode))
 117                 return;
 118
 119         new_val = kvm_apic_pending_eoi(vcpu, e->fields.vector);
 120         old_val = test_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map);
 121
 122         if (new_val == old_val)
 123                 return;
 124
 125         if (new_val) {
 126                 __set_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map);
 127                 ioapic->rtc_status.pending_eoi++;
 128         } else {
 129                 __clear_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map);
 130                 ioapic->rtc_status.pending_eoi--;
 131                 rtc_status_pending_eoi_check_valid(ioapic);
 132         }
 133 }
 134
 135 void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
 136 {
 137         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 138
 139         spin_lock(&ioapic->lock);
 140         __rtc_irq_eoi_tracking_restore_one(vcpu);
 141         spin_unlock(&ioapic->lock);
 142 }
 143
 144 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic)
 145 {
 146         struct kvm_vcpu *vcpu;
 147         int i;
 148
 149         if (RTC_GSI >= IOAPIC_NUM_PINS)
 150                 return;
 151
 152         rtc_irq_eoi_tracking_reset(ioapic);
 153         kvm_for_each_vcpu(i, vcpu, ioapic->kvm)
 154             __rtc_irq_eoi_tracking_restore_one(vcpu);
 155 }
 156
 157 static void rtc_irq_eoi(struct kvm_ioapic *ioapic, struct kvm_vcpu *vcpu)
 158 {
 159         if (test_and_clear_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map)) {
 160                 --ioapic->rtc_status.pending_eoi;
 161                 rtc_status_pending_eoi_check_valid(ioapic);
 162         }
 163 }
 164
 165 static bool rtc_irq_check_coalesced(struct kvm_ioapic *ioapic)
 166 {
 167         if (ioapic->rtc_status.pending_eoi > 0)
 168                 return true; /* coalesced */
 169
 170         return false;
 171 }
 172
 173 static int ioapic_set_irq(struct kvm_ioapic *ioapic, unsigned int irq,
 174                 int irq_level, bool line_status)
 175 {
 176         union kvm_ioapic_redirect_entry entry;
 177         u32 mask = 1 << irq;
 178         u32 old_irr;
 179         int edge, ret;
 180
 181         entry = ioapic->redirtbl[irq];
 182         edge = (entry.fields.trig_mode == IOAPIC_EDGE_TRIG);
 183
 184         if (!irq_level) {
 185                 ioapic->irr &= ~mask;
 186                 ret = 1;
 187                 goto out;
 188         }
 189
 190         /*
 191          * Return 0 for coalesced interrupts; for edge-triggered interrupts,
 192          * this only happens if a previous edge has not been delivered due
 193          * do masking.  For level interrupts, the remote_irr field tells
 194          * us if the interrupt is waiting for an EOI.
 195          *
 196          * RTC is special: it is edge-triggered, but userspace likes to know
 197          * if it has been already ack-ed via EOI because coalesced RTC
 198          * interrupts lead to time drift in Windows guests.  So we track
 199          * EOI manually for the RTC interrupt.
 200          */
 201         if (irq == RTC_GSI && line_status &&
 202                 rtc_irq_check_coalesced(ioapic)) {
 203                 ret = 0;
 204                 goto out;
 205         }
 206
 207         old_irr = ioapic->irr;
 208         ioapic->irr |= mask;
 209         if ((edge && old_irr == ioapic->irr) ||
 210             (!edge && entry.fields.remote_irr)) {
 211                 ret = 0;
 212                 goto out;
 213         }
 214
 215         ret = ioapic_service(ioapic, irq, line_status);
 216
 217 out:
 218         trace_kvm_ioapic_set_irq(entry.bits, irq, ret == 0);
 219         return ret;
 220 }
 221
 222 static void kvm_ioapic_inject_all(struct kvm_ioapic *ioapic, unsigned long irr)
 223 {
 224         u32 idx;
 225
 226         rtc_irq_eoi_tracking_reset(ioapic);
 227         for_each_set_bit(idx, &irr, IOAPIC_NUM_PINS)
 228                 ioapic_set_irq(ioapic, idx, 1, true);
 229
 230         kvm_rtc_eoi_tracking_restore_all(ioapic);
 231 }
 232
 233
 234 static void update_handled_vectors(struct kvm_ioapic *ioapic)
 235 {
 236         DECLARE_BITMAP(handled_vectors, 256);
 237         int i;
 238
 239         memset(handled_vectors, 0, sizeof(handled_vectors));
 240         for (i = 0; i < IOAPIC_NUM_PINS; ++i)
 241                 __set_bit(ioapic->redirtbl[i].fields.vector, handled_vectors);
 242         memcpy(ioapic->handled_vectors, handled_vectors,
 243                sizeof(handled_vectors));
 244         smp_wmb();
 245 }
 246
 247 void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap,
 248                         u32 *tmr)
 249 {
 250         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 251         union kvm_ioapic_redirect_entry *e;
 252         int index;
 253
 254         spin_lock(&ioapic->lock);
 255         for (index = 0; index < IOAPIC_NUM_PINS; index++) {
 256                 e = &ioapic->redirtbl[index];
 257                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG ||
 258                     kvm_irq_has_notifier(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index) ||
 259                     index == RTC_GSI) {
 260                         if (kvm_apic_match_dest(vcpu, NULL, 0,
 261                                 e->fields.dest_id, e->fields.dest_mode)) {
 262                                 __set_bit(e->fields.vector,
 263                                         (unsigned long *)eoi_exit_bitmap);
 264                                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG)
 265                                         __set_bit(e->fields.vector,
 266                                                 (unsigned long *)tmr);
 267                         }
 268                 }
 269         }
 270         spin_unlock(&ioapic->lock);
 271 }
 272
 273 #ifdef CONFIG_X86
 274 void kvm_vcpu_request_scan_ioapic(struct kvm *kvm)
 275 {
 276         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
 277
 278         if (!ioapic)
 279                 return;
 280         kvm_make_scan_ioapic_request(kvm);
 281 }
 282 #else
 283 void kvm_vcpu_request_scan_ioapic(struct kvm *kvm)
 284 {
 285         return;
 286 }
 287 #endif
 288
 289 static void ioapic_write_indirect(struct kvm_ioapic *ioapic, u32 val)
 290 {
 291         unsigned index;
 292         bool mask_before, mask_after;
 293         union kvm_ioapic_redirect_entry *e;
 294
 295         switch (ioapic->ioregsel) {
 296         case IOAPIC_REG_VERSION:
 297                 /* Writes are ignored. */
 298                 break;
 299
 300         case IOAPIC_REG_APIC_ID:
 301                 ioapic->id = (val >> 24) & 0xf;
 302                 break;
 303
 304         case IOAPIC_REG_ARB_ID:
 305                 break;
 306
 307         default:
 308                 index = (ioapic->ioregsel - 0x10) >> 1;
 309
 310                 ioapic_debug("change redir index %x val %x\n", index, val);
 311                 if (index >= IOAPIC_NUM_PINS)
 312                         return;
 313                 e = &ioapic->redirtbl[index];
 314                 mask_before = e->fields.mask;
 315                 if (ioapic->ioregsel & 1) {
 316                         e->bits &= 0xffffffff;
 317                         e->bits |= (u64) val << 32;
 318                 } else {
 319                         e->bits &= ~0xffffffffULL;
 320                         e->bits |= (u32) val;
 321                         e->fields.remote_irr = 0;
 322                 }
 323                 update_handled_vectors(ioapic);
 324                 mask_after = e->fields.mask;
 325                 if (mask_before != mask_after)
 326                         kvm_fire_mask_notifiers(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index, mask_after);
 327                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG
 328                     && ioapic->irr & (1 << index))
 329                         ioapic_service(ioapic, index, false);
 330                 kvm_vcpu_request_scan_ioapic(ioapic->kvm);
 331                 break;
 332         }
 333 }
 334
 335 static int ioapic_service(struct kvm_ioapic *ioapic, int irq, bool line_status)
 336 {
 337         union kvm_ioapic_redirect_entry *entry = &ioapic->redirtbl[irq];
 338         struct kvm_lapic_irq irqe;
 339         int ret;
 340
 341         if (entry->fields.mask)
 342                 return -1;
 343
 344         ioapic_debug("dest=%x dest_mode=%x delivery_mode=%x "
 345                      "vector=%x trig_mode=%x\n",
 346                      entry->fields.dest_id, entry->fields.dest_mode,
 347                      entry->fields.delivery_mode, entry->fields.vector,
 348                      entry->fields.trig_mode);
 349
 350         irqe.dest_id = entry->fields.dest_id;
 351         irqe.vector = entry->fields.vector;
 352         irqe.dest_mode = entry->fields.dest_mode;
 353         irqe.trig_mode = entry->fields.trig_mode;
 354         irqe.delivery_mode = entry->fields.delivery_mode << 8;
 355         irqe.level = 1;
 356         irqe.shorthand = 0;
 357
 358         if (irqe.trig_mode == IOAPIC_EDGE_TRIG)
 359                 ioapic->irr &= ~(1 << irq);
 360
 361         if (irq == RTC_GSI && line_status) {
 362                 /*
 363                  * pending_eoi cannot ever become negative (see
 364                  * rtc_status_pending_eoi_check_valid) and the caller
 365                  * ensures that it is only called if it is >= zero, namely
 366                  * if rtc_irq_check_coalesced returns false).
 367                  */
 368                 BUG_ON(ioapic->rtc_status.pending_eoi != 0);
 369                 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe,
 370                                 ioapic->rtc_status.dest_map);
 371                 ioapic->rtc_status.pending_eoi = (ret < 0 ? 0 : ret);
 372         } else
 373                 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe, NULL);
 374
 375         if (ret && irqe.trig_mode == IOAPIC_LEVEL_TRIG)
 376                 entry->fields.remote_irr = 1;
 377
 378         return ret;
 379 }
 380
 381 int kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int irq_source_id,
 382                        int level, bool line_status)
 383 {
 384         int ret, irq_level;
 385
 386         BUG_ON(irq < 0 || irq >= IOAPIC_NUM_PINS);
 387
 388         spin_lock(&ioapic->lock);
 389         irq_level = __kvm_irq_line_state(&ioapic->irq_states[irq],
 390                                          irq_source_id, level);
 391         ret = ioapic_set_irq(ioapic, irq, irq_level, line_status);
 392
 393         spin_unlock(&ioapic->lock);
 394
 395         return ret;
 396 }
 397
 398 void kvm_ioapic_clear_all(struct kvm_ioapic *ioapic, int irq_source_id)
 399 {
 400         int i;
 401
 402         spin_lock(&ioapic->lock);
 403         for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++)
 404                 __clear_bit(irq_source_id, &ioapic->irq_states[i]);
 405         spin_unlock(&ioapic->lock);
 406 }
 407
 408 static void kvm_ioapic_eoi_inject_work(struct work_struct *work)
 409 {
 410         int i;
 411         struct kvm_ioapic *ioapic = container_of(work, struct kvm_ioapic,
 412                                                  eoi_inject.work);
 413         spin_lock(&ioapic->lock);
 414         for (i = 0; i < IOAPIC_NUM_PINS; i++) {
 415                 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
 416
 417                 if (ent->fields.trig_mode != IOAPIC_LEVEL_TRIG)
 418                         continue;
 419
 420                 if (ioapic->irr & (1 << i) && !ent->fields.remote_irr)
 421                         ioapic_service(ioapic, i, false);
 422         }
 423         spin_unlock(&ioapic->lock);
 424 }
 425
 426 #define IOAPIC_SUCCESSIVE_IRQ_MAX_COUNT 10000
 427
 428 static void __kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu,
 429                         struct kvm_ioapic *ioapic, int vector, int trigger_mode)
 430 {
 431         int i;
 432
 433         for (i = 0; i < IOAPIC_NUM_PINS; i++) {
 434                 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
 435
 436                 if (ent->fields.vector != vector)
 437                         continue;
 438
 439                 if (i == RTC_GSI)
 440                         rtc_irq_eoi(ioapic, vcpu);
 441                 /*
 442                  * We are dropping lock while calling ack notifiers because ack
 443                  * notifier callbacks for assigned devices call into IOAPIC
 444                  * recursively. Since remote_irr is cleared only after call
 445                  * to notifiers if the same vector will be delivered while lock
 446                  * is dropped it will be put into irr and will be delivered
 447                  * after ack notifier returns.
 448                  */
 449                 spin_unlock(&ioapic->lock);
 450                 kvm_notify_acked_irq(ioapic->kvm, KVM_IRQCHIP_IOAPIC, i);
 451                 spin_lock(&ioapic->lock);
 452
 453                 if (trigger_mode != IOAPIC_LEVEL_TRIG)
 454                         continue;
 455
 456                 ASSERT(ent->fields.trig_mode == IOAPIC_LEVEL_TRIG);
 457                 ent->fields.remote_irr = 0;
 458                 if (!ent->fields.mask && (ioapic->irr & (1 << i))) {
 459                         ++ioapic->irq_eoi[i];
 460                         if (ioapic->irq_eoi[i] == IOAPIC_SUCCESSIVE_IRQ_MAX_COUNT) {
 461                                 /*
 462                                  * Real hardware does not deliver the interrupt
 463                                  * immediately during eoi broadcast, and this
 464                                  * lets a buggy guest make slow progress
 465                                  * even if it does not correctly handle a
 466                                  * level-triggered interrupt.  Emulate this
 467                                  * behavior if we detect an interrupt storm.
 468                                  */
 469                                 schedule_delayed_work(&ioapic->eoi_inject, HZ / 100);
 470                                 ioapic->irq_eoi[i] = 0;
 471                                 trace_kvm_ioapic_delayed_eoi_inj(ent->bits);
 472                         } else {
 473                                 ioapic_service(ioapic, i, false);
 474                         }
 475                 } else {
 476                         ioapic->irq_eoi[i] = 0;
 477                 }
 478         }
 479 }
 480
 481 bool kvm_ioapic_handles_vector(struct kvm *kvm, int vector)
 482 {
 483         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
 484         smp_rmb();
 485         return test_bit(vector, ioapic->handled_vectors);
 486 }
 487
 488 void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector, int trigger_mode)
 489 {
 490         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 491
 492         spin_lock(&ioapic->lock);
 493         __kvm_ioapic_update_eoi(vcpu, ioapic, vector, trigger_mode);
 494         spin_unlock(&ioapic->lock);
 495 }
 496
 497 static inline struct kvm_ioapic *to_ioapic(struct kvm_io_device *dev)
 498 {
 499         return container_of(dev, struct kvm_ioapic, dev);
 500 }
 501
 502 static inline int ioapic_in_range(struct kvm_ioapic *ioapic, gpa_t addr)
 503 {
 504         return ((addr >= ioapic->base_address &&
 505                  (addr < ioapic->base_address + IOAPIC_MEM_LENGTH)));
 506 }
 507
 508 static int ioapic_mmio_read(struct kvm_io_device *this, gpa_t addr, int len,
 509                             void *val)
 510 {
 511         struct kvm_ioapic *ioapic = to_ioapic(this);
 512         u32 result;
 513         if (!ioapic_in_range(ioapic, addr))
 514                 return -EOPNOTSUPP;
 515
 516         ioapic_debug("addr %lx\n", (unsigned long)addr);
 517         ASSERT(!(addr & 0xf));  /* check alignment */
 518
 519         addr &= 0xff;
 520         spin_lock(&ioapic->lock);
 521         switch (addr) {
 522         case IOAPIC_REG_SELECT:
 523                 result = ioapic->ioregsel;
 524                 break;
 525
 526         case IOAPIC_REG_WINDOW:
 527                 result = ioapic_read_indirect(ioapic, addr, len);
 528                 break;
 529
 530         default:
 531                 result = 0;
 532                 break;
 533         }
 534         spin_unlock(&ioapic->lock);
 535
 536         switch (len) {
 537         case 8:
 538                 *(u64 *) val = result;
 539                 break;
 540         case 1:
 541         case 2:
 542         case 4:
 543                 memcpy(val, (char *)&result, len);
 544                 break;
 545         default:
 546                 printk(KERN_WARNING "ioapic: wrong length %d\n", len);
 547         }
 548         return 0;
 549 }
 550
 551 static int ioapic_mmio_write(struct kvm_io_device *this, gpa_t addr, int len,
 552                              const void *val)
 553 {
 554         struct kvm_ioapic *ioapic = to_ioapic(this);
 555         u32 data;
 556         if (!ioapic_in_range(ioapic, addr))
 557                 return -EOPNOTSUPP;
 558
 559         ioapic_debug("ioapic_mmio_write addr=%p len=%d val=%p\n",
 560                      (void*)addr, len, val);
 561         ASSERT(!(addr & 0xf));  /* check alignment */
 562
 563         switch (len) {
 564         case 8:
 565         case 4:
 566                 data = *(u32 *) val;
 567                 break;
 568         case 2:
 569                 data = *(u16 *) val;
 570                 break;
 571         case 1:
 572                 data = *(u8  *) val;
 573                 break;
 574         default:
 575                 printk(KERN_WARNING "ioapic: Unsupported size %d\n", len);
 576                 return 0;
 577         }
 578
 579         addr &= 0xff;
 580         spin_lock(&ioapic->lock);
 581         switch (addr) {
 582         case IOAPIC_REG_SELECT:
 583                 ioapic->ioregsel = data & 0xFF; /* 8-bit register */
 584                 break;
 585
 586         case IOAPIC_REG_WINDOW:
 587                 ioapic_write_indirect(ioapic, data);
 588                 break;
 589 #ifdef  CONFIG_IA64
 590         case IOAPIC_REG_EOI:
 591                 __kvm_ioapic_update_eoi(NULL, ioapic, data, IOAPIC_LEVEL_TRIG);
 592                 break;
 593 #endif
 594
 595         default:
 596                 break;
 597         }
 598         spin_unlock(&ioapic->lock);
 599         return 0;
 600 }
 601
 602 static void kvm_ioapic_reset(struct kvm_ioapic *ioapic)
 603 {
 604         int i;
 605
 606         cancel_delayed_work_sync(&ioapic->eoi_inject);
 607         for (i = 0; i < IOAPIC_NUM_PINS; i++)
 608                 ioapic->redirtbl[i].fields.mask = 1;
 609         ioapic->base_address = IOAPIC_DEFAULT_BASE_ADDRESS;
 610         ioapic->ioregsel = 0;
 611         ioapic->irr = 0;
 612         ioapic->id = 0;
 613         memset(ioapic->irq_eoi, 0x00, IOAPIC_NUM_PINS);
 614         rtc_irq_eoi_tracking_reset(ioapic);
 615         update_handled_vectors(ioapic);
 616 }
 617
 618 static const struct kvm_io_device_ops ioapic_mmio_ops = {
 619         .read     = ioapic_mmio_read,
 620         .write    = ioapic_mmio_write,
 621 };
 622
 623 int kvm_ioapic_init(struct kvm *kvm)
 624 {
 625         struct kvm_ioapic *ioapic;
 626         int ret;
 627
 628         ioapic = kzalloc(sizeof(struct kvm_ioapic), GFP_KERNEL);
 629         if (!ioapic)
 630                 return -ENOMEM;
 631         spin_lock_init(&ioapic->lock);
 632         INIT_DELAYED_WORK(&ioapic->eoi_inject, kvm_ioapic_eoi_inject_work);
 633         kvm->arch.vioapic = ioapic;
 634         kvm_ioapic_reset(ioapic);
 635         kvm_iodevice_init(&ioapic->dev, &ioapic_mmio_ops);
 636         ioapic->kvm = kvm;
 637         mutex_lock(&kvm->slots_lock);
 638         ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, ioapic->base_address,
 639                                       IOAPIC_MEM_LENGTH, &ioapic->dev);
 640         mutex_unlock(&kvm->slots_lock);
 641         if (ret < 0) {
 642                 kvm->arch.vioapic = NULL;
 643                 kfree(ioapic);
 644         }
 645
 646         return ret;
 647 }
 648
 649 void kvm_ioapic_destroy(struct kvm *kvm)
 650 {
 651         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
 652
 653         cancel_delayed_work_sync(&ioapic->eoi_inject);
 654         if (ioapic) {
 655                 kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &ioapic->dev);
 656                 kvm->arch.vioapic = NULL;
 657                 kfree(ioapic);
 658         }
 659 }
 660
 661 int kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
 662 {
 663         struct kvm_ioapic *ioapic = ioapic_irqchip(kvm);
 664         if (!ioapic)
 665                 return -EINVAL;
 666
 667         spin_lock(&ioapic->lock);
 668         memcpy(state, ioapic, sizeof(struct kvm_ioapic_state));
 669         spin_unlock(&ioapic->lock);
 670         return 0;
 671 }
 672
 673 int kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
 674 {
 675         struct kvm_ioapic *ioapic = ioapic_irqchip(kvm);
 676         if (!ioapic)
 677                 return -EINVAL;
 678
 679         spin_lock(&ioapic->lock);
 680         memcpy(ioapic, state, sizeof(struct kvm_ioapic_state));
 681         ioapic->irr = 0;
 682         update_handled_vectors(ioapic);
 683         kvm_vcpu_request_scan_ioapic(kvm);
 684         kvm_ioapic_inject_all(ioapic, state->irr);
 685         spin_unlock(&ioapic->lock);
 686         return 0;
 687 }