2 * soc-cache.c -- ASoC register cache helpers
4 * Copyright 2009 Wolfson Microelectronics PLC.
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
14 #include <linux/i2c.h>
15 #include <linux/spi/spi.h>
16 #include <sound/soc.h>
18 static unsigned int snd_soc_4_12_read(struct snd_soc_codec *codec,
21 u16 *cache = codec->reg_cache;
22 if (reg >= codec->reg_cache_size)
27 static int snd_soc_4_12_write(struct snd_soc_codec *codec, unsigned int reg,
30 u16 *cache = codec->reg_cache;
34 BUG_ON(codec->volatile_register);
36 data[0] = (reg << 4) | ((value >> 8) & 0x000f);
37 data[1] = value & 0x00ff;
39 if (reg < codec->reg_cache_size)
42 if (codec->cache_only) {
43 codec->cache_sync = 1;
47 ret = codec->hw_write(codec->control_data, data, 2);
56 #if defined(CONFIG_SPI_MASTER)
57 static int snd_soc_4_12_spi_write(void *control_data, const char *data,
60 struct spi_device *spi = control_data;
61 struct spi_transfer t;
72 memset(&t, 0, (sizeof t));
77 spi_message_add_tail(&t, &m);
83 #define snd_soc_4_12_spi_write NULL
86 static unsigned int snd_soc_7_9_read(struct snd_soc_codec *codec,
89 u16 *cache = codec->reg_cache;
90 if (reg >= codec->reg_cache_size)
95 static int snd_soc_7_9_write(struct snd_soc_codec *codec, unsigned int reg,
98 u16 *cache = codec->reg_cache;
102 BUG_ON(codec->volatile_register);
104 data[0] = (reg << 1) | ((value >> 8) & 0x0001);
105 data[1] = value & 0x00ff;
107 if (reg < codec->reg_cache_size)
110 if (codec->cache_only) {
111 codec->cache_sync = 1;
115 ret = codec->hw_write(codec->control_data, data, 2);
124 #if defined(CONFIG_SPI_MASTER)
125 static int snd_soc_7_9_spi_write(void *control_data, const char *data,
128 struct spi_device *spi = control_data;
129 struct spi_transfer t;
130 struct spi_message m;
139 spi_message_init(&m);
140 memset(&t, 0, (sizeof t));
145 spi_message_add_tail(&t, &m);
151 #define snd_soc_7_9_spi_write NULL
154 static int snd_soc_8_8_write(struct snd_soc_codec *codec, unsigned int reg,
157 u8 *cache = codec->reg_cache;
160 BUG_ON(codec->volatile_register);
162 data[0] = reg & 0xff;
163 data[1] = value & 0xff;
165 if (reg < codec->reg_cache_size)
168 if (codec->cache_only) {
169 codec->cache_sync = 1;
173 if (codec->hw_write(codec->control_data, data, 2) == 2)
179 static unsigned int snd_soc_8_8_read(struct snd_soc_codec *codec,
182 u8 *cache = codec->reg_cache;
183 if (reg >= codec->reg_cache_size)
188 static int snd_soc_8_16_write(struct snd_soc_codec *codec, unsigned int reg,
191 u16 *reg_cache = codec->reg_cache;
195 data[1] = (value >> 8) & 0xff;
196 data[2] = value & 0xff;
198 if (!snd_soc_codec_volatile_register(codec, reg))
199 reg_cache[reg] = value;
201 if (codec->cache_only) {
202 codec->cache_sync = 1;
206 if (codec->hw_write(codec->control_data, data, 3) == 3)
212 static unsigned int snd_soc_8_16_read(struct snd_soc_codec *codec,
215 u16 *cache = codec->reg_cache;
217 if (reg >= codec->reg_cache_size ||
218 snd_soc_codec_volatile_register(codec, reg)) {
219 if (codec->cache_only)
222 return codec->hw_read(codec, reg);
228 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
229 static unsigned int snd_soc_8_8_read_i2c(struct snd_soc_codec *codec,
232 struct i2c_msg xfer[2];
236 struct i2c_client *client = codec->control_data;
239 xfer[0].addr = client->addr;
245 xfer[1].addr = client->addr;
246 xfer[1].flags = I2C_M_RD;
250 ret = i2c_transfer(client->adapter, xfer, 2);
252 dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
259 #define snd_soc_8_8_read_i2c NULL
262 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
263 static unsigned int snd_soc_8_16_read_i2c(struct snd_soc_codec *codec,
266 struct i2c_msg xfer[2];
270 struct i2c_client *client = codec->control_data;
273 xfer[0].addr = client->addr;
279 xfer[1].addr = client->addr;
280 xfer[1].flags = I2C_M_RD;
282 xfer[1].buf = (u8 *)&data;
284 ret = i2c_transfer(client->adapter, xfer, 2);
286 dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
290 return (data >> 8) | ((data & 0xff) << 8);
293 #define snd_soc_8_16_read_i2c NULL
296 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
297 static unsigned int snd_soc_16_8_read_i2c(struct snd_soc_codec *codec,
300 struct i2c_msg xfer[2];
304 struct i2c_client *client = codec->control_data;
307 xfer[0].addr = client->addr;
310 xfer[0].buf = (u8 *)®
313 xfer[1].addr = client->addr;
314 xfer[1].flags = I2C_M_RD;
318 ret = i2c_transfer(client->adapter, xfer, 2);
320 dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
327 #define snd_soc_16_8_read_i2c NULL
330 static unsigned int snd_soc_16_8_read(struct snd_soc_codec *codec,
333 u16 *cache = codec->reg_cache;
336 if (reg >= codec->reg_cache_size)
341 static int snd_soc_16_8_write(struct snd_soc_codec *codec, unsigned int reg,
344 u16 *cache = codec->reg_cache;
348 BUG_ON(codec->volatile_register);
350 data[0] = (reg >> 8) & 0xff;
351 data[1] = reg & 0xff;
355 if (reg < codec->reg_cache_size)
358 if (codec->cache_only) {
359 codec->cache_sync = 1;
363 ret = codec->hw_write(codec->control_data, data, 3);
372 #if defined(CONFIG_SPI_MASTER)
373 static int snd_soc_16_8_spi_write(void *control_data, const char *data,
376 struct spi_device *spi = control_data;
377 struct spi_transfer t;
378 struct spi_message m;
388 spi_message_init(&m);
389 memset(&t, 0, (sizeof t));
394 spi_message_add_tail(&t, &m);
400 #define snd_soc_16_8_spi_write NULL
403 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
404 static unsigned int snd_soc_16_16_read_i2c(struct snd_soc_codec *codec,
407 struct i2c_msg xfer[2];
408 u16 reg = cpu_to_be16(r);
411 struct i2c_client *client = codec->control_data;
414 xfer[0].addr = client->addr;
417 xfer[0].buf = (u8 *)®
420 xfer[1].addr = client->addr;
421 xfer[1].flags = I2C_M_RD;
423 xfer[1].buf = (u8 *)&data;
425 ret = i2c_transfer(client->adapter, xfer, 2);
427 dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
431 return be16_to_cpu(data);
434 #define snd_soc_16_16_read_i2c NULL
437 static unsigned int snd_soc_16_16_read(struct snd_soc_codec *codec,
440 u16 *cache = codec->reg_cache;
442 if (reg >= codec->reg_cache_size ||
443 snd_soc_codec_volatile_register(codec, reg)) {
444 if (codec->cache_only)
447 return codec->hw_read(codec, reg);
453 static int snd_soc_16_16_write(struct snd_soc_codec *codec, unsigned int reg,
456 u16 *cache = codec->reg_cache;
460 data[0] = (reg >> 8) & 0xff;
461 data[1] = reg & 0xff;
462 data[2] = (value >> 8) & 0xff;
463 data[3] = value & 0xff;
465 if (reg < codec->reg_cache_size)
468 if (codec->cache_only) {
469 codec->cache_sync = 1;
473 ret = codec->hw_write(codec->control_data, data, 4);
485 int (*write)(struct snd_soc_codec *codec, unsigned int, unsigned int);
486 int (*spi_write)(void *, const char *, int);
487 unsigned int (*read)(struct snd_soc_codec *, unsigned int);
488 unsigned int (*i2c_read)(struct snd_soc_codec *, unsigned int);
491 .addr_bits = 4, .data_bits = 12,
492 .write = snd_soc_4_12_write, .read = snd_soc_4_12_read,
493 .spi_write = snd_soc_4_12_spi_write,
496 .addr_bits = 7, .data_bits = 9,
497 .write = snd_soc_7_9_write, .read = snd_soc_7_9_read,
498 .spi_write = snd_soc_7_9_spi_write,
501 .addr_bits = 8, .data_bits = 8,
502 .write = snd_soc_8_8_write, .read = snd_soc_8_8_read,
503 .i2c_read = snd_soc_8_8_read_i2c,
506 .addr_bits = 8, .data_bits = 16,
507 .write = snd_soc_8_16_write, .read = snd_soc_8_16_read,
508 .i2c_read = snd_soc_8_16_read_i2c,
511 .addr_bits = 16, .data_bits = 8,
512 .write = snd_soc_16_8_write, .read = snd_soc_16_8_read,
513 .i2c_read = snd_soc_16_8_read_i2c,
514 .spi_write = snd_soc_16_8_spi_write,
517 .addr_bits = 16, .data_bits = 16,
518 .write = snd_soc_16_16_write, .read = snd_soc_16_16_read,
519 .i2c_read = snd_soc_16_16_read_i2c,
524 * snd_soc_codec_set_cache_io: Set up standard I/O functions.
526 * @codec: CODEC to configure.
527 * @type: Type of cache.
528 * @addr_bits: Number of bits of register address data.
529 * @data_bits: Number of bits of data per register.
530 * @control: Control bus used.
532 * Register formats are frequently shared between many I2C and SPI
533 * devices. In order to promote code reuse the ASoC core provides
534 * some standard implementations of CODEC read and write operations
535 * which can be set up using this function.
537 * The caller is responsible for allocating and initialising the
540 * Note that at present this code cannot be used by CODECs with
541 * volatile registers.
543 int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
544 int addr_bits, int data_bits,
545 enum snd_soc_control_type control)
549 for (i = 0; i < ARRAY_SIZE(io_types); i++)
550 if (io_types[i].addr_bits == addr_bits &&
551 io_types[i].data_bits == data_bits)
553 if (i == ARRAY_SIZE(io_types)) {
555 "No I/O functions for %d bit address %d bit data\n",
556 addr_bits, data_bits);
560 codec->write = io_types[i].write;
561 codec->read = io_types[i].read;
568 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
569 codec->hw_write = (hw_write_t)i2c_master_send;
571 if (io_types[i].i2c_read)
572 codec->hw_read = io_types[i].i2c_read;
576 if (io_types[i].spi_write)
577 codec->hw_write = io_types[i].spi_write;
583 EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);