2 * soc-cache.c -- ASoC register cache helpers
4 * Copyright 2009 Wolfson Microelectronics PLC.
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
14 #include <linux/i2c.h>
15 #include <linux/spi/spi.h>
16 #include <sound/soc.h>
17 #include <linux/lzo.h>
18 #include <linux/bitmap.h>
19 #include <linux/rbtree.h>
21 #include <trace/events/asoc.h>
23 #if defined(CONFIG_SPI_MASTER)
24 static int do_spi_write(void *control_data, const void *msg,
27 struct spi_device *spi = control_data;
28 struct spi_transfer t;
35 memset(&t, 0, sizeof t);
40 spi_message_add_tail(&t, &m);
47 static int do_hw_write(struct snd_soc_codec *codec, unsigned int reg,
48 unsigned int value, const void *data, int len)
52 if (!snd_soc_codec_volatile_register(codec, reg) &&
53 reg < codec->driver->reg_cache_size &&
54 !codec->cache_bypass) {
55 ret = snd_soc_cache_write(codec, reg, value);
60 if (codec->cache_only) {
61 codec->cache_sync = 1;
65 ret = codec->hw_write(codec->control_data, data, len);
74 static unsigned int do_hw_read(struct snd_soc_codec *codec, unsigned int reg)
79 if (reg >= codec->driver->reg_cache_size ||
80 snd_soc_codec_volatile_register(codec, reg) ||
81 codec->cache_bypass) {
82 if (codec->cache_only)
85 BUG_ON(!codec->hw_read);
86 return codec->hw_read(codec, reg);
89 ret = snd_soc_cache_read(codec, reg, &val);
95 static unsigned int snd_soc_4_12_read(struct snd_soc_codec *codec,
98 return do_hw_read(codec, reg);
101 static int snd_soc_4_12_write(struct snd_soc_codec *codec, unsigned int reg,
106 data[0] = (reg << 4) | ((value >> 8) & 0x000f);
107 data[1] = value & 0x00ff;
109 return do_hw_write(codec, reg, value, data, 2);
112 #if defined(CONFIG_SPI_MASTER)
113 static int snd_soc_4_12_spi_write(void *control_data, const char *data,
121 return do_spi_write(control_data, msg, len);
124 #define snd_soc_4_12_spi_write NULL
127 static unsigned int snd_soc_7_9_read(struct snd_soc_codec *codec,
130 return do_hw_read(codec, reg);
133 static int snd_soc_7_9_write(struct snd_soc_codec *codec, unsigned int reg,
138 data[0] = (reg << 1) | ((value >> 8) & 0x0001);
139 data[1] = value & 0x00ff;
141 return do_hw_write(codec, reg, value, data, 2);
144 #if defined(CONFIG_SPI_MASTER)
145 static int snd_soc_7_9_spi_write(void *control_data, const char *data,
153 return do_spi_write(control_data, msg, len);
156 #define snd_soc_7_9_spi_write NULL
159 static int snd_soc_8_8_write(struct snd_soc_codec *codec, unsigned int reg,
166 data[1] = value & 0xff;
168 return do_hw_write(codec, reg, value, data, 2);
171 static unsigned int snd_soc_8_8_read(struct snd_soc_codec *codec,
174 return do_hw_read(codec, reg);
177 #if defined(CONFIG_SPI_MASTER)
178 static int snd_soc_8_8_spi_write(void *control_data, const char *data,
186 return do_spi_write(control_data, msg, len);
189 #define snd_soc_8_8_spi_write NULL
192 static int snd_soc_8_16_write(struct snd_soc_codec *codec, unsigned int reg,
198 data[1] = (value >> 8) & 0xff;
199 data[2] = value & 0xff;
201 return do_hw_write(codec, reg, value, data, 3);
204 static unsigned int snd_soc_8_16_read(struct snd_soc_codec *codec,
207 return do_hw_read(codec, reg);
210 #if defined(CONFIG_SPI_MASTER)
211 static int snd_soc_8_16_spi_write(void *control_data, const char *data,
220 return do_spi_write(control_data, msg, len);
223 #define snd_soc_8_16_spi_write NULL
226 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
227 static unsigned int do_i2c_read(struct snd_soc_codec *codec,
228 void *reg, int reglen,
229 void *data, int datalen)
231 struct i2c_msg xfer[2];
233 struct i2c_client *client = codec->control_data;
236 xfer[0].addr = client->addr;
238 xfer[0].len = reglen;
242 xfer[1].addr = client->addr;
243 xfer[1].flags = I2C_M_RD;
244 xfer[1].len = datalen;
247 ret = i2c_transfer(client->adapter, xfer, 2);
257 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
258 static unsigned int snd_soc_8_8_read_i2c(struct snd_soc_codec *codec,
265 ret = do_i2c_read(codec, ®, 1, &data, 1);
271 #define snd_soc_8_8_read_i2c NULL
274 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
275 static unsigned int snd_soc_8_16_read_i2c(struct snd_soc_codec *codec,
282 ret = do_i2c_read(codec, ®, 1, &data, 2);
285 return (data >> 8) | ((data & 0xff) << 8);
288 #define snd_soc_8_16_read_i2c NULL
291 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
292 static unsigned int snd_soc_16_8_read_i2c(struct snd_soc_codec *codec,
299 ret = do_i2c_read(codec, ®, 2, &data, 1);
305 #define snd_soc_16_8_read_i2c NULL
308 static unsigned int snd_soc_16_8_read(struct snd_soc_codec *codec,
311 return do_hw_read(codec, reg);
314 static int snd_soc_16_8_write(struct snd_soc_codec *codec, unsigned int reg,
319 data[0] = (reg >> 8) & 0xff;
320 data[1] = reg & 0xff;
324 return do_hw_write(codec, reg, value, data, 3);
327 #if defined(CONFIG_SPI_MASTER)
328 static int snd_soc_16_8_spi_write(void *control_data, const char *data,
337 return do_spi_write(control_data, msg, len);
340 #define snd_soc_16_8_spi_write NULL
343 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
344 static unsigned int snd_soc_16_16_read_i2c(struct snd_soc_codec *codec,
347 u16 reg = cpu_to_be16(r);
351 ret = do_i2c_read(codec, ®, 2, &data, 2);
354 return be16_to_cpu(data);
357 #define snd_soc_16_16_read_i2c NULL
360 static unsigned int snd_soc_16_16_read(struct snd_soc_codec *codec,
363 return do_hw_read(codec, reg);
366 static int snd_soc_16_16_write(struct snd_soc_codec *codec, unsigned int reg,
371 data[0] = (reg >> 8) & 0xff;
372 data[1] = reg & 0xff;
373 data[2] = (value >> 8) & 0xff;
374 data[3] = value & 0xff;
376 return do_hw_write(codec, reg, value, data, 4);
379 #if defined(CONFIG_SPI_MASTER)
380 static int snd_soc_16_16_spi_write(void *control_data, const char *data,
390 return do_spi_write(control_data, msg, len);
393 #define snd_soc_16_16_spi_write NULL
396 /* Primitive bulk write support for soc-cache. The data pointed to by
397 * `data' needs to already be in the form the hardware expects
398 * including any leading register specific data. Any data written
399 * through this function will not go through the cache as it only
400 * handles writing to volatile or out of bounds registers.
402 static int snd_soc_hw_bulk_write_raw(struct snd_soc_codec *codec, unsigned int reg,
403 const void *data, size_t len)
407 /* Ensure that the base register is volatile. Subsequently
408 * any other register that is touched by this routine should be
409 * volatile as well to ensure that we don't get out of sync with
412 if (!snd_soc_codec_volatile_register(codec, reg)
413 && reg < codec->driver->reg_cache_size)
416 switch (codec->control_type) {
417 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
419 ret = i2c_master_send(codec->control_data, data, len);
422 #if defined(CONFIG_SPI_MASTER)
424 ret = do_spi_write(codec->control_data, data, len);
442 int (*write)(struct snd_soc_codec *codec, unsigned int, unsigned int);
443 int (*spi_write)(void *, const char *, int);
444 unsigned int (*read)(struct snd_soc_codec *, unsigned int);
445 unsigned int (*i2c_read)(struct snd_soc_codec *, unsigned int);
448 .addr_bits = 4, .data_bits = 12,
449 .write = snd_soc_4_12_write, .read = snd_soc_4_12_read,
450 .spi_write = snd_soc_4_12_spi_write,
453 .addr_bits = 7, .data_bits = 9,
454 .write = snd_soc_7_9_write, .read = snd_soc_7_9_read,
455 .spi_write = snd_soc_7_9_spi_write,
458 .addr_bits = 8, .data_bits = 8,
459 .write = snd_soc_8_8_write, .read = snd_soc_8_8_read,
460 .i2c_read = snd_soc_8_8_read_i2c,
461 .spi_write = snd_soc_8_8_spi_write,
464 .addr_bits = 8, .data_bits = 16,
465 .write = snd_soc_8_16_write, .read = snd_soc_8_16_read,
466 .i2c_read = snd_soc_8_16_read_i2c,
467 .spi_write = snd_soc_8_16_spi_write,
470 .addr_bits = 16, .data_bits = 8,
471 .write = snd_soc_16_8_write, .read = snd_soc_16_8_read,
472 .i2c_read = snd_soc_16_8_read_i2c,
473 .spi_write = snd_soc_16_8_spi_write,
476 .addr_bits = 16, .data_bits = 16,
477 .write = snd_soc_16_16_write, .read = snd_soc_16_16_read,
478 .i2c_read = snd_soc_16_16_read_i2c,
479 .spi_write = snd_soc_16_16_spi_write,
484 * snd_soc_codec_set_cache_io: Set up standard I/O functions.
486 * @codec: CODEC to configure.
487 * @type: Type of cache.
488 * @addr_bits: Number of bits of register address data.
489 * @data_bits: Number of bits of data per register.
490 * @control: Control bus used.
492 * Register formats are frequently shared between many I2C and SPI
493 * devices. In order to promote code reuse the ASoC core provides
494 * some standard implementations of CODEC read and write operations
495 * which can be set up using this function.
497 * The caller is responsible for allocating and initialising the
500 * Note that at present this code cannot be used by CODECs with
501 * volatile registers.
503 int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
504 int addr_bits, int data_bits,
505 enum snd_soc_control_type control)
509 for (i = 0; i < ARRAY_SIZE(io_types); i++)
510 if (io_types[i].addr_bits == addr_bits &&
511 io_types[i].data_bits == data_bits)
513 if (i == ARRAY_SIZE(io_types)) {
515 "No I/O functions for %d bit address %d bit data\n",
516 addr_bits, data_bits);
520 codec->write = io_types[i].write;
521 codec->read = io_types[i].read;
522 codec->bulk_write_raw = snd_soc_hw_bulk_write_raw;
529 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
530 codec->hw_write = (hw_write_t)i2c_master_send;
532 if (io_types[i].i2c_read)
533 codec->hw_read = io_types[i].i2c_read;
535 codec->control_data = container_of(codec->dev,
541 if (io_types[i].spi_write)
542 codec->hw_write = io_types[i].spi_write;
544 codec->control_data = container_of(codec->dev,
552 EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);
554 static bool snd_soc_set_cache_val(void *base, unsigned int idx,
555 unsigned int val, unsigned int word_size)
560 if (cache[idx] == val)
567 if (cache[idx] == val)
578 static unsigned int snd_soc_get_cache_val(const void *base, unsigned int idx,
579 unsigned int word_size)
583 const u8 *cache = base;
587 const u16 *cache = base;
597 struct snd_soc_rbtree_node {
602 } __attribute__ ((packed));
604 struct snd_soc_rbtree_ctx {
608 static struct snd_soc_rbtree_node *snd_soc_rbtree_lookup(
609 struct rb_root *root, unsigned int reg)
611 struct rb_node *node;
612 struct snd_soc_rbtree_node *rbnode;
614 node = root->rb_node;
616 rbnode = container_of(node, struct snd_soc_rbtree_node, node);
617 if (rbnode->reg < reg)
618 node = node->rb_left;
619 else if (rbnode->reg > reg)
620 node = node->rb_right;
628 static int snd_soc_rbtree_insert(struct rb_root *root,
629 struct snd_soc_rbtree_node *rbnode)
631 struct rb_node **new, *parent;
632 struct snd_soc_rbtree_node *rbnode_tmp;
635 new = &root->rb_node;
637 rbnode_tmp = container_of(*new, struct snd_soc_rbtree_node,
640 if (rbnode_tmp->reg < rbnode->reg)
641 new = &((*new)->rb_left);
642 else if (rbnode_tmp->reg > rbnode->reg)
643 new = &((*new)->rb_right);
648 /* insert the node into the rbtree */
649 rb_link_node(&rbnode->node, parent, new);
650 rb_insert_color(&rbnode->node, root);
655 static int snd_soc_rbtree_cache_sync(struct snd_soc_codec *codec)
657 struct snd_soc_rbtree_ctx *rbtree_ctx;
658 struct rb_node *node;
659 struct snd_soc_rbtree_node *rbnode;
663 rbtree_ctx = codec->reg_cache;
664 for (node = rb_first(&rbtree_ctx->root); node; node = rb_next(node)) {
665 rbnode = rb_entry(node, struct snd_soc_rbtree_node, node);
666 if (rbnode->value == rbnode->defval)
668 WARN_ON(codec->writable_register &&
669 codec->writable_register(codec, rbnode->reg));
670 ret = snd_soc_cache_read(codec, rbnode->reg, &val);
673 codec->cache_bypass = 1;
674 ret = snd_soc_write(codec, rbnode->reg, val);
675 codec->cache_bypass = 0;
678 dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
685 static int snd_soc_rbtree_cache_write(struct snd_soc_codec *codec,
686 unsigned int reg, unsigned int value)
688 struct snd_soc_rbtree_ctx *rbtree_ctx;
689 struct snd_soc_rbtree_node *rbnode;
691 rbtree_ctx = codec->reg_cache;
692 rbnode = snd_soc_rbtree_lookup(&rbtree_ctx->root, reg);
694 if (rbnode->value == value)
696 rbnode->value = value;
698 /* bail out early, no need to create the rbnode yet */
702 * for uninitialized registers whose value is changed
703 * from the default zero, create an rbnode and insert
706 rbnode = kzalloc(sizeof *rbnode, GFP_KERNEL);
710 rbnode->value = value;
711 snd_soc_rbtree_insert(&rbtree_ctx->root, rbnode);
717 static int snd_soc_rbtree_cache_read(struct snd_soc_codec *codec,
718 unsigned int reg, unsigned int *value)
720 struct snd_soc_rbtree_ctx *rbtree_ctx;
721 struct snd_soc_rbtree_node *rbnode;
723 rbtree_ctx = codec->reg_cache;
724 rbnode = snd_soc_rbtree_lookup(&rbtree_ctx->root, reg);
726 *value = rbnode->value;
728 /* uninitialized registers default to 0 */
735 static int snd_soc_rbtree_cache_exit(struct snd_soc_codec *codec)
737 struct rb_node *next;
738 struct snd_soc_rbtree_ctx *rbtree_ctx;
739 struct snd_soc_rbtree_node *rbtree_node;
741 /* if we've already been called then just return */
742 rbtree_ctx = codec->reg_cache;
746 /* free up the rbtree */
747 next = rb_first(&rbtree_ctx->root);
749 rbtree_node = rb_entry(next, struct snd_soc_rbtree_node, node);
750 next = rb_next(&rbtree_node->node);
751 rb_erase(&rbtree_node->node, &rbtree_ctx->root);
755 /* release the resources */
756 kfree(codec->reg_cache);
757 codec->reg_cache = NULL;
762 static int snd_soc_rbtree_cache_init(struct snd_soc_codec *codec)
764 struct snd_soc_rbtree_node *rbtree_node;
765 struct snd_soc_rbtree_ctx *rbtree_ctx;
767 unsigned int word_size;
771 codec->reg_cache = kmalloc(sizeof *rbtree_ctx, GFP_KERNEL);
772 if (!codec->reg_cache)
775 rbtree_ctx = codec->reg_cache;
776 rbtree_ctx->root = RB_ROOT;
778 if (!codec->reg_def_copy)
782 * populate the rbtree with the initialized registers. All other
783 * registers will be inserted when they are first modified.
785 word_size = codec->driver->reg_word_size;
786 for (i = 0; i < codec->driver->reg_cache_size; ++i) {
787 val = snd_soc_get_cache_val(codec->reg_def_copy, i, word_size);
790 rbtree_node = kzalloc(sizeof *rbtree_node, GFP_KERNEL);
793 snd_soc_cache_exit(codec);
796 rbtree_node->reg = i;
797 rbtree_node->value = val;
798 rbtree_node->defval = val;
799 snd_soc_rbtree_insert(&rbtree_ctx->root, rbtree_node);
805 #ifdef CONFIG_SND_SOC_CACHE_LZO
806 struct snd_soc_lzo_ctx {
812 size_t decompressed_size;
813 unsigned long *sync_bmp;
817 #define LZO_BLOCK_NUM 8
818 static int snd_soc_lzo_block_count(void)
820 return LZO_BLOCK_NUM;
823 static int snd_soc_lzo_prepare(struct snd_soc_lzo_ctx *lzo_ctx)
825 lzo_ctx->wmem = kmalloc(LZO1X_MEM_COMPRESS, GFP_KERNEL);
831 static int snd_soc_lzo_compress(struct snd_soc_lzo_ctx *lzo_ctx)
833 size_t compress_size;
836 ret = lzo1x_1_compress(lzo_ctx->src, lzo_ctx->src_len,
837 lzo_ctx->dst, &compress_size, lzo_ctx->wmem);
838 if (ret != LZO_E_OK || compress_size > lzo_ctx->dst_len)
840 lzo_ctx->dst_len = compress_size;
844 static int snd_soc_lzo_decompress(struct snd_soc_lzo_ctx *lzo_ctx)
849 dst_len = lzo_ctx->dst_len;
850 ret = lzo1x_decompress_safe(lzo_ctx->src, lzo_ctx->src_len,
851 lzo_ctx->dst, &dst_len);
852 if (ret != LZO_E_OK || dst_len != lzo_ctx->dst_len)
857 static int snd_soc_lzo_compress_cache_block(struct snd_soc_codec *codec,
858 struct snd_soc_lzo_ctx *lzo_ctx)
862 lzo_ctx->dst_len = lzo1x_worst_compress(PAGE_SIZE);
863 lzo_ctx->dst = kmalloc(lzo_ctx->dst_len, GFP_KERNEL);
865 lzo_ctx->dst_len = 0;
869 ret = snd_soc_lzo_compress(lzo_ctx);
875 static int snd_soc_lzo_decompress_cache_block(struct snd_soc_codec *codec,
876 struct snd_soc_lzo_ctx *lzo_ctx)
880 lzo_ctx->dst_len = lzo_ctx->decompressed_size;
881 lzo_ctx->dst = kmalloc(lzo_ctx->dst_len, GFP_KERNEL);
883 lzo_ctx->dst_len = 0;
887 ret = snd_soc_lzo_decompress(lzo_ctx);
893 static inline int snd_soc_lzo_get_blkindex(struct snd_soc_codec *codec,
896 const struct snd_soc_codec_driver *codec_drv;
898 codec_drv = codec->driver;
899 return (reg * codec_drv->reg_word_size) /
900 DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count());
903 static inline int snd_soc_lzo_get_blkpos(struct snd_soc_codec *codec,
906 const struct snd_soc_codec_driver *codec_drv;
908 codec_drv = codec->driver;
909 return reg % (DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count()) /
910 codec_drv->reg_word_size);
913 static inline int snd_soc_lzo_get_blksize(struct snd_soc_codec *codec)
915 const struct snd_soc_codec_driver *codec_drv;
917 codec_drv = codec->driver;
918 return DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count());
921 static int snd_soc_lzo_cache_sync(struct snd_soc_codec *codec)
923 struct snd_soc_lzo_ctx **lzo_blocks;
928 lzo_blocks = codec->reg_cache;
929 for_each_set_bit(i, lzo_blocks[0]->sync_bmp, lzo_blocks[0]->sync_bmp_nbits) {
930 WARN_ON(codec->writable_register &&
931 codec->writable_register(codec, i));
932 ret = snd_soc_cache_read(codec, i, &val);
935 codec->cache_bypass = 1;
936 ret = snd_soc_write(codec, i, val);
937 codec->cache_bypass = 0;
940 dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
947 static int snd_soc_lzo_cache_write(struct snd_soc_codec *codec,
948 unsigned int reg, unsigned int value)
950 struct snd_soc_lzo_ctx *lzo_block, **lzo_blocks;
951 int ret, blkindex, blkpos;
952 size_t blksize, tmp_dst_len;
955 /* index of the compressed lzo block */
956 blkindex = snd_soc_lzo_get_blkindex(codec, reg);
957 /* register index within the decompressed block */
958 blkpos = snd_soc_lzo_get_blkpos(codec, reg);
959 /* size of the compressed block */
960 blksize = snd_soc_lzo_get_blksize(codec);
961 lzo_blocks = codec->reg_cache;
962 lzo_block = lzo_blocks[blkindex];
964 /* save the pointer and length of the compressed block */
965 tmp_dst = lzo_block->dst;
966 tmp_dst_len = lzo_block->dst_len;
968 /* prepare the source to be the compressed block */
969 lzo_block->src = lzo_block->dst;
970 lzo_block->src_len = lzo_block->dst_len;
972 /* decompress the block */
973 ret = snd_soc_lzo_decompress_cache_block(codec, lzo_block);
975 kfree(lzo_block->dst);
979 /* write the new value to the cache */
980 if (snd_soc_set_cache_val(lzo_block->dst, blkpos, value,
981 codec->driver->reg_word_size)) {
982 kfree(lzo_block->dst);
986 /* prepare the source to be the decompressed block */
987 lzo_block->src = lzo_block->dst;
988 lzo_block->src_len = lzo_block->dst_len;
990 /* compress the block */
991 ret = snd_soc_lzo_compress_cache_block(codec, lzo_block);
993 kfree(lzo_block->dst);
994 kfree(lzo_block->src);
998 /* set the bit so we know we have to sync this register */
999 set_bit(reg, lzo_block->sync_bmp);
1001 kfree(lzo_block->src);
1004 lzo_block->dst = tmp_dst;
1005 lzo_block->dst_len = tmp_dst_len;
1009 static int snd_soc_lzo_cache_read(struct snd_soc_codec *codec,
1010 unsigned int reg, unsigned int *value)
1012 struct snd_soc_lzo_ctx *lzo_block, **lzo_blocks;
1013 int ret, blkindex, blkpos;
1014 size_t blksize, tmp_dst_len;
1018 /* index of the compressed lzo block */
1019 blkindex = snd_soc_lzo_get_blkindex(codec, reg);
1020 /* register index within the decompressed block */
1021 blkpos = snd_soc_lzo_get_blkpos(codec, reg);
1022 /* size of the compressed block */
1023 blksize = snd_soc_lzo_get_blksize(codec);
1024 lzo_blocks = codec->reg_cache;
1025 lzo_block = lzo_blocks[blkindex];
1027 /* save the pointer and length of the compressed block */
1028 tmp_dst = lzo_block->dst;
1029 tmp_dst_len = lzo_block->dst_len;
1031 /* prepare the source to be the compressed block */
1032 lzo_block->src = lzo_block->dst;
1033 lzo_block->src_len = lzo_block->dst_len;
1035 /* decompress the block */
1036 ret = snd_soc_lzo_decompress_cache_block(codec, lzo_block);
1038 /* fetch the value from the cache */
1039 *value = snd_soc_get_cache_val(lzo_block->dst, blkpos,
1040 codec->driver->reg_word_size);
1042 kfree(lzo_block->dst);
1043 /* restore the pointer and length of the compressed block */
1044 lzo_block->dst = tmp_dst;
1045 lzo_block->dst_len = tmp_dst_len;
1049 static int snd_soc_lzo_cache_exit(struct snd_soc_codec *codec)
1051 struct snd_soc_lzo_ctx **lzo_blocks;
1054 lzo_blocks = codec->reg_cache;
1058 blkcount = snd_soc_lzo_block_count();
1060 * the pointer to the bitmap used for syncing the cache
1061 * is shared amongst all lzo_blocks. Ensure it is freed
1065 kfree(lzo_blocks[0]->sync_bmp);
1066 for (i = 0; i < blkcount; ++i) {
1067 if (lzo_blocks[i]) {
1068 kfree(lzo_blocks[i]->wmem);
1069 kfree(lzo_blocks[i]->dst);
1071 /* each lzo_block is a pointer returned by kmalloc or NULL */
1072 kfree(lzo_blocks[i]);
1075 codec->reg_cache = NULL;
1079 static int snd_soc_lzo_cache_init(struct snd_soc_codec *codec)
1081 struct snd_soc_lzo_ctx **lzo_blocks;
1083 const struct snd_soc_codec_driver *codec_drv;
1084 int ret, tofree, i, blksize, blkcount;
1085 const char *p, *end;
1086 unsigned long *sync_bmp;
1089 codec_drv = codec->driver;
1092 * If we have not been given a default register cache
1093 * then allocate a dummy zero-ed out region, compress it
1094 * and remember to free it afterwards.
1097 if (!codec->reg_def_copy)
1100 if (!codec->reg_def_copy) {
1101 codec->reg_def_copy = kzalloc(codec->reg_size, GFP_KERNEL);
1102 if (!codec->reg_def_copy)
1106 blkcount = snd_soc_lzo_block_count();
1107 codec->reg_cache = kzalloc(blkcount * sizeof *lzo_blocks,
1109 if (!codec->reg_cache) {
1113 lzo_blocks = codec->reg_cache;
1116 * allocate a bitmap to be used when syncing the cache with
1117 * the hardware. Each time a register is modified, the corresponding
1118 * bit is set in the bitmap, so we know that we have to sync
1121 bmp_size = codec_drv->reg_cache_size;
1122 sync_bmp = kmalloc(BITS_TO_LONGS(bmp_size) * sizeof(long),
1128 bitmap_zero(sync_bmp, bmp_size);
1130 /* allocate the lzo blocks and initialize them */
1131 for (i = 0; i < blkcount; ++i) {
1132 lzo_blocks[i] = kzalloc(sizeof **lzo_blocks,
1134 if (!lzo_blocks[i]) {
1139 lzo_blocks[i]->sync_bmp = sync_bmp;
1140 lzo_blocks[i]->sync_bmp_nbits = bmp_size;
1141 /* alloc the working space for the compressed block */
1142 ret = snd_soc_lzo_prepare(lzo_blocks[i]);
1147 blksize = snd_soc_lzo_get_blksize(codec);
1148 p = codec->reg_def_copy;
1149 end = codec->reg_def_copy + codec->reg_size;
1150 /* compress the register map and fill the lzo blocks */
1151 for (i = 0; i < blkcount; ++i, p += blksize) {
1152 lzo_blocks[i]->src = p;
1153 if (p + blksize > end)
1154 lzo_blocks[i]->src_len = end - p;
1156 lzo_blocks[i]->src_len = blksize;
1157 ret = snd_soc_lzo_compress_cache_block(codec,
1161 lzo_blocks[i]->decompressed_size =
1162 lzo_blocks[i]->src_len;
1166 kfree(codec->reg_def_copy);
1167 codec->reg_def_copy = NULL;
1171 snd_soc_cache_exit(codec);
1174 kfree(codec->reg_def_copy);
1175 codec->reg_def_copy = NULL;
1181 static int snd_soc_flat_cache_sync(struct snd_soc_codec *codec)
1185 const struct snd_soc_codec_driver *codec_drv;
1188 codec_drv = codec->driver;
1189 for (i = 0; i < codec_drv->reg_cache_size; ++i) {
1190 WARN_ON(codec->writable_register &&
1191 codec->writable_register(codec, i));
1192 ret = snd_soc_cache_read(codec, i, &val);
1195 if (codec->reg_def_copy)
1196 if (snd_soc_get_cache_val(codec->reg_def_copy,
1197 i, codec_drv->reg_word_size) == val)
1199 ret = snd_soc_write(codec, i, val);
1202 dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
1208 static int snd_soc_flat_cache_write(struct snd_soc_codec *codec,
1209 unsigned int reg, unsigned int value)
1211 snd_soc_set_cache_val(codec->reg_cache, reg, value,
1212 codec->driver->reg_word_size);
1216 static int snd_soc_flat_cache_read(struct snd_soc_codec *codec,
1217 unsigned int reg, unsigned int *value)
1219 *value = snd_soc_get_cache_val(codec->reg_cache, reg,
1220 codec->driver->reg_word_size);
1224 static int snd_soc_flat_cache_exit(struct snd_soc_codec *codec)
1226 if (!codec->reg_cache)
1228 kfree(codec->reg_cache);
1229 codec->reg_cache = NULL;
1233 static int snd_soc_flat_cache_init(struct snd_soc_codec *codec)
1235 const struct snd_soc_codec_driver *codec_drv;
1237 codec_drv = codec->driver;
1239 if (codec->reg_def_copy)
1240 codec->reg_cache = kmemdup(codec->reg_def_copy,
1241 codec->reg_size, GFP_KERNEL);
1243 codec->reg_cache = kzalloc(codec->reg_size, GFP_KERNEL);
1244 if (!codec->reg_cache)
1250 /* an array of all supported compression types */
1251 static const struct snd_soc_cache_ops cache_types[] = {
1252 /* Flat *must* be the first entry for fallback */
1254 .id = SND_SOC_FLAT_COMPRESSION,
1256 .init = snd_soc_flat_cache_init,
1257 .exit = snd_soc_flat_cache_exit,
1258 .read = snd_soc_flat_cache_read,
1259 .write = snd_soc_flat_cache_write,
1260 .sync = snd_soc_flat_cache_sync
1262 #ifdef CONFIG_SND_SOC_CACHE_LZO
1264 .id = SND_SOC_LZO_COMPRESSION,
1266 .init = snd_soc_lzo_cache_init,
1267 .exit = snd_soc_lzo_cache_exit,
1268 .read = snd_soc_lzo_cache_read,
1269 .write = snd_soc_lzo_cache_write,
1270 .sync = snd_soc_lzo_cache_sync
1274 .id = SND_SOC_RBTREE_COMPRESSION,
1276 .init = snd_soc_rbtree_cache_init,
1277 .exit = snd_soc_rbtree_cache_exit,
1278 .read = snd_soc_rbtree_cache_read,
1279 .write = snd_soc_rbtree_cache_write,
1280 .sync = snd_soc_rbtree_cache_sync
1284 int snd_soc_cache_init(struct snd_soc_codec *codec)
1288 for (i = 0; i < ARRAY_SIZE(cache_types); ++i)
1289 if (cache_types[i].id == codec->compress_type)
1292 /* Fall back to flat compression */
1293 if (i == ARRAY_SIZE(cache_types)) {
1294 dev_warn(codec->dev, "Could not match compress type: %d\n",
1295 codec->compress_type);
1299 mutex_init(&codec->cache_rw_mutex);
1300 codec->cache_ops = &cache_types[i];
1302 if (codec->cache_ops->init) {
1303 if (codec->cache_ops->name)
1304 dev_dbg(codec->dev, "Initializing %s cache for %s codec\n",
1305 codec->cache_ops->name, codec->name);
1306 return codec->cache_ops->init(codec);
1312 * NOTE: keep in mind that this function might be called
1315 int snd_soc_cache_exit(struct snd_soc_codec *codec)
1317 if (codec->cache_ops && codec->cache_ops->exit) {
1318 if (codec->cache_ops->name)
1319 dev_dbg(codec->dev, "Destroying %s cache for %s codec\n",
1320 codec->cache_ops->name, codec->name);
1321 return codec->cache_ops->exit(codec);
1327 * snd_soc_cache_read: Fetch the value of a given register from the cache.
1329 * @codec: CODEC to configure.
1330 * @reg: The register index.
1331 * @value: The value to be returned.
1333 int snd_soc_cache_read(struct snd_soc_codec *codec,
1334 unsigned int reg, unsigned int *value)
1338 mutex_lock(&codec->cache_rw_mutex);
1340 if (value && codec->cache_ops && codec->cache_ops->read) {
1341 ret = codec->cache_ops->read(codec, reg, value);
1342 mutex_unlock(&codec->cache_rw_mutex);
1346 mutex_unlock(&codec->cache_rw_mutex);
1349 EXPORT_SYMBOL_GPL(snd_soc_cache_read);
1352 * snd_soc_cache_write: Set the value of a given register in the cache.
1354 * @codec: CODEC to configure.
1355 * @reg: The register index.
1356 * @value: The new register value.
1358 int snd_soc_cache_write(struct snd_soc_codec *codec,
1359 unsigned int reg, unsigned int value)
1363 mutex_lock(&codec->cache_rw_mutex);
1365 if (codec->cache_ops && codec->cache_ops->write) {
1366 ret = codec->cache_ops->write(codec, reg, value);
1367 mutex_unlock(&codec->cache_rw_mutex);
1371 mutex_unlock(&codec->cache_rw_mutex);
1374 EXPORT_SYMBOL_GPL(snd_soc_cache_write);
1377 * snd_soc_cache_sync: Sync the register cache with the hardware.
1379 * @codec: CODEC to configure.
1381 * Any registers that should not be synced should be marked as
1382 * volatile. In general drivers can choose not to use the provided
1383 * syncing functionality if they so require.
1385 int snd_soc_cache_sync(struct snd_soc_codec *codec)
1390 if (!codec->cache_sync) {
1394 if (!codec->cache_ops || !codec->cache_ops->sync)
1397 if (codec->cache_ops->name)
1398 name = codec->cache_ops->name;
1402 if (codec->cache_ops->name)
1403 dev_dbg(codec->dev, "Syncing %s cache for %s codec\n",
1404 codec->cache_ops->name, codec->name);
1405 trace_snd_soc_cache_sync(codec, name, "start");
1406 ret = codec->cache_ops->sync(codec);
1408 codec->cache_sync = 0;
1409 trace_snd_soc_cache_sync(codec, name, "end");
1412 EXPORT_SYMBOL_GPL(snd_soc_cache_sync);
1414 static int snd_soc_get_reg_access_index(struct snd_soc_codec *codec,
1417 const struct snd_soc_codec_driver *codec_drv;
1418 unsigned int min, max, index;
1420 codec_drv = codec->driver;
1422 max = codec_drv->reg_access_size - 1;
1424 index = (min + max) / 2;
1425 if (codec_drv->reg_access_default[index].reg == reg)
1427 if (codec_drv->reg_access_default[index].reg < reg)
1431 } while (min <= max);
1435 int snd_soc_default_volatile_register(struct snd_soc_codec *codec,
1440 if (reg >= codec->driver->reg_cache_size)
1442 index = snd_soc_get_reg_access_index(codec, reg);
1445 return codec->driver->reg_access_default[index].vol;
1447 EXPORT_SYMBOL_GPL(snd_soc_default_volatile_register);
1449 int snd_soc_default_readable_register(struct snd_soc_codec *codec,
1454 if (reg >= codec->driver->reg_cache_size)
1456 index = snd_soc_get_reg_access_index(codec, reg);
1459 return codec->driver->reg_access_default[index].read;
1461 EXPORT_SYMBOL_GPL(snd_soc_default_readable_register);
1463 int snd_soc_default_writable_register(struct snd_soc_codec *codec,
1468 if (reg >= codec->driver->reg_cache_size)
1470 index = snd_soc_get_reg_access_index(codec, reg);
1473 return codec->driver->reg_access_default[index].write;
1475 EXPORT_SYMBOL_GPL(snd_soc_default_writable_register);