2 * Fifo-attached Serial Interface (FSI) support for SH7724
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
8 * Copyright (c) 2007 Manuel Lauss <mano@roarinelk.homelinux.net>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/delay.h>
16 #include <linux/pm_runtime.h>
18 #include <linux/slab.h>
19 #include <sound/soc.h>
20 #include <sound/sh_fsi.h>
23 #define DOFF_CTL 0x0004
24 #define DOFF_ST 0x0008
26 #define DIFF_CTL 0x0010
27 #define DIFF_ST 0x0014
32 #define MUTE_ST 0x0028
33 #define OUT_SEL 0x0030
34 #define REG_END OUT_SEL
36 #define A_MST_CTLR 0x0180
37 #define B_MST_CTLR 0x01A0
38 #define CPU_INT_ST 0x01F4
39 #define CPU_IEMSK 0x01F8
40 #define CPU_IMSK 0x01FC
45 #define CLK_RST 0x0210
46 #define SOFT_RST 0x0214
47 #define FIFO_SZ 0x0218
48 #define MREG_START A_MST_CTLR
49 #define MREG_END FIFO_SZ
53 #define CR_MONO (0x0 << 4)
54 #define CR_MONO_D (0x1 << 4)
55 #define CR_PCM (0x2 << 4)
56 #define CR_I2S (0x3 << 4)
57 #define CR_TDM (0x4 << 4)
58 #define CR_TDM_D (0x5 << 4)
59 #define CR_SPDIF 0x00100120
63 #define IRQ_HALF 0x00100000
64 #define FIFO_CLR 0x00000001
67 #define ERR_OVER 0x00000010
68 #define ERR_UNDER 0x00000001
69 #define ST_ERR (ERR_OVER | ERR_UNDER)
72 #define ACKMD_MASK 0x00007000
73 #define BPFMD_MASK 0x00000700
76 #define BP (1 << 4) /* Fix the signal of Biphase output */
77 #define SE (1 << 0) /* Fix the master clock */
80 #define B_CLK 0x00000010
81 #define A_CLK 0x00000001
83 /* IO SHIFT / MACRO */
88 #define AB_IO(param, shift) (param << shift)
91 #define PBSR (1 << 12) /* Port B Software Reset */
92 #define PASR (1 << 8) /* Port A Software Reset */
93 #define IR (1 << 4) /* Interrupt Reset */
94 #define FSISR (1 << 0) /* Software Reset */
97 #define FIFO_SZ_MASK 0x7
99 #define FSI_RATES SNDRV_PCM_RATE_8000_96000
101 #define FSI_FMTS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE)
104 * FSI driver use below type name for variable
106 * xxx_len : data length
107 * xxx_width : data width
108 * xxx_offset : data offset
109 * xxx_num : number of data
117 struct snd_pcm_substream *substream;
130 struct fsi_master *master;
132 struct fsi_stream playback;
133 struct fsi_stream capture;
151 struct fsi_priv fsia;
152 struct fsi_priv fsib;
153 struct fsi_core *core;
154 struct sh_fsi_platform_info *info;
159 * basic read write function
162 static void __fsi_reg_write(u32 reg, u32 data)
164 /* valid data area is 24bit */
167 __raw_writel(data, reg);
170 static u32 __fsi_reg_read(u32 reg)
172 return __raw_readl(reg);
175 static void __fsi_reg_mask_set(u32 reg, u32 mask, u32 data)
177 u32 val = __fsi_reg_read(reg);
182 __fsi_reg_write(reg, val);
185 static void fsi_reg_write(struct fsi_priv *fsi, u32 reg, u32 data)
188 pr_err("fsi: register access err (%s)\n", __func__);
192 __fsi_reg_write((u32)(fsi->base + reg), data);
195 static u32 fsi_reg_read(struct fsi_priv *fsi, u32 reg)
198 pr_err("fsi: register access err (%s)\n", __func__);
202 return __fsi_reg_read((u32)(fsi->base + reg));
205 static void fsi_reg_mask_set(struct fsi_priv *fsi, u32 reg, u32 mask, u32 data)
208 pr_err("fsi: register access err (%s)\n", __func__);
212 __fsi_reg_mask_set((u32)(fsi->base + reg), mask, data);
215 static void fsi_master_write(struct fsi_master *master, u32 reg, u32 data)
219 if ((reg < MREG_START) ||
221 pr_err("fsi: register access err (%s)\n", __func__);
225 spin_lock_irqsave(&master->lock, flags);
226 __fsi_reg_write((u32)(master->base + reg), data);
227 spin_unlock_irqrestore(&master->lock, flags);
230 static u32 fsi_master_read(struct fsi_master *master, u32 reg)
235 if ((reg < MREG_START) ||
237 pr_err("fsi: register access err (%s)\n", __func__);
241 spin_lock_irqsave(&master->lock, flags);
242 ret = __fsi_reg_read((u32)(master->base + reg));
243 spin_unlock_irqrestore(&master->lock, flags);
248 static void fsi_master_mask_set(struct fsi_master *master,
249 u32 reg, u32 mask, u32 data)
253 if ((reg < MREG_START) ||
255 pr_err("fsi: register access err (%s)\n", __func__);
259 spin_lock_irqsave(&master->lock, flags);
260 __fsi_reg_mask_set((u32)(master->base + reg), mask, data);
261 spin_unlock_irqrestore(&master->lock, flags);
268 static struct fsi_master *fsi_get_master(struct fsi_priv *fsi)
273 static int fsi_is_port_a(struct fsi_priv *fsi)
275 return fsi->master->base == fsi->base;
278 static struct snd_soc_dai *fsi_get_dai(struct snd_pcm_substream *substream)
280 struct snd_soc_pcm_runtime *rtd = substream->private_data;
285 static struct fsi_priv *fsi_get_priv(struct snd_pcm_substream *substream)
287 struct snd_soc_dai *dai = fsi_get_dai(substream);
288 struct fsi_master *master = snd_soc_dai_get_drvdata(dai);
291 return &master->fsia;
293 return &master->fsib;
296 static u32 fsi_get_info_flags(struct fsi_priv *fsi)
298 int is_porta = fsi_is_port_a(fsi);
299 struct fsi_master *master = fsi_get_master(fsi);
301 return is_porta ? master->info->porta_flags :
302 master->info->portb_flags;
305 static inline int fsi_stream_is_play(int stream)
307 return stream == SNDRV_PCM_STREAM_PLAYBACK;
310 static inline int fsi_is_play(struct snd_pcm_substream *substream)
312 return fsi_stream_is_play(substream->stream);
315 static inline struct fsi_stream *fsi_get_stream(struct fsi_priv *fsi,
318 return is_play ? &fsi->playback : &fsi->capture;
321 static int fsi_is_master_mode(struct fsi_priv *fsi, int is_play)
324 u32 flags = fsi_get_info_flags(fsi);
326 mode = is_play ? SH_FSI_OUT_SLAVE_MODE : SH_FSI_IN_SLAVE_MODE;
333 return (mode & flags) != mode;
336 static u32 fsi_get_port_shift(struct fsi_priv *fsi, int is_play)
338 int is_porta = fsi_is_port_a(fsi);
342 shift = is_play ? AO_SHIFT : AI_SHIFT;
344 shift = is_play ? BO_SHIFT : BI_SHIFT;
349 static void fsi_stream_push(struct fsi_priv *fsi,
351 struct snd_pcm_substream *substream,
355 struct fsi_stream *io = fsi_get_stream(fsi, is_play);
357 io->substream = substream;
358 io->buff_len = buffer_len;
360 io->period_len = period_len;
364 static void fsi_stream_pop(struct fsi_priv *fsi, int is_play)
366 struct fsi_stream *io = fsi_get_stream(fsi, is_play);
368 io->substream = NULL;
375 static int fsi_get_fifo_data_num(struct fsi_priv *fsi, int is_play)
378 u32 reg = is_play ? DOFF_ST : DIFF_ST;
379 struct fsi_stream *io = fsi_get_stream(fsi, is_play);
382 status = fsi_reg_read(fsi, reg);
383 data_num = 0x1ff & (status >> 8);
384 data_num *= io->chan_num;
389 static int fsi_len2num(int len, int width)
394 #define fsi_num2offset(a, b) fsi_num2len(a, b)
395 static int fsi_num2len(int num, int width)
400 static int fsi_get_frame_width(struct fsi_priv *fsi, int is_play)
402 struct fsi_stream *io = fsi_get_stream(fsi, is_play);
403 struct snd_pcm_substream *substream = io->substream;
404 struct snd_pcm_runtime *runtime = substream->runtime;
406 return frames_to_bytes(runtime, 1) / io->chan_num;
413 static u8 *fsi_dma_get_area(struct fsi_priv *fsi, int stream)
415 int is_play = fsi_stream_is_play(stream);
416 struct fsi_stream *io = fsi_get_stream(fsi, is_play);
418 return io->substream->runtime->dma_area + io->buff_offset;
421 static void fsi_dma_soft_push16(struct fsi_priv *fsi, int num)
426 start = (u16 *)fsi_dma_get_area(fsi, SNDRV_PCM_STREAM_PLAYBACK);
428 for (i = 0; i < num; i++)
429 fsi_reg_write(fsi, DODT, ((u32)*(start + i) << 8));
432 static void fsi_dma_soft_pop16(struct fsi_priv *fsi, int num)
437 start = (u16 *)fsi_dma_get_area(fsi, SNDRV_PCM_STREAM_CAPTURE);
440 for (i = 0; i < num; i++)
441 *(start + i) = (u16)(fsi_reg_read(fsi, DIDT) >> 8);
444 static void fsi_dma_soft_push32(struct fsi_priv *fsi, int num)
449 start = (u32 *)fsi_dma_get_area(fsi, SNDRV_PCM_STREAM_PLAYBACK);
452 for (i = 0; i < num; i++)
453 fsi_reg_write(fsi, DODT, *(start + i));
456 static void fsi_dma_soft_pop32(struct fsi_priv *fsi, int num)
461 start = (u32 *)fsi_dma_get_area(fsi, SNDRV_PCM_STREAM_CAPTURE);
463 for (i = 0; i < num; i++)
464 *(start + i) = fsi_reg_read(fsi, DIDT);
471 static void fsi_irq_enable(struct fsi_priv *fsi, int is_play)
473 u32 data = AB_IO(1, fsi_get_port_shift(fsi, is_play));
474 struct fsi_master *master = fsi_get_master(fsi);
476 fsi_master_mask_set(master, master->core->imsk, data, data);
477 fsi_master_mask_set(master, master->core->iemsk, data, data);
480 static void fsi_irq_disable(struct fsi_priv *fsi, int is_play)
482 u32 data = AB_IO(1, fsi_get_port_shift(fsi, is_play));
483 struct fsi_master *master = fsi_get_master(fsi);
485 fsi_master_mask_set(master, master->core->imsk, data, 0);
486 fsi_master_mask_set(master, master->core->iemsk, data, 0);
489 static u32 fsi_irq_get_status(struct fsi_master *master)
491 return fsi_master_read(master, master->core->int_st);
494 static void fsi_irq_clear_all_status(struct fsi_master *master)
496 fsi_master_write(master, master->core->int_st, 0);
499 static void fsi_irq_clear_status(struct fsi_priv *fsi)
502 struct fsi_master *master = fsi_get_master(fsi);
504 data |= AB_IO(1, fsi_get_port_shift(fsi, 0));
505 data |= AB_IO(1, fsi_get_port_shift(fsi, 1));
507 /* clear interrupt factor */
508 fsi_master_mask_set(master, master->core->int_st, data, 0);
512 * SPDIF master clock function
514 * These functions are used later FSI2
516 static void fsi_spdif_clk_ctrl(struct fsi_priv *fsi, int enable)
518 struct fsi_master *master = fsi_get_master(fsi);
521 if (master->core->ver < 2) {
522 pr_err("fsi: register access err (%s)\n", __func__);
527 fsi_master_mask_set(master, fsi->mst_ctrl, val, val);
529 fsi_master_mask_set(master, fsi->mst_ctrl, val, 0);
536 static void fsi_clk_ctrl(struct fsi_priv *fsi, int enable)
538 u32 val = fsi_is_port_a(fsi) ? (1 << 0) : (1 << 4);
539 struct fsi_master *master = fsi_get_master(fsi);
542 fsi_master_mask_set(master, CLK_RST, val, val);
544 fsi_master_mask_set(master, CLK_RST, val, 0);
547 static void fsi_fifo_init(struct fsi_priv *fsi,
549 struct snd_soc_dai *dai)
551 struct fsi_master *master = fsi_get_master(fsi);
552 struct fsi_stream *io = fsi_get_stream(fsi, is_play);
555 /* get on-chip RAM capacity */
556 shift = fsi_master_read(master, FIFO_SZ);
557 shift >>= fsi_get_port_shift(fsi, is_play);
558 shift &= FIFO_SZ_MASK;
559 io->fifo_max_num = 256 << shift;
560 dev_dbg(dai->dev, "fifo = %d words\n", io->fifo_max_num);
563 * The maximum number of sample data varies depending
564 * on the number of channels selected for the format.
566 * FIFOs are used in 4-channel units in 3-channel mode
567 * and in 8-channel units in 5- to 7-channel mode
568 * meaning that more FIFOs than the required size of DPRAM
571 * ex) if 256 words of DP-RAM is connected
572 * 1 channel: 256 (256 x 1 = 256)
573 * 2 channels: 128 (128 x 2 = 256)
574 * 3 channels: 64 ( 64 x 3 = 192)
575 * 4 channels: 64 ( 64 x 4 = 256)
576 * 5 channels: 32 ( 32 x 5 = 160)
577 * 6 channels: 32 ( 32 x 6 = 192)
578 * 7 channels: 32 ( 32 x 7 = 224)
579 * 8 channels: 32 ( 32 x 8 = 256)
581 for (i = 1; i < io->chan_num; i <<= 1)
582 io->fifo_max_num >>= 1;
583 dev_dbg(dai->dev, "%d channel %d store\n",
584 io->chan_num, io->fifo_max_num);
586 ctrl = is_play ? DOFF_CTL : DIFF_CTL;
588 /* set interrupt generation factor */
589 fsi_reg_write(fsi, ctrl, IRQ_HALF);
592 fsi_reg_mask_set(fsi, ctrl, FIFO_CLR, FIFO_CLR);
595 static void fsi_soft_all_reset(struct fsi_master *master)
598 fsi_master_mask_set(master, SOFT_RST, PASR | PBSR, 0);
602 fsi_master_mask_set(master, SOFT_RST, FSISR, 0);
603 fsi_master_mask_set(master, SOFT_RST, FSISR, FSISR);
607 static int fsi_fifo_data_ctrl(struct fsi_priv *fsi, int startup, int stream)
609 struct snd_pcm_runtime *runtime;
610 struct snd_pcm_substream *substream = NULL;
611 int is_play = fsi_stream_is_play(stream);
612 struct fsi_stream *io = fsi_get_stream(fsi, is_play);
613 u32 status_reg = is_play ? DOFF_ST : DIFF_ST;
614 int data_residue_num;
619 void (*fn)(struct fsi_priv *fsi, int size);
623 !io->substream->runtime)
627 substream = io->substream;
628 runtime = substream->runtime;
630 /* FSI FIFO has limit.
631 * So, this driver can not send periods data at a time
633 if (io->buff_offset >=
634 fsi_num2offset(io->period_num + 1, io->period_len)) {
637 io->period_num = (io->period_num + 1) % runtime->periods;
639 if (0 == io->period_num)
643 /* get 1 channel data width */
644 ch_width = fsi_get_frame_width(fsi, is_play);
646 /* get residue data number of alsa */
647 data_residue_num = fsi_len2num(io->buff_len - io->buff_offset,
654 * data_num_max : number of FSI fifo free space
655 * data_num : number of ALSA residue data
657 data_num_max = io->fifo_max_num * io->chan_num;
658 data_num_max -= fsi_get_fifo_data_num(fsi, is_play);
660 data_num = data_residue_num;
664 fn = fsi_dma_soft_push16;
667 fn = fsi_dma_soft_push32;
676 * data_num_max : number of ALSA free space
677 * data_num : number of data in FSI fifo
679 data_num_max = data_residue_num;
680 data_num = fsi_get_fifo_data_num(fsi, is_play);
684 fn = fsi_dma_soft_pop16;
687 fn = fsi_dma_soft_pop32;
694 data_num = min(data_num, data_num_max);
698 /* update buff_offset */
699 io->buff_offset += fsi_num2offset(data_num, ch_width);
701 /* check fifo status */
703 struct snd_soc_dai *dai = fsi_get_dai(substream);
704 u32 status = fsi_reg_read(fsi, status_reg);
706 if (status & ERR_OVER)
707 dev_err(dai->dev, "over run\n");
708 if (status & ERR_UNDER)
709 dev_err(dai->dev, "under run\n");
711 fsi_reg_write(fsi, status_reg, 0);
714 fsi_irq_enable(fsi, is_play);
717 snd_pcm_period_elapsed(substream);
722 static int fsi_data_pop(struct fsi_priv *fsi, int startup)
724 return fsi_fifo_data_ctrl(fsi, startup, SNDRV_PCM_STREAM_CAPTURE);
727 static int fsi_data_push(struct fsi_priv *fsi, int startup)
729 return fsi_fifo_data_ctrl(fsi, startup, SNDRV_PCM_STREAM_PLAYBACK);
732 static irqreturn_t fsi_interrupt(int irq, void *data)
734 struct fsi_master *master = data;
735 u32 int_st = fsi_irq_get_status(master);
737 /* clear irq status */
738 fsi_master_mask_set(master, SOFT_RST, IR, 0);
739 fsi_master_mask_set(master, SOFT_RST, IR, IR);
741 if (int_st & AB_IO(1, AO_SHIFT))
742 fsi_data_push(&master->fsia, 0);
743 if (int_st & AB_IO(1, BO_SHIFT))
744 fsi_data_push(&master->fsib, 0);
745 if (int_st & AB_IO(1, AI_SHIFT))
746 fsi_data_pop(&master->fsia, 0);
747 if (int_st & AB_IO(1, BI_SHIFT))
748 fsi_data_pop(&master->fsib, 0);
750 fsi_irq_clear_all_status(master);
759 static int fsi_dai_startup(struct snd_pcm_substream *substream,
760 struct snd_soc_dai *dai)
762 struct fsi_priv *fsi = fsi_get_priv(substream);
763 struct fsi_master *master = fsi_get_master(fsi);
764 struct fsi_stream *io;
765 u32 flags = fsi_get_info_flags(fsi);
769 int is_play = fsi_is_play(substream);
772 io = fsi_get_stream(fsi, is_play);
774 pm_runtime_get_sync(dai->dev);
777 data = is_play ? (1 << 0) : (1 << 4);
778 is_master = fsi_is_master_mode(fsi, is_play);
780 fsi_reg_mask_set(fsi, CKG1, data, data);
782 fsi_reg_mask_set(fsi, CKG1, data, 0);
784 /* clock inversion (CKG2) */
786 if (SH_FSI_LRM_INV & flags)
788 if (SH_FSI_BRM_INV & flags)
790 if (SH_FSI_LRS_INV & flags)
792 if (SH_FSI_BRS_INV & flags)
795 fsi_reg_write(fsi, CKG2, data);
799 reg = is_play ? DO_FMT : DI_FMT;
800 fmt = is_play ? SH_FSI_GET_OFMT(flags) : SH_FSI_GET_IFMT(flags);
802 case SH_FSI_FMT_MONO:
806 case SH_FSI_FMT_MONO_DELAY:
819 io->chan_num = is_play ?
820 SH_FSI_GET_CH_O(flags) : SH_FSI_GET_CH_I(flags);
821 data = CR_TDM | (io->chan_num - 1);
823 case SH_FSI_FMT_TDM_DELAY:
824 io->chan_num = is_play ?
825 SH_FSI_GET_CH_O(flags) : SH_FSI_GET_CH_I(flags);
826 data = CR_TDM_D | (io->chan_num - 1);
828 case SH_FSI_FMT_SPDIF:
829 if (master->core->ver < 2) {
830 dev_err(dai->dev, "This FSI can not use SPDIF\n");
835 fsi_spdif_clk_ctrl(fsi, 1);
836 fsi_reg_mask_set(fsi, OUT_SEL, 0x0010, 0x0010);
839 dev_err(dai->dev, "unknown format.\n");
842 fsi_reg_write(fsi, reg, data);
845 fsi_irq_disable(fsi, is_play);
846 fsi_irq_clear_status(fsi);
849 fsi_fifo_init(fsi, is_play, dai);
854 static void fsi_dai_shutdown(struct snd_pcm_substream *substream,
855 struct snd_soc_dai *dai)
857 struct fsi_priv *fsi = fsi_get_priv(substream);
858 int is_play = fsi_is_play(substream);
859 struct fsi_master *master = fsi_get_master(fsi);
860 int (*set_rate)(struct device *dev, int is_porta, int rate, int enable);
862 fsi_irq_disable(fsi, is_play);
863 fsi_clk_ctrl(fsi, 0);
865 set_rate = master->info->set_rate;
866 if (set_rate && fsi->rate)
867 set_rate(dai->dev, fsi_is_port_a(fsi), fsi->rate, 0);
870 pm_runtime_put_sync(dai->dev);
873 static int fsi_dai_trigger(struct snd_pcm_substream *substream, int cmd,
874 struct snd_soc_dai *dai)
876 struct fsi_priv *fsi = fsi_get_priv(substream);
877 struct snd_pcm_runtime *runtime = substream->runtime;
878 int is_play = fsi_is_play(substream);
882 case SNDRV_PCM_TRIGGER_START:
883 fsi_stream_push(fsi, is_play, substream,
884 frames_to_bytes(runtime, runtime->buffer_size),
885 frames_to_bytes(runtime, runtime->period_size));
886 ret = is_play ? fsi_data_push(fsi, 1) : fsi_data_pop(fsi, 1);
888 case SNDRV_PCM_TRIGGER_STOP:
889 fsi_irq_disable(fsi, is_play);
890 fsi_stream_pop(fsi, is_play);
897 static int fsi_dai_hw_params(struct snd_pcm_substream *substream,
898 struct snd_pcm_hw_params *params,
899 struct snd_soc_dai *dai)
901 struct fsi_priv *fsi = fsi_get_priv(substream);
902 struct fsi_master *master = fsi_get_master(fsi);
903 int (*set_rate)(struct device *dev, int is_porta, int rate, int enable);
904 int fsi_ver = master->core->ver;
905 int is_play = fsi_is_play(substream);
906 long rate = params_rate(params);
909 /* if slave mode, set_rate is not needed */
910 if (!fsi_is_master_mode(fsi, is_play))
913 /* it is error if no set_rate */
914 set_rate = master->info->set_rate;
918 ret = set_rate(dai->dev, fsi_is_port_a(fsi), rate, 1);
919 if (ret < 0) /* error */
926 switch (ret & SH_FSI_ACKMD_MASK) {
929 case SH_FSI_ACKMD_512:
932 case SH_FSI_ACKMD_256:
935 case SH_FSI_ACKMD_128:
938 case SH_FSI_ACKMD_64:
941 case SH_FSI_ACKMD_32:
943 dev_err(dai->dev, "unsupported ACKMD\n");
949 switch (ret & SH_FSI_BPFMD_MASK) {
952 case SH_FSI_BPFMD_32:
955 case SH_FSI_BPFMD_64:
958 case SH_FSI_BPFMD_128:
961 case SH_FSI_BPFMD_256:
964 case SH_FSI_BPFMD_512:
967 case SH_FSI_BPFMD_16:
969 dev_err(dai->dev, "unsupported ACKMD\n");
975 fsi_reg_mask_set(fsi, CKG1, (ACKMD_MASK | BPFMD_MASK) , data);
977 fsi_clk_ctrl(fsi, 1);
985 static struct snd_soc_dai_ops fsi_dai_ops = {
986 .startup = fsi_dai_startup,
987 .shutdown = fsi_dai_shutdown,
988 .trigger = fsi_dai_trigger,
989 .hw_params = fsi_dai_hw_params,
996 static struct snd_pcm_hardware fsi_pcm_hardware = {
997 .info = SNDRV_PCM_INFO_INTERLEAVED |
998 SNDRV_PCM_INFO_MMAP |
999 SNDRV_PCM_INFO_MMAP_VALID |
1000 SNDRV_PCM_INFO_PAUSE,
1001 .formats = FSI_FMTS,
1007 .buffer_bytes_max = 64 * 1024,
1008 .period_bytes_min = 32,
1009 .period_bytes_max = 8192,
1015 static int fsi_pcm_open(struct snd_pcm_substream *substream)
1017 struct snd_pcm_runtime *runtime = substream->runtime;
1020 snd_soc_set_runtime_hwparams(substream, &fsi_pcm_hardware);
1022 ret = snd_pcm_hw_constraint_integer(runtime,
1023 SNDRV_PCM_HW_PARAM_PERIODS);
1028 static int fsi_hw_params(struct snd_pcm_substream *substream,
1029 struct snd_pcm_hw_params *hw_params)
1031 return snd_pcm_lib_malloc_pages(substream,
1032 params_buffer_bytes(hw_params));
1035 static int fsi_hw_free(struct snd_pcm_substream *substream)
1037 return snd_pcm_lib_free_pages(substream);
1040 static snd_pcm_uframes_t fsi_pointer(struct snd_pcm_substream *substream)
1042 struct snd_pcm_runtime *runtime = substream->runtime;
1043 struct fsi_priv *fsi = fsi_get_priv(substream);
1044 struct fsi_stream *io = fsi_get_stream(fsi, fsi_is_play(substream));
1047 location = (io->buff_offset - 1);
1051 return bytes_to_frames(runtime, location);
1054 static struct snd_pcm_ops fsi_pcm_ops = {
1055 .open = fsi_pcm_open,
1056 .ioctl = snd_pcm_lib_ioctl,
1057 .hw_params = fsi_hw_params,
1058 .hw_free = fsi_hw_free,
1059 .pointer = fsi_pointer,
1066 #define PREALLOC_BUFFER (32 * 1024)
1067 #define PREALLOC_BUFFER_MAX (32 * 1024)
1069 static void fsi_pcm_free(struct snd_pcm *pcm)
1071 snd_pcm_lib_preallocate_free_for_all(pcm);
1074 static int fsi_pcm_new(struct snd_card *card,
1075 struct snd_soc_dai *dai,
1076 struct snd_pcm *pcm)
1079 * dont use SNDRV_DMA_TYPE_DEV, since it will oops the SH kernel
1080 * in MMAP mode (i.e. aplay -M)
1082 return snd_pcm_lib_preallocate_pages_for_all(
1084 SNDRV_DMA_TYPE_CONTINUOUS,
1085 snd_dma_continuous_data(GFP_KERNEL),
1086 PREALLOC_BUFFER, PREALLOC_BUFFER_MAX);
1093 static struct snd_soc_dai_driver fsi_soc_dai[] = {
1098 .formats = FSI_FMTS,
1104 .formats = FSI_FMTS,
1108 .ops = &fsi_dai_ops,
1114 .formats = FSI_FMTS,
1120 .formats = FSI_FMTS,
1124 .ops = &fsi_dai_ops,
1128 static struct snd_soc_platform_driver fsi_soc_platform = {
1129 .ops = &fsi_pcm_ops,
1130 .pcm_new = fsi_pcm_new,
1131 .pcm_free = fsi_pcm_free,
1138 static int fsi_probe(struct platform_device *pdev)
1140 struct fsi_master *master;
1141 const struct platform_device_id *id_entry;
1142 struct resource *res;
1146 id_entry = pdev->id_entry;
1148 dev_err(&pdev->dev, "unknown fsi device\n");
1152 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1153 irq = platform_get_irq(pdev, 0);
1154 if (!res || (int)irq <= 0) {
1155 dev_err(&pdev->dev, "Not enough FSI platform resources.\n");
1160 master = kzalloc(sizeof(*master), GFP_KERNEL);
1162 dev_err(&pdev->dev, "Could not allocate master\n");
1167 master->base = ioremap_nocache(res->start, resource_size(res));
1168 if (!master->base) {
1170 dev_err(&pdev->dev, "Unable to ioremap FSI registers.\n");
1174 /* master setting */
1176 master->info = pdev->dev.platform_data;
1177 master->core = (struct fsi_core *)id_entry->driver_data;
1178 spin_lock_init(&master->lock);
1181 master->fsia.base = master->base;
1182 master->fsia.master = master;
1183 master->fsia.mst_ctrl = A_MST_CTLR;
1186 master->fsib.base = master->base + 0x40;
1187 master->fsib.master = master;
1188 master->fsib.mst_ctrl = B_MST_CTLR;
1190 pm_runtime_enable(&pdev->dev);
1191 pm_runtime_resume(&pdev->dev);
1192 dev_set_drvdata(&pdev->dev, master);
1194 fsi_soft_all_reset(master);
1196 ret = request_irq(irq, &fsi_interrupt, IRQF_DISABLED,
1197 id_entry->name, master);
1199 dev_err(&pdev->dev, "irq request err\n");
1203 ret = snd_soc_register_platform(&pdev->dev, &fsi_soc_platform);
1205 dev_err(&pdev->dev, "cannot snd soc register\n");
1209 return snd_soc_register_dais(&pdev->dev, fsi_soc_dai, ARRAY_SIZE(fsi_soc_dai));
1212 free_irq(irq, master);
1214 iounmap(master->base);
1215 pm_runtime_disable(&pdev->dev);
1223 static int fsi_remove(struct platform_device *pdev)
1225 struct fsi_master *master;
1227 master = dev_get_drvdata(&pdev->dev);
1229 snd_soc_unregister_dais(&pdev->dev, ARRAY_SIZE(fsi_soc_dai));
1230 snd_soc_unregister_platform(&pdev->dev);
1232 pm_runtime_disable(&pdev->dev);
1234 free_irq(master->irq, master);
1236 iounmap(master->base);
1242 static int fsi_runtime_nop(struct device *dev)
1244 /* Runtime PM callback shared between ->runtime_suspend()
1245 * and ->runtime_resume(). Simply returns success.
1247 * This driver re-initializes all registers after
1248 * pm_runtime_get_sync() anyway so there is no need
1249 * to save and restore registers here.
1254 static struct dev_pm_ops fsi_pm_ops = {
1255 .runtime_suspend = fsi_runtime_nop,
1256 .runtime_resume = fsi_runtime_nop,
1259 static struct fsi_core fsi1_core = {
1268 static struct fsi_core fsi2_core = {
1272 .int_st = CPU_INT_ST,
1277 static struct platform_device_id fsi_id_table[] = {
1278 { "sh_fsi", (kernel_ulong_t)&fsi1_core },
1279 { "sh_fsi2", (kernel_ulong_t)&fsi2_core },
1282 MODULE_DEVICE_TABLE(platform, fsi_id_table);
1284 static struct platform_driver fsi_driver = {
1286 .name = "fsi-pcm-audio",
1290 .remove = fsi_remove,
1291 .id_table = fsi_id_table,
1294 static int __init fsi_mobile_init(void)
1296 return platform_driver_register(&fsi_driver);
1299 static void __exit fsi_mobile_exit(void)
1301 platform_driver_unregister(&fsi_driver);
1304 module_init(fsi_mobile_init);
1305 module_exit(fsi_mobile_exit);
1307 MODULE_LICENSE("GPL");
1308 MODULE_DESCRIPTION("SuperH onchip FSI audio driver");
1309 MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");