2 * wm8903.c -- WM8903 ALSA SoC Audio driver
4 * Copyright 2008 Wolfson Microelectronics
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 * - TDM mode configuration.
14 * - Digital microphone support.
17 #include <linux/module.h>
18 #include <linux/moduleparam.h>
19 #include <linux/init.h>
20 #include <linux/completion.h>
21 #include <linux/delay.h>
23 #include <linux/i2c.h>
24 #include <linux/platform_device.h>
25 #include <sound/core.h>
26 #include <sound/pcm.h>
27 #include <sound/pcm_params.h>
28 #include <sound/tlv.h>
29 #include <sound/soc.h>
30 #include <sound/soc-dapm.h>
31 #include <sound/initval.h>
32 #include <sound/wm8903.h>
36 /* Register defaults at reset */
37 static u16 wm8903_reg_defaults[] = {
38 0x8903, /* R0 - SW Reset and ID */
39 0x0000, /* R1 - Revision Number */
42 0x0018, /* R4 - Bias Control 0 */
43 0x0000, /* R5 - VMID Control 0 */
44 0x0000, /* R6 - Mic Bias Control 0 */
46 0x0001, /* R8 - Analogue DAC 0 */
48 0x0001, /* R10 - Analogue ADC 0 */
50 0x0000, /* R12 - Power Management 0 */
51 0x0000, /* R13 - Power Management 1 */
52 0x0000, /* R14 - Power Management 2 */
53 0x0000, /* R15 - Power Management 3 */
54 0x0000, /* R16 - Power Management 4 */
55 0x0000, /* R17 - Power Management 5 */
56 0x0000, /* R18 - Power Management 6 */
58 0x0400, /* R20 - Clock Rates 0 */
59 0x0D07, /* R21 - Clock Rates 1 */
60 0x0000, /* R22 - Clock Rates 2 */
62 0x0050, /* R24 - Audio Interface 0 */
63 0x0242, /* R25 - Audio Interface 1 */
64 0x0008, /* R26 - Audio Interface 2 */
65 0x0022, /* R27 - Audio Interface 3 */
68 0x00C0, /* R30 - DAC Digital Volume Left */
69 0x00C0, /* R31 - DAC Digital Volume Right */
70 0x0000, /* R32 - DAC Digital 0 */
71 0x0000, /* R33 - DAC Digital 1 */
74 0x00C0, /* R36 - ADC Digital Volume Left */
75 0x00C0, /* R37 - ADC Digital Volume Right */
76 0x0000, /* R38 - ADC Digital 0 */
77 0x0073, /* R39 - Digital Microphone 0 */
78 0x09BF, /* R40 - DRC 0 */
79 0x3241, /* R41 - DRC 1 */
80 0x0020, /* R42 - DRC 2 */
81 0x0000, /* R43 - DRC 3 */
82 0x0085, /* R44 - Analogue Left Input 0 */
83 0x0085, /* R45 - Analogue Right Input 0 */
84 0x0044, /* R46 - Analogue Left Input 1 */
85 0x0044, /* R47 - Analogue Right Input 1 */
88 0x0008, /* R50 - Analogue Left Mix 0 */
89 0x0004, /* R51 - Analogue Right Mix 0 */
90 0x0000, /* R52 - Analogue Spk Mix Left 0 */
91 0x0000, /* R53 - Analogue Spk Mix Left 1 */
92 0x0000, /* R54 - Analogue Spk Mix Right 0 */
93 0x0000, /* R55 - Analogue Spk Mix Right 1 */
95 0x002D, /* R57 - Analogue OUT1 Left */
96 0x002D, /* R58 - Analogue OUT1 Right */
97 0x0039, /* R59 - Analogue OUT2 Left */
98 0x0039, /* R60 - Analogue OUT2 Right */
100 0x0139, /* R62 - Analogue OUT3 Left */
101 0x0139, /* R63 - Analogue OUT3 Right */
103 0x0000, /* R65 - Analogue SPK Output Control 0 */
105 0x0010, /* R67 - DC Servo 0 */
107 0x00A4, /* R69 - DC Servo 2 */
128 0x0000, /* R90 - Analogue HP 0 */
132 0x0000, /* R94 - Analogue Lineout 0 */
136 0x0000, /* R98 - Charge Pump 0 */
142 0x0000, /* R104 - Class W 0 */
146 0x0000, /* R108 - Write Sequencer 0 */
147 0x0000, /* R109 - Write Sequencer 1 */
148 0x0000, /* R110 - Write Sequencer 2 */
149 0x0000, /* R111 - Write Sequencer 3 */
150 0x0000, /* R112 - Write Sequencer 4 */
152 0x0000, /* R114 - Control Interface */
154 0x00A8, /* R116 - GPIO Control 1 */
155 0x00A8, /* R117 - GPIO Control 2 */
156 0x00A8, /* R118 - GPIO Control 3 */
157 0x0220, /* R119 - GPIO Control 4 */
158 0x01A0, /* R120 - GPIO Control 5 */
159 0x0000, /* R121 - Interrupt Status 1 */
160 0xFFFF, /* R122 - Interrupt Status 1 Mask */
161 0x0000, /* R123 - Interrupt Polarity 1 */
164 0x0000, /* R126 - Interrupt Control */
167 0x0000, /* R129 - Control Interface Test 1 */
187 0x6810, /* R149 - Charge Pump Test 1 */
202 0x0028, /* R164 - Clock Rate Test 4 */
210 0x0000, /* R172 - Analogue Output Bias 0 */
214 struct snd_soc_codec codec;
215 u16 reg_cache[ARRAY_SIZE(wm8903_reg_defaults)];
219 /* Reference counts */
224 struct completion wseq;
226 struct snd_pcm_substream *master_substream;
227 struct snd_pcm_substream *slave_substream;
230 static int wm8903_volatile_register(unsigned int reg)
233 case WM8903_SW_RESET_AND_ID:
234 case WM8903_REVISION_NUMBER:
235 case WM8903_INTERRUPT_STATUS_1:
236 case WM8903_WRITE_SEQUENCER_4:
244 static int wm8903_run_sequence(struct snd_soc_codec *codec, unsigned int start)
247 struct i2c_client *i2c = codec->control_data;
248 struct wm8903_priv *wm8903 = codec->private_data;
252 /* Enable the sequencer if it's not already on */
253 reg[0] = snd_soc_read(codec, WM8903_WRITE_SEQUENCER_0);
254 snd_soc_write(codec, WM8903_WRITE_SEQUENCER_0,
255 reg[0] | WM8903_WSEQ_ENA);
257 dev_dbg(&i2c->dev, "Starting sequence at %d\n", start);
259 snd_soc_write(codec, WM8903_WRITE_SEQUENCER_3,
260 start | WM8903_WSEQ_START);
262 /* Wait for it to complete. If we have the interrupt wired up then
263 * that will break us out of the poll early.
266 wait_for_completion_timeout(&wm8903->wseq,
267 msecs_to_jiffies(10));
269 reg[4] = snd_soc_read(codec, WM8903_WRITE_SEQUENCER_4);
270 } while (reg[4] & WM8903_WSEQ_BUSY);
272 dev_dbg(&i2c->dev, "Sequence complete\n");
274 /* Disable the sequencer again if we enabled it */
275 snd_soc_write(codec, WM8903_WRITE_SEQUENCER_0, reg[0]);
280 static void wm8903_sync_reg_cache(struct snd_soc_codec *codec, u16 *cache)
284 /* There really ought to be something better we can do here :/ */
285 for (i = 0; i < ARRAY_SIZE(wm8903_reg_defaults); i++)
286 cache[i] = codec->hw_read(codec, i);
289 static void wm8903_reset(struct snd_soc_codec *codec)
291 snd_soc_write(codec, WM8903_SW_RESET_AND_ID, 0);
292 memcpy(codec->reg_cache, wm8903_reg_defaults,
293 sizeof(wm8903_reg_defaults));
296 #define WM8903_OUTPUT_SHORT 0x8
297 #define WM8903_OUTPUT_OUT 0x4
298 #define WM8903_OUTPUT_INT 0x2
299 #define WM8903_OUTPUT_IN 0x1
301 static int wm8903_cp_event(struct snd_soc_dapm_widget *w,
302 struct snd_kcontrol *kcontrol, int event)
304 WARN_ON(event != SND_SOC_DAPM_POST_PMU);
311 * Event for headphone and line out amplifier power changes. Special
312 * power up/down sequences are required in order to maximise pop/click
315 static int wm8903_output_event(struct snd_soc_dapm_widget *w,
316 struct snd_kcontrol *kcontrol, int event)
318 struct snd_soc_codec *codec = w->codec;
326 case WM8903_POWER_MANAGEMENT_2:
327 reg = WM8903_ANALOGUE_HP_0;
328 dcs_bit = 0 + w->shift;
330 case WM8903_POWER_MANAGEMENT_3:
331 reg = WM8903_ANALOGUE_LINEOUT_0;
332 dcs_bit = 2 + w->shift;
336 return -EINVAL; /* Spurious warning from some compilers */
348 return -EINVAL; /* Spurious warning from some compilers */
351 if (event & SND_SOC_DAPM_PRE_PMU) {
352 val = snd_soc_read(codec, reg);
354 /* Short the output */
355 val &= ~(WM8903_OUTPUT_SHORT << shift);
356 snd_soc_write(codec, reg, val);
359 if (event & SND_SOC_DAPM_POST_PMU) {
360 val = snd_soc_read(codec, reg);
362 val |= (WM8903_OUTPUT_IN << shift);
363 snd_soc_write(codec, reg, val);
365 val |= (WM8903_OUTPUT_INT << shift);
366 snd_soc_write(codec, reg, val);
368 /* Turn on the output ENA_OUTP */
369 val |= (WM8903_OUTPUT_OUT << shift);
370 snd_soc_write(codec, reg, val);
372 /* Enable the DC servo */
373 dcs_reg = snd_soc_read(codec, WM8903_DC_SERVO_0);
375 snd_soc_write(codec, WM8903_DC_SERVO_0, dcs_reg);
377 /* Remove the short */
378 val |= (WM8903_OUTPUT_SHORT << shift);
379 snd_soc_write(codec, reg, val);
382 if (event & SND_SOC_DAPM_PRE_PMD) {
383 val = snd_soc_read(codec, reg);
385 /* Short the output */
386 val &= ~(WM8903_OUTPUT_SHORT << shift);
387 snd_soc_write(codec, reg, val);
389 /* Disable the DC servo */
390 dcs_reg = snd_soc_read(codec, WM8903_DC_SERVO_0);
392 snd_soc_write(codec, WM8903_DC_SERVO_0, dcs_reg);
394 /* Then disable the intermediate and output stages */
395 val &= ~((WM8903_OUTPUT_OUT | WM8903_OUTPUT_INT |
396 WM8903_OUTPUT_IN) << shift);
397 snd_soc_write(codec, reg, val);
404 * When used with DAC outputs only the WM8903 charge pump supports
405 * operation in class W mode, providing very low power consumption
406 * when used with digital sources. Enable and disable this mode
407 * automatically depending on the mixer configuration.
409 * All the relevant controls are simple switches.
411 static int wm8903_class_w_put(struct snd_kcontrol *kcontrol,
412 struct snd_ctl_elem_value *ucontrol)
414 struct snd_soc_dapm_widget *widget = snd_kcontrol_chip(kcontrol);
415 struct snd_soc_codec *codec = widget->codec;
416 struct wm8903_priv *wm8903 = codec->private_data;
417 struct i2c_client *i2c = codec->control_data;
421 reg = snd_soc_read(codec, WM8903_CLASS_W_0);
423 /* Turn it off if we're about to enable bypass */
424 if (ucontrol->value.integer.value[0]) {
425 if (wm8903->class_w_users == 0) {
426 dev_dbg(&i2c->dev, "Disabling Class W\n");
427 snd_soc_write(codec, WM8903_CLASS_W_0, reg &
428 ~(WM8903_CP_DYN_FREQ | WM8903_CP_DYN_V));
430 wm8903->class_w_users++;
433 /* Implement the change */
434 ret = snd_soc_dapm_put_volsw(kcontrol, ucontrol);
436 /* If we've just disabled the last bypass path turn Class W on */
437 if (!ucontrol->value.integer.value[0]) {
438 if (wm8903->class_w_users == 1) {
439 dev_dbg(&i2c->dev, "Enabling Class W\n");
440 snd_soc_write(codec, WM8903_CLASS_W_0, reg |
441 WM8903_CP_DYN_FREQ | WM8903_CP_DYN_V);
443 wm8903->class_w_users--;
446 dev_dbg(&i2c->dev, "Bypass use count now %d\n",
447 wm8903->class_w_users);
452 #define SOC_DAPM_SINGLE_W(xname, reg, shift, max, invert) \
453 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
454 .info = snd_soc_info_volsw, \
455 .get = snd_soc_dapm_get_volsw, .put = wm8903_class_w_put, \
456 .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) }
459 /* ALSA can only do steps of .01dB */
460 static const DECLARE_TLV_DB_SCALE(digital_tlv, -7200, 75, 1);
462 static const DECLARE_TLV_DB_SCALE(digital_sidetone_tlv, -3600, 300, 0);
463 static const DECLARE_TLV_DB_SCALE(out_tlv, -5700, 100, 0);
465 static const DECLARE_TLV_DB_SCALE(drc_tlv_thresh, 0, 75, 0);
466 static const DECLARE_TLV_DB_SCALE(drc_tlv_amp, -2250, 75, 0);
467 static const DECLARE_TLV_DB_SCALE(drc_tlv_min, 0, 600, 0);
468 static const DECLARE_TLV_DB_SCALE(drc_tlv_max, 1200, 600, 0);
469 static const DECLARE_TLV_DB_SCALE(drc_tlv_startup, -300, 50, 0);
471 static const char *drc_slope_text[] = {
472 "1", "1/2", "1/4", "1/8", "1/16", "0"
475 static const struct soc_enum drc_slope_r0 =
476 SOC_ENUM_SINGLE(WM8903_DRC_2, 3, 6, drc_slope_text);
478 static const struct soc_enum drc_slope_r1 =
479 SOC_ENUM_SINGLE(WM8903_DRC_2, 0, 6, drc_slope_text);
481 static const char *drc_attack_text[] = {
483 "363us", "762us", "1.45ms", "2.9ms", "5.8ms", "11.6ms", "23.2ms",
484 "46.4ms", "92.8ms", "185.6ms"
487 static const struct soc_enum drc_attack =
488 SOC_ENUM_SINGLE(WM8903_DRC_1, 12, 11, drc_attack_text);
490 static const char *drc_decay_text[] = {
491 "186ms", "372ms", "743ms", "1.49s", "2.97s", "5.94s", "11.89s",
495 static const struct soc_enum drc_decay =
496 SOC_ENUM_SINGLE(WM8903_DRC_1, 8, 9, drc_decay_text);
498 static const char *drc_ff_delay_text[] = {
499 "5 samples", "9 samples"
502 static const struct soc_enum drc_ff_delay =
503 SOC_ENUM_SINGLE(WM8903_DRC_0, 5, 2, drc_ff_delay_text);
505 static const char *drc_qr_decay_text[] = {
506 "0.725ms", "1.45ms", "5.8ms"
509 static const struct soc_enum drc_qr_decay =
510 SOC_ENUM_SINGLE(WM8903_DRC_1, 4, 3, drc_qr_decay_text);
512 static const char *drc_smoothing_text[] = {
513 "Low", "Medium", "High"
516 static const struct soc_enum drc_smoothing =
517 SOC_ENUM_SINGLE(WM8903_DRC_0, 11, 3, drc_smoothing_text);
519 static const char *soft_mute_text[] = {
520 "Fast (fs/2)", "Slow (fs/32)"
523 static const struct soc_enum soft_mute =
524 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_1, 10, 2, soft_mute_text);
526 static const char *mute_mode_text[] = {
530 static const struct soc_enum mute_mode =
531 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_1, 9, 2, mute_mode_text);
533 static const char *dac_deemphasis_text[] = {
534 "Disabled", "32kHz", "44.1kHz", "48kHz"
537 static const struct soc_enum dac_deemphasis =
538 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_1, 1, 4, dac_deemphasis_text);
540 static const char *companding_text[] = {
544 static const struct soc_enum dac_companding =
545 SOC_ENUM_SINGLE(WM8903_AUDIO_INTERFACE_0, 0, 2, companding_text);
547 static const struct soc_enum adc_companding =
548 SOC_ENUM_SINGLE(WM8903_AUDIO_INTERFACE_0, 2, 2, companding_text);
550 static const char *input_mode_text[] = {
551 "Single-Ended", "Differential Line", "Differential Mic"
554 static const struct soc_enum linput_mode_enum =
555 SOC_ENUM_SINGLE(WM8903_ANALOGUE_LEFT_INPUT_1, 0, 3, input_mode_text);
557 static const struct soc_enum rinput_mode_enum =
558 SOC_ENUM_SINGLE(WM8903_ANALOGUE_RIGHT_INPUT_1, 0, 3, input_mode_text);
560 static const char *linput_mux_text[] = {
561 "IN1L", "IN2L", "IN3L"
564 static const struct soc_enum linput_enum =
565 SOC_ENUM_SINGLE(WM8903_ANALOGUE_LEFT_INPUT_1, 2, 3, linput_mux_text);
567 static const struct soc_enum linput_inv_enum =
568 SOC_ENUM_SINGLE(WM8903_ANALOGUE_LEFT_INPUT_1, 4, 3, linput_mux_text);
570 static const char *rinput_mux_text[] = {
571 "IN1R", "IN2R", "IN3R"
574 static const struct soc_enum rinput_enum =
575 SOC_ENUM_SINGLE(WM8903_ANALOGUE_RIGHT_INPUT_1, 2, 3, rinput_mux_text);
577 static const struct soc_enum rinput_inv_enum =
578 SOC_ENUM_SINGLE(WM8903_ANALOGUE_RIGHT_INPUT_1, 4, 3, rinput_mux_text);
581 static const char *sidetone_text[] = {
582 "None", "Left", "Right"
585 static const struct soc_enum lsidetone_enum =
586 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_0, 2, 3, sidetone_text);
588 static const struct soc_enum rsidetone_enum =
589 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_0, 0, 3, sidetone_text);
591 static const struct snd_kcontrol_new wm8903_snd_controls[] = {
593 /* Input PGAs - No TLV since the scale depends on PGA mode */
594 SOC_SINGLE("Left Input PGA Switch", WM8903_ANALOGUE_LEFT_INPUT_0,
596 SOC_SINGLE("Left Input PGA Volume", WM8903_ANALOGUE_LEFT_INPUT_0,
598 SOC_SINGLE("Left Input PGA Common Mode Switch", WM8903_ANALOGUE_LEFT_INPUT_1,
601 SOC_SINGLE("Right Input PGA Switch", WM8903_ANALOGUE_RIGHT_INPUT_0,
603 SOC_SINGLE("Right Input PGA Volume", WM8903_ANALOGUE_RIGHT_INPUT_0,
605 SOC_SINGLE("Right Input PGA Common Mode Switch", WM8903_ANALOGUE_RIGHT_INPUT_1,
609 SOC_SINGLE("DRC Switch", WM8903_DRC_0, 15, 1, 0),
610 SOC_ENUM("DRC Compressor Slope R0", drc_slope_r0),
611 SOC_ENUM("DRC Compressor Slope R1", drc_slope_r1),
612 SOC_SINGLE_TLV("DRC Compressor Threshold Volume", WM8903_DRC_3, 5, 124, 1,
614 SOC_SINGLE_TLV("DRC Volume", WM8903_DRC_3, 0, 30, 1, drc_tlv_amp),
615 SOC_SINGLE_TLV("DRC Minimum Gain Volume", WM8903_DRC_1, 2, 3, 1, drc_tlv_min),
616 SOC_SINGLE_TLV("DRC Maximum Gain Volume", WM8903_DRC_1, 0, 3, 0, drc_tlv_max),
617 SOC_ENUM("DRC Attack Rate", drc_attack),
618 SOC_ENUM("DRC Decay Rate", drc_decay),
619 SOC_ENUM("DRC FF Delay", drc_ff_delay),
620 SOC_SINGLE("DRC Anticlip Switch", WM8903_DRC_0, 1, 1, 0),
621 SOC_SINGLE("DRC QR Switch", WM8903_DRC_0, 2, 1, 0),
622 SOC_SINGLE_TLV("DRC QR Threshold Volume", WM8903_DRC_0, 6, 3, 0, drc_tlv_max),
623 SOC_ENUM("DRC QR Decay Rate", drc_qr_decay),
624 SOC_SINGLE("DRC Smoothing Switch", WM8903_DRC_0, 3, 1, 0),
625 SOC_SINGLE("DRC Smoothing Hysteresis Switch", WM8903_DRC_0, 0, 1, 0),
626 SOC_ENUM("DRC Smoothing Threshold", drc_smoothing),
627 SOC_SINGLE_TLV("DRC Startup Volume", WM8903_DRC_0, 6, 18, 0, drc_tlv_startup),
629 SOC_DOUBLE_R_TLV("Digital Capture Volume", WM8903_ADC_DIGITAL_VOLUME_LEFT,
630 WM8903_ADC_DIGITAL_VOLUME_RIGHT, 1, 96, 0, digital_tlv),
631 SOC_ENUM("ADC Companding Mode", adc_companding),
632 SOC_SINGLE("ADC Companding Switch", WM8903_AUDIO_INTERFACE_0, 3, 1, 0),
634 SOC_DOUBLE_TLV("Digital Sidetone Volume", WM8903_DAC_DIGITAL_0, 4, 8,
635 12, 0, digital_sidetone_tlv),
638 SOC_DOUBLE_R_TLV("Digital Playback Volume", WM8903_DAC_DIGITAL_VOLUME_LEFT,
639 WM8903_DAC_DIGITAL_VOLUME_RIGHT, 1, 120, 0, digital_tlv),
640 SOC_ENUM("DAC Soft Mute Rate", soft_mute),
641 SOC_ENUM("DAC Mute Mode", mute_mode),
642 SOC_SINGLE("DAC Mono Switch", WM8903_DAC_DIGITAL_1, 12, 1, 0),
643 SOC_ENUM("DAC De-emphasis", dac_deemphasis),
644 SOC_ENUM("DAC Companding Mode", dac_companding),
645 SOC_SINGLE("DAC Companding Switch", WM8903_AUDIO_INTERFACE_0, 1, 1, 0),
648 SOC_DOUBLE_R("Headphone Switch",
649 WM8903_ANALOGUE_OUT1_LEFT, WM8903_ANALOGUE_OUT1_RIGHT,
651 SOC_DOUBLE_R("Headphone ZC Switch",
652 WM8903_ANALOGUE_OUT1_LEFT, WM8903_ANALOGUE_OUT1_RIGHT,
654 SOC_DOUBLE_R_TLV("Headphone Volume",
655 WM8903_ANALOGUE_OUT1_LEFT, WM8903_ANALOGUE_OUT1_RIGHT,
659 SOC_DOUBLE_R("Line Out Switch",
660 WM8903_ANALOGUE_OUT2_LEFT, WM8903_ANALOGUE_OUT2_RIGHT,
662 SOC_DOUBLE_R("Line Out ZC Switch",
663 WM8903_ANALOGUE_OUT2_LEFT, WM8903_ANALOGUE_OUT2_RIGHT,
665 SOC_DOUBLE_R_TLV("Line Out Volume",
666 WM8903_ANALOGUE_OUT2_LEFT, WM8903_ANALOGUE_OUT2_RIGHT,
670 SOC_DOUBLE_R("Speaker Switch",
671 WM8903_ANALOGUE_OUT3_LEFT, WM8903_ANALOGUE_OUT3_RIGHT, 8, 1, 1),
672 SOC_DOUBLE_R("Speaker ZC Switch",
673 WM8903_ANALOGUE_OUT3_LEFT, WM8903_ANALOGUE_OUT3_RIGHT, 6, 1, 0),
674 SOC_DOUBLE_R_TLV("Speaker Volume",
675 WM8903_ANALOGUE_OUT3_LEFT, WM8903_ANALOGUE_OUT3_RIGHT,
679 static const struct snd_kcontrol_new linput_mode_mux =
680 SOC_DAPM_ENUM("Left Input Mode Mux", linput_mode_enum);
682 static const struct snd_kcontrol_new rinput_mode_mux =
683 SOC_DAPM_ENUM("Right Input Mode Mux", rinput_mode_enum);
685 static const struct snd_kcontrol_new linput_mux =
686 SOC_DAPM_ENUM("Left Input Mux", linput_enum);
688 static const struct snd_kcontrol_new linput_inv_mux =
689 SOC_DAPM_ENUM("Left Inverting Input Mux", linput_inv_enum);
691 static const struct snd_kcontrol_new rinput_mux =
692 SOC_DAPM_ENUM("Right Input Mux", rinput_enum);
694 static const struct snd_kcontrol_new rinput_inv_mux =
695 SOC_DAPM_ENUM("Right Inverting Input Mux", rinput_inv_enum);
697 static const struct snd_kcontrol_new lsidetone_mux =
698 SOC_DAPM_ENUM("DACL Sidetone Mux", lsidetone_enum);
700 static const struct snd_kcontrol_new rsidetone_mux =
701 SOC_DAPM_ENUM("DACR Sidetone Mux", rsidetone_enum);
703 static const struct snd_kcontrol_new left_output_mixer[] = {
704 SOC_DAPM_SINGLE("DACL Switch", WM8903_ANALOGUE_LEFT_MIX_0, 3, 1, 0),
705 SOC_DAPM_SINGLE("DACR Switch", WM8903_ANALOGUE_LEFT_MIX_0, 2, 1, 0),
706 SOC_DAPM_SINGLE_W("Left Bypass Switch", WM8903_ANALOGUE_LEFT_MIX_0, 1, 1, 0),
707 SOC_DAPM_SINGLE_W("Right Bypass Switch", WM8903_ANALOGUE_LEFT_MIX_0, 0, 1, 0),
710 static const struct snd_kcontrol_new right_output_mixer[] = {
711 SOC_DAPM_SINGLE("DACL Switch", WM8903_ANALOGUE_RIGHT_MIX_0, 3, 1, 0),
712 SOC_DAPM_SINGLE("DACR Switch", WM8903_ANALOGUE_RIGHT_MIX_0, 2, 1, 0),
713 SOC_DAPM_SINGLE_W("Left Bypass Switch", WM8903_ANALOGUE_RIGHT_MIX_0, 1, 1, 0),
714 SOC_DAPM_SINGLE_W("Right Bypass Switch", WM8903_ANALOGUE_RIGHT_MIX_0, 0, 1, 0),
717 static const struct snd_kcontrol_new left_speaker_mixer[] = {
718 SOC_DAPM_SINGLE("DACL Switch", WM8903_ANALOGUE_SPK_MIX_LEFT_0, 3, 1, 0),
719 SOC_DAPM_SINGLE("DACR Switch", WM8903_ANALOGUE_SPK_MIX_LEFT_0, 2, 1, 0),
720 SOC_DAPM_SINGLE("Left Bypass Switch", WM8903_ANALOGUE_SPK_MIX_LEFT_0, 1, 1, 0),
721 SOC_DAPM_SINGLE("Right Bypass Switch", WM8903_ANALOGUE_SPK_MIX_LEFT_0,
725 static const struct snd_kcontrol_new right_speaker_mixer[] = {
726 SOC_DAPM_SINGLE("DACL Switch", WM8903_ANALOGUE_SPK_MIX_RIGHT_0, 3, 1, 0),
727 SOC_DAPM_SINGLE("DACR Switch", WM8903_ANALOGUE_SPK_MIX_RIGHT_0, 2, 1, 0),
728 SOC_DAPM_SINGLE("Left Bypass Switch", WM8903_ANALOGUE_SPK_MIX_RIGHT_0,
730 SOC_DAPM_SINGLE("Right Bypass Switch", WM8903_ANALOGUE_SPK_MIX_RIGHT_0,
734 static const struct snd_soc_dapm_widget wm8903_dapm_widgets[] = {
735 SND_SOC_DAPM_INPUT("IN1L"),
736 SND_SOC_DAPM_INPUT("IN1R"),
737 SND_SOC_DAPM_INPUT("IN2L"),
738 SND_SOC_DAPM_INPUT("IN2R"),
739 SND_SOC_DAPM_INPUT("IN3L"),
740 SND_SOC_DAPM_INPUT("IN3R"),
742 SND_SOC_DAPM_OUTPUT("HPOUTL"),
743 SND_SOC_DAPM_OUTPUT("HPOUTR"),
744 SND_SOC_DAPM_OUTPUT("LINEOUTL"),
745 SND_SOC_DAPM_OUTPUT("LINEOUTR"),
746 SND_SOC_DAPM_OUTPUT("LOP"),
747 SND_SOC_DAPM_OUTPUT("LON"),
748 SND_SOC_DAPM_OUTPUT("ROP"),
749 SND_SOC_DAPM_OUTPUT("RON"),
751 SND_SOC_DAPM_MICBIAS("Mic Bias", WM8903_MIC_BIAS_CONTROL_0, 0, 0),
753 SND_SOC_DAPM_MUX("Left Input Mux", SND_SOC_NOPM, 0, 0, &linput_mux),
754 SND_SOC_DAPM_MUX("Left Input Inverting Mux", SND_SOC_NOPM, 0, 0,
756 SND_SOC_DAPM_MUX("Left Input Mode Mux", SND_SOC_NOPM, 0, 0, &linput_mode_mux),
758 SND_SOC_DAPM_MUX("Right Input Mux", SND_SOC_NOPM, 0, 0, &rinput_mux),
759 SND_SOC_DAPM_MUX("Right Input Inverting Mux", SND_SOC_NOPM, 0, 0,
761 SND_SOC_DAPM_MUX("Right Input Mode Mux", SND_SOC_NOPM, 0, 0, &rinput_mode_mux),
763 SND_SOC_DAPM_PGA("Left Input PGA", WM8903_POWER_MANAGEMENT_0, 1, 0, NULL, 0),
764 SND_SOC_DAPM_PGA("Right Input PGA", WM8903_POWER_MANAGEMENT_0, 0, 0, NULL, 0),
766 SND_SOC_DAPM_ADC("ADCL", "Left HiFi Capture", WM8903_POWER_MANAGEMENT_6, 1, 0),
767 SND_SOC_DAPM_ADC("ADCR", "Right HiFi Capture", WM8903_POWER_MANAGEMENT_6, 0, 0),
769 SND_SOC_DAPM_MUX("DACL Sidetone", SND_SOC_NOPM, 0, 0, &lsidetone_mux),
770 SND_SOC_DAPM_MUX("DACR Sidetone", SND_SOC_NOPM, 0, 0, &rsidetone_mux),
772 SND_SOC_DAPM_DAC("DACL", "Left Playback", WM8903_POWER_MANAGEMENT_6, 3, 0),
773 SND_SOC_DAPM_DAC("DACR", "Right Playback", WM8903_POWER_MANAGEMENT_6, 2, 0),
775 SND_SOC_DAPM_MIXER("Left Output Mixer", WM8903_POWER_MANAGEMENT_1, 1, 0,
776 left_output_mixer, ARRAY_SIZE(left_output_mixer)),
777 SND_SOC_DAPM_MIXER("Right Output Mixer", WM8903_POWER_MANAGEMENT_1, 0, 0,
778 right_output_mixer, ARRAY_SIZE(right_output_mixer)),
780 SND_SOC_DAPM_MIXER("Left Speaker Mixer", WM8903_POWER_MANAGEMENT_4, 1, 0,
781 left_speaker_mixer, ARRAY_SIZE(left_speaker_mixer)),
782 SND_SOC_DAPM_MIXER("Right Speaker Mixer", WM8903_POWER_MANAGEMENT_4, 0, 0,
783 right_speaker_mixer, ARRAY_SIZE(right_speaker_mixer)),
785 SND_SOC_DAPM_PGA_E("Left Headphone Output PGA", WM8903_POWER_MANAGEMENT_2,
786 1, 0, NULL, 0, wm8903_output_event,
787 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
788 SND_SOC_DAPM_PRE_PMD),
789 SND_SOC_DAPM_PGA_E("Right Headphone Output PGA", WM8903_POWER_MANAGEMENT_2,
790 0, 0, NULL, 0, wm8903_output_event,
791 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
792 SND_SOC_DAPM_PRE_PMD),
794 SND_SOC_DAPM_PGA_E("Left Line Output PGA", WM8903_POWER_MANAGEMENT_3, 1, 0,
795 NULL, 0, wm8903_output_event,
796 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
797 SND_SOC_DAPM_PRE_PMD),
798 SND_SOC_DAPM_PGA_E("Right Line Output PGA", WM8903_POWER_MANAGEMENT_3, 0, 0,
799 NULL, 0, wm8903_output_event,
800 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
801 SND_SOC_DAPM_PRE_PMD),
803 SND_SOC_DAPM_PGA("Left Speaker PGA", WM8903_POWER_MANAGEMENT_5, 1, 0,
805 SND_SOC_DAPM_PGA("Right Speaker PGA", WM8903_POWER_MANAGEMENT_5, 0, 0,
808 SND_SOC_DAPM_SUPPLY("Charge Pump", WM8903_CHARGE_PUMP_0, 0, 0,
809 wm8903_cp_event, SND_SOC_DAPM_POST_PMU),
810 SND_SOC_DAPM_SUPPLY("CLK_DSP", WM8903_CLOCK_RATES_2, 1, 0, NULL, 0),
813 static const struct snd_soc_dapm_route intercon[] = {
815 { "Left Input Mux", "IN1L", "IN1L" },
816 { "Left Input Mux", "IN2L", "IN2L" },
817 { "Left Input Mux", "IN3L", "IN3L" },
819 { "Left Input Inverting Mux", "IN1L", "IN1L" },
820 { "Left Input Inverting Mux", "IN2L", "IN2L" },
821 { "Left Input Inverting Mux", "IN3L", "IN3L" },
823 { "Right Input Mux", "IN1R", "IN1R" },
824 { "Right Input Mux", "IN2R", "IN2R" },
825 { "Right Input Mux", "IN3R", "IN3R" },
827 { "Right Input Inverting Mux", "IN1R", "IN1R" },
828 { "Right Input Inverting Mux", "IN2R", "IN2R" },
829 { "Right Input Inverting Mux", "IN3R", "IN3R" },
831 { "Left Input Mode Mux", "Single-Ended", "Left Input Inverting Mux" },
832 { "Left Input Mode Mux", "Differential Line",
834 { "Left Input Mode Mux", "Differential Line",
835 "Left Input Inverting Mux" },
836 { "Left Input Mode Mux", "Differential Mic",
838 { "Left Input Mode Mux", "Differential Mic",
839 "Left Input Inverting Mux" },
841 { "Right Input Mode Mux", "Single-Ended",
842 "Right Input Inverting Mux" },
843 { "Right Input Mode Mux", "Differential Line",
845 { "Right Input Mode Mux", "Differential Line",
846 "Right Input Inverting Mux" },
847 { "Right Input Mode Mux", "Differential Mic",
849 { "Right Input Mode Mux", "Differential Mic",
850 "Right Input Inverting Mux" },
852 { "Left Input PGA", NULL, "Left Input Mode Mux" },
853 { "Right Input PGA", NULL, "Right Input Mode Mux" },
855 { "ADCL", NULL, "Left Input PGA" },
856 { "ADCL", NULL, "CLK_DSP" },
857 { "ADCR", NULL, "Right Input PGA" },
858 { "ADCR", NULL, "CLK_DSP" },
860 { "DACL Sidetone", "Left", "ADCL" },
861 { "DACL Sidetone", "Right", "ADCR" },
862 { "DACR Sidetone", "Left", "ADCL" },
863 { "DACR Sidetone", "Right", "ADCR" },
865 { "DACL", NULL, "DACL Sidetone" },
866 { "DACL", NULL, "CLK_DSP" },
867 { "DACR", NULL, "DACR Sidetone" },
868 { "DACR", NULL, "CLK_DSP" },
870 { "Left Output Mixer", "Left Bypass Switch", "Left Input PGA" },
871 { "Left Output Mixer", "Right Bypass Switch", "Right Input PGA" },
872 { "Left Output Mixer", "DACL Switch", "DACL" },
873 { "Left Output Mixer", "DACR Switch", "DACR" },
875 { "Right Output Mixer", "Left Bypass Switch", "Left Input PGA" },
876 { "Right Output Mixer", "Right Bypass Switch", "Right Input PGA" },
877 { "Right Output Mixer", "DACL Switch", "DACL" },
878 { "Right Output Mixer", "DACR Switch", "DACR" },
880 { "Left Speaker Mixer", "Left Bypass Switch", "Left Input PGA" },
881 { "Left Speaker Mixer", "Right Bypass Switch", "Right Input PGA" },
882 { "Left Speaker Mixer", "DACL Switch", "DACL" },
883 { "Left Speaker Mixer", "DACR Switch", "DACR" },
885 { "Right Speaker Mixer", "Left Bypass Switch", "Left Input PGA" },
886 { "Right Speaker Mixer", "Right Bypass Switch", "Right Input PGA" },
887 { "Right Speaker Mixer", "DACL Switch", "DACL" },
888 { "Right Speaker Mixer", "DACR Switch", "DACR" },
890 { "Left Line Output PGA", NULL, "Left Output Mixer" },
891 { "Right Line Output PGA", NULL, "Right Output Mixer" },
893 { "Left Headphone Output PGA", NULL, "Left Output Mixer" },
894 { "Right Headphone Output PGA", NULL, "Right Output Mixer" },
896 { "Left Speaker PGA", NULL, "Left Speaker Mixer" },
897 { "Right Speaker PGA", NULL, "Right Speaker Mixer" },
899 { "HPOUTL", NULL, "Left Headphone Output PGA" },
900 { "HPOUTR", NULL, "Right Headphone Output PGA" },
902 { "LINEOUTL", NULL, "Left Line Output PGA" },
903 { "LINEOUTR", NULL, "Right Line Output PGA" },
905 { "LOP", NULL, "Left Speaker PGA" },
906 { "LON", NULL, "Left Speaker PGA" },
908 { "ROP", NULL, "Right Speaker PGA" },
909 { "RON", NULL, "Right Speaker PGA" },
911 { "Left Headphone Output PGA", NULL, "Charge Pump" },
912 { "Right Headphone Output PGA", NULL, "Charge Pump" },
913 { "Left Line Output PGA", NULL, "Charge Pump" },
914 { "Right Line Output PGA", NULL, "Charge Pump" },
917 static int wm8903_add_widgets(struct snd_soc_codec *codec)
919 snd_soc_dapm_new_controls(codec, wm8903_dapm_widgets,
920 ARRAY_SIZE(wm8903_dapm_widgets));
922 snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
927 static int wm8903_set_bias_level(struct snd_soc_codec *codec,
928 enum snd_soc_bias_level level)
930 struct i2c_client *i2c = codec->control_data;
934 case SND_SOC_BIAS_ON:
935 case SND_SOC_BIAS_PREPARE:
936 reg = snd_soc_read(codec, WM8903_VMID_CONTROL_0);
937 reg &= ~(WM8903_VMID_RES_MASK);
938 reg |= WM8903_VMID_RES_50K;
939 snd_soc_write(codec, WM8903_VMID_CONTROL_0, reg);
942 case SND_SOC_BIAS_STANDBY:
943 if (codec->bias_level == SND_SOC_BIAS_OFF) {
944 snd_soc_write(codec, WM8903_CLOCK_RATES_2,
947 /* Change DC servo dither level in startup sequence */
948 snd_soc_write(codec, WM8903_WRITE_SEQUENCER_0, 0x11);
949 snd_soc_write(codec, WM8903_WRITE_SEQUENCER_1, 0x1257);
950 snd_soc_write(codec, WM8903_WRITE_SEQUENCER_2, 0x2);
952 wm8903_run_sequence(codec, 0);
953 wm8903_sync_reg_cache(codec, codec->reg_cache);
955 /* Enable low impedence charge pump output */
956 reg = snd_soc_read(codec,
957 WM8903_CONTROL_INTERFACE_TEST_1);
958 snd_soc_write(codec, WM8903_CONTROL_INTERFACE_TEST_1,
959 reg | WM8903_TEST_KEY);
960 reg2 = snd_soc_read(codec, WM8903_CHARGE_PUMP_TEST_1);
961 snd_soc_write(codec, WM8903_CHARGE_PUMP_TEST_1,
962 reg2 | WM8903_CP_SW_KELVIN_MODE_MASK);
963 snd_soc_write(codec, WM8903_CONTROL_INTERFACE_TEST_1,
966 /* By default no bypass paths are enabled so
967 * enable Class W support.
969 dev_dbg(&i2c->dev, "Enabling Class W\n");
970 snd_soc_write(codec, WM8903_CLASS_W_0, reg |
971 WM8903_CP_DYN_FREQ | WM8903_CP_DYN_V);
974 reg = snd_soc_read(codec, WM8903_VMID_CONTROL_0);
975 reg &= ~(WM8903_VMID_RES_MASK);
976 reg |= WM8903_VMID_RES_250K;
977 snd_soc_write(codec, WM8903_VMID_CONTROL_0, reg);
980 case SND_SOC_BIAS_OFF:
981 wm8903_run_sequence(codec, 32);
982 reg = snd_soc_read(codec, WM8903_CLOCK_RATES_2);
983 reg &= ~WM8903_CLK_SYS_ENA;
984 snd_soc_write(codec, WM8903_CLOCK_RATES_2, reg);
988 codec->bias_level = level;
993 static int wm8903_set_dai_sysclk(struct snd_soc_dai *codec_dai,
994 int clk_id, unsigned int freq, int dir)
996 struct snd_soc_codec *codec = codec_dai->codec;
997 struct wm8903_priv *wm8903 = codec->private_data;
999 wm8903->sysclk = freq;
1004 static int wm8903_set_dai_fmt(struct snd_soc_dai *codec_dai,
1007 struct snd_soc_codec *codec = codec_dai->codec;
1008 u16 aif1 = snd_soc_read(codec, WM8903_AUDIO_INTERFACE_1);
1010 aif1 &= ~(WM8903_LRCLK_DIR | WM8903_BCLK_DIR | WM8903_AIF_FMT_MASK |
1011 WM8903_AIF_LRCLK_INV | WM8903_AIF_BCLK_INV);
1013 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1014 case SND_SOC_DAIFMT_CBS_CFS:
1016 case SND_SOC_DAIFMT_CBS_CFM:
1017 aif1 |= WM8903_LRCLK_DIR;
1019 case SND_SOC_DAIFMT_CBM_CFM:
1020 aif1 |= WM8903_LRCLK_DIR | WM8903_BCLK_DIR;
1022 case SND_SOC_DAIFMT_CBM_CFS:
1023 aif1 |= WM8903_BCLK_DIR;
1029 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1030 case SND_SOC_DAIFMT_DSP_A:
1033 case SND_SOC_DAIFMT_DSP_B:
1034 aif1 |= 0x3 | WM8903_AIF_LRCLK_INV;
1036 case SND_SOC_DAIFMT_I2S:
1039 case SND_SOC_DAIFMT_RIGHT_J:
1042 case SND_SOC_DAIFMT_LEFT_J:
1048 /* Clock inversion */
1049 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1050 case SND_SOC_DAIFMT_DSP_A:
1051 case SND_SOC_DAIFMT_DSP_B:
1052 /* frame inversion not valid for DSP modes */
1053 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1054 case SND_SOC_DAIFMT_NB_NF:
1056 case SND_SOC_DAIFMT_IB_NF:
1057 aif1 |= WM8903_AIF_BCLK_INV;
1063 case SND_SOC_DAIFMT_I2S:
1064 case SND_SOC_DAIFMT_RIGHT_J:
1065 case SND_SOC_DAIFMT_LEFT_J:
1066 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1067 case SND_SOC_DAIFMT_NB_NF:
1069 case SND_SOC_DAIFMT_IB_IF:
1070 aif1 |= WM8903_AIF_BCLK_INV | WM8903_AIF_LRCLK_INV;
1072 case SND_SOC_DAIFMT_IB_NF:
1073 aif1 |= WM8903_AIF_BCLK_INV;
1075 case SND_SOC_DAIFMT_NB_IF:
1076 aif1 |= WM8903_AIF_LRCLK_INV;
1086 snd_soc_write(codec, WM8903_AUDIO_INTERFACE_1, aif1);
1091 static int wm8903_digital_mute(struct snd_soc_dai *codec_dai, int mute)
1093 struct snd_soc_codec *codec = codec_dai->codec;
1096 reg = snd_soc_read(codec, WM8903_DAC_DIGITAL_1);
1099 reg |= WM8903_DAC_MUTE;
1101 reg &= ~WM8903_DAC_MUTE;
1103 snd_soc_write(codec, WM8903_DAC_DIGITAL_1, reg);
1108 /* Lookup table for CLK_SYS/fs ratio. 256fs or more is recommended
1109 * for optimal performance so we list the lower rates first and match
1110 * on the last match we find. */
1116 } clk_sys_ratios[] = {
1117 { 64, 0x0, 0x0, 1 },
1118 { 68, 0x0, 0x1, 1 },
1119 { 125, 0x0, 0x2, 1 },
1120 { 128, 0x1, 0x0, 1 },
1121 { 136, 0x1, 0x1, 1 },
1122 { 192, 0x2, 0x0, 1 },
1123 { 204, 0x2, 0x1, 1 },
1125 { 64, 0x0, 0x0, 2 },
1126 { 68, 0x0, 0x1, 2 },
1127 { 125, 0x0, 0x2, 2 },
1128 { 128, 0x1, 0x0, 2 },
1129 { 136, 0x1, 0x1, 2 },
1130 { 192, 0x2, 0x0, 2 },
1131 { 204, 0x2, 0x1, 2 },
1133 { 250, 0x2, 0x2, 1 },
1134 { 256, 0x3, 0x0, 1 },
1135 { 272, 0x3, 0x1, 1 },
1136 { 384, 0x4, 0x0, 1 },
1137 { 408, 0x4, 0x1, 1 },
1138 { 375, 0x4, 0x2, 1 },
1139 { 512, 0x5, 0x0, 1 },
1140 { 544, 0x5, 0x1, 1 },
1141 { 500, 0x5, 0x2, 1 },
1142 { 768, 0x6, 0x0, 1 },
1143 { 816, 0x6, 0x1, 1 },
1144 { 750, 0x6, 0x2, 1 },
1145 { 1024, 0x7, 0x0, 1 },
1146 { 1088, 0x7, 0x1, 1 },
1147 { 1000, 0x7, 0x2, 1 },
1148 { 1408, 0x8, 0x0, 1 },
1149 { 1496, 0x8, 0x1, 1 },
1150 { 1536, 0x9, 0x0, 1 },
1151 { 1632, 0x9, 0x1, 1 },
1152 { 1500, 0x9, 0x2, 1 },
1154 { 250, 0x2, 0x2, 2 },
1155 { 256, 0x3, 0x0, 2 },
1156 { 272, 0x3, 0x1, 2 },
1157 { 384, 0x4, 0x0, 2 },
1158 { 408, 0x4, 0x1, 2 },
1159 { 375, 0x4, 0x2, 2 },
1160 { 512, 0x5, 0x0, 2 },
1161 { 544, 0x5, 0x1, 2 },
1162 { 500, 0x5, 0x2, 2 },
1163 { 768, 0x6, 0x0, 2 },
1164 { 816, 0x6, 0x1, 2 },
1165 { 750, 0x6, 0x2, 2 },
1166 { 1024, 0x7, 0x0, 2 },
1167 { 1088, 0x7, 0x1, 2 },
1168 { 1000, 0x7, 0x2, 2 },
1169 { 1408, 0x8, 0x0, 2 },
1170 { 1496, 0x8, 0x1, 2 },
1171 { 1536, 0x9, 0x0, 2 },
1172 { 1632, 0x9, 0x1, 2 },
1173 { 1500, 0x9, 0x2, 2 },
1176 /* CLK_SYS/BCLK ratios - multiplied by 10 due to .5s */
1200 /* Sample rates for DSP */
1204 } sample_rates[] = {
1219 static int wm8903_startup(struct snd_pcm_substream *substream,
1220 struct snd_soc_dai *dai)
1222 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1223 struct snd_soc_device *socdev = rtd->socdev;
1224 struct snd_soc_codec *codec = socdev->card->codec;
1225 struct wm8903_priv *wm8903 = codec->private_data;
1226 struct i2c_client *i2c = codec->control_data;
1227 struct snd_pcm_runtime *master_runtime;
1229 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1230 wm8903->playback_active++;
1232 wm8903->capture_active++;
1234 /* The DAI has shared clocks so if we already have a playback or
1235 * capture going then constrain this substream to match it.
1237 if (wm8903->master_substream) {
1238 master_runtime = wm8903->master_substream->runtime;
1240 dev_dbg(&i2c->dev, "Constraining to %d bits\n",
1241 master_runtime->sample_bits);
1243 snd_pcm_hw_constraint_minmax(substream->runtime,
1244 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
1245 master_runtime->sample_bits,
1246 master_runtime->sample_bits);
1248 wm8903->slave_substream = substream;
1250 wm8903->master_substream = substream;
1255 static void wm8903_shutdown(struct snd_pcm_substream *substream,
1256 struct snd_soc_dai *dai)
1258 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1259 struct snd_soc_device *socdev = rtd->socdev;
1260 struct snd_soc_codec *codec = socdev->card->codec;
1261 struct wm8903_priv *wm8903 = codec->private_data;
1263 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1264 wm8903->playback_active--;
1266 wm8903->capture_active--;
1268 if (wm8903->master_substream == substream)
1269 wm8903->master_substream = wm8903->slave_substream;
1271 wm8903->slave_substream = NULL;
1274 static int wm8903_hw_params(struct snd_pcm_substream *substream,
1275 struct snd_pcm_hw_params *params,
1276 struct snd_soc_dai *dai)
1278 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1279 struct snd_soc_device *socdev = rtd->socdev;
1280 struct snd_soc_codec *codec = socdev->card->codec;
1281 struct wm8903_priv *wm8903 = codec->private_data;
1282 struct i2c_client *i2c = codec->control_data;
1283 int fs = params_rate(params);
1293 u16 aif1 = snd_soc_read(codec, WM8903_AUDIO_INTERFACE_1);
1294 u16 aif2 = snd_soc_read(codec, WM8903_AUDIO_INTERFACE_2);
1295 u16 aif3 = snd_soc_read(codec, WM8903_AUDIO_INTERFACE_3);
1296 u16 clock0 = snd_soc_read(codec, WM8903_CLOCK_RATES_0);
1297 u16 clock1 = snd_soc_read(codec, WM8903_CLOCK_RATES_1);
1298 u16 dac_digital1 = snd_soc_read(codec, WM8903_DAC_DIGITAL_1);
1300 if (substream == wm8903->slave_substream) {
1301 dev_dbg(&i2c->dev, "Ignoring hw_params for slave substream\n");
1305 /* Enable sloping stopband filter for low sample rates */
1307 dac_digital1 |= WM8903_DAC_SB_FILT;
1309 dac_digital1 &= ~WM8903_DAC_SB_FILT;
1311 /* Configure sample rate logic for DSP - choose nearest rate */
1313 best_val = abs(sample_rates[dsp_config].rate - fs);
1314 for (i = 1; i < ARRAY_SIZE(sample_rates); i++) {
1315 cur_val = abs(sample_rates[i].rate - fs);
1316 if (cur_val <= best_val) {
1322 /* Constraints should stop us hitting this but let's make sure */
1323 if (wm8903->capture_active)
1324 switch (sample_rates[dsp_config].rate) {
1327 dev_err(&i2c->dev, "%dHz unsupported by ADC\n",
1335 dev_dbg(&i2c->dev, "DSP fs = %dHz\n", sample_rates[dsp_config].rate);
1336 clock1 &= ~WM8903_SAMPLE_RATE_MASK;
1337 clock1 |= sample_rates[dsp_config].value;
1339 aif1 &= ~WM8903_AIF_WL_MASK;
1341 switch (params_format(params)) {
1342 case SNDRV_PCM_FORMAT_S16_LE:
1345 case SNDRV_PCM_FORMAT_S20_3LE:
1349 case SNDRV_PCM_FORMAT_S24_LE:
1353 case SNDRV_PCM_FORMAT_S32_LE:
1361 dev_dbg(&i2c->dev, "MCLK = %dHz, target sample rate = %dHz\n",
1362 wm8903->sysclk, fs);
1364 /* We may not have an MCLK which allows us to generate exactly
1365 * the clock we want, particularly with USB derived inputs, so
1369 best_val = abs((wm8903->sysclk /
1370 (clk_sys_ratios[0].mclk_div *
1371 clk_sys_ratios[0].div)) - fs);
1372 for (i = 1; i < ARRAY_SIZE(clk_sys_ratios); i++) {
1373 cur_val = abs((wm8903->sysclk /
1374 (clk_sys_ratios[i].mclk_div *
1375 clk_sys_ratios[i].div)) - fs);
1377 if (cur_val <= best_val) {
1383 if (clk_sys_ratios[clk_config].mclk_div == 2) {
1384 clock0 |= WM8903_MCLKDIV2;
1385 clk_sys = wm8903->sysclk / 2;
1387 clock0 &= ~WM8903_MCLKDIV2;
1388 clk_sys = wm8903->sysclk;
1391 clock1 &= ~(WM8903_CLK_SYS_RATE_MASK |
1392 WM8903_CLK_SYS_MODE_MASK);
1393 clock1 |= clk_sys_ratios[clk_config].rate << WM8903_CLK_SYS_RATE_SHIFT;
1394 clock1 |= clk_sys_ratios[clk_config].mode << WM8903_CLK_SYS_MODE_SHIFT;
1396 dev_dbg(&i2c->dev, "CLK_SYS_RATE=%x, CLK_SYS_MODE=%x div=%d\n",
1397 clk_sys_ratios[clk_config].rate,
1398 clk_sys_ratios[clk_config].mode,
1399 clk_sys_ratios[clk_config].div);
1401 dev_dbg(&i2c->dev, "Actual CLK_SYS = %dHz\n", clk_sys);
1403 /* We may not get quite the right frequency if using
1404 * approximate clocks so look for the closest match that is
1405 * higher than the target (we need to ensure that there enough
1406 * BCLKs to clock out the samples).
1409 best_val = ((clk_sys * 10) / bclk_divs[0].ratio) - bclk;
1411 while (i < ARRAY_SIZE(bclk_divs)) {
1412 cur_val = ((clk_sys * 10) / bclk_divs[i].ratio) - bclk;
1413 if (cur_val < 0) /* BCLK table is sorted */
1420 aif2 &= ~WM8903_BCLK_DIV_MASK;
1421 aif3 &= ~WM8903_LRCLK_RATE_MASK;
1423 dev_dbg(&i2c->dev, "BCLK ratio %d for %dHz - actual BCLK = %dHz\n",
1424 bclk_divs[bclk_div].ratio / 10, bclk,
1425 (clk_sys * 10) / bclk_divs[bclk_div].ratio);
1427 aif2 |= bclk_divs[bclk_div].div;
1430 snd_soc_write(codec, WM8903_CLOCK_RATES_0, clock0);
1431 snd_soc_write(codec, WM8903_CLOCK_RATES_1, clock1);
1432 snd_soc_write(codec, WM8903_AUDIO_INTERFACE_1, aif1);
1433 snd_soc_write(codec, WM8903_AUDIO_INTERFACE_2, aif2);
1434 snd_soc_write(codec, WM8903_AUDIO_INTERFACE_3, aif3);
1435 snd_soc_write(codec, WM8903_DAC_DIGITAL_1, dac_digital1);
1440 static irqreturn_t wm8903_irq(int irq, void *data)
1442 struct wm8903_priv *wm8903 = data;
1443 struct snd_soc_codec *codec = &wm8903->codec;
1446 reg = snd_soc_read(codec, WM8903_INTERRUPT_STATUS_1);
1448 if (reg & WM8903_WSEQ_BUSY_EINT) {
1449 dev_dbg(codec->dev, "Write sequencer done\n");
1450 complete(&wm8903->wseq);
1456 #define WM8903_PLAYBACK_RATES (SNDRV_PCM_RATE_8000 |\
1457 SNDRV_PCM_RATE_11025 | \
1458 SNDRV_PCM_RATE_16000 | \
1459 SNDRV_PCM_RATE_22050 | \
1460 SNDRV_PCM_RATE_32000 | \
1461 SNDRV_PCM_RATE_44100 | \
1462 SNDRV_PCM_RATE_48000 | \
1463 SNDRV_PCM_RATE_88200 | \
1464 SNDRV_PCM_RATE_96000)
1466 #define WM8903_CAPTURE_RATES (SNDRV_PCM_RATE_8000 |\
1467 SNDRV_PCM_RATE_11025 | \
1468 SNDRV_PCM_RATE_16000 | \
1469 SNDRV_PCM_RATE_22050 | \
1470 SNDRV_PCM_RATE_32000 | \
1471 SNDRV_PCM_RATE_44100 | \
1472 SNDRV_PCM_RATE_48000)
1474 #define WM8903_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
1475 SNDRV_PCM_FMTBIT_S20_3LE |\
1476 SNDRV_PCM_FMTBIT_S24_LE)
1478 static struct snd_soc_dai_ops wm8903_dai_ops = {
1479 .startup = wm8903_startup,
1480 .shutdown = wm8903_shutdown,
1481 .hw_params = wm8903_hw_params,
1482 .digital_mute = wm8903_digital_mute,
1483 .set_fmt = wm8903_set_dai_fmt,
1484 .set_sysclk = wm8903_set_dai_sysclk,
1487 struct snd_soc_dai wm8903_dai = {
1490 .stream_name = "Playback",
1493 .rates = WM8903_PLAYBACK_RATES,
1494 .formats = WM8903_FORMATS,
1497 .stream_name = "Capture",
1500 .rates = WM8903_CAPTURE_RATES,
1501 .formats = WM8903_FORMATS,
1503 .ops = &wm8903_dai_ops,
1504 .symmetric_rates = 1,
1506 EXPORT_SYMBOL_GPL(wm8903_dai);
1508 static int wm8903_suspend(struct platform_device *pdev, pm_message_t state)
1510 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1511 struct snd_soc_codec *codec = socdev->card->codec;
1513 wm8903_set_bias_level(codec, SND_SOC_BIAS_OFF);
1518 static int wm8903_resume(struct platform_device *pdev)
1520 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1521 struct snd_soc_codec *codec = socdev->card->codec;
1522 struct i2c_client *i2c = codec->control_data;
1524 u16 *reg_cache = codec->reg_cache;
1525 u16 *tmp_cache = kmemdup(reg_cache, sizeof(wm8903_reg_defaults),
1528 /* Bring the codec back up to standby first to minimise pop/clicks */
1529 wm8903_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1530 wm8903_set_bias_level(codec, codec->suspend_bias_level);
1532 /* Sync back everything else */
1534 for (i = 2; i < ARRAY_SIZE(wm8903_reg_defaults); i++)
1535 if (tmp_cache[i] != reg_cache[i])
1536 snd_soc_write(codec, i, tmp_cache[i]);
1539 dev_err(&i2c->dev, "Failed to allocate temporary cache\n");
1545 static struct snd_soc_codec *wm8903_codec;
1547 static __devinit int wm8903_i2c_probe(struct i2c_client *i2c,
1548 const struct i2c_device_id *id)
1550 struct wm8903_platform_data *pdata = dev_get_platdata(&i2c->dev);
1551 struct wm8903_priv *wm8903;
1552 struct snd_soc_codec *codec;
1554 int trigger, irq_pol;
1557 wm8903 = kzalloc(sizeof(struct wm8903_priv), GFP_KERNEL);
1561 codec = &wm8903->codec;
1563 mutex_init(&codec->mutex);
1564 INIT_LIST_HEAD(&codec->dapm_widgets);
1565 INIT_LIST_HEAD(&codec->dapm_paths);
1567 codec->dev = &i2c->dev;
1568 codec->name = "WM8903";
1569 codec->owner = THIS_MODULE;
1570 codec->bias_level = SND_SOC_BIAS_OFF;
1571 codec->set_bias_level = wm8903_set_bias_level;
1572 codec->dai = &wm8903_dai;
1574 codec->reg_cache_size = ARRAY_SIZE(wm8903->reg_cache);
1575 codec->reg_cache = &wm8903->reg_cache[0];
1576 codec->private_data = wm8903;
1577 codec->volatile_register = wm8903_volatile_register;
1578 init_completion(&wm8903->wseq);
1580 i2c_set_clientdata(i2c, codec);
1581 codec->control_data = i2c;
1583 ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C);
1585 dev_err(&i2c->dev, "Failed to set cache I/O: %d\n", ret);
1589 val = snd_soc_read(codec, WM8903_SW_RESET_AND_ID);
1590 if (val != wm8903_reg_defaults[WM8903_SW_RESET_AND_ID]) {
1592 "Device with ID register %x is not a WM8903\n", val);
1596 val = snd_soc_read(codec, WM8903_REVISION_NUMBER);
1597 dev_info(&i2c->dev, "WM8903 revision %d\n",
1598 val & WM8903_CHIP_REV_MASK);
1600 wm8903_reset(codec);
1602 /* Set up GPIOs and microphone detection */
1604 for (i = 0; i < ARRAY_SIZE(pdata->gpio_cfg); i++) {
1605 if (!pdata->gpio_cfg[i])
1608 snd_soc_write(codec, WM8903_GPIO_CONTROL_1 + i,
1609 pdata->gpio_cfg[i] & 0xffff);
1612 snd_soc_write(codec, WM8903_MIC_BIAS_CONTROL_0,
1615 /* Microphone detection needs the WSEQ clock */
1616 if (pdata->micdet_cfg)
1617 snd_soc_update_bits(codec, WM8903_WRITE_SEQUENCER_0,
1618 WM8903_WSEQ_ENA, WM8903_WSEQ_ENA);
1620 wm8903->mic_delay = pdata->micdet_delay;
1624 if (pdata && pdata->irq_active_low) {
1625 trigger = IRQF_TRIGGER_LOW;
1626 irq_pol = WM8903_IRQ_POL;
1628 trigger = IRQF_TRIGGER_HIGH;
1632 snd_soc_update_bits(codec, WM8903_INTERRUPT_CONTROL,
1633 WM8903_IRQ_POL, irq_pol);
1635 ret = request_threaded_irq(i2c->irq, NULL, wm8903_irq,
1636 trigger | IRQF_ONESHOT,
1639 dev_err(&i2c->dev, "Failed to request IRQ: %d\n",
1644 /* Enable write sequencer interrupts */
1645 snd_soc_update_bits(codec, WM8903_INTERRUPT_STATUS_1_MASK,
1646 WM8903_IM_WSEQ_BUSY_EINT, 0);
1649 /* power on device */
1650 wm8903_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1652 /* Latch volume update bits */
1653 val = snd_soc_read(codec, WM8903_ADC_DIGITAL_VOLUME_LEFT);
1654 val |= WM8903_ADCVU;
1655 snd_soc_write(codec, WM8903_ADC_DIGITAL_VOLUME_LEFT, val);
1656 snd_soc_write(codec, WM8903_ADC_DIGITAL_VOLUME_RIGHT, val);
1658 val = snd_soc_read(codec, WM8903_DAC_DIGITAL_VOLUME_LEFT);
1659 val |= WM8903_DACVU;
1660 snd_soc_write(codec, WM8903_DAC_DIGITAL_VOLUME_LEFT, val);
1661 snd_soc_write(codec, WM8903_DAC_DIGITAL_VOLUME_RIGHT, val);
1663 val = snd_soc_read(codec, WM8903_ANALOGUE_OUT1_LEFT);
1664 val |= WM8903_HPOUTVU;
1665 snd_soc_write(codec, WM8903_ANALOGUE_OUT1_LEFT, val);
1666 snd_soc_write(codec, WM8903_ANALOGUE_OUT1_RIGHT, val);
1668 val = snd_soc_read(codec, WM8903_ANALOGUE_OUT2_LEFT);
1669 val |= WM8903_LINEOUTVU;
1670 snd_soc_write(codec, WM8903_ANALOGUE_OUT2_LEFT, val);
1671 snd_soc_write(codec, WM8903_ANALOGUE_OUT2_RIGHT, val);
1673 val = snd_soc_read(codec, WM8903_ANALOGUE_OUT3_LEFT);
1674 val |= WM8903_SPKVU;
1675 snd_soc_write(codec, WM8903_ANALOGUE_OUT3_LEFT, val);
1676 snd_soc_write(codec, WM8903_ANALOGUE_OUT3_RIGHT, val);
1678 /* Enable DAC soft mute by default */
1679 val = snd_soc_read(codec, WM8903_DAC_DIGITAL_1);
1680 val |= WM8903_DAC_MUTEMODE;
1681 snd_soc_write(codec, WM8903_DAC_DIGITAL_1, val);
1683 wm8903_dai.dev = &i2c->dev;
1684 wm8903_codec = codec;
1686 ret = snd_soc_register_codec(codec);
1688 dev_err(&i2c->dev, "Failed to register codec: %d\n", ret);
1692 ret = snd_soc_register_dai(&wm8903_dai);
1694 dev_err(&i2c->dev, "Failed to register DAI: %d\n", ret);
1701 snd_soc_unregister_codec(codec);
1704 free_irq(i2c->irq, wm8903);
1706 wm8903_codec = NULL;
1711 static __devexit int wm8903_i2c_remove(struct i2c_client *client)
1713 struct snd_soc_codec *codec = i2c_get_clientdata(client);
1714 struct wm8903_priv *priv = codec->private_data;
1716 snd_soc_unregister_dai(&wm8903_dai);
1717 snd_soc_unregister_codec(codec);
1719 wm8903_set_bias_level(codec, SND_SOC_BIAS_OFF);
1722 free_irq(client->irq, priv);
1724 kfree(codec->private_data);
1726 wm8903_codec = NULL;
1727 wm8903_dai.dev = NULL;
1732 /* i2c codec control layer */
1733 static const struct i2c_device_id wm8903_i2c_id[] = {
1737 MODULE_DEVICE_TABLE(i2c, wm8903_i2c_id);
1739 static struct i2c_driver wm8903_i2c_driver = {
1742 .owner = THIS_MODULE,
1744 .probe = wm8903_i2c_probe,
1745 .remove = __devexit_p(wm8903_i2c_remove),
1746 .id_table = wm8903_i2c_id,
1749 static int wm8903_probe(struct platform_device *pdev)
1751 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1754 if (!wm8903_codec) {
1755 dev_err(&pdev->dev, "I2C device not yet probed\n");
1759 socdev->card->codec = wm8903_codec;
1762 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
1764 dev_err(&pdev->dev, "failed to create pcms\n");
1768 snd_soc_add_controls(socdev->card->codec, wm8903_snd_controls,
1769 ARRAY_SIZE(wm8903_snd_controls));
1770 wm8903_add_widgets(socdev->card->codec);
1778 /* power down chip */
1779 static int wm8903_remove(struct platform_device *pdev)
1781 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1782 struct snd_soc_codec *codec = socdev->card->codec;
1784 if (codec->control_data)
1785 wm8903_set_bias_level(codec, SND_SOC_BIAS_OFF);
1787 snd_soc_free_pcms(socdev);
1788 snd_soc_dapm_free(socdev);
1793 struct snd_soc_codec_device soc_codec_dev_wm8903 = {
1794 .probe = wm8903_probe,
1795 .remove = wm8903_remove,
1796 .suspend = wm8903_suspend,
1797 .resume = wm8903_resume,
1799 EXPORT_SYMBOL_GPL(soc_codec_dev_wm8903);
1801 static int __init wm8903_modinit(void)
1803 return i2c_add_driver(&wm8903_i2c_driver);
1805 module_init(wm8903_modinit);
1807 static void __exit wm8903_exit(void)
1809 i2c_del_driver(&wm8903_i2c_driver);
1811 module_exit(wm8903_exit);
1813 MODULE_DESCRIPTION("ASoC WM8903 driver");
1814 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.cm>");
1815 MODULE_LICENSE("GPL");