2 * Driver for ESS Maestro 1/2/2E Sound Card (started 21.8.99)
3 * Copyright (c) by Matze Braun <MatzeBraun@gmx.de>.
4 * Takashi Iwai <tiwai@suse.de>
6 * Most of the driver code comes from Zach Brown(zab@redhat.com)
8 * Rewritted from card-es1938.c source.
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
28 * Notes from Zach Brown about the driver code
30 * Hardware Description
32 * A working Maestro setup contains the Maestro chip wired to a
33 * codec or 2. In the Maestro we have the APUs, the ASSP, and the
34 * Wavecache. The APUs can be though of as virtual audio routing
35 * channels. They can take data from a number of sources and perform
36 * basic encodings of the data. The wavecache is a storehouse for
37 * PCM data. Typically it deals with PCI and interracts with the
38 * APUs. The ASSP is a wacky DSP like device that ESS is loth
39 * to release docs on. Thankfully it isn't required on the Maestro
40 * until you start doing insane things like FM emulation and surround
41 * encoding. The codecs are almost always AC-97 compliant codecs,
42 * but it appears that early Maestros may have had PT101 (an ESS
43 * part?) wired to them. The only real difference in the Maestro
44 * families is external goop like docking capability, memory for
45 * the ASSP, and initialization differences.
49 * We only drive the APU/Wavecache as typical DACs and drive the
50 * mixers in the codecs. There are 64 APUs. We assign 6 to each
51 * /dev/dsp? device. 2 channels for output, and 4 channels for
54 * Each APU can do a number of things, but we only really use
55 * 3 basic functions. For playback we use them to convert PCM
56 * data fetched over PCI by the wavecahche into analog data that
57 * is handed to the codec. One APU for mono, and a pair for stereo.
58 * When in stereo, the combination of smarts in the APU and Wavecache
59 * decide which wavecache gets the left or right channel.
61 * For record we still use the old overly mono system. For each in
62 * coming channel the data comes in from the codec, through a 'input'
63 * APU, through another rate converter APU, and then into memory via
64 * the wavecache and PCI. If its stereo, we mash it back into LRLR in
65 * software. The pass between the 2 APUs is supposedly what requires us
66 * to have a 512 byte buffer sitting around in wavecache/memory.
68 * The wavecache makes our life even more fun. First off, it can
69 * only address the first 28 bits of PCI address space, making it
70 * useless on quite a few architectures. Secondly, its insane.
71 * It claims to fetch from 4 regions of PCI space, each 4 meg in length.
72 * But that doesn't really work. You can only use 1 region. So all our
73 * allocations have to be in 4meg of each other. Booo. Hiss.
74 * So we have a module parameter, dsps_order, that is the order of
75 * the number of dsps to provide. All their buffer space is allocated
76 * on open time. The sonicvibes OSS routines we inherited really want
77 * power of 2 buffers, so we have all those next to each other, then
78 * 512 byte regions for the recording wavecaches. This ends up
79 * wasting quite a bit of memory. The only fixes I can see would be
80 * getting a kernel allocator that could work in zones, or figuring out
81 * just how to coerce the WP into doing what we want.
83 * The indirection of the various registers means we have to spinlock
84 * nearly all register accesses. We have the main register indirection
85 * like the wave cache, maestro registers, etc. Then we have beasts
86 * like the APU interface that is indirect registers gotten at through
87 * the main maestro indirection. Ouch. We spinlock around the actual
88 * ports on a per card basis. This means spinlock activity at each IO
89 * operation, but the only IO operation clusters are in non critical
90 * paths and it makes the code far easier to follow. Interrupts are
91 * blocked while holding the locks because the int handler has to
92 * get at some of them :(. The mixer interface doesn't, however.
93 * We also have an OSS state lock that is thrown around in a few
98 #include <linux/delay.h>
99 #include <linux/interrupt.h>
100 #include <linux/init.h>
101 #include <linux/pci.h>
102 #include <linux/dma-mapping.h>
103 #include <linux/slab.h>
104 #include <linux/gameport.h>
105 #include <linux/module.h>
106 #include <linux/mutex.h>
107 #include <linux/input.h>
109 #include <sound/core.h>
110 #include <sound/pcm.h>
111 #include <sound/mpu401.h>
112 #include <sound/ac97_codec.h>
113 #include <sound/initval.h>
115 #ifdef CONFIG_SND_ES1968_RADIO
116 #include <sound/tea575x-tuner.h>
119 #define CARD_NAME "ESS Maestro1/2"
120 #define DRIVER_NAME "ES1968"
122 MODULE_DESCRIPTION("ESS Maestro");
123 MODULE_LICENSE("GPL");
124 MODULE_SUPPORTED_DEVICE("{{ESS,Maestro 2e},"
129 #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
130 #define SUPPORT_JOYSTICK 1
133 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 1-MAX */
134 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
135 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
136 static int total_bufsize[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1024 };
137 static int pcm_substreams_p[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 4 };
138 static int pcm_substreams_c[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1 };
139 static int clock[SNDRV_CARDS];
140 static int use_pm[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2};
141 static int enable_mpu[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2};
142 #ifdef SUPPORT_JOYSTICK
143 static int joystick[SNDRV_CARDS];
146 module_param_array(index, int, NULL, 0444);
147 MODULE_PARM_DESC(index, "Index value for " CARD_NAME " soundcard.");
148 module_param_array(id, charp, NULL, 0444);
149 MODULE_PARM_DESC(id, "ID string for " CARD_NAME " soundcard.");
150 module_param_array(enable, bool, NULL, 0444);
151 MODULE_PARM_DESC(enable, "Enable " CARD_NAME " soundcard.");
152 module_param_array(total_bufsize, int, NULL, 0444);
153 MODULE_PARM_DESC(total_bufsize, "Total buffer size in kB.");
154 module_param_array(pcm_substreams_p, int, NULL, 0444);
155 MODULE_PARM_DESC(pcm_substreams_p, "PCM Playback substreams for " CARD_NAME " soundcard.");
156 module_param_array(pcm_substreams_c, int, NULL, 0444);
157 MODULE_PARM_DESC(pcm_substreams_c, "PCM Capture substreams for " CARD_NAME " soundcard.");
158 module_param_array(clock, int, NULL, 0444);
159 MODULE_PARM_DESC(clock, "Clock on " CARD_NAME " soundcard. (0 = auto-detect)");
160 module_param_array(use_pm, int, NULL, 0444);
161 MODULE_PARM_DESC(use_pm, "Toggle power-management. (0 = off, 1 = on, 2 = auto)");
162 module_param_array(enable_mpu, int, NULL, 0444);
163 MODULE_PARM_DESC(enable_mpu, "Enable MPU401. (0 = off, 1 = on, 2 = auto)");
164 #ifdef SUPPORT_JOYSTICK
165 module_param_array(joystick, bool, NULL, 0444);
166 MODULE_PARM_DESC(joystick, "Enable joystick.");
171 #define NR_APU_REGS 16
174 #define NEC_VERSA_SUBID1 0x80581033
175 #define NEC_VERSA_SUBID2 0x803c1033
178 #define ESS_FMT_STEREO 0x01
179 #define ESS_FMT_16BIT 0x02
181 #define DAC_RUNNING 1
182 #define ADC_RUNNING 2
184 /* Values for the ESM_LEGACY_AUDIO_CONTROL */
186 #define ESS_DISABLE_AUDIO 0x8000
187 #define ESS_ENABLE_SERIAL_IRQ 0x4000
188 #define IO_ADRESS_ALIAS 0x0020
189 #define MPU401_IRQ_ENABLE 0x0010
190 #define MPU401_IO_ENABLE 0x0008
191 #define GAME_IO_ENABLE 0x0004
192 #define FM_IO_ENABLE 0x0002
193 #define SB_IO_ENABLE 0x0001
195 /* Values for the ESM_CONFIG_A */
197 #define PIC_SNOOP1 0x4000
198 #define PIC_SNOOP2 0x2000
199 #define SAFEGUARD 0x0800
200 #define DMA_CLEAR 0x0700
201 #define DMA_DDMA 0x0000
202 #define DMA_TDMA 0x0100
203 #define DMA_PCPCI 0x0200
204 #define POST_WRITE 0x0080
205 #define PCI_TIMING 0x0040
206 #define SWAP_LR 0x0020
207 #define SUBTR_DECODE 0x0002
209 /* Values for the ESM_CONFIG_B */
211 #define SPDIF_CONFB 0x0100
212 #define HWV_CONFB 0x0080
213 #define DEBOUNCE 0x0040
214 #define GPIO_CONFB 0x0020
215 #define CHI_CONFB 0x0010
216 #define IDMA_CONFB 0x0008 /*undoc */
217 #define MIDI_FIX 0x0004 /*undoc */
218 #define IRQ_TO_ISA 0x0001 /*undoc */
220 /* Values for Ring Bus Control B */
221 #define RINGB_2CODEC_ID_MASK 0x0003
222 #define RINGB_DIS_VALIDATION 0x0008
223 #define RINGB_EN_SPDIF 0x0010
224 #define RINGB_EN_2CODEC 0x0020
225 #define RINGB_SING_BIT_DUAL 0x0040
227 /* ****Port Addresses**** */
230 #define ESM_INDEX 0x02
231 #define ESM_DATA 0x00
234 #define ESM_AC97_INDEX 0x30
235 #define ESM_AC97_DATA 0x32
236 #define ESM_RING_BUS_DEST 0x34
237 #define ESM_RING_BUS_CONTR_A 0x36
238 #define ESM_RING_BUS_CONTR_B 0x38
239 #define ESM_RING_BUS_SDO 0x3A
242 #define WC_INDEX 0x10
244 #define WC_CONTROL 0x14
247 #define ASSP_INDEX 0x80
248 #define ASSP_MEMORY 0x82
249 #define ASSP_DATA 0x84
250 #define ASSP_CONTROL_A 0xA2
251 #define ASSP_CONTROL_B 0xA4
252 #define ASSP_CONTROL_C 0xA6
253 #define ASSP_HOSTW_INDEX 0xA8
254 #define ASSP_HOSTW_DATA 0xAA
255 #define ASSP_HOSTW_IRQ 0xAC
257 #define ESM_MPU401_PORT 0x98
259 #define ESM_PORT_HOST_IRQ 0x18
261 #define IDR0_DATA_PORT 0x00
262 #define IDR1_CRAM_POINTER 0x01
263 #define IDR2_CRAM_DATA 0x02
264 #define IDR3_WAVE_DATA 0x03
265 #define IDR4_WAVE_PTR_LOW 0x04
266 #define IDR5_WAVE_PTR_HI 0x05
267 #define IDR6_TIMER_CTRL 0x06
268 #define IDR7_WAVE_ROMRAM 0x07
270 #define WRITEABLE_MAP 0xEFFFFF
271 #define READABLE_MAP 0x64003F
275 #define ESM_LEGACY_AUDIO_CONTROL 0x40
276 #define ESM_ACPI_COMMAND 0x54
277 #define ESM_CONFIG_A 0x50
278 #define ESM_CONFIG_B 0x52
279 #define ESM_DDMA 0x60
282 #define ESM_BOB_ENABLE 0x0001
283 #define ESM_BOB_START 0x0001
285 /* Host IRQ Control Bits */
286 #define ESM_RESET_MAESTRO 0x8000
287 #define ESM_RESET_DIRECTSOUND 0x4000
288 #define ESM_HIRQ_ClkRun 0x0100
289 #define ESM_HIRQ_HW_VOLUME 0x0040
290 #define ESM_HIRQ_HARPO 0x0030 /* What's that? */
291 #define ESM_HIRQ_ASSP 0x0010
292 #define ESM_HIRQ_DSIE 0x0004
293 #define ESM_HIRQ_MPU401 0x0002
294 #define ESM_HIRQ_SB 0x0001
296 /* Host IRQ Status Bits */
297 #define ESM_MPU401_IRQ 0x02
298 #define ESM_SB_IRQ 0x01
299 #define ESM_SOUND_IRQ 0x04
300 #define ESM_ASSP_IRQ 0x10
301 #define ESM_HWVOL_IRQ 0x40
303 #define ESS_SYSCLK 50000000
304 #define ESM_BOB_FREQ 200
305 #define ESM_BOB_FREQ_MAX 800
307 #define ESM_FREQ_ESM1 (49152000L / 1024L) /* default rate 48000 */
308 #define ESM_FREQ_ESM2 (50000000L / 1024L)
310 /* APU Modes: reg 0x00, bit 4-7 */
311 #define ESM_APU_MODE_SHIFT 4
312 #define ESM_APU_MODE_MASK (0xf << 4)
313 #define ESM_APU_OFF 0x00
314 #define ESM_APU_16BITLINEAR 0x01 /* 16-Bit Linear Sample Player */
315 #define ESM_APU_16BITSTEREO 0x02 /* 16-Bit Stereo Sample Player */
316 #define ESM_APU_8BITLINEAR 0x03 /* 8-Bit Linear Sample Player */
317 #define ESM_APU_8BITSTEREO 0x04 /* 8-Bit Stereo Sample Player */
318 #define ESM_APU_8BITDIFF 0x05 /* 8-Bit Differential Sample Playrer */
319 #define ESM_APU_DIGITALDELAY 0x06 /* Digital Delay Line */
320 #define ESM_APU_DUALTAP 0x07 /* Dual Tap Reader */
321 #define ESM_APU_CORRELATOR 0x08 /* Correlator */
322 #define ESM_APU_INPUTMIXER 0x09 /* Input Mixer */
323 #define ESM_APU_WAVETABLE 0x0A /* Wave Table Mode */
324 #define ESM_APU_SRCONVERTOR 0x0B /* Sample Rate Convertor */
325 #define ESM_APU_16BITPINGPONG 0x0C /* 16-Bit Ping-Pong Sample Player */
326 #define ESM_APU_RESERVED1 0x0D /* Reserved 1 */
327 #define ESM_APU_RESERVED2 0x0E /* Reserved 2 */
328 #define ESM_APU_RESERVED3 0x0F /* Reserved 3 */
331 #define ESM_APU_FILTER_Q_SHIFT 0
332 #define ESM_APU_FILTER_Q_MASK (3 << 0)
333 /* APU Filtey Q Control */
334 #define ESM_APU_FILTER_LESSQ 0x00
335 #define ESM_APU_FILTER_MOREQ 0x03
337 #define ESM_APU_FILTER_TYPE_SHIFT 2
338 #define ESM_APU_FILTER_TYPE_MASK (3 << 2)
339 #define ESM_APU_ENV_TYPE_SHIFT 8
340 #define ESM_APU_ENV_TYPE_MASK (3 << 8)
341 #define ESM_APU_ENV_STATE_SHIFT 10
342 #define ESM_APU_ENV_STATE_MASK (3 << 10)
343 #define ESM_APU_END_CURVE (1 << 12)
344 #define ESM_APU_INT_ON_LOOP (1 << 13)
345 #define ESM_APU_DMA_ENABLE (1 << 14)
348 #define ESM_APU_SUBMIX_GROUP_SHIRT 0
349 #define ESM_APU_SUBMIX_GROUP_MASK (7 << 0)
350 #define ESM_APU_SUBMIX_MODE (1 << 3)
351 #define ESM_APU_6dB (1 << 4)
352 #define ESM_APU_DUAL_EFFECT (1 << 5)
353 #define ESM_APU_EFFECT_CHANNELS_SHIFT 6
354 #define ESM_APU_EFFECT_CHANNELS_MASK (3 << 6)
357 #define ESM_APU_STEP_SIZE_MASK 0x0fff
360 #define ESM_APU_PHASE_SHIFT 0
361 #define ESM_APU_PHASE_MASK (0xff << 0)
362 #define ESM_APU_WAVE64K_PAGE_SHIFT 8 /* most 8bit of wave start offset */
363 #define ESM_APU_WAVE64K_PAGE_MASK (0xff << 8)
365 /* reg 0x05 - wave start offset */
366 /* reg 0x06 - wave end offset */
367 /* reg 0x07 - wave loop length */
370 #define ESM_APU_EFFECT_GAIN_SHIFT 0
371 #define ESM_APU_EFFECT_GAIN_MASK (0xff << 0)
372 #define ESM_APU_TREMOLO_DEPTH_SHIFT 8
373 #define ESM_APU_TREMOLO_DEPTH_MASK (0xf << 8)
374 #define ESM_APU_TREMOLO_RATE_SHIFT 12
375 #define ESM_APU_TREMOLO_RATE_MASK (0xf << 12)
378 /* bit 0-7 amplitude dest? */
379 #define ESM_APU_AMPLITUDE_NOW_SHIFT 8
380 #define ESM_APU_AMPLITUDE_NOW_MASK (0xff << 8)
383 #define ESM_APU_POLAR_PAN_SHIFT 0
384 #define ESM_APU_POLAR_PAN_MASK (0x3f << 0)
385 /* Polar Pan Control */
386 #define ESM_APU_PAN_CENTER_CIRCLE 0x00
387 #define ESM_APU_PAN_MIDDLE_RADIUS 0x01
388 #define ESM_APU_PAN_OUTSIDE_RADIUS 0x02
390 #define ESM_APU_FILTER_TUNING_SHIFT 8
391 #define ESM_APU_FILTER_TUNING_MASK (0xff << 8)
394 #define ESM_APU_DATA_SRC_A_SHIFT 0
395 #define ESM_APU_DATA_SRC_A_MASK (0x7f << 0)
396 #define ESM_APU_INV_POL_A (1 << 7)
397 #define ESM_APU_DATA_SRC_B_SHIFT 8
398 #define ESM_APU_DATA_SRC_B_MASK (0x7f << 8)
399 #define ESM_APU_INV_POL_B (1 << 15)
401 #define ESM_APU_VIBRATO_RATE_SHIFT 0
402 #define ESM_APU_VIBRATO_RATE_MASK (0xf << 0)
403 #define ESM_APU_VIBRATO_DEPTH_SHIFT 4
404 #define ESM_APU_VIBRATO_DEPTH_MASK (0xf << 4)
405 #define ESM_APU_VIBRATO_PHASE_SHIFT 8
406 #define ESM_APU_VIBRATO_PHASE_MASK (0xff << 8)
409 #define ESM_APU_RADIUS_SELECT (1 << 6)
411 /* APU Filter Control */
412 #define ESM_APU_FILTER_2POLE_LOPASS 0x00
413 #define ESM_APU_FILTER_2POLE_BANDPASS 0x01
414 #define ESM_APU_FILTER_2POLE_HIPASS 0x02
415 #define ESM_APU_FILTER_1POLE_LOPASS 0x03
416 #define ESM_APU_FILTER_1POLE_HIPASS 0x04
417 #define ESM_APU_FILTER_OFF 0x05
420 #define ESM_APU_ATFP_AMPLITUDE 0x00
421 #define ESM_APU_ATFP_TREMELO 0x01
422 #define ESM_APU_ATFP_FILTER 0x02
423 #define ESM_APU_ATFP_PAN 0x03
426 #define ESM_APU_ATFP_FLG_OFF 0x00
427 #define ESM_APU_ATFP_FLG_WAIT 0x01
428 #define ESM_APU_ATFP_FLG_DONE 0x02
429 #define ESM_APU_ATFP_FLG_INPROCESS 0x03
432 /* capture mixing buffer size */
433 #define ESM_MEM_ALIGN 0x1000
434 #define ESM_MIXBUF_SIZE 0x400
436 #define ESM_MODE_PLAY 0
437 #define ESM_MODE_CAPTURE 1
440 /* APU use in the driver */
441 enum snd_enum_apu_type {
444 ESM_APU_PCM_RATECONV,
450 TYPE_MAESTRO, TYPE_MAESTRO2, TYPE_MAESTRO2E
455 struct snd_dma_buffer buf;
456 int empty; /* status */
457 struct list_head list;
460 /* Playback Channel */
467 /* playback/capture pcm buffer */
468 struct esm_memory *memory;
469 /* capture mixer buffer */
470 struct esm_memory *mixbuf;
472 unsigned int hwptr; /* current hw pointer in bytes */
473 unsigned int count; /* sample counter in bytes */
474 unsigned int dma_size; /* total buffer size in bytes */
475 unsigned int frag_size; /* period size in bytes */
476 unsigned int wav_shift;
477 u16 base[4]; /* offset for ptr */
479 /* stereo/16bit flag */
481 int mode; /* playback / capture */
483 int bob_freq; /* required timer frequency */
485 struct snd_pcm_substream *substream;
488 struct list_head list;
497 int total_bufsize; /* in bytes */
499 int playback_streams, capture_streams;
501 unsigned int clock; /* clock */
502 /* for clock measurement */
503 unsigned int in_measurement: 1;
504 unsigned int measure_apu;
505 unsigned int measure_lastpos;
506 unsigned int measure_count;
509 struct snd_dma_buffer dma;
513 unsigned long io_port;
516 struct snd_card *card;
518 int do_pm; /* power-management enabled */
520 /* DMA memory block */
521 struct list_head buf_list;
524 struct snd_ac97 *ac97;
525 struct snd_rawmidi *rmidi;
528 unsigned int in_suspend;
532 int bobclient; /* active timer instancs */
533 int bob_freq; /* timer frequency */
534 struct mutex memory_mutex; /* memory lock */
537 unsigned char apu[NR_APUS];
539 /* active substreams */
540 struct list_head substream_list;
541 spinlock_t substream_lock;
544 u16 apu_map[NR_APUS][NR_APU_REGS];
547 #ifdef SUPPORT_JOYSTICK
548 struct gameport *gameport;
551 #ifdef CONFIG_SND_ES1968_INPUT
552 struct input_dev *input_dev;
553 char phys[64]; /* physical device path */
555 struct snd_kcontrol *master_switch; /* for h/w volume control */
556 struct snd_kcontrol *master_volume;
558 struct work_struct hwvol_work;
560 #ifdef CONFIG_SND_ES1968_RADIO
561 struct snd_tea575x tea;
565 static irqreturn_t snd_es1968_interrupt(int irq, void *dev_id);
567 static DEFINE_PCI_DEVICE_TABLE(snd_es1968_ids) = {
569 { 0x1285, 0x0100, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, TYPE_MAESTRO },
571 { 0x125d, 0x1968, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, TYPE_MAESTRO2 },
573 { 0x125d, 0x1978, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, TYPE_MAESTRO2E },
577 MODULE_DEVICE_TABLE(pci, snd_es1968_ids);
579 /* *********************
581 *********************/
584 static void __maestro_write(struct es1968 *chip, u16 reg, u16 data)
586 outw(reg, chip->io_port + ESM_INDEX);
587 outw(data, chip->io_port + ESM_DATA);
588 chip->maestro_map[reg] = data;
591 static inline void maestro_write(struct es1968 *chip, u16 reg, u16 data)
594 spin_lock_irqsave(&chip->reg_lock, flags);
595 __maestro_write(chip, reg, data);
596 spin_unlock_irqrestore(&chip->reg_lock, flags);
600 static u16 __maestro_read(struct es1968 *chip, u16 reg)
602 if (READABLE_MAP & (1 << reg)) {
603 outw(reg, chip->io_port + ESM_INDEX);
604 chip->maestro_map[reg] = inw(chip->io_port + ESM_DATA);
606 return chip->maestro_map[reg];
609 static inline u16 maestro_read(struct es1968 *chip, u16 reg)
613 spin_lock_irqsave(&chip->reg_lock, flags);
614 result = __maestro_read(chip, reg);
615 spin_unlock_irqrestore(&chip->reg_lock, flags);
619 /* Wait for the codec bus to be free */
620 static int snd_es1968_ac97_wait(struct es1968 *chip)
622 int timeout = 100000;
624 while (timeout-- > 0) {
625 if (!(inb(chip->io_port + ESM_AC97_INDEX) & 1))
629 snd_printd("es1968: ac97 timeout\n");
630 return 1; /* timeout */
633 static int snd_es1968_ac97_wait_poll(struct es1968 *chip)
635 int timeout = 100000;
637 while (timeout-- > 0) {
638 if (!(inb(chip->io_port + ESM_AC97_INDEX) & 1))
641 snd_printd("es1968: ac97 timeout\n");
642 return 1; /* timeout */
645 static void snd_es1968_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val)
647 struct es1968 *chip = ac97->private_data;
649 snd_es1968_ac97_wait(chip);
652 outw(val, chip->io_port + ESM_AC97_DATA);
654 outb(reg, chip->io_port + ESM_AC97_INDEX);
658 static unsigned short snd_es1968_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
661 struct es1968 *chip = ac97->private_data;
663 snd_es1968_ac97_wait(chip);
665 outb(reg | 0x80, chip->io_port + ESM_AC97_INDEX);
668 if (!snd_es1968_ac97_wait_poll(chip)) {
669 data = inw(chip->io_port + ESM_AC97_DATA);
677 static void apu_index_set(struct es1968 *chip, u16 index)
680 __maestro_write(chip, IDR1_CRAM_POINTER, index);
681 for (i = 0; i < 1000; i++)
682 if (__maestro_read(chip, IDR1_CRAM_POINTER) == index)
684 snd_printd("es1968: APU register select failed. (Timeout)\n");
688 static void apu_data_set(struct es1968 *chip, u16 data)
691 for (i = 0; i < 1000; i++) {
692 if (__maestro_read(chip, IDR0_DATA_PORT) == data)
694 __maestro_write(chip, IDR0_DATA_PORT, data);
696 snd_printd("es1968: APU register set probably failed (Timeout)!\n");
700 static void __apu_set_register(struct es1968 *chip, u16 channel, u8 reg, u16 data)
702 if (snd_BUG_ON(channel >= NR_APUS))
705 chip->apu_map[channel][reg] = data;
707 reg |= (channel << 4);
708 apu_index_set(chip, reg);
709 apu_data_set(chip, data);
712 static void apu_set_register(struct es1968 *chip, u16 channel, u8 reg, u16 data)
715 spin_lock_irqsave(&chip->reg_lock, flags);
716 __apu_set_register(chip, channel, reg, data);
717 spin_unlock_irqrestore(&chip->reg_lock, flags);
720 static u16 __apu_get_register(struct es1968 *chip, u16 channel, u8 reg)
722 if (snd_BUG_ON(channel >= NR_APUS))
724 reg |= (channel << 4);
725 apu_index_set(chip, reg);
726 return __maestro_read(chip, IDR0_DATA_PORT);
729 static u16 apu_get_register(struct es1968 *chip, u16 channel, u8 reg)
733 spin_lock_irqsave(&chip->reg_lock, flags);
734 v = __apu_get_register(chip, channel, reg);
735 spin_unlock_irqrestore(&chip->reg_lock, flags);
739 #if 0 /* ASSP is not supported */
741 static void assp_set_register(struct es1968 *chip, u32 reg, u32 value)
745 spin_lock_irqsave(&chip->reg_lock, flags);
746 outl(reg, chip->io_port + ASSP_INDEX);
747 outl(value, chip->io_port + ASSP_DATA);
748 spin_unlock_irqrestore(&chip->reg_lock, flags);
751 static u32 assp_get_register(struct es1968 *chip, u32 reg)
756 spin_lock_irqsave(&chip->reg_lock, flags);
757 outl(reg, chip->io_port + ASSP_INDEX);
758 value = inl(chip->io_port + ASSP_DATA);
759 spin_unlock_irqrestore(&chip->reg_lock, flags);
766 static void wave_set_register(struct es1968 *chip, u16 reg, u16 value)
770 spin_lock_irqsave(&chip->reg_lock, flags);
771 outw(reg, chip->io_port + WC_INDEX);
772 outw(value, chip->io_port + WC_DATA);
773 spin_unlock_irqrestore(&chip->reg_lock, flags);
776 static u16 wave_get_register(struct es1968 *chip, u16 reg)
781 spin_lock_irqsave(&chip->reg_lock, flags);
782 outw(reg, chip->io_port + WC_INDEX);
783 value = inw(chip->io_port + WC_DATA);
784 spin_unlock_irqrestore(&chip->reg_lock, flags);
789 /* *******************
793 static void snd_es1968_bob_stop(struct es1968 *chip)
797 reg = __maestro_read(chip, 0x11);
798 reg &= ~ESM_BOB_ENABLE;
799 __maestro_write(chip, 0x11, reg);
800 reg = __maestro_read(chip, 0x17);
801 reg &= ~ESM_BOB_START;
802 __maestro_write(chip, 0x17, reg);
805 static void snd_es1968_bob_start(struct es1968 *chip)
810 /* compute ideal interrupt frequency for buffer size & play rate */
811 /* first, find best prescaler value to match freq */
812 for (prescale = 5; prescale < 12; prescale++)
813 if (chip->bob_freq > (ESS_SYSCLK >> (prescale + 9)))
816 /* next, back off prescaler whilst getting divider into optimum range */
818 while ((prescale > 5) && (divide < 32)) {
824 /* now fine-tune the divider for best match */
825 for (; divide < 31; divide++)
827 ((ESS_SYSCLK >> (prescale + 9)) / (divide + 1))) break;
829 /* divide = 0 is illegal, but don't let prescale = 4! */
834 } else if (divide > 1)
837 __maestro_write(chip, 6, 0x9000 | (prescale << 5) | divide); /* set reg */
839 /* Now set IDR 11/17 */
840 __maestro_write(chip, 0x11, __maestro_read(chip, 0x11) | 1);
841 __maestro_write(chip, 0x17, __maestro_read(chip, 0x17) | 1);
844 /* call with substream spinlock */
845 static void snd_es1968_bob_inc(struct es1968 *chip, int freq)
848 if (chip->bobclient == 1) {
849 chip->bob_freq = freq;
850 snd_es1968_bob_start(chip);
851 } else if (chip->bob_freq < freq) {
852 snd_es1968_bob_stop(chip);
853 chip->bob_freq = freq;
854 snd_es1968_bob_start(chip);
858 /* call with substream spinlock */
859 static void snd_es1968_bob_dec(struct es1968 *chip)
862 if (chip->bobclient <= 0)
863 snd_es1968_bob_stop(chip);
864 else if (chip->bob_freq > ESM_BOB_FREQ) {
865 /* check reduction of timer frequency */
866 int max_freq = ESM_BOB_FREQ;
868 list_for_each_entry(es, &chip->substream_list, list) {
869 if (max_freq < es->bob_freq)
870 max_freq = es->bob_freq;
872 if (max_freq != chip->bob_freq) {
873 snd_es1968_bob_stop(chip);
874 chip->bob_freq = max_freq;
875 snd_es1968_bob_start(chip);
881 snd_es1968_calc_bob_rate(struct es1968 *chip, struct esschan *es,
882 struct snd_pcm_runtime *runtime)
884 /* we acquire 4 interrupts per period for precise control.. */
885 int freq = runtime->rate * 4;
886 if (es->fmt & ESS_FMT_STEREO)
888 if (es->fmt & ESS_FMT_16BIT)
890 freq /= es->frag_size;
891 if (freq < ESM_BOB_FREQ)
893 else if (freq > ESM_BOB_FREQ_MAX)
894 freq = ESM_BOB_FREQ_MAX;
903 static u32 snd_es1968_compute_rate(struct es1968 *chip, u32 freq)
905 u32 rate = (freq << 16) / chip->clock;
906 #if 0 /* XXX: do we need this? */
913 /* get current pointer */
914 static inline unsigned int
915 snd_es1968_get_dma_ptr(struct es1968 *chip, struct esschan *es)
919 offset = apu_get_register(chip, es->apu[0], 5);
921 offset -= es->base[0];
923 return (offset & 0xFFFE); /* hardware is in words */
926 static void snd_es1968_apu_set_freq(struct es1968 *chip, int apu, int freq)
928 apu_set_register(chip, apu, 2,
929 (apu_get_register(chip, apu, 2) & 0x00FF) |
930 ((freq & 0xff) << 8) | 0x10);
931 apu_set_register(chip, apu, 3, freq >> 8);
935 static inline void snd_es1968_trigger_apu(struct es1968 *esm, int apu, int mode)
937 /* set the APU mode */
938 __apu_set_register(esm, apu, 0,
939 (__apu_get_register(esm, apu, 0) & 0xff0f) |
943 static void snd_es1968_pcm_start(struct es1968 *chip, struct esschan *es)
945 spin_lock(&chip->reg_lock);
946 __apu_set_register(chip, es->apu[0], 5, es->base[0]);
947 snd_es1968_trigger_apu(chip, es->apu[0], es->apu_mode[0]);
948 if (es->mode == ESM_MODE_CAPTURE) {
949 __apu_set_register(chip, es->apu[2], 5, es->base[2]);
950 snd_es1968_trigger_apu(chip, es->apu[2], es->apu_mode[2]);
952 if (es->fmt & ESS_FMT_STEREO) {
953 __apu_set_register(chip, es->apu[1], 5, es->base[1]);
954 snd_es1968_trigger_apu(chip, es->apu[1], es->apu_mode[1]);
955 if (es->mode == ESM_MODE_CAPTURE) {
956 __apu_set_register(chip, es->apu[3], 5, es->base[3]);
957 snd_es1968_trigger_apu(chip, es->apu[3], es->apu_mode[3]);
960 spin_unlock(&chip->reg_lock);
963 static void snd_es1968_pcm_stop(struct es1968 *chip, struct esschan *es)
965 spin_lock(&chip->reg_lock);
966 snd_es1968_trigger_apu(chip, es->apu[0], 0);
967 snd_es1968_trigger_apu(chip, es->apu[1], 0);
968 if (es->mode == ESM_MODE_CAPTURE) {
969 snd_es1968_trigger_apu(chip, es->apu[2], 0);
970 snd_es1968_trigger_apu(chip, es->apu[3], 0);
972 spin_unlock(&chip->reg_lock);
975 /* set the wavecache control reg */
976 static void snd_es1968_program_wavecache(struct es1968 *chip, struct esschan *es,
977 int channel, u32 addr, int capture)
979 u32 tmpval = (addr - 0x10) & 0xFFF8;
982 if (!(es->fmt & ESS_FMT_16BIT))
983 tmpval |= 4; /* 8bit */
984 if (es->fmt & ESS_FMT_STEREO)
985 tmpval |= 2; /* stereo */
988 /* set the wavecache control reg */
989 wave_set_register(chip, es->apu[channel] << 3, tmpval);
992 es->wc_map[channel] = tmpval;
997 static void snd_es1968_playback_setup(struct es1968 *chip, struct esschan *es,
998 struct snd_pcm_runtime *runtime)
1004 unsigned long flags;
1007 size = es->dma_size >> es->wav_shift;
1009 if (es->fmt & ESS_FMT_STEREO)
1012 for (channel = 0; channel <= high_apu; channel++) {
1013 apu = es->apu[channel];
1015 snd_es1968_program_wavecache(chip, es, channel, es->memory->buf.addr, 0);
1017 /* Offset to PCMBAR */
1018 pa = es->memory->buf.addr;
1019 pa -= chip->dma.addr;
1020 pa >>= 1; /* words */
1022 pa |= 0x00400000; /* System RAM (Bit 22) */
1024 if (es->fmt & ESS_FMT_STEREO) {
1027 pa |= 0x00800000; /* (Bit 23) */
1028 if (es->fmt & ESS_FMT_16BIT)
1032 /* base offset of dma calcs when reading the pointer
1034 es->base[channel] = pa & 0xFFFF;
1036 for (i = 0; i < 16; i++)
1037 apu_set_register(chip, apu, i, 0x0000);
1039 /* Load the buffer into the wave engine */
1040 apu_set_register(chip, apu, 4, ((pa >> 16) & 0xFF) << 8);
1041 apu_set_register(chip, apu, 5, pa & 0xFFFF);
1042 apu_set_register(chip, apu, 6, (pa + size) & 0xFFFF);
1043 /* setting loop == sample len */
1044 apu_set_register(chip, apu, 7, size);
1046 /* clear effects/env.. */
1047 apu_set_register(chip, apu, 8, 0x0000);
1048 /* set amp now to 0xd0 (?), low byte is 'amplitude dest'? */
1049 apu_set_register(chip, apu, 9, 0xD000);
1051 /* clear routing stuff */
1052 apu_set_register(chip, apu, 11, 0x0000);
1053 /* dma on, no envelopes, filter to all 1s) */
1054 apu_set_register(chip, apu, 0, 0x400F);
1056 if (es->fmt & ESS_FMT_16BIT)
1057 es->apu_mode[channel] = ESM_APU_16BITLINEAR;
1059 es->apu_mode[channel] = ESM_APU_8BITLINEAR;
1061 if (es->fmt & ESS_FMT_STEREO) {
1062 /* set panning: left or right */
1063 /* Check: different panning. On my Canyon 3D Chipset the
1064 Channels are swapped. I don't know, about the output
1065 to the SPDif Link. Perhaps you have to change this
1066 and not the APU Regs 4-5. */
1067 apu_set_register(chip, apu, 10,
1068 0x8F00 | (channel ? 0 : 0x10));
1069 es->apu_mode[channel] += 1; /* stereo */
1071 apu_set_register(chip, apu, 10, 0x8F08);
1074 spin_lock_irqsave(&chip->reg_lock, flags);
1075 /* clear WP interrupts */
1076 outw(1, chip->io_port + 0x04);
1077 /* enable WP ints */
1078 outw(inw(chip->io_port + ESM_PORT_HOST_IRQ) | ESM_HIRQ_DSIE, chip->io_port + ESM_PORT_HOST_IRQ);
1079 spin_unlock_irqrestore(&chip->reg_lock, flags);
1081 freq = runtime->rate;
1089 if (!(es->fmt & ESS_FMT_16BIT) && !(es->fmt & ESS_FMT_STEREO))
1092 freq = snd_es1968_compute_rate(chip, freq);
1094 /* Load the frequency, turn on 6dB */
1095 snd_es1968_apu_set_freq(chip, es->apu[0], freq);
1096 snd_es1968_apu_set_freq(chip, es->apu[1], freq);
1100 static void init_capture_apu(struct es1968 *chip, struct esschan *es, int channel,
1101 unsigned int pa, unsigned int bsize,
1102 int mode, int route)
1104 int i, apu = es->apu[channel];
1106 es->apu_mode[channel] = mode;
1108 /* set the wavecache control reg */
1109 snd_es1968_program_wavecache(chip, es, channel, pa, 1);
1111 /* Offset to PCMBAR */
1112 pa -= chip->dma.addr;
1113 pa >>= 1; /* words */
1115 /* base offset of dma calcs when reading the pointer
1117 es->base[channel] = pa & 0xFFFF;
1118 pa |= 0x00400000; /* bit 22 -> System RAM */
1120 /* Begin loading the APU */
1121 for (i = 0; i < 16; i++)
1122 apu_set_register(chip, apu, i, 0x0000);
1124 /* need to enable subgroups.. and we should probably
1125 have different groups for different /dev/dsps.. */
1126 apu_set_register(chip, apu, 2, 0x8);
1128 /* Load the buffer into the wave engine */
1129 apu_set_register(chip, apu, 4, ((pa >> 16) & 0xFF) << 8);
1130 apu_set_register(chip, apu, 5, pa & 0xFFFF);
1131 apu_set_register(chip, apu, 6, (pa + bsize) & 0xFFFF);
1132 apu_set_register(chip, apu, 7, bsize);
1133 /* clear effects/env.. */
1134 apu_set_register(chip, apu, 8, 0x00F0);
1135 /* amplitude now? sure. why not. */
1136 apu_set_register(chip, apu, 9, 0x0000);
1137 /* set filter tune, radius, polar pan */
1138 apu_set_register(chip, apu, 10, 0x8F08);
1140 apu_set_register(chip, apu, 11, route);
1141 /* dma on, no envelopes, filter to all 1s) */
1142 apu_set_register(chip, apu, 0, 0x400F);
1145 static void snd_es1968_capture_setup(struct es1968 *chip, struct esschan *es,
1146 struct snd_pcm_runtime *runtime)
1150 unsigned long flags;
1152 size = es->dma_size >> es->wav_shift;
1157 2 = mono/left Input Mixer
1158 3 = right Input Mixer
1160 /* data seems to flow from the codec, through an apu into
1161 the 'mixbuf' bit of page, then through the SRC apu
1162 and out to the real 'buffer'. ok. sure. */
1164 /* input mixer (left/mono) */
1165 /* parallel in crap, see maestro reg 0xC [8-11] */
1166 init_capture_apu(chip, es, 2,
1167 es->mixbuf->buf.addr, ESM_MIXBUF_SIZE/4, /* in words */
1168 ESM_APU_INPUTMIXER, 0x14);
1169 /* SRC (left/mono); get input from inputing apu */
1170 init_capture_apu(chip, es, 0, es->memory->buf.addr, size,
1171 ESM_APU_SRCONVERTOR, es->apu[2]);
1172 if (es->fmt & ESS_FMT_STEREO) {
1173 /* input mixer (right) */
1174 init_capture_apu(chip, es, 3,
1175 es->mixbuf->buf.addr + ESM_MIXBUF_SIZE/2,
1176 ESM_MIXBUF_SIZE/4, /* in words */
1177 ESM_APU_INPUTMIXER, 0x15);
1179 init_capture_apu(chip, es, 1,
1180 es->memory->buf.addr + size*2, size,
1181 ESM_APU_SRCONVERTOR, es->apu[3]);
1184 freq = runtime->rate;
1185 /* Sample Rate conversion APUs don't like 0x10000 for their rate */
1191 freq = snd_es1968_compute_rate(chip, freq);
1193 /* Load the frequency, turn on 6dB */
1194 snd_es1968_apu_set_freq(chip, es->apu[0], freq);
1195 snd_es1968_apu_set_freq(chip, es->apu[1], freq);
1197 /* fix mixer rate at 48khz. and its _must_ be 0x10000. */
1199 snd_es1968_apu_set_freq(chip, es->apu[2], freq);
1200 snd_es1968_apu_set_freq(chip, es->apu[3], freq);
1202 spin_lock_irqsave(&chip->reg_lock, flags);
1203 /* clear WP interrupts */
1204 outw(1, chip->io_port + 0x04);
1205 /* enable WP ints */
1206 outw(inw(chip->io_port + ESM_PORT_HOST_IRQ) | ESM_HIRQ_DSIE, chip->io_port + ESM_PORT_HOST_IRQ);
1207 spin_unlock_irqrestore(&chip->reg_lock, flags);
1210 /*******************
1212 *******************/
1214 static int snd_es1968_pcm_prepare(struct snd_pcm_substream *substream)
1216 struct es1968 *chip = snd_pcm_substream_chip(substream);
1217 struct snd_pcm_runtime *runtime = substream->runtime;
1218 struct esschan *es = runtime->private_data;
1220 es->dma_size = snd_pcm_lib_buffer_bytes(substream);
1221 es->frag_size = snd_pcm_lib_period_bytes(substream);
1223 es->wav_shift = 1; /* maestro handles always 16bit */
1225 if (snd_pcm_format_width(runtime->format) == 16)
1226 es->fmt |= ESS_FMT_16BIT;
1227 if (runtime->channels > 1) {
1228 es->fmt |= ESS_FMT_STEREO;
1229 if (es->fmt & ESS_FMT_16BIT) /* 8bit is already word shifted */
1232 es->bob_freq = snd_es1968_calc_bob_rate(chip, es, runtime);
1236 snd_es1968_playback_setup(chip, es, runtime);
1238 case ESM_MODE_CAPTURE:
1239 snd_es1968_capture_setup(chip, es, runtime);
1246 static int snd_es1968_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
1248 struct es1968 *chip = snd_pcm_substream_chip(substream);
1249 struct esschan *es = substream->runtime->private_data;
1251 spin_lock(&chip->substream_lock);
1253 case SNDRV_PCM_TRIGGER_START:
1254 case SNDRV_PCM_TRIGGER_RESUME:
1257 snd_es1968_bob_inc(chip, es->bob_freq);
1260 snd_es1968_pcm_start(chip, es);
1263 case SNDRV_PCM_TRIGGER_STOP:
1264 case SNDRV_PCM_TRIGGER_SUSPEND:
1267 snd_es1968_pcm_stop(chip, es);
1269 snd_es1968_bob_dec(chip);
1272 spin_unlock(&chip->substream_lock);
1276 static snd_pcm_uframes_t snd_es1968_pcm_pointer(struct snd_pcm_substream *substream)
1278 struct es1968 *chip = snd_pcm_substream_chip(substream);
1279 struct esschan *es = substream->runtime->private_data;
1282 ptr = snd_es1968_get_dma_ptr(chip, es) << es->wav_shift;
1284 return bytes_to_frames(substream->runtime, ptr % es->dma_size);
1287 static struct snd_pcm_hardware snd_es1968_playback = {
1288 .info = (SNDRV_PCM_INFO_MMAP |
1289 SNDRV_PCM_INFO_MMAP_VALID |
1290 SNDRV_PCM_INFO_INTERLEAVED |
1291 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1292 /*SNDRV_PCM_INFO_PAUSE |*/
1293 SNDRV_PCM_INFO_RESUME),
1294 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
1295 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
1300 .buffer_bytes_max = 65536,
1301 .period_bytes_min = 256,
1302 .period_bytes_max = 65536,
1304 .periods_max = 1024,
1308 static struct snd_pcm_hardware snd_es1968_capture = {
1309 .info = (SNDRV_PCM_INFO_NONINTERLEAVED |
1310 SNDRV_PCM_INFO_MMAP |
1311 SNDRV_PCM_INFO_MMAP_VALID |
1312 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1313 /*SNDRV_PCM_INFO_PAUSE |*/
1314 SNDRV_PCM_INFO_RESUME),
1315 .formats = /*SNDRV_PCM_FMTBIT_U8 |*/ SNDRV_PCM_FMTBIT_S16_LE,
1316 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
1321 .buffer_bytes_max = 65536,
1322 .period_bytes_min = 256,
1323 .period_bytes_max = 65536,
1325 .periods_max = 1024,
1329 /* *************************
1330 * DMA memory management *
1331 *************************/
1333 /* Because the Maestro can only take addresses relative to the PCM base address
1336 static int calc_available_memory_size(struct es1968 *chip)
1339 struct esm_memory *buf;
1341 mutex_lock(&chip->memory_mutex);
1342 list_for_each_entry(buf, &chip->buf_list, list) {
1343 if (buf->empty && buf->buf.bytes > max_size)
1344 max_size = buf->buf.bytes;
1346 mutex_unlock(&chip->memory_mutex);
1347 if (max_size >= 128*1024)
1348 max_size = 127*1024;
1352 /* allocate a new memory chunk with the specified size */
1353 static struct esm_memory *snd_es1968_new_memory(struct es1968 *chip, int size)
1355 struct esm_memory *buf;
1357 size = ALIGN(size, ESM_MEM_ALIGN);
1358 mutex_lock(&chip->memory_mutex);
1359 list_for_each_entry(buf, &chip->buf_list, list) {
1360 if (buf->empty && buf->buf.bytes >= size)
1363 mutex_unlock(&chip->memory_mutex);
1367 if (buf->buf.bytes > size) {
1368 struct esm_memory *chunk = kmalloc(sizeof(*chunk), GFP_KERNEL);
1369 if (chunk == NULL) {
1370 mutex_unlock(&chip->memory_mutex);
1373 chunk->buf = buf->buf;
1374 chunk->buf.bytes -= size;
1375 chunk->buf.area += size;
1376 chunk->buf.addr += size;
1378 buf->buf.bytes = size;
1379 list_add(&chunk->list, &buf->list);
1382 mutex_unlock(&chip->memory_mutex);
1386 /* free a memory chunk */
1387 static void snd_es1968_free_memory(struct es1968 *chip, struct esm_memory *buf)
1389 struct esm_memory *chunk;
1391 mutex_lock(&chip->memory_mutex);
1393 if (buf->list.prev != &chip->buf_list) {
1394 chunk = list_entry(buf->list.prev, struct esm_memory, list);
1396 chunk->buf.bytes += buf->buf.bytes;
1397 list_del(&buf->list);
1402 if (buf->list.next != &chip->buf_list) {
1403 chunk = list_entry(buf->list.next, struct esm_memory, list);
1405 buf->buf.bytes += chunk->buf.bytes;
1406 list_del(&chunk->list);
1410 mutex_unlock(&chip->memory_mutex);
1413 static void snd_es1968_free_dmabuf(struct es1968 *chip)
1415 struct list_head *p;
1417 if (! chip->dma.area)
1419 snd_dma_reserve_buf(&chip->dma, snd_dma_pci_buf_id(chip->pci));
1420 while ((p = chip->buf_list.next) != &chip->buf_list) {
1421 struct esm_memory *chunk = list_entry(p, struct esm_memory, list);
1427 static int __devinit
1428 snd_es1968_init_dmabuf(struct es1968 *chip)
1431 struct esm_memory *chunk;
1433 chip->dma.dev.type = SNDRV_DMA_TYPE_DEV;
1434 chip->dma.dev.dev = snd_dma_pci_data(chip->pci);
1435 if (! snd_dma_get_reserved_buf(&chip->dma, snd_dma_pci_buf_id(chip->pci))) {
1436 err = snd_dma_alloc_pages_fallback(SNDRV_DMA_TYPE_DEV,
1437 snd_dma_pci_data(chip->pci),
1438 chip->total_bufsize, &chip->dma);
1439 if (err < 0 || ! chip->dma.area) {
1440 snd_printk(KERN_ERR "es1968: can't allocate dma pages for size %d\n",
1441 chip->total_bufsize);
1444 if ((chip->dma.addr + chip->dma.bytes - 1) & ~((1 << 28) - 1)) {
1445 snd_dma_free_pages(&chip->dma);
1446 snd_printk(KERN_ERR "es1968: DMA buffer beyond 256MB.\n");
1451 INIT_LIST_HEAD(&chip->buf_list);
1452 /* allocate an empty chunk */
1453 chunk = kmalloc(sizeof(*chunk), GFP_KERNEL);
1454 if (chunk == NULL) {
1455 snd_es1968_free_dmabuf(chip);
1458 memset(chip->dma.area, 0, ESM_MEM_ALIGN);
1459 chunk->buf = chip->dma;
1460 chunk->buf.area += ESM_MEM_ALIGN;
1461 chunk->buf.addr += ESM_MEM_ALIGN;
1462 chunk->buf.bytes -= ESM_MEM_ALIGN;
1464 list_add(&chunk->list, &chip->buf_list);
1469 /* setup the dma_areas */
1470 /* buffer is extracted from the pre-allocated memory chunk */
1471 static int snd_es1968_hw_params(struct snd_pcm_substream *substream,
1472 struct snd_pcm_hw_params *hw_params)
1474 struct es1968 *chip = snd_pcm_substream_chip(substream);
1475 struct snd_pcm_runtime *runtime = substream->runtime;
1476 struct esschan *chan = runtime->private_data;
1477 int size = params_buffer_bytes(hw_params);
1480 if (chan->memory->buf.bytes >= size) {
1481 runtime->dma_bytes = size;
1484 snd_es1968_free_memory(chip, chan->memory);
1486 chan->memory = snd_es1968_new_memory(chip, size);
1487 if (chan->memory == NULL) {
1488 // snd_printd("cannot allocate dma buffer: size = %d\n", size);
1491 snd_pcm_set_runtime_buffer(substream, &chan->memory->buf);
1492 return 1; /* area was changed */
1495 /* remove dma areas if allocated */
1496 static int snd_es1968_hw_free(struct snd_pcm_substream *substream)
1498 struct es1968 *chip = snd_pcm_substream_chip(substream);
1499 struct snd_pcm_runtime *runtime = substream->runtime;
1500 struct esschan *chan;
1502 if (runtime->private_data == NULL)
1504 chan = runtime->private_data;
1506 snd_es1968_free_memory(chip, chan->memory);
1507 chan->memory = NULL;
1516 static int snd_es1968_alloc_apu_pair(struct es1968 *chip, int type)
1520 for (apu = 0; apu < NR_APUS; apu += 2) {
1521 if (chip->apu[apu] == ESM_APU_FREE &&
1522 chip->apu[apu + 1] == ESM_APU_FREE) {
1523 chip->apu[apu] = chip->apu[apu + 1] = type;
1533 static void snd_es1968_free_apu_pair(struct es1968 *chip, int apu)
1535 chip->apu[apu] = chip->apu[apu + 1] = ESM_APU_FREE;
1543 static int snd_es1968_playback_open(struct snd_pcm_substream *substream)
1545 struct es1968 *chip = snd_pcm_substream_chip(substream);
1546 struct snd_pcm_runtime *runtime = substream->runtime;
1551 apu1 = snd_es1968_alloc_apu_pair(chip, ESM_APU_PCM_PLAY);
1555 es = kzalloc(sizeof(*es), GFP_KERNEL);
1557 snd_es1968_free_apu_pair(chip, apu1);
1562 es->apu[1] = apu1 + 1;
1563 es->apu_mode[0] = 0;
1564 es->apu_mode[1] = 0;
1566 es->substream = substream;
1567 es->mode = ESM_MODE_PLAY;
1569 runtime->private_data = es;
1570 runtime->hw = snd_es1968_playback;
1571 runtime->hw.buffer_bytes_max = runtime->hw.period_bytes_max =
1572 calc_available_memory_size(chip);
1574 spin_lock_irq(&chip->substream_lock);
1575 list_add(&es->list, &chip->substream_list);
1576 spin_unlock_irq(&chip->substream_lock);
1581 static int snd_es1968_capture_open(struct snd_pcm_substream *substream)
1583 struct snd_pcm_runtime *runtime = substream->runtime;
1584 struct es1968 *chip = snd_pcm_substream_chip(substream);
1588 apu1 = snd_es1968_alloc_apu_pair(chip, ESM_APU_PCM_CAPTURE);
1591 apu2 = snd_es1968_alloc_apu_pair(chip, ESM_APU_PCM_RATECONV);
1593 snd_es1968_free_apu_pair(chip, apu1);
1597 es = kzalloc(sizeof(*es), GFP_KERNEL);
1599 snd_es1968_free_apu_pair(chip, apu1);
1600 snd_es1968_free_apu_pair(chip, apu2);
1605 es->apu[1] = apu1 + 1;
1607 es->apu[3] = apu2 + 1;
1608 es->apu_mode[0] = 0;
1609 es->apu_mode[1] = 0;
1610 es->apu_mode[2] = 0;
1611 es->apu_mode[3] = 0;
1613 es->substream = substream;
1614 es->mode = ESM_MODE_CAPTURE;
1617 if ((es->mixbuf = snd_es1968_new_memory(chip, ESM_MIXBUF_SIZE)) == NULL) {
1618 snd_es1968_free_apu_pair(chip, apu1);
1619 snd_es1968_free_apu_pair(chip, apu2);
1623 memset(es->mixbuf->buf.area, 0, ESM_MIXBUF_SIZE);
1625 runtime->private_data = es;
1626 runtime->hw = snd_es1968_capture;
1627 runtime->hw.buffer_bytes_max = runtime->hw.period_bytes_max =
1628 calc_available_memory_size(chip) - 1024; /* keep MIXBUF size */
1629 snd_pcm_hw_constraint_pow2(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES);
1631 spin_lock_irq(&chip->substream_lock);
1632 list_add(&es->list, &chip->substream_list);
1633 spin_unlock_irq(&chip->substream_lock);
1638 static int snd_es1968_playback_close(struct snd_pcm_substream *substream)
1640 struct es1968 *chip = snd_pcm_substream_chip(substream);
1643 if (substream->runtime->private_data == NULL)
1645 es = substream->runtime->private_data;
1646 spin_lock_irq(&chip->substream_lock);
1647 list_del(&es->list);
1648 spin_unlock_irq(&chip->substream_lock);
1649 snd_es1968_free_apu_pair(chip, es->apu[0]);
1655 static int snd_es1968_capture_close(struct snd_pcm_substream *substream)
1657 struct es1968 *chip = snd_pcm_substream_chip(substream);
1660 if (substream->runtime->private_data == NULL)
1662 es = substream->runtime->private_data;
1663 spin_lock_irq(&chip->substream_lock);
1664 list_del(&es->list);
1665 spin_unlock_irq(&chip->substream_lock);
1666 snd_es1968_free_memory(chip, es->mixbuf);
1667 snd_es1968_free_apu_pair(chip, es->apu[0]);
1668 snd_es1968_free_apu_pair(chip, es->apu[2]);
1674 static struct snd_pcm_ops snd_es1968_playback_ops = {
1675 .open = snd_es1968_playback_open,
1676 .close = snd_es1968_playback_close,
1677 .ioctl = snd_pcm_lib_ioctl,
1678 .hw_params = snd_es1968_hw_params,
1679 .hw_free = snd_es1968_hw_free,
1680 .prepare = snd_es1968_pcm_prepare,
1681 .trigger = snd_es1968_pcm_trigger,
1682 .pointer = snd_es1968_pcm_pointer,
1685 static struct snd_pcm_ops snd_es1968_capture_ops = {
1686 .open = snd_es1968_capture_open,
1687 .close = snd_es1968_capture_close,
1688 .ioctl = snd_pcm_lib_ioctl,
1689 .hw_params = snd_es1968_hw_params,
1690 .hw_free = snd_es1968_hw_free,
1691 .prepare = snd_es1968_pcm_prepare,
1692 .trigger = snd_es1968_pcm_trigger,
1693 .pointer = snd_es1968_pcm_pointer,
1700 #define CLOCK_MEASURE_BUFSIZE 16768 /* enough large for a single shot */
1702 static void __devinit es1968_measure_clock(struct es1968 *chip)
1705 unsigned int pa, offset, t;
1706 struct esm_memory *memory;
1707 struct timeval start_time, stop_time;
1709 if (chip->clock == 0)
1710 chip->clock = 48000; /* default clock value */
1712 /* search 2 APUs (although one apu is enough) */
1713 if ((apu = snd_es1968_alloc_apu_pair(chip, ESM_APU_PCM_PLAY)) < 0) {
1714 snd_printk(KERN_ERR "Hmm, cannot find empty APU pair!?\n");
1717 if ((memory = snd_es1968_new_memory(chip, CLOCK_MEASURE_BUFSIZE)) == NULL) {
1718 snd_printk(KERN_ERR "cannot allocate dma buffer - using default clock %d\n", chip->clock);
1719 snd_es1968_free_apu_pair(chip, apu);
1723 memset(memory->buf.area, 0, CLOCK_MEASURE_BUFSIZE);
1725 wave_set_register(chip, apu << 3, (memory->buf.addr - 0x10) & 0xfff8);
1727 pa = (unsigned int)((memory->buf.addr - chip->dma.addr) >> 1);
1728 pa |= 0x00400000; /* System RAM (Bit 22) */
1730 /* initialize apu */
1731 for (i = 0; i < 16; i++)
1732 apu_set_register(chip, apu, i, 0x0000);
1734 apu_set_register(chip, apu, 0, 0x400f);
1735 apu_set_register(chip, apu, 4, ((pa >> 16) & 0xff) << 8);
1736 apu_set_register(chip, apu, 5, pa & 0xffff);
1737 apu_set_register(chip, apu, 6, (pa + CLOCK_MEASURE_BUFSIZE/2) & 0xffff);
1738 apu_set_register(chip, apu, 7, CLOCK_MEASURE_BUFSIZE/2);
1739 apu_set_register(chip, apu, 8, 0x0000);
1740 apu_set_register(chip, apu, 9, 0xD000);
1741 apu_set_register(chip, apu, 10, 0x8F08);
1742 apu_set_register(chip, apu, 11, 0x0000);
1743 spin_lock_irq(&chip->reg_lock);
1744 outw(1, chip->io_port + 0x04); /* clear WP interrupts */
1745 outw(inw(chip->io_port + ESM_PORT_HOST_IRQ) | ESM_HIRQ_DSIE, chip->io_port + ESM_PORT_HOST_IRQ); /* enable WP ints */
1746 spin_unlock_irq(&chip->reg_lock);
1748 snd_es1968_apu_set_freq(chip, apu, ((unsigned int)48000 << 16) / chip->clock); /* 48000 Hz */
1750 chip->in_measurement = 1;
1751 chip->measure_apu = apu;
1752 spin_lock_irq(&chip->reg_lock);
1753 snd_es1968_bob_inc(chip, ESM_BOB_FREQ);
1754 __apu_set_register(chip, apu, 5, pa & 0xffff);
1755 snd_es1968_trigger_apu(chip, apu, ESM_APU_16BITLINEAR);
1756 do_gettimeofday(&start_time);
1757 spin_unlock_irq(&chip->reg_lock);
1759 spin_lock_irq(&chip->reg_lock);
1760 offset = __apu_get_register(chip, apu, 5);
1761 do_gettimeofday(&stop_time);
1762 snd_es1968_trigger_apu(chip, apu, 0); /* stop */
1763 snd_es1968_bob_dec(chip);
1764 chip->in_measurement = 0;
1765 spin_unlock_irq(&chip->reg_lock);
1767 /* check the current position */
1768 offset -= (pa & 0xffff);
1770 offset += chip->measure_count * (CLOCK_MEASURE_BUFSIZE/2);
1772 t = stop_time.tv_sec - start_time.tv_sec;
1774 if (stop_time.tv_usec < start_time.tv_usec)
1775 t -= start_time.tv_usec - stop_time.tv_usec;
1777 t += stop_time.tv_usec - start_time.tv_usec;
1779 snd_printk(KERN_ERR "?? calculation error..\n");
1782 offset = (offset / t) * 1000 + ((offset % t) * 1000) / t;
1783 if (offset < 47500 || offset > 48500) {
1784 if (offset >= 40000 && offset <= 50000)
1785 chip->clock = (chip->clock * offset) / 48000;
1787 printk(KERN_INFO "es1968: clocking to %d\n", chip->clock);
1789 snd_es1968_free_memory(chip, memory);
1790 snd_es1968_free_apu_pair(chip, apu);
1797 static void snd_es1968_pcm_free(struct snd_pcm *pcm)
1799 struct es1968 *esm = pcm->private_data;
1800 snd_es1968_free_dmabuf(esm);
1804 static int __devinit
1805 snd_es1968_pcm(struct es1968 *chip, int device)
1807 struct snd_pcm *pcm;
1810 /* get DMA buffer */
1811 if ((err = snd_es1968_init_dmabuf(chip)) < 0)
1815 wave_set_register(chip, 0x01FC, chip->dma.addr >> 12);
1816 wave_set_register(chip, 0x01FD, chip->dma.addr >> 12);
1817 wave_set_register(chip, 0x01FE, chip->dma.addr >> 12);
1818 wave_set_register(chip, 0x01FF, chip->dma.addr >> 12);
1820 if ((err = snd_pcm_new(chip->card, "ESS Maestro", device,
1821 chip->playback_streams,
1822 chip->capture_streams, &pcm)) < 0)
1825 pcm->private_data = chip;
1826 pcm->private_free = snd_es1968_pcm_free;
1828 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1968_playback_ops);
1829 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1968_capture_ops);
1831 pcm->info_flags = 0;
1833 strcpy(pcm->name, "ESS Maestro");
1840 * suppress jitter on some maestros when playing stereo
1842 static void snd_es1968_suppress_jitter(struct es1968 *chip, struct esschan *es)
1848 cp1 = __apu_get_register(chip, 0, 5);
1849 cp2 = __apu_get_register(chip, 1, 5);
1850 diff = (cp1 > cp2 ? cp1 - cp2 : cp2 - cp1);
1853 __maestro_write(chip, IDR0_DATA_PORT, cp1);
1859 static void snd_es1968_update_pcm(struct es1968 *chip, struct esschan *es)
1863 struct snd_pcm_substream *subs = es->substream;
1865 if (subs == NULL || !es->running)
1868 hwptr = snd_es1968_get_dma_ptr(chip, es) << es->wav_shift;
1869 hwptr %= es->dma_size;
1871 diff = (es->dma_size + hwptr - es->hwptr) % es->dma_size;
1876 if (es->count > es->frag_size) {
1877 spin_unlock(&chip->substream_lock);
1878 snd_pcm_period_elapsed(subs);
1879 spin_lock(&chip->substream_lock);
1880 es->count %= es->frag_size;
1884 /* The hardware volume works by incrementing / decrementing 2 counters
1885 (without wrap around) in response to volume button presses and then
1886 generating an interrupt. The pair of counters is stored in bits 1-3 and 5-7
1887 of a byte wide register. The meaning of bits 0 and 4 is unknown. */
1888 static void es1968_update_hw_volume(struct work_struct *work)
1890 struct es1968 *chip = container_of(work, struct es1968, hwvol_work);
1893 /* Figure out which volume control button was pushed,
1894 based on differences from the default register
1896 x = inb(chip->io_port + 0x1c) & 0xee;
1897 /* Reset the volume control registers. */
1898 outb(0x88, chip->io_port + 0x1c);
1899 outb(0x88, chip->io_port + 0x1d);
1900 outb(0x88, chip->io_port + 0x1e);
1901 outb(0x88, chip->io_port + 0x1f);
1903 if (chip->in_suspend)
1906 #ifndef CONFIG_SND_ES1968_INPUT
1907 if (! chip->master_switch || ! chip->master_volume)
1910 val = snd_ac97_read(chip->ac97, AC97_MASTER);
1918 if ((val & 0x7f) > 0)
1920 if ((val & 0x7f00) > 0)
1925 if ((val & 0x7f) < 0x1f)
1927 if ((val & 0x7f00) < 0x1f00)
1931 if (snd_ac97_update(chip->ac97, AC97_MASTER, val))
1932 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1933 &chip->master_volume->id);
1935 if (!chip->input_dev)
1941 /* The counters have not changed, yet we've received a HV
1942 interrupt. According to tests run by various people this
1943 happens when pressing the mute button. */
1947 /* counters increased by 1 -> volume up */
1951 /* counters decreased by 1 -> volume down */
1952 val = KEY_VOLUMEDOWN;
1957 input_report_key(chip->input_dev, val, 1);
1958 input_sync(chip->input_dev);
1959 input_report_key(chip->input_dev, val, 0);
1960 input_sync(chip->input_dev);
1968 static irqreturn_t snd_es1968_interrupt(int irq, void *dev_id)
1970 struct es1968 *chip = dev_id;
1973 if (!(event = inb(chip->io_port + 0x1A)))
1976 outw(inw(chip->io_port + 4) & 1, chip->io_port + 4);
1978 if (event & ESM_HWVOL_IRQ)
1979 schedule_work(&chip->hwvol_work);
1981 /* else ack 'em all, i imagine */
1982 outb(0xFF, chip->io_port + 0x1A);
1984 if ((event & ESM_MPU401_IRQ) && chip->rmidi) {
1985 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1988 if (event & ESM_SOUND_IRQ) {
1990 spin_lock(&chip->substream_lock);
1991 list_for_each_entry(es, &chip->substream_list, list) {
1993 snd_es1968_update_pcm(chip, es);
1994 if (es->fmt & ESS_FMT_STEREO)
1995 snd_es1968_suppress_jitter(chip, es);
1998 spin_unlock(&chip->substream_lock);
1999 if (chip->in_measurement) {
2000 unsigned int curp = __apu_get_register(chip, chip->measure_apu, 5);
2001 if (curp < chip->measure_lastpos)
2002 chip->measure_count++;
2003 chip->measure_lastpos = curp;
2014 static int __devinit
2015 snd_es1968_mixer(struct es1968 *chip)
2017 struct snd_ac97_bus *pbus;
2018 struct snd_ac97_template ac97;
2019 #ifndef CONFIG_SND_ES1968_INPUT
2020 struct snd_ctl_elem_id elem_id;
2023 static struct snd_ac97_bus_ops ops = {
2024 .write = snd_es1968_ac97_write,
2025 .read = snd_es1968_ac97_read,
2028 if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
2030 pbus->no_vra = 1; /* ES1968 doesn't need VRA */
2032 memset(&ac97, 0, sizeof(ac97));
2033 ac97.private_data = chip;
2034 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97)) < 0)
2037 #ifndef CONFIG_SND_ES1968_INPUT
2038 /* attach master switch / volumes for h/w volume control */
2039 memset(&elem_id, 0, sizeof(elem_id));
2040 elem_id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
2041 strcpy(elem_id.name, "Master Playback Switch");
2042 chip->master_switch = snd_ctl_find_id(chip->card, &elem_id);
2043 memset(&elem_id, 0, sizeof(elem_id));
2044 elem_id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
2045 strcpy(elem_id.name, "Master Playback Volume");
2046 chip->master_volume = snd_ctl_find_id(chip->card, &elem_id);
2056 static void snd_es1968_ac97_reset(struct es1968 *chip)
2058 unsigned long ioaddr = chip->io_port;
2060 unsigned short save_ringbus_a;
2061 unsigned short save_68;
2065 /* save configuration */
2066 save_ringbus_a = inw(ioaddr + 0x36);
2068 //outw(inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38); /* clear second codec id? */
2069 /* set command/status address i/o to 1st codec */
2070 outw(inw(ioaddr + 0x3a) & 0xfffc, ioaddr + 0x3a);
2071 outw(inw(ioaddr + 0x3c) & 0xfffc, ioaddr + 0x3c);
2073 /* disable ac link */
2074 outw(0x0000, ioaddr + 0x36);
2075 save_68 = inw(ioaddr + 0x68);
2076 pci_read_config_word(chip->pci, 0x58, &w); /* something magical with gpio and bus arb. */
2077 pci_read_config_dword(chip->pci, PCI_SUBSYSTEM_VENDOR_ID, &vend);
2080 outw(0xfffe, ioaddr + 0x64); /* unmask gpio 0 */
2081 outw(0x0001, ioaddr + 0x68); /* gpio write */
2082 outw(0x0000, ioaddr + 0x60); /* write 0 to gpio 0 */
2084 outw(0x0001, ioaddr + 0x60); /* write 1 to gpio 1 */
2087 outw(save_68 | 0x1, ioaddr + 0x68); /* now restore .. */
2088 outw((inw(ioaddr + 0x38) & 0xfffc) | 0x1, ioaddr + 0x38);
2089 outw((inw(ioaddr + 0x3a) & 0xfffc) | 0x1, ioaddr + 0x3a);
2090 outw((inw(ioaddr + 0x3c) & 0xfffc) | 0x1, ioaddr + 0x3c);
2092 /* now the second codec */
2093 /* disable ac link */
2094 outw(0x0000, ioaddr + 0x36);
2095 outw(0xfff7, ioaddr + 0x64); /* unmask gpio 3 */
2096 save_68 = inw(ioaddr + 0x68);
2097 outw(0x0009, ioaddr + 0x68); /* gpio write 0 & 3 ?? */
2098 outw(0x0001, ioaddr + 0x60); /* write 1 to gpio */
2100 outw(0x0009, ioaddr + 0x60); /* write 9 to gpio */
2102 //outw(inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38);
2103 outw(inw(ioaddr + 0x3a) & 0xfffc, ioaddr + 0x3a);
2104 outw(inw(ioaddr + 0x3c) & 0xfffc, ioaddr + 0x3c);
2106 #if 0 /* the loop here needs to be much better if we want it.. */
2107 snd_printk(KERN_INFO "trying software reset\n");
2108 /* try and do a software reset */
2109 outb(0x80 | 0x7c, ioaddr + 0x30);
2111 if ((inw(ioaddr + 0x30) & 1) == 0) {
2112 if (inb(ioaddr + 0x32) != 0)
2115 outb(0x80 | 0x7d, ioaddr + 0x30);
2116 if (((inw(ioaddr + 0x30) & 1) == 0)
2117 && (inb(ioaddr + 0x32) != 0))
2119 outb(0x80 | 0x7f, ioaddr + 0x30);
2120 if (((inw(ioaddr + 0x30) & 1) == 0)
2121 && (inb(ioaddr + 0x32) != 0))
2126 outb(inb(ioaddr + 0x37) | 0x08, ioaddr + 0x37); /* do a software reset */
2127 msleep(500); /* oh my.. */
2128 outb(inb(ioaddr + 0x37) & ~0x08,
2131 outw(0x80, ioaddr + 0x30);
2132 for (w = 0; w < 10000; w++) {
2133 if ((inw(ioaddr + 0x30) & 1) == 0)
2139 if (vend == NEC_VERSA_SUBID1 || vend == NEC_VERSA_SUBID2) {
2140 /* turn on external amp? */
2141 outw(0xf9ff, ioaddr + 0x64);
2142 outw(inw(ioaddr + 0x68) | 0x600, ioaddr + 0x68);
2143 outw(0x0209, ioaddr + 0x60);
2147 outw(save_ringbus_a, ioaddr + 0x36);
2149 /* Turn on the 978 docking chip.
2150 First frob the "master output enable" bit,
2151 then set most of the playback volume control registers to max. */
2152 outb(inb(ioaddr+0xc0)|(1<<5), ioaddr+0xc0);
2153 outb(0xff, ioaddr+0xc3);
2154 outb(0xff, ioaddr+0xc4);
2155 outb(0xff, ioaddr+0xc6);
2156 outb(0xff, ioaddr+0xc8);
2157 outb(0x3f, ioaddr+0xcf);
2158 outb(0x3f, ioaddr+0xd0);
2161 static void snd_es1968_reset(struct es1968 *chip)
2164 outw(ESM_RESET_MAESTRO | ESM_RESET_DIRECTSOUND,
2165 chip->io_port + ESM_PORT_HOST_IRQ);
2167 outw(0x0000, chip->io_port + ESM_PORT_HOST_IRQ);
2172 * initialize maestro chip
2174 static void snd_es1968_chip_init(struct es1968 *chip)
2176 struct pci_dev *pci = chip->pci;
2178 unsigned long iobase = chip->io_port;
2182 /* We used to muck around with pci config space that
2183 * we had no business messing with. We don't know enough
2184 * about the machine to know which DMA mode is appropriate,
2185 * etc. We were guessing wrong on some machines and making
2186 * them unhappy. We now trust in the BIOS to do things right,
2187 * which almost certainly means a new host of problems will
2188 * arise with broken BIOS implementations. screw 'em.
2189 * We're already intolerant of machines that don't assign
2194 pci_read_config_word(pci, ESM_CONFIG_A, &w);
2196 w &= ~DMA_CLEAR; /* Clear DMA bits */
2197 w &= ~(PIC_SNOOP1 | PIC_SNOOP2); /* Clear Pic Snoop Mode Bits */
2198 w &= ~SAFEGUARD; /* Safeguard off */
2199 w |= POST_WRITE; /* Posted write */
2200 w |= PCI_TIMING; /* PCI timing on */
2201 /* XXX huh? claims to be reserved.. */
2202 w &= ~SWAP_LR; /* swap left/right
2203 seems to only have effect on SB
2205 w &= ~SUBTR_DECODE; /* Subtractive decode off */
2207 pci_write_config_word(pci, ESM_CONFIG_A, w);
2211 pci_read_config_word(pci, ESM_CONFIG_B, &w);
2213 w &= ~(1 << 15); /* Turn off internal clock multiplier */
2214 /* XXX how do we know which to use? */
2215 w &= ~(1 << 14); /* External clock */
2217 w &= ~SPDIF_CONFB; /* disable S/PDIF output */
2218 w |= HWV_CONFB; /* HWV on */
2219 w |= DEBOUNCE; /* Debounce off: easier to push the HW buttons */
2220 w &= ~GPIO_CONFB; /* GPIO 4:5 */
2221 w |= CHI_CONFB; /* Disconnect from the CHI. Enabling this made a dell 7500 work. */
2222 w &= ~IDMA_CONFB; /* IDMA off (undocumented) */
2223 w &= ~MIDI_FIX; /* MIDI fix off (undoc) */
2224 w &= ~(1 << 1); /* reserved, always write 0 */
2225 w &= ~IRQ_TO_ISA; /* IRQ to ISA off (undoc) */
2227 pci_write_config_word(pci, ESM_CONFIG_B, w);
2231 pci_read_config_word(pci, ESM_DDMA, &w);
2233 pci_write_config_word(pci, ESM_DDMA, w);
2239 pci_read_config_word(pci, ESM_LEGACY_AUDIO_CONTROL, &w);
2241 w |= ESS_DISABLE_AUDIO; /* Disable Legacy Audio */
2242 w &= ~ESS_ENABLE_SERIAL_IRQ; /* Disable SIRQ */
2243 w &= ~(0x1f); /* disable mpu irq/io, game port, fm, SB */
2245 pci_write_config_word(pci, ESM_LEGACY_AUDIO_CONTROL, w);
2247 /* Set up 978 docking control chip. */
2248 pci_read_config_word(pci, 0x58, &w);
2249 w|=1<<2; /* Enable 978. */
2250 w|=1<<3; /* Turn on 978 hardware volume control. */
2251 w&=~(1<<11); /* Turn on 978 mixer volume control. */
2252 pci_write_config_word(pci, 0x58, w);
2256 snd_es1968_reset(chip);
2262 /* setup usual 0x34 stuff.. 0x36 may be chip specific */
2263 outw(0xC090, iobase + ESM_RING_BUS_DEST); /* direct sound, stereo */
2265 outw(0x3000, iobase + ESM_RING_BUS_CONTR_A); /* enable ringbus/serial */
2272 snd_es1968_ac97_reset(chip);
2274 /* Ring Bus Control B */
2276 n = inl(iobase + ESM_RING_BUS_CONTR_B);
2277 n &= ~RINGB_EN_SPDIF; /* SPDIF off */
2278 //w |= RINGB_EN_2CODEC; /* enable 2nd codec */
2279 outl(n, iobase + ESM_RING_BUS_CONTR_B);
2281 /* Set hardware volume control registers to midpoints.
2282 We can tell which button was pushed based on how they change. */
2283 outb(0x88, iobase+0x1c);
2284 outb(0x88, iobase+0x1d);
2285 outb(0x88, iobase+0x1e);
2286 outb(0x88, iobase+0x1f);
2288 /* it appears some maestros (dell 7500) only work if these are set,
2289 regardless of wether we use the assp or not. */
2291 outb(0, iobase + ASSP_CONTROL_B);
2292 outb(3, iobase + ASSP_CONTROL_A); /* M: Reserved bits... */
2293 outb(0, iobase + ASSP_CONTROL_C); /* M: Disable ASSP, ASSP IRQ's and FM Port */
2298 for (i = 0; i < 16; i++) {
2299 /* Write 0 into the buffer area 0x1E0->1EF */
2300 outw(0x01E0 + i, iobase + WC_INDEX);
2301 outw(0x0000, iobase + WC_DATA);
2303 /* The 1.10 test program seem to write 0 into the buffer area
2304 * 0x1D0-0x1DF too.*/
2305 outw(0x01D0 + i, iobase + WC_INDEX);
2306 outw(0x0000, iobase + WC_DATA);
2308 wave_set_register(chip, IDR7_WAVE_ROMRAM,
2309 (wave_get_register(chip, IDR7_WAVE_ROMRAM) & 0xFF00));
2310 wave_set_register(chip, IDR7_WAVE_ROMRAM,
2311 wave_get_register(chip, IDR7_WAVE_ROMRAM) | 0x100);
2312 wave_set_register(chip, IDR7_WAVE_ROMRAM,
2313 wave_get_register(chip, IDR7_WAVE_ROMRAM) & ~0x200);
2314 wave_set_register(chip, IDR7_WAVE_ROMRAM,
2315 wave_get_register(chip, IDR7_WAVE_ROMRAM) | ~0x400);
2318 maestro_write(chip, IDR2_CRAM_DATA, 0x0000);
2319 /* Now back to the DirectSound stuff */
2320 /* audio serial configuration.. ? */
2321 maestro_write(chip, 0x08, 0xB004);
2322 maestro_write(chip, 0x09, 0x001B);
2323 maestro_write(chip, 0x0A, 0x8000);
2324 maestro_write(chip, 0x0B, 0x3F37);
2325 maestro_write(chip, 0x0C, 0x0098);
2327 /* parallel in, has something to do with recording :) */
2328 maestro_write(chip, 0x0C,
2329 (maestro_read(chip, 0x0C) & ~0xF000) | 0x8000);
2331 maestro_write(chip, 0x0C,
2332 (maestro_read(chip, 0x0C) & ~0x0F00) | 0x0500);
2334 maestro_write(chip, 0x0D, 0x7632);
2336 /* Wave cache control on - test off, sg off,
2337 enable, enable extra chans 1Mb */
2339 w = inw(iobase + WC_CONTROL);
2341 w &= ~0xFA00; /* Seems to be reserved? I don't know */
2342 w |= 0xA000; /* reserved... I don't know */
2343 w &= ~0x0200; /* Channels 56,57,58,59 as Extra Play,Rec Channel enable
2344 Seems to crash the Computer if enabled... */
2345 w |= 0x0100; /* Wave Cache Operation Enabled */
2346 w |= 0x0080; /* Channels 60/61 as Placback/Record enabled */
2347 w &= ~0x0060; /* Clear Wavtable Size */
2348 w |= 0x0020; /* Wavetable Size : 1MB */
2349 /* Bit 4 is reserved */
2350 w &= ~0x000C; /* DMA Stuff? I don't understand what the datasheet means */
2351 /* Bit 1 is reserved */
2352 w &= ~0x0001; /* Test Mode off */
2354 outw(w, iobase + WC_CONTROL);
2356 /* Now clear the APU control ram */
2357 for (i = 0; i < NR_APUS; i++) {
2358 for (w = 0; w < NR_APU_REGS; w++)
2359 apu_set_register(chip, i, w, 0);
2365 static void snd_es1968_start_irq(struct es1968 *chip)
2368 w = ESM_HIRQ_DSIE | ESM_HIRQ_HW_VOLUME;
2370 w |= ESM_HIRQ_MPU401;
2371 outb(w, chip->io_port + 0x1A);
2372 outw(w, chip->io_port + ESM_PORT_HOST_IRQ);
2379 static int es1968_suspend(struct pci_dev *pci, pm_message_t state)
2381 struct snd_card *card = pci_get_drvdata(pci);
2382 struct es1968 *chip = card->private_data;
2387 chip->in_suspend = 1;
2388 cancel_work_sync(&chip->hwvol_work);
2389 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
2390 snd_pcm_suspend_all(chip->pcm);
2391 snd_ac97_suspend(chip->ac97);
2392 snd_es1968_bob_stop(chip);
2394 pci_disable_device(pci);
2395 pci_save_state(pci);
2396 pci_set_power_state(pci, pci_choose_state(pci, state));
2400 static int es1968_resume(struct pci_dev *pci)
2402 struct snd_card *card = pci_get_drvdata(pci);
2403 struct es1968 *chip = card->private_data;
2409 /* restore all our config */
2410 pci_set_power_state(pci, PCI_D0);
2411 pci_restore_state(pci);
2412 if (pci_enable_device(pci) < 0) {
2413 printk(KERN_ERR "es1968: pci_enable_device failed, "
2414 "disabling device\n");
2415 snd_card_disconnect(card);
2418 pci_set_master(pci);
2420 snd_es1968_chip_init(chip);
2422 /* need to restore the base pointers.. */
2423 if (chip->dma.addr) {
2425 wave_set_register(chip, 0x01FC, chip->dma.addr >> 12);
2428 snd_es1968_start_irq(chip);
2430 /* restore ac97 state */
2431 snd_ac97_resume(chip->ac97);
2433 list_for_each_entry(es, &chip->substream_list, list) {
2436 snd_es1968_playback_setup(chip, es, es->substream->runtime);
2438 case ESM_MODE_CAPTURE:
2439 snd_es1968_capture_setup(chip, es, es->substream->runtime);
2444 /* start timer again */
2445 if (chip->bobclient)
2446 snd_es1968_bob_start(chip);
2448 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
2449 chip->in_suspend = 0;
2452 #endif /* CONFIG_PM */
2454 #ifdef SUPPORT_JOYSTICK
2455 #define JOYSTICK_ADDR 0x200
2456 static int __devinit snd_es1968_create_gameport(struct es1968 *chip, int dev)
2458 struct gameport *gp;
2465 r = request_region(JOYSTICK_ADDR, 8, "ES1968 gameport");
2469 chip->gameport = gp = gameport_allocate_port();
2471 printk(KERN_ERR "es1968: cannot allocate memory for gameport\n");
2472 release_and_free_resource(r);
2476 pci_read_config_word(chip->pci, ESM_LEGACY_AUDIO_CONTROL, &val);
2477 pci_write_config_word(chip->pci, ESM_LEGACY_AUDIO_CONTROL, val | 0x04);
2479 gameport_set_name(gp, "ES1968 Gameport");
2480 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
2481 gameport_set_dev_parent(gp, &chip->pci->dev);
2482 gp->io = JOYSTICK_ADDR;
2483 gameport_set_port_data(gp, r);
2485 gameport_register_port(gp);
2490 static void snd_es1968_free_gameport(struct es1968 *chip)
2492 if (chip->gameport) {
2493 struct resource *r = gameport_get_port_data(chip->gameport);
2495 gameport_unregister_port(chip->gameport);
2496 chip->gameport = NULL;
2498 release_and_free_resource(r);
2502 static inline int snd_es1968_create_gameport(struct es1968 *chip, int dev) { return -ENOSYS; }
2503 static inline void snd_es1968_free_gameport(struct es1968 *chip) { }
2506 #ifdef CONFIG_SND_ES1968_INPUT
2507 static int __devinit snd_es1968_input_register(struct es1968 *chip)
2509 struct input_dev *input_dev;
2512 input_dev = input_allocate_device();
2516 snprintf(chip->phys, sizeof(chip->phys), "pci-%s/input0",
2517 pci_name(chip->pci));
2519 input_dev->name = chip->card->driver;
2520 input_dev->phys = chip->phys;
2521 input_dev->id.bustype = BUS_PCI;
2522 input_dev->id.vendor = chip->pci->vendor;
2523 input_dev->id.product = chip->pci->device;
2524 input_dev->dev.parent = &chip->pci->dev;
2526 __set_bit(EV_KEY, input_dev->evbit);
2527 __set_bit(KEY_MUTE, input_dev->keybit);
2528 __set_bit(KEY_VOLUMEDOWN, input_dev->keybit);
2529 __set_bit(KEY_VOLUMEUP, input_dev->keybit);
2531 err = input_register_device(input_dev);
2533 input_free_device(input_dev);
2537 chip->input_dev = input_dev;
2540 #endif /* CONFIG_SND_ES1968_INPUT */
2542 #ifdef CONFIG_SND_ES1968_RADIO
2543 #define GPIO_DATA 0x60
2544 #define IO_MASK 4 /* mask register offset from GPIO_DATA
2545 bits 1=unmask write to given bit */
2546 #define IO_DIR 8 /* direction register offset from GPIO_DATA
2547 bits 0/1=read/write direction */
2548 /* mask bits for GPIO lines */
2549 #define STR_DATA 0x0040 /* GPIO6 */
2550 #define STR_CLK 0x0080 /* GPIO7 */
2551 #define STR_WREN 0x0100 /* GPIO8 */
2552 #define STR_MOST 0x0200 /* GPIO9 */
2554 static void snd_es1968_tea575x_set_pins(struct snd_tea575x *tea, u8 pins)
2556 struct es1968 *chip = tea->private_data;
2557 unsigned long io = chip->io_port + GPIO_DATA;
2560 val |= (pins & TEA575X_DATA) ? STR_DATA : 0;
2561 val |= (pins & TEA575X_CLK) ? STR_CLK : 0;
2562 val |= (pins & TEA575X_WREN) ? STR_WREN : 0;
2567 static u8 snd_es1968_tea575x_get_pins(struct snd_tea575x *tea)
2569 struct es1968 *chip = tea->private_data;
2570 unsigned long io = chip->io_port + GPIO_DATA;
2573 return (val & STR_DATA) ? TEA575X_DATA : 0 |
2574 (val & STR_MOST) ? TEA575X_MOST : 0;
2577 static void snd_es1968_tea575x_set_direction(struct snd_tea575x *tea, bool output)
2579 struct es1968 *chip = tea->private_data;
2580 unsigned long io = chip->io_port + GPIO_DATA;
2581 u16 odir = inw(io + IO_DIR);
2584 outw(~(STR_DATA | STR_CLK | STR_WREN), io + IO_MASK);
2585 outw(odir | STR_DATA | STR_CLK | STR_WREN, io + IO_DIR);
2587 outw(~(STR_CLK | STR_WREN | STR_DATA | STR_MOST), io + IO_MASK);
2588 outw((odir & ~(STR_DATA | STR_MOST)) | STR_CLK | STR_WREN, io + IO_DIR);
2592 static struct snd_tea575x_ops snd_es1968_tea_ops = {
2593 .set_pins = snd_es1968_tea575x_set_pins,
2594 .get_pins = snd_es1968_tea575x_get_pins,
2595 .set_direction = snd_es1968_tea575x_set_direction,
2599 static int snd_es1968_free(struct es1968 *chip)
2601 cancel_work_sync(&chip->hwvol_work);
2602 #ifdef CONFIG_SND_ES1968_INPUT
2603 if (chip->input_dev)
2604 input_unregister_device(chip->input_dev);
2607 if (chip->io_port) {
2609 synchronize_irq(chip->irq);
2610 outw(1, chip->io_port + 0x04); /* clear WP interrupts */
2611 outw(0, chip->io_port + ESM_PORT_HOST_IRQ); /* disable IRQ */
2614 #ifdef CONFIG_SND_ES1968_RADIO
2615 snd_tea575x_exit(&chip->tea);
2619 free_irq(chip->irq, chip);
2620 snd_es1968_free_gameport(chip);
2621 pci_release_regions(chip->pci);
2622 pci_disable_device(chip->pci);
2627 static int snd_es1968_dev_free(struct snd_device *device)
2629 struct es1968 *chip = device->device_data;
2630 return snd_es1968_free(chip);
2633 struct ess_device_list {
2634 unsigned short type; /* chip type */
2635 unsigned short vendor; /* subsystem vendor id */
2638 static struct ess_device_list pm_whitelist[] __devinitdata = {
2639 { TYPE_MAESTRO2E, 0x0e11 }, /* Compaq Armada */
2640 { TYPE_MAESTRO2E, 0x1028 },
2641 { TYPE_MAESTRO2E, 0x103c },
2642 { TYPE_MAESTRO2E, 0x1179 },
2643 { TYPE_MAESTRO2E, 0x14c0 }, /* HP omnibook 4150 */
2644 { TYPE_MAESTRO2E, 0x1558 },
2647 static struct ess_device_list mpu_blacklist[] __devinitdata = {
2648 { TYPE_MAESTRO2, 0x125d },
2651 static int __devinit snd_es1968_create(struct snd_card *card,
2652 struct pci_dev *pci,
2658 struct es1968 **chip_ret)
2660 static struct snd_device_ops ops = {
2661 .dev_free = snd_es1968_dev_free,
2663 struct es1968 *chip;
2668 /* enable PCI device */
2669 if ((err = pci_enable_device(pci)) < 0)
2671 /* check, if we can restrict PCI DMA transfers to 28 bits */
2672 if (pci_set_dma_mask(pci, DMA_BIT_MASK(28)) < 0 ||
2673 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(28)) < 0) {
2674 snd_printk(KERN_ERR "architecture does not support 28bit PCI busmaster DMA\n");
2675 pci_disable_device(pci);
2679 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
2681 pci_disable_device(pci);
2686 chip->type = chip_type;
2687 spin_lock_init(&chip->reg_lock);
2688 spin_lock_init(&chip->substream_lock);
2689 INIT_LIST_HEAD(&chip->buf_list);
2690 INIT_LIST_HEAD(&chip->substream_list);
2691 mutex_init(&chip->memory_mutex);
2692 INIT_WORK(&chip->hwvol_work, es1968_update_hw_volume);
2696 chip->total_bufsize = total_bufsize; /* in bytes */
2697 chip->playback_streams = play_streams;
2698 chip->capture_streams = capt_streams;
2700 if ((err = pci_request_regions(pci, "ESS Maestro")) < 0) {
2702 pci_disable_device(pci);
2705 chip->io_port = pci_resource_start(pci, 0);
2706 if (request_irq(pci->irq, snd_es1968_interrupt, IRQF_SHARED,
2707 KBUILD_MODNAME, chip)) {
2708 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
2709 snd_es1968_free(chip);
2712 chip->irq = pci->irq;
2714 /* Clear Maestro_map */
2715 for (i = 0; i < 32; i++)
2716 chip->maestro_map[i] = 0;
2719 for (i = 0; i < NR_APUS; i++)
2720 chip->apu[i] = ESM_APU_FREE;
2722 /* just to be sure */
2723 pci_set_master(pci);
2726 /* disable power-management if not on the whitelist */
2727 unsigned short vend;
2728 pci_read_config_word(chip->pci, PCI_SUBSYSTEM_VENDOR_ID, &vend);
2729 for (i = 0; i < (int)ARRAY_SIZE(pm_whitelist); i++) {
2730 if (chip->type == pm_whitelist[i].type &&
2731 vend == pm_whitelist[i].vendor) {
2737 /* not matched; disabling pm */
2738 printk(KERN_INFO "es1968: not attempting power management.\n");
2742 chip->do_pm = do_pm;
2744 snd_es1968_chip_init(chip);
2746 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
2747 snd_es1968_free(chip);
2751 snd_card_set_dev(card, &pci->dev);
2753 #ifdef CONFIG_SND_ES1968_RADIO
2754 chip->tea.private_data = chip;
2755 chip->tea.ops = &snd_es1968_tea_ops;
2756 strlcpy(chip->tea.card, "SF64-PCE2", sizeof(chip->tea.card));
2757 sprintf(chip->tea.bus_info, "PCI:%s", pci_name(pci));
2758 if (!snd_tea575x_init(&chip->tea))
2759 printk(KERN_INFO "es1968: detected TEA575x radio\n");
2770 static int __devinit snd_es1968_probe(struct pci_dev *pci,
2771 const struct pci_device_id *pci_id)
2774 struct snd_card *card;
2775 struct es1968 *chip;
2779 if (dev >= SNDRV_CARDS)
2786 err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
2790 if (total_bufsize[dev] < 128)
2791 total_bufsize[dev] = 128;
2792 if (total_bufsize[dev] > 4096)
2793 total_bufsize[dev] = 4096;
2794 if ((err = snd_es1968_create(card, pci,
2795 total_bufsize[dev] * 1024, /* in bytes */
2796 pcm_substreams_p[dev],
2797 pcm_substreams_c[dev],
2798 pci_id->driver_data,
2801 snd_card_free(card);
2804 card->private_data = chip;
2806 switch (chip->type) {
2807 case TYPE_MAESTRO2E:
2808 strcpy(card->driver, "ES1978");
2809 strcpy(card->shortname, "ESS ES1978 (Maestro 2E)");
2812 strcpy(card->driver, "ES1968");
2813 strcpy(card->shortname, "ESS ES1968 (Maestro 2)");
2816 strcpy(card->driver, "ESM1");
2817 strcpy(card->shortname, "ESS Maestro 1");
2821 if ((err = snd_es1968_pcm(chip, 0)) < 0) {
2822 snd_card_free(card);
2826 if ((err = snd_es1968_mixer(chip)) < 0) {
2827 snd_card_free(card);
2831 if (enable_mpu[dev] == 2) {
2832 /* check the black list */
2833 unsigned short vend;
2834 pci_read_config_word(chip->pci, PCI_SUBSYSTEM_VENDOR_ID, &vend);
2835 for (i = 0; i < ARRAY_SIZE(mpu_blacklist); i++) {
2836 if (chip->type == mpu_blacklist[i].type &&
2837 vend == mpu_blacklist[i].vendor) {
2838 enable_mpu[dev] = 0;
2843 if (enable_mpu[dev]) {
2844 if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401,
2845 chip->io_port + ESM_MPU401_PORT,
2846 MPU401_INFO_INTEGRATED |
2847 MPU401_INFO_IRQ_HOOK,
2848 -1, &chip->rmidi)) < 0) {
2849 printk(KERN_WARNING "es1968: skipping MPU-401 MIDI support..\n");
2853 snd_es1968_create_gameport(chip, dev);
2855 #ifdef CONFIG_SND_ES1968_INPUT
2856 err = snd_es1968_input_register(chip);
2858 snd_printk(KERN_WARNING "Input device registration "
2859 "failed with error %i", err);
2862 snd_es1968_start_irq(chip);
2864 chip->clock = clock[dev];
2866 es1968_measure_clock(chip);
2868 sprintf(card->longname, "%s at 0x%lx, irq %i",
2869 card->shortname, chip->io_port, chip->irq);
2871 if ((err = snd_card_register(card)) < 0) {
2872 snd_card_free(card);
2875 pci_set_drvdata(pci, card);
2880 static void __devexit snd_es1968_remove(struct pci_dev *pci)
2882 snd_card_free(pci_get_drvdata(pci));
2883 pci_set_drvdata(pci, NULL);
2886 static struct pci_driver driver = {
2887 .name = KBUILD_MODNAME,
2888 .id_table = snd_es1968_ids,
2889 .probe = snd_es1968_probe,
2890 .remove = __devexit_p(snd_es1968_remove),
2892 .suspend = es1968_suspend,
2893 .resume = es1968_resume,
2897 static int __init alsa_card_es1968_init(void)
2899 return pci_register_driver(&driver);
2902 static void __exit alsa_card_es1968_exit(void)
2904 pci_unregister_driver(&driver);
2907 module_init(alsa_card_es1968_init)
2908 module_exit(alsa_card_es1968_exit)