1 /*****************************************************************************
3 * ESS Maestro3/Allegro driver for Linux 2.4.x
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 * (c) Copyright 2000 Zach Brown <zab@zabbo.net>
21 * I need to thank many people for helping make this driver happen.
22 * As always, Eric Brombaugh was a hacking machine and killed many bugs
23 * that I was too dumb to notice. Howard Kim at ESS provided reference boards
24 * and as much docs as he could. Todd and Mick at Dell tested snapshots on
25 * an army of laptops. msw and deviant at Red Hat also humoured me by hanging
26 * their laptops every few hours in the name of science.
28 * Shouts go out to Mike "DJ XPCom" Ang.
31 * v1.23 - Jun 5 2002 - Michael Olson <olson@cs.odu.edu>
32 * added a module option to allow selection of GPIO pin number
34 * v1.22 - Feb 28 2001 - Zach Brown <zab@zabbo.net>
35 * allocate mem at insmod/setup, rather than open
36 * limit pci dma addresses to 28bit, thanks guys.
37 * v1.21 - Feb 04 2001 - Zach Brown <zab@zabbo.net>
38 * fix up really dumb notifier -> suspend oops
39 * v1.20 - Jan 30 2001 - Zach Brown <zab@zabbo.net>
40 * get rid of pm callback and use pci_dev suspend/resume instead
41 * m3_probe cleanups, including pm oops think-o
42 * v1.10 - Jan 6 2001 - Zach Brown <zab@zabbo.net>
43 * revert to lame remap_page_range mmap() just to make it work
45 * fix up incredibly broken open/release resource management
46 * duh. fix record format setting.
47 * add SMP locking and cleanup formatting here and there
48 * v1.00 - Dec 16 2000 - Zach Brown <zab@zabbo.net>
49 * port to sexy 2.4 interfaces
50 * properly align instance allocations so recording works
51 * clean up function namespace a little :/
52 * update PCI IDs based on mail from ESS
53 * arbitrarily bump version number to show its 2.4 now,
54 * 2.2 will stay 0., oss_audio port gets 2.
55 * v0.03 - Nov 05 2000 - Zach Brown <zab@zabbo.net>
56 * disable recording but allow dsp to be opened read
57 * pull out most silly compat defines
58 * v0.02 - Nov 04 2000 - Zach Brown <zab@zabbo.net>
59 * changed clocking setup for m3, slowdown fixed.
60 * codec reset is hopefully reliable now
61 * rudimentary apm/power management makes suspend/resume work
62 * v0.01 - Oct 31 2000 - Zach Brown <zab@zabbo.net>
64 * v0.00 - Sep 09 2000 - Zach Brown <zab@zabbo.net>
65 * first pass derivation from maestro.c
68 * in/out allocated contiguously so fullduplex mmap will work?
69 * no beep on init (mute)
70 * resetup msrc data memory if freq changes?
74 * Allow me to ramble a bit about the m3 architecture. The core of the
75 * chip is the 'assp', the custom ESS dsp that runs the show. It has
76 * a small amount of code and data ram. ESS drops binary dsp code images
77 * on our heads, but we don't get to see specs on the dsp.
79 * The constant piece of code on the dsp is the 'kernel'. It also has a
80 * chunk of the dsp memory that is statically set aside for its control
81 * info. This is the KDATA defines in maestro3.h. Part of its core
82 * data is a list of code addresses that point to the pieces of DSP code
83 * that it should walk through in its loop. These other pieces of code
84 * do the real work. The kernel presumably jumps into each of them in turn.
85 * These code images tend to have their own data area, and one can have
86 * multiple data areas representing different states for each of the 'client
87 * instance' code portions. There is generally a list in the kernel data
88 * that points to the data instances for a given piece of code.
90 * We've only been given the binary image for the 'minisrc', mini sample
91 * rate converter. This is rather annoying because it limits the work
92 * we can do on the dsp, but it also greatly simplifies the job of managing
93 * dsp data memory for the code and data for our playing streams :). We
94 * statically allocate the minisrc code into a region we 'know' to be free
95 * based on the map of the binary kernel image we're loading. We also
96 * statically allocate the data areas for the maximum number of pcm streams
97 * we can be dealing with. This max is set by the length of the static list
98 * in the kernel data that records the number of minisrc data regions we
99 * can have. Thats right, all software dsp mixing with static code list
102 * How sound goes in and out is still a relative mystery. It appears
103 * that the dsp has the ability to get input and output through various
104 * 'connections'. To do IO from or to a connection, you put the address
105 * of the minisrc client area in the static kernel data lists for that
106 * input or output. so for pcm -> dsp -> mixer, we put the minisrc data
107 * instance in the DMA list and also in the list for the mixer. I guess
108 * it Just Knows which is in/out, and we give some dma control info that
109 * helps. There are all sorts of cool inputs/outputs that it seems we can't
110 * use without dsp code images that know how to use them.
112 * So at init time we preload all the memory allocation stuff and set some
113 * system wide parameters. When we really get a sound to play we build
114 * up its minisrc header (stream parameters, buffer addresses, input/output
115 * settings). Then we throw its header on the various lists. We also
116 * tickle some KDATA settings that ask the assp to raise clock interrupts
117 * and do some amount of software mixing before handing data to the ac97.
119 * Sorry for the vague details. Feel free to ask Eric or myself if you
120 * happen to be trying to use this driver elsewhere. Please accept my
121 * apologies for the quality of the OSS support code, its passed through
122 * too many hands now and desperately wants to be rethought.
125 /*****************************************************************************/
127 #include <linux/config.h>
128 #include <linux/module.h>
129 #include <linux/kernel.h>
130 #include <linux/string.h>
131 #include <linux/ctype.h>
132 #include <linux/ioport.h>
133 #include <linux/sched.h>
134 #include <linux/delay.h>
135 #include <linux/sound.h>
136 #include <linux/slab.h>
137 #include <linux/soundcard.h>
138 #include <linux/pci.h>
139 #include <linux/vmalloc.h>
140 #include <linux/init.h>
141 #include <linux/interrupt.h>
142 #include <linux/poll.h>
143 #include <linux/reboot.h>
144 #include <linux/spinlock.h>
145 #include <linux/ac97_codec.h>
146 #include <linux/wait.h>
147 #include <linux/mutex.h>
152 #include <asm/uaccess.h>
154 #include "maestro3.h"
158 #define DRIVER_VERSION "1.23"
159 #define M3_MODULE_NAME "maestro3"
160 #define PFX M3_MODULE_NAME ": "
162 #define M3_STATE_MAGIC 0x734d724d
163 #define M3_CARD_MAGIC 0x646e6f50
165 #define ESS_FMT_STEREO 0x01
166 #define ESS_FMT_16BIT 0x02
167 #define ESS_FMT_MASK 0x03
168 #define ESS_DAC_SHIFT 0
169 #define ESS_ADC_SHIFT 4
171 #define DAC_RUNNING 1
172 #define ADC_RUNNING 2
174 #define SND_DEV_DSP16 5
178 #define DPMOD 1 /* per module load */
179 #define DPSTR 2 /* per 'stream' */
180 #define DPSYS 3 /* per syscall */
181 #define DPCRAP 4 /* stuff the user shouldn't see unless they're really debuggin */
182 #define DPINT 5 /* per interrupt, LOTS */
183 #define DPRINTK(DP, args...) {if (debug >= (DP)) printk(KERN_DEBUG PFX args);}
194 static int external_amp = 1;
195 static int gpio_pin = -1;
199 struct m3_card *card;
200 unsigned char fmt, enable;
204 /* this locks around the oss state in the driver */
205 /* no, this lock is removed - only use card->lock */
206 /* otherwise: against what are you protecting on SMP
207 when irqhandler uses s->lock
208 and m3_assp_read uses card->lock ?
210 struct mutex open_mutex;
211 wait_queue_head_t open_wait;
216 struct assp_instance {
218 } dac_inst, adc_inst;
220 /* should be in dmabuf */
221 unsigned int rateadc, ratedac;
228 unsigned hwptr, swptr;
229 unsigned total_bytes;
231 unsigned error; /* over/underrun */
232 wait_queue_head_t wait;
233 /* redundant, but makes calculations easier */
236 unsigned fragsamples;
240 unsigned endcleared:1;
241 unsigned ossfragshift;
243 unsigned subdivision;
245 int mixer_index, dma_index, msrc_index, adc1_index;
256 struct m3_card *next;
258 struct ac97_codec *ac97;
259 spinlock_t ac97_lock;
264 #define MAX_DSPS NR_DSPS
265 struct m3_state channels[MAX_DSPS];
267 /* this locks around the physical registers on the card */
270 /* hardware resources */
271 struct pci_dev *pcidev;
279 struct m3_list msrc_list,
284 /* for storing reset state..*/
289 wait_queue_head_t suspend_queue;
293 * an arbitrary volume we set the internal
294 * volume settings to so that the ac97 volume
295 * range is a little less insane. 0x7fff is
298 #define ARB_VOLUME ( 0x6800 )
300 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
306 * a maestro3 with 'hardware strapping', only
312 static char *card_names[] = {
313 [ESS_ALLEGRO] = "Allegro",
314 [ESS_MAESTRO3] = "Maestro3(i)",
315 [ESS_MAESTRO3HW] = "Maestro3(i)hw"
318 #ifndef PCI_VENDOR_ESS
319 #define PCI_VENDOR_ESS 0x125D
322 #define M3_DEVICE(DEV, TYPE) \
324 .vendor = PCI_VENDOR_ESS, \
326 .subvendor = PCI_ANY_ID, \
327 .subdevice = PCI_ANY_ID, \
328 .class = PCI_CLASS_MULTIMEDIA_AUDIO << 8, \
329 .class_mask = 0xffff << 8, \
330 .driver_data = TYPE, \
333 static struct pci_device_id m3_id_table[] = {
334 M3_DEVICE(0x1988, ESS_ALLEGRO),
335 M3_DEVICE(0x1998, ESS_MAESTRO3),
336 M3_DEVICE(0x199a, ESS_MAESTRO3HW),
340 MODULE_DEVICE_TABLE (pci, m3_id_table);
343 * reports seem to indicate that the m3 is limited
344 * to 28bit bus addresses. aaaargggh...
346 #define M3_PCI_DMA_MASK 0x0fffffff
374 static struct m3_card *devs;
377 * I'm not very good at laying out functions in a file :)
379 static int m3_notifier(struct notifier_block *nb, unsigned long event, void *buf);
380 static int m3_suspend(struct pci_dev *pci_dev, pm_message_t state);
381 static void check_suspend(struct m3_card *card);
383 static struct notifier_block m3_reboot_nb = {
384 .notifier_call = m3_notifier,
387 static void m3_outw(struct m3_card *card,
388 u16 value, unsigned long reg)
391 outw(value, card->iobase + reg);
394 static u16 m3_inw(struct m3_card *card, unsigned long reg)
397 return inw(card->iobase + reg);
399 static void m3_outb(struct m3_card *card,
400 u8 value, unsigned long reg)
403 outb(value, card->iobase + reg);
405 static u8 m3_inb(struct m3_card *card, unsigned long reg)
408 return inb(card->iobase + reg);
412 * access 16bit words to the code or data regions of the dsp's memory.
413 * index addresses 16bit words.
415 static u16 __m3_assp_read(struct m3_card *card, u16 region, u16 index)
417 m3_outw(card, region & MEMTYPE_MASK, DSP_PORT_MEMORY_TYPE);
418 m3_outw(card, index, DSP_PORT_MEMORY_INDEX);
419 return m3_inw(card, DSP_PORT_MEMORY_DATA);
421 static u16 m3_assp_read(struct m3_card *card, u16 region, u16 index)
426 spin_lock_irqsave(&(card->lock), flags);
427 ret = __m3_assp_read(card, region, index);
428 spin_unlock_irqrestore(&(card->lock), flags);
433 static void __m3_assp_write(struct m3_card *card,
434 u16 region, u16 index, u16 data)
436 m3_outw(card, region & MEMTYPE_MASK, DSP_PORT_MEMORY_TYPE);
437 m3_outw(card, index, DSP_PORT_MEMORY_INDEX);
438 m3_outw(card, data, DSP_PORT_MEMORY_DATA);
440 static void m3_assp_write(struct m3_card *card,
441 u16 region, u16 index, u16 data)
445 spin_lock_irqsave(&(card->lock), flags);
446 __m3_assp_write(card, region, index, data);
447 spin_unlock_irqrestore(&(card->lock), flags);
450 static void m3_assp_halt(struct m3_card *card)
452 card->reset_state = m3_inb(card, DSP_PORT_CONTROL_REG_B) & ~REGB_STOP_CLOCK;
454 m3_outb(card, card->reset_state & ~REGB_ENABLE_RESET, DSP_PORT_CONTROL_REG_B);
457 static void m3_assp_continue(struct m3_card *card)
459 m3_outb(card, card->reset_state | REGB_ENABLE_RESET, DSP_PORT_CONTROL_REG_B);
463 * This makes me sad. the maestro3 has lists
464 * internally that must be packed.. 0 terminates,
465 * apparently, or maybe all unused entries have
466 * to be 0, the lists have static lengths set
467 * by the binary code images.
470 static int m3_add_list(struct m3_card *card,
471 struct m3_list *list, u16 val)
473 DPRINTK(DPSTR, "adding val 0x%x to list 0x%p at pos %d\n",
474 val, list, list->curlen);
476 m3_assp_write(card, MEMTYPE_INTERNAL_DATA,
477 list->mem_addr + list->curlen,
480 return list->curlen++;
484 static void m3_remove_list(struct m3_card *card,
485 struct m3_list *list, int index)
488 int lastindex = list->curlen - 1;
490 DPRINTK(DPSTR, "removing ind %d from list 0x%p\n",
493 if(index != lastindex) {
494 val = m3_assp_read(card, MEMTYPE_INTERNAL_DATA,
495 list->mem_addr + lastindex);
496 m3_assp_write(card, MEMTYPE_INTERNAL_DATA,
497 list->mem_addr + index,
501 m3_assp_write(card, MEMTYPE_INTERNAL_DATA,
502 list->mem_addr + lastindex,
508 static void set_fmt(struct m3_state *s, unsigned char mask, unsigned char data)
512 s->fmt = (s->fmt & mask) | data;
514 tmp = (s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_MASK;
516 /* write to 'mono' word */
517 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
518 s->dac_inst.data + SRC3_DIRECTION_OFFSET + 1,
519 (tmp & ESS_FMT_STEREO) ? 0 : 1);
520 /* write to '8bit' word */
521 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
522 s->dac_inst.data + SRC3_DIRECTION_OFFSET + 2,
523 (tmp & ESS_FMT_16BIT) ? 0 : 1);
525 tmp = (s->fmt >> ESS_ADC_SHIFT) & ESS_FMT_MASK;
527 /* write to 'mono' word */
528 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
529 s->adc_inst.data + SRC3_DIRECTION_OFFSET + 1,
530 (tmp & ESS_FMT_STEREO) ? 0 : 1);
531 /* write to '8bit' word */
532 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
533 s->adc_inst.data + SRC3_DIRECTION_OFFSET + 2,
534 (tmp & ESS_FMT_16BIT) ? 0 : 1);
537 static void set_dac_rate(struct m3_state *s, unsigned int rate)
548 freq = ((rate << 15) + 24000 ) / 48000;
552 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
553 s->dac_inst.data + CDATA_FREQUENCY,
557 static void set_adc_rate(struct m3_state *s, unsigned int rate)
568 freq = ((rate << 15) + 24000 ) / 48000;
572 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
573 s->adc_inst.data + CDATA_FREQUENCY,
577 static void inc_timer_users(struct m3_card *card)
581 spin_lock_irqsave(&card->lock, flags);
584 DPRINTK(DPSYS, "inc timer users now %d\n",
586 if(card->timer_users != 1)
589 __m3_assp_write(card, MEMTYPE_INTERNAL_DATA,
590 KDATA_TIMER_COUNT_RELOAD,
593 __m3_assp_write(card, MEMTYPE_INTERNAL_DATA,
594 KDATA_TIMER_COUNT_CURRENT,
598 m3_inw(card, HOST_INT_CTRL) | CLKRUN_GEN_ENABLE,
601 spin_unlock_irqrestore(&card->lock, flags);
604 static void dec_timer_users(struct m3_card *card)
608 spin_lock_irqsave(&card->lock, flags);
611 DPRINTK(DPSYS, "dec timer users now %d\n",
613 if(card->timer_users > 0 )
616 __m3_assp_write(card, MEMTYPE_INTERNAL_DATA,
617 KDATA_TIMER_COUNT_RELOAD,
620 __m3_assp_write(card, MEMTYPE_INTERNAL_DATA,
621 KDATA_TIMER_COUNT_CURRENT,
624 m3_outw(card, m3_inw(card, HOST_INT_CTRL) & ~CLKRUN_GEN_ENABLE,
627 spin_unlock_irqrestore(&card->lock, flags);
631 * {start,stop}_{adc,dac} should be called
632 * while holding the 'state' lock and they
633 * will try to grab the 'card' lock..
635 static void stop_adc(struct m3_state *s)
637 if (! (s->enable & ADC_RUNNING))
640 s->enable &= ~ADC_RUNNING;
641 dec_timer_users(s->card);
643 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
644 s->adc_inst.data + CDATA_INSTANCE_READY, 0);
646 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
647 KDATA_ADC1_REQUEST, 0);
650 static void stop_dac(struct m3_state *s)
652 if (! (s->enable & DAC_RUNNING))
655 DPRINTK(DPSYS, "stop_dac()\n");
657 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
658 s->dac_inst.data + CDATA_INSTANCE_READY, 0);
660 s->enable &= ~DAC_RUNNING;
661 s->card->dacs_active--;
662 dec_timer_users(s->card);
664 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
665 KDATA_MIXER_TASK_NUMBER,
666 s->card->dacs_active ) ;
669 static void start_dac(struct m3_state *s)
671 if( (!s->dma_dac.mapped && s->dma_dac.count < 1) ||
673 (s->enable & DAC_RUNNING))
676 DPRINTK(DPSYS, "start_dac()\n");
678 s->enable |= DAC_RUNNING;
679 s->card->dacs_active++;
680 inc_timer_users(s->card);
682 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
683 s->dac_inst.data + CDATA_INSTANCE_READY, 1);
685 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
686 KDATA_MIXER_TASK_NUMBER,
687 s->card->dacs_active ) ;
690 static void start_adc(struct m3_state *s)
692 if ((! s->dma_adc.mapped &&
693 s->dma_adc.count >= (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize))
695 || (s->enable & ADC_RUNNING) )
698 DPRINTK(DPSYS, "start_adc()\n");
700 s->enable |= ADC_RUNNING;
701 inc_timer_users(s->card);
703 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
704 KDATA_ADC1_REQUEST, 1);
706 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
707 s->adc_inst.data + CDATA_INSTANCE_READY, 1);
710 static struct play_vals {
713 {CDATA_LEFT_VOLUME, ARB_VOLUME},
714 {CDATA_RIGHT_VOLUME, ARB_VOLUME},
715 {SRC3_DIRECTION_OFFSET, 0} ,
716 /* +1, +2 are stereo/16 bit */
717 {SRC3_DIRECTION_OFFSET + 3, 0x0000}, /* fraction? */
718 {SRC3_DIRECTION_OFFSET + 4, 0}, /* first l */
719 {SRC3_DIRECTION_OFFSET + 5, 0}, /* first r */
720 {SRC3_DIRECTION_OFFSET + 6, 0}, /* second l */
721 {SRC3_DIRECTION_OFFSET + 7, 0}, /* second r */
722 {SRC3_DIRECTION_OFFSET + 8, 0}, /* delta l */
723 {SRC3_DIRECTION_OFFSET + 9, 0}, /* delta r */
724 {SRC3_DIRECTION_OFFSET + 10, 0x8000}, /* round */
725 {SRC3_DIRECTION_OFFSET + 11, 0xFF00}, /* higher bute mark */
726 {SRC3_DIRECTION_OFFSET + 13, 0}, /* temp0 */
727 {SRC3_DIRECTION_OFFSET + 14, 0}, /* c fraction */
728 {SRC3_DIRECTION_OFFSET + 15, 0}, /* counter */
729 {SRC3_DIRECTION_OFFSET + 16, 8}, /* numin */
730 {SRC3_DIRECTION_OFFSET + 17, 50*2}, /* numout */
731 {SRC3_DIRECTION_OFFSET + 18, MINISRC_BIQUAD_STAGE - 1}, /* numstage */
732 {SRC3_DIRECTION_OFFSET + 20, 0}, /* filtertap */
733 {SRC3_DIRECTION_OFFSET + 21, 0} /* booster */
737 /* the mode passed should be already shifted and masked */
738 static void m3_play_setup(struct m3_state *s, int mode, u32 rate, void *buffer, int size)
740 int dsp_in_size = MINISRC_IN_BUFFER_SIZE - (0x20 * 2);
741 int dsp_out_size = MINISRC_OUT_BUFFER_SIZE - (0x20 * 2);
742 int dsp_in_buffer = s->dac_inst.data + (MINISRC_TMP_BUFFER_SIZE / 2);
743 int dsp_out_buffer = dsp_in_buffer + (dsp_in_size / 2) + 1;
744 struct dmabuf *db = &s->dma_dac;
747 DPRINTK(DPSTR, "mode=%d rate=%d buf=%p len=%d.\n",
748 mode, rate, buffer, size);
750 #define LO(x) ((x) & 0xffff)
751 #define HI(x) LO((x) >> 16)
753 /* host dma buffer pointers */
755 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
756 s->dac_inst.data + CDATA_HOST_SRC_ADDRL,
757 LO(virt_to_bus(buffer)));
759 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
760 s->dac_inst.data + CDATA_HOST_SRC_ADDRH,
761 HI(virt_to_bus(buffer)));
763 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
764 s->dac_inst.data + CDATA_HOST_SRC_END_PLUS_1L,
765 LO(virt_to_bus(buffer) + size));
767 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
768 s->dac_inst.data + CDATA_HOST_SRC_END_PLUS_1H,
769 HI(virt_to_bus(buffer) + size));
771 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
772 s->dac_inst.data + CDATA_HOST_SRC_CURRENTL,
773 LO(virt_to_bus(buffer)));
775 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
776 s->dac_inst.data + CDATA_HOST_SRC_CURRENTH,
777 HI(virt_to_bus(buffer)));
783 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
784 s->dac_inst.data + CDATA_IN_BUF_BEGIN,
787 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
788 s->dac_inst.data + CDATA_IN_BUF_END_PLUS_1,
789 dsp_in_buffer + (dsp_in_size / 2));
791 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
792 s->dac_inst.data + CDATA_IN_BUF_HEAD,
795 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
796 s->dac_inst.data + CDATA_IN_BUF_TAIL,
799 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
800 s->dac_inst.data + CDATA_OUT_BUF_BEGIN,
803 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
804 s->dac_inst.data + CDATA_OUT_BUF_END_PLUS_1,
805 dsp_out_buffer + (dsp_out_size / 2));
807 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
808 s->dac_inst.data + CDATA_OUT_BUF_HEAD,
811 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
812 s->dac_inst.data + CDATA_OUT_BUF_TAIL,
816 * some per client initializers
819 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
820 s->dac_inst.data + SRC3_DIRECTION_OFFSET + 12,
821 s->dac_inst.data + 40 + 8);
823 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
824 s->dac_inst.data + SRC3_DIRECTION_OFFSET + 19,
825 s->dac_inst.code + MINISRC_COEF_LOC);
827 /* enable or disable low pass filter? */
828 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
829 s->dac_inst.data + SRC3_DIRECTION_OFFSET + 22,
830 s->ratedac > 45000 ? 0xff : 0 );
832 /* tell it which way dma is going? */
833 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
834 s->dac_inst.data + CDATA_DMA_CONTROL,
835 DMACONTROL_AUTOREPEAT + DMAC_PAGE3_SELECTOR + DMAC_BLOCKF_SELECTOR);
838 * set an armload of static initializers
840 for(i = 0 ; i < (sizeof(pv) / sizeof(pv[0])) ; i++)
841 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
842 s->dac_inst.data + pv[i].addr, pv[i].val);
845 * put us in the lists if we're not already there
848 if(db->in_lists == 0) {
850 db->msrc_index = m3_add_list(s->card, &s->card->msrc_list,
851 s->dac_inst.data >> DP_SHIFT_COUNT);
853 db->dma_index = m3_add_list(s->card, &s->card->dma_list,
854 s->dac_inst.data >> DP_SHIFT_COUNT);
856 db->mixer_index = m3_add_list(s->card, &s->card->mixer_list,
857 s->dac_inst.data >> DP_SHIFT_COUNT);
862 set_dac_rate(s,rate);
867 * Native record driver
869 static struct rec_vals {
872 {CDATA_LEFT_VOLUME, ARB_VOLUME},
873 {CDATA_RIGHT_VOLUME, ARB_VOLUME},
874 {SRC3_DIRECTION_OFFSET, 1} ,
875 /* +1, +2 are stereo/16 bit */
876 {SRC3_DIRECTION_OFFSET + 3, 0x0000}, /* fraction? */
877 {SRC3_DIRECTION_OFFSET + 4, 0}, /* first l */
878 {SRC3_DIRECTION_OFFSET + 5, 0}, /* first r */
879 {SRC3_DIRECTION_OFFSET + 6, 0}, /* second l */
880 {SRC3_DIRECTION_OFFSET + 7, 0}, /* second r */
881 {SRC3_DIRECTION_OFFSET + 8, 0}, /* delta l */
882 {SRC3_DIRECTION_OFFSET + 9, 0}, /* delta r */
883 {SRC3_DIRECTION_OFFSET + 10, 0x8000}, /* round */
884 {SRC3_DIRECTION_OFFSET + 11, 0xFF00}, /* higher bute mark */
885 {SRC3_DIRECTION_OFFSET + 13, 0}, /* temp0 */
886 {SRC3_DIRECTION_OFFSET + 14, 0}, /* c fraction */
887 {SRC3_DIRECTION_OFFSET + 15, 0}, /* counter */
888 {SRC3_DIRECTION_OFFSET + 16, 50},/* numin */
889 {SRC3_DIRECTION_OFFSET + 17, 8}, /* numout */
890 {SRC3_DIRECTION_OFFSET + 18, 0}, /* numstage */
891 {SRC3_DIRECTION_OFFSET + 19, 0}, /* coef */
892 {SRC3_DIRECTION_OFFSET + 20, 0}, /* filtertap */
893 {SRC3_DIRECTION_OFFSET + 21, 0}, /* booster */
894 {SRC3_DIRECTION_OFFSET + 22, 0xff} /* skip lpf */
897 /* again, passed mode is alrady shifted/masked */
898 static void m3_rec_setup(struct m3_state *s, int mode, u32 rate, void *buffer, int size)
900 int dsp_in_size = MINISRC_IN_BUFFER_SIZE + (0x10 * 2);
901 int dsp_out_size = MINISRC_OUT_BUFFER_SIZE - (0x10 * 2);
902 int dsp_in_buffer = s->adc_inst.data + (MINISRC_TMP_BUFFER_SIZE / 2);
903 int dsp_out_buffer = dsp_in_buffer + (dsp_in_size / 2) + 1;
904 struct dmabuf *db = &s->dma_adc;
907 DPRINTK(DPSTR, "rec_setup mode=%d rate=%d buf=%p len=%d.\n",
908 mode, rate, buffer, size);
910 #define LO(x) ((x) & 0xffff)
911 #define HI(x) LO((x) >> 16)
913 /* host dma buffer pointers */
915 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
916 s->adc_inst.data + CDATA_HOST_SRC_ADDRL,
917 LO(virt_to_bus(buffer)));
919 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
920 s->adc_inst.data + CDATA_HOST_SRC_ADDRH,
921 HI(virt_to_bus(buffer)));
923 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
924 s->adc_inst.data + CDATA_HOST_SRC_END_PLUS_1L,
925 LO(virt_to_bus(buffer) + size));
927 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
928 s->adc_inst.data + CDATA_HOST_SRC_END_PLUS_1H,
929 HI(virt_to_bus(buffer) + size));
931 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
932 s->adc_inst.data + CDATA_HOST_SRC_CURRENTL,
933 LO(virt_to_bus(buffer)));
935 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
936 s->adc_inst.data + CDATA_HOST_SRC_CURRENTH,
937 HI(virt_to_bus(buffer)));
943 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
944 s->adc_inst.data + CDATA_IN_BUF_BEGIN,
947 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
948 s->adc_inst.data + CDATA_IN_BUF_END_PLUS_1,
949 dsp_in_buffer + (dsp_in_size / 2));
951 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
952 s->adc_inst.data + CDATA_IN_BUF_HEAD,
955 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
956 s->adc_inst.data + CDATA_IN_BUF_TAIL,
959 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
960 s->adc_inst.data + CDATA_OUT_BUF_BEGIN,
963 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
964 s->adc_inst.data + CDATA_OUT_BUF_END_PLUS_1,
965 dsp_out_buffer + (dsp_out_size / 2));
967 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
968 s->adc_inst.data + CDATA_OUT_BUF_HEAD,
971 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
972 s->adc_inst.data + CDATA_OUT_BUF_TAIL,
976 * some per client initializers
979 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
980 s->adc_inst.data + SRC3_DIRECTION_OFFSET + 12,
981 s->adc_inst.data + 40 + 8);
983 /* tell it which way dma is going? */
984 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
985 s->adc_inst.data + CDATA_DMA_CONTROL,
986 DMACONTROL_DIRECTION + DMACONTROL_AUTOREPEAT +
987 DMAC_PAGE3_SELECTOR + DMAC_BLOCKF_SELECTOR);
990 * set an armload of static initializers
992 for(i = 0 ; i < (sizeof(rv) / sizeof(rv[0])) ; i++)
993 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
994 s->adc_inst.data + rv[i].addr, rv[i].val);
997 * put us in the lists if we're not already there
1000 if(db->in_lists == 0) {
1002 db->adc1_index = m3_add_list(s->card, &s->card->adc1_list,
1003 s->adc_inst.data >> DP_SHIFT_COUNT);
1005 db->dma_index = m3_add_list(s->card, &s->card->dma_list,
1006 s->adc_inst.data >> DP_SHIFT_COUNT);
1008 db->msrc_index = m3_add_list(s->card, &s->card->msrc_list,
1009 s->adc_inst.data >> DP_SHIFT_COUNT);
1014 set_adc_rate(s,rate);
1017 /* --------------------------------------------------------------------- */
1019 static void set_dmaa(struct m3_state *s, unsigned int addr, unsigned int count)
1021 DPRINTK(DPINT,"set_dmaa??\n");
1024 static void set_dmac(struct m3_state *s, unsigned int addr, unsigned int count)
1026 DPRINTK(DPINT,"set_dmac??\n");
1029 static u32 get_dma_pos(struct m3_card *card,
1036 * try and get a valid answer
1039 hi = m3_assp_read(card, MEMTYPE_INTERNAL_DATA,
1040 instance_addr + CDATA_HOST_SRC_CURRENTH);
1042 lo = m3_assp_read(card, MEMTYPE_INTERNAL_DATA,
1043 instance_addr + CDATA_HOST_SRC_CURRENTL);
1045 if(hi == m3_assp_read(card, MEMTYPE_INTERNAL_DATA,
1046 instance_addr + CDATA_HOST_SRC_CURRENTH))
1049 return lo | (hi<<16);
1052 static u32 get_dmaa(struct m3_state *s)
1056 offset = get_dma_pos(s->card, s->dac_inst.data) -
1057 virt_to_bus(s->dma_dac.rawbuf);
1059 DPRINTK(DPINT,"get_dmaa: 0x%08x\n",offset);
1064 static u32 get_dmac(struct m3_state *s)
1068 offset = get_dma_pos(s->card, s->adc_inst.data) -
1069 virt_to_bus(s->dma_adc.rawbuf);
1071 DPRINTK(DPINT,"get_dmac: 0x%08x\n",offset);
1078 prog_dmabuf(struct m3_state *s, unsigned rec)
1080 struct dmabuf *db = rec ? &s->dma_adc : &s->dma_dac;
1081 unsigned rate = rec ? s->rateadc : s->ratedac;
1082 unsigned bytepersec;
1085 unsigned long flags;
1087 spin_lock_irqsave(&s->card->lock, flags);
1092 fmt >>= ESS_ADC_SHIFT;
1095 fmt >>= ESS_DAC_SHIFT;
1097 fmt &= ESS_FMT_MASK;
1099 db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
1101 bytepersec = rate << sample_shift[fmt];
1102 bufs = PAGE_SIZE << db->buforder;
1103 if (db->ossfragshift) {
1104 if ((1000 << db->ossfragshift) < bytepersec)
1105 db->fragshift = ld2(bytepersec/1000);
1107 db->fragshift = db->ossfragshift;
1109 db->fragshift = ld2(bytepersec/100/(db->subdivision ? db->subdivision : 1));
1110 if (db->fragshift < 3)
1113 db->numfrag = bufs >> db->fragshift;
1114 while (db->numfrag < 4 && db->fragshift > 3) {
1116 db->numfrag = bufs >> db->fragshift;
1118 db->fragsize = 1 << db->fragshift;
1119 if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
1120 db->numfrag = db->ossmaxfrags;
1121 db->fragsamples = db->fragsize >> sample_shift[fmt];
1122 db->dmasize = db->numfrag << db->fragshift;
1124 DPRINTK(DPSTR,"prog_dmabuf: numfrag: %d fragsize: %d dmasize: %d\n",db->numfrag,db->fragsize,db->dmasize);
1126 memset(db->rawbuf, (fmt & ESS_FMT_16BIT) ? 0 : 0x80, db->dmasize);
1129 m3_rec_setup(s, fmt, s->rateadc, db->rawbuf, db->dmasize);
1131 m3_play_setup(s, fmt, s->ratedac, db->rawbuf, db->dmasize);
1135 spin_unlock_irqrestore(&s->card->lock, flags);
1140 static void clear_advance(struct m3_state *s)
1142 unsigned char c = ((s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_16BIT) ? 0 : 0x80;
1144 unsigned char *buf = s->dma_dac.rawbuf;
1145 unsigned bsize = s->dma_dac.dmasize;
1146 unsigned bptr = s->dma_dac.swptr;
1147 unsigned len = s->dma_dac.fragsize;
1149 if (bptr + len > bsize) {
1150 unsigned x = bsize - bptr;
1151 memset(buf + bptr, c, x);
1152 /* account for wrapping? */
1156 memset(buf + bptr, c, len);
1159 /* call with spinlock held! */
1160 static void m3_update_ptr(struct m3_state *s)
1165 /* update ADC pointer */
1166 if (s->dma_adc.ready) {
1167 hwptr = get_dmac(s) % s->dma_adc.dmasize;
1168 diff = (s->dma_adc.dmasize + hwptr - s->dma_adc.hwptr) % s->dma_adc.dmasize;
1169 s->dma_adc.hwptr = hwptr;
1170 s->dma_adc.total_bytes += diff;
1171 s->dma_adc.count += diff;
1172 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1173 wake_up(&s->dma_adc.wait);
1174 if (!s->dma_adc.mapped) {
1175 if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
1177 /* brute force everyone back in sync, sigh */
1178 s->dma_adc.count = 0;
1179 s->dma_adc.swptr = 0;
1180 s->dma_adc.hwptr = 0;
1185 /* update DAC pointer */
1186 if (s->dma_dac.ready) {
1187 hwptr = get_dmaa(s) % s->dma_dac.dmasize;
1188 diff = (s->dma_dac.dmasize + hwptr - s->dma_dac.hwptr) % s->dma_dac.dmasize;
1190 DPRINTK(DPINT,"updating dac: hwptr: %6d diff: %6d count: %6d\n",
1191 hwptr,diff,s->dma_dac.count);
1193 s->dma_dac.hwptr = hwptr;
1194 s->dma_dac.total_bytes += diff;
1196 if (s->dma_dac.mapped) {
1198 s->dma_dac.count += diff;
1199 if (s->dma_dac.count >= (signed)s->dma_dac.fragsize) {
1200 wake_up(&s->dma_dac.wait);
1204 s->dma_dac.count -= diff;
1206 if (s->dma_dac.count <= 0) {
1207 DPRINTK(DPCRAP,"underflow! diff: %d (0x%x) count: %d (0x%x) hw: %d (0x%x) sw: %d (0x%x)\n",
1215 /* brute force everyone back in sync, sigh */
1216 s->dma_dac.count = 0;
1217 s->dma_dac.swptr = hwptr;
1219 } else if (s->dma_dac.count <= (signed)s->dma_dac.fragsize && !s->dma_dac.endcleared) {
1221 s->dma_dac.endcleared = 1;
1223 if (s->dma_dac.count + (signed)s->dma_dac.fragsize <= (signed)s->dma_dac.dmasize) {
1224 wake_up(&s->dma_dac.wait);
1225 DPRINTK(DPINT,"waking up DAC count: %d sw: %d hw: %d\n",
1226 s->dma_dac.count, s->dma_dac.swptr, hwptr);
1232 static irqreturn_t m3_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1234 struct m3_card *c = (struct m3_card *)dev_id;
1235 struct m3_state *s = &c->channels[0];
1238 status = inb(c->iobase+0x1A);
1243 /* presumably acking the ints? */
1244 outw(status, c->iobase+0x1A);
1250 * ack an assp int if its running
1251 * and has an int pending
1253 if( status & ASSP_INT_PENDING) {
1254 u8 ctl = inb(c->iobase + ASSP_CONTROL_B);
1255 if( !(ctl & STOP_ASSP_CLOCK)) {
1256 ctl = inb(c->iobase + ASSP_HOST_INT_STATUS );
1257 if(ctl & DSP2HOST_REQ_TIMER) {
1258 outb( DSP2HOST_REQ_TIMER, c->iobase + ASSP_HOST_INT_STATUS);
1259 /* update adc/dac info if it was a timer int */
1260 spin_lock(&c->lock);
1262 spin_unlock(&c->lock);
1267 /* XXX is this needed? */
1269 outb(0x40, c->iobase+0x1A);
1274 /* --------------------------------------------------------------------- */
1276 static const char invalid_magic[] = KERN_CRIT PFX "invalid magic value in %s\n";
1278 #define VALIDATE_MAGIC(FOO,MAG) \
1280 if (!(FOO) || (FOO)->magic != MAG) { \
1281 printk(invalid_magic,__FUNCTION__); \
1286 #define VALIDATE_STATE(a) VALIDATE_MAGIC(a,M3_STATE_MAGIC)
1287 #define VALIDATE_CARD(a) VALIDATE_MAGIC(a,M3_CARD_MAGIC)
1289 /* --------------------------------------------------------------------- */
1291 static int drain_dac(struct m3_state *s, int nonblock)
1293 DECLARE_WAITQUEUE(wait,current);
1294 unsigned long flags;
1298 if (s->dma_dac.mapped || !s->dma_dac.ready)
1300 set_current_state(TASK_INTERRUPTIBLE);
1301 add_wait_queue(&s->dma_dac.wait, &wait);
1303 spin_lock_irqsave(&s->card->lock, flags);
1304 count = s->dma_dac.count;
1305 spin_unlock_irqrestore(&s->card->lock, flags);
1308 if (signal_pending(current))
1311 remove_wait_queue(&s->dma_dac.wait, &wait);
1312 set_current_state(TASK_RUNNING);
1315 tmo = (count * HZ) / s->ratedac;
1316 tmo >>= sample_shift[(s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_MASK];
1317 /* XXX this is just broken. someone is waking us up alot, or schedule_timeout is broken.
1318 or something. who cares. - zach */
1319 if (!schedule_timeout(tmo ? tmo : 1) && tmo)
1320 DPRINTK(DPCRAP,"dma timed out?? %ld\n",jiffies);
1322 remove_wait_queue(&s->dma_dac.wait, &wait);
1323 set_current_state(TASK_RUNNING);
1324 if (signal_pending(current))
1325 return -ERESTARTSYS;
1329 static ssize_t m3_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
1331 struct m3_state *s = (struct m3_state *)file->private_data;
1333 unsigned long flags;
1338 if (s->dma_adc.mapped)
1340 if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
1342 if (!access_ok(VERIFY_WRITE, buffer, count))
1346 spin_lock_irqsave(&s->card->lock, flags);
1351 swptr = s->dma_adc.swptr;
1352 cnt = s->dma_adc.dmasize-swptr;
1353 if (s->dma_adc.count < cnt)
1354 cnt = s->dma_adc.count;
1361 if (file->f_flags & O_NONBLOCK)
1363 ret = ret ? ret : -EAGAIN;
1367 spin_unlock_irqrestore(&s->card->lock, flags);
1368 timed_out = interruptible_sleep_on_timeout(&s->dma_adc.wait, HZ) == 0;
1369 spin_lock_irqsave(&s->card->lock, flags);
1372 printk("read: chip lockup? dmasz %u fragsz %u count %u hwptr %u swptr %u\n",
1373 s->dma_adc.dmasize, s->dma_adc.fragsize, s->dma_adc.count,
1374 s->dma_adc.hwptr, s->dma_adc.swptr);
1376 set_dmac(s, virt_to_bus(s->dma_adc.rawbuf), s->dma_adc.numfrag << s->dma_adc.fragshift);
1377 s->dma_adc.count = s->dma_adc.hwptr = s->dma_adc.swptr = 0;
1379 if (signal_pending(current))
1381 ret = ret ? ret : -ERESTARTSYS;
1387 spin_unlock_irqrestore(&s->card->lock, flags);
1388 if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt)) {
1389 ret = ret ? ret : -EFAULT;
1392 spin_lock_irqsave(&s->card->lock, flags);
1394 swptr = (swptr + cnt) % s->dma_adc.dmasize;
1395 s->dma_adc.swptr = swptr;
1396 s->dma_adc.count -= cnt;
1404 spin_unlock_irqrestore(&s->card->lock, flags);
1408 static ssize_t m3_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
1410 struct m3_state *s = (struct m3_state *)file->private_data;
1412 unsigned long flags;
1417 if (s->dma_dac.mapped)
1419 if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
1421 if (!access_ok(VERIFY_READ, buffer, count))
1425 spin_lock_irqsave(&s->card->lock, flags);
1430 if (s->dma_dac.count < 0) {
1431 s->dma_dac.count = 0;
1432 s->dma_dac.swptr = s->dma_dac.hwptr;
1434 swptr = s->dma_dac.swptr;
1436 cnt = s->dma_dac.dmasize-swptr;
1438 if (s->dma_dac.count + cnt > s->dma_dac.dmasize)
1439 cnt = s->dma_dac.dmasize - s->dma_dac.count;
1447 if (file->f_flags & O_NONBLOCK) {
1448 if(!ret) ret = -EAGAIN;
1451 spin_unlock_irqrestore(&s->card->lock, flags);
1452 timed_out = interruptible_sleep_on_timeout(&s->dma_dac.wait, HZ) == 0;
1453 spin_lock_irqsave(&s->card->lock, flags);
1455 DPRINTK(DPCRAP,"write: chip lockup? dmasz %u fragsz %u count %u hwptr %u swptr %u\n",
1456 s->dma_dac.dmasize, s->dma_dac.fragsize, s->dma_dac.count,
1457 s->dma_dac.hwptr, s->dma_dac.swptr);
1459 set_dmaa(s, virt_to_bus(s->dma_dac.rawbuf), s->dma_dac.numfrag << s->dma_dac.fragshift);
1460 s->dma_dac.count = s->dma_dac.hwptr = s->dma_dac.swptr = 0;
1462 if (signal_pending(current)) {
1463 if (!ret) ret = -ERESTARTSYS;
1468 spin_unlock_irqrestore(&s->card->lock, flags);
1469 if (copy_from_user(s->dma_dac.rawbuf + swptr, buffer, cnt)) {
1470 if (!ret) ret = -EFAULT;
1473 spin_lock_irqsave(&s->card->lock, flags);
1475 DPRINTK(DPSYS,"wrote %6d bytes at sw: %6d cnt: %6d while hw: %6d\n",
1476 cnt, swptr, s->dma_dac.count, s->dma_dac.hwptr);
1478 swptr = (swptr + cnt) % s->dma_dac.dmasize;
1480 s->dma_dac.swptr = swptr;
1481 s->dma_dac.count += cnt;
1482 s->dma_dac.endcleared = 0;
1489 spin_unlock_irqrestore(&s->card->lock, flags);
1493 static unsigned int m3_poll(struct file *file, struct poll_table_struct *wait)
1495 struct m3_state *s = (struct m3_state *)file->private_data;
1496 unsigned long flags;
1497 unsigned int mask = 0;
1500 if (file->f_mode & FMODE_WRITE)
1501 poll_wait(file, &s->dma_dac.wait, wait);
1502 if (file->f_mode & FMODE_READ)
1503 poll_wait(file, &s->dma_adc.wait, wait);
1505 spin_lock_irqsave(&s->card->lock, flags);
1508 if (file->f_mode & FMODE_READ) {
1509 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1510 mask |= POLLIN | POLLRDNORM;
1512 if (file->f_mode & FMODE_WRITE) {
1513 if (s->dma_dac.mapped) {
1514 if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
1515 mask |= POLLOUT | POLLWRNORM;
1517 if ((signed)s->dma_dac.dmasize >= s->dma_dac.count + (signed)s->dma_dac.fragsize)
1518 mask |= POLLOUT | POLLWRNORM;
1522 spin_unlock_irqrestore(&s->card->lock, flags);
1526 static int m3_mmap(struct file *file, struct vm_area_struct *vma)
1528 struct m3_state *s = (struct m3_state *)file->private_data;
1529 unsigned long max_size, size, start, offset;
1534 if (vma->vm_flags & VM_WRITE) {
1535 if ((ret = prog_dmabuf(s, 0)) != 0)
1539 if (vma->vm_flags & VM_READ) {
1540 if ((ret = prog_dmabuf(s, 1)) != 0)
1546 max_size = db->dmasize;
1548 start = vma->vm_start;
1549 offset = (vma->vm_pgoff << PAGE_SHIFT);
1550 size = vma->vm_end - vma->vm_start;
1554 if(offset > max_size - size)
1558 * this will be ->nopage() once I can
1559 * ask Jeff what the hell I'm doing wrong.
1562 if (remap_pfn_range(vma, vma->vm_start,
1563 virt_to_phys(db->rawbuf) >> PAGE_SHIFT,
1564 size, vma->vm_page_prot))
1575 * this function is a disaster..
1577 #define get_user_ret(x, ptr, ret) ({ if(get_user(x, ptr)) return ret; })
1578 static int m3_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1580 struct m3_state *s = (struct m3_state *)file->private_data;
1581 struct m3_card *card=s->card;
1582 unsigned long flags;
1583 audio_buf_info abinfo;
1585 int val, mapped, ret;
1586 unsigned char fmtm, fmtd;
1587 void __user *argp = (void __user *)arg;
1588 int __user *p = argp;
1592 mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) ||
1593 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1595 DPRINTK(DPSYS,"m3_ioctl: cmd %d\n", cmd);
1598 case OSS_GETVERSION:
1599 return put_user(SOUND_VERSION, p);
1601 case SNDCTL_DSP_SYNC:
1602 if (file->f_mode & FMODE_WRITE)
1603 return drain_dac(s, file->f_flags & O_NONBLOCK);
1606 case SNDCTL_DSP_SETDUPLEX:
1610 case SNDCTL_DSP_GETCAPS:
1611 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, p);
1613 case SNDCTL_DSP_RESET:
1614 spin_lock_irqsave(&card->lock, flags);
1615 if (file->f_mode & FMODE_WRITE) {
1617 synchronize_irq(s->card->pcidev->irq);
1618 s->dma_dac.swptr = s->dma_dac.hwptr = s->dma_dac.count = s->dma_dac.total_bytes = 0;
1620 if (file->f_mode & FMODE_READ) {
1622 synchronize_irq(s->card->pcidev->irq);
1623 s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
1625 spin_unlock_irqrestore(&card->lock, flags);
1628 case SNDCTL_DSP_SPEED:
1629 get_user_ret(val, p, -EFAULT);
1630 spin_lock_irqsave(&card->lock, flags);
1632 if (file->f_mode & FMODE_READ) {
1634 s->dma_adc.ready = 0;
1635 set_adc_rate(s, val);
1637 if (file->f_mode & FMODE_WRITE) {
1639 s->dma_dac.ready = 0;
1640 set_dac_rate(s, val);
1643 spin_unlock_irqrestore(&card->lock, flags);
1644 return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, p);
1646 case SNDCTL_DSP_STEREO:
1647 get_user_ret(val, p, -EFAULT);
1648 spin_lock_irqsave(&card->lock, flags);
1651 if (file->f_mode & FMODE_READ) {
1653 s->dma_adc.ready = 0;
1655 fmtd |= ESS_FMT_STEREO << ESS_ADC_SHIFT;
1657 fmtm &= ~(ESS_FMT_STEREO << ESS_ADC_SHIFT);
1659 if (file->f_mode & FMODE_WRITE) {
1661 s->dma_dac.ready = 0;
1663 fmtd |= ESS_FMT_STEREO << ESS_DAC_SHIFT;
1665 fmtm &= ~(ESS_FMT_STEREO << ESS_DAC_SHIFT);
1667 set_fmt(s, fmtm, fmtd);
1668 spin_unlock_irqrestore(&card->lock, flags);
1671 case SNDCTL_DSP_CHANNELS:
1672 get_user_ret(val, p, -EFAULT);
1673 spin_lock_irqsave(&card->lock, flags);
1677 if (file->f_mode & FMODE_READ) {
1679 s->dma_adc.ready = 0;
1681 fmtd |= ESS_FMT_STEREO << ESS_ADC_SHIFT;
1683 fmtm &= ~(ESS_FMT_STEREO << ESS_ADC_SHIFT);
1685 if (file->f_mode & FMODE_WRITE) {
1687 s->dma_dac.ready = 0;
1689 fmtd |= ESS_FMT_STEREO << ESS_DAC_SHIFT;
1691 fmtm &= ~(ESS_FMT_STEREO << ESS_DAC_SHIFT);
1693 set_fmt(s, fmtm, fmtd);
1695 spin_unlock_irqrestore(&card->lock, flags);
1696 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (ESS_FMT_STEREO << ESS_ADC_SHIFT)
1697 : (ESS_FMT_STEREO << ESS_DAC_SHIFT))) ? 2 : 1, p);
1699 case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1700 return put_user(AFMT_U8|AFMT_S16_LE, p);
1702 case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1703 get_user_ret(val, p, -EFAULT);
1704 spin_lock_irqsave(&card->lock, flags);
1705 if (val != AFMT_QUERY) {
1708 if (file->f_mode & FMODE_READ) {
1710 s->dma_adc.ready = 0;
1711 if (val == AFMT_S16_LE)
1712 fmtd |= ESS_FMT_16BIT << ESS_ADC_SHIFT;
1714 fmtm &= ~(ESS_FMT_16BIT << ESS_ADC_SHIFT);
1716 if (file->f_mode & FMODE_WRITE) {
1718 s->dma_dac.ready = 0;
1719 if (val == AFMT_S16_LE)
1720 fmtd |= ESS_FMT_16BIT << ESS_DAC_SHIFT;
1722 fmtm &= ~(ESS_FMT_16BIT << ESS_DAC_SHIFT);
1724 set_fmt(s, fmtm, fmtd);
1726 spin_unlock_irqrestore(&card->lock, flags);
1727 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ?
1728 (ESS_FMT_16BIT << ESS_ADC_SHIFT)
1729 : (ESS_FMT_16BIT << ESS_DAC_SHIFT))) ?
1734 case SNDCTL_DSP_POST:
1737 case SNDCTL_DSP_GETTRIGGER:
1739 if ((file->f_mode & FMODE_READ) && (s->enable & ADC_RUNNING))
1740 val |= PCM_ENABLE_INPUT;
1741 if ((file->f_mode & FMODE_WRITE) && (s->enable & DAC_RUNNING))
1742 val |= PCM_ENABLE_OUTPUT;
1743 return put_user(val, p);
1745 case SNDCTL_DSP_SETTRIGGER:
1746 get_user_ret(val, p, -EFAULT);
1747 if (file->f_mode & FMODE_READ) {
1748 if (val & PCM_ENABLE_INPUT) {
1749 if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
1755 if (file->f_mode & FMODE_WRITE) {
1756 if (val & PCM_ENABLE_OUTPUT) {
1757 if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
1765 case SNDCTL_DSP_GETOSPACE:
1766 if (!(file->f_mode & FMODE_WRITE))
1768 if (!(s->enable & DAC_RUNNING) && (val = prog_dmabuf(s, 0)) != 0)
1770 spin_lock_irqsave(&card->lock, flags);
1772 abinfo.fragsize = s->dma_dac.fragsize;
1773 abinfo.bytes = s->dma_dac.dmasize - s->dma_dac.count;
1774 abinfo.fragstotal = s->dma_dac.numfrag;
1775 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
1776 spin_unlock_irqrestore(&card->lock, flags);
1777 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1779 case SNDCTL_DSP_GETISPACE:
1780 if (!(file->f_mode & FMODE_READ))
1782 if (!(s->enable & ADC_RUNNING) && (val = prog_dmabuf(s, 1)) != 0)
1784 spin_lock_irqsave(&card->lock, flags);
1786 abinfo.fragsize = s->dma_adc.fragsize;
1787 abinfo.bytes = s->dma_adc.count;
1788 abinfo.fragstotal = s->dma_adc.numfrag;
1789 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
1790 spin_unlock_irqrestore(&card->lock, flags);
1791 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1793 case SNDCTL_DSP_NONBLOCK:
1794 file->f_flags |= O_NONBLOCK;
1797 case SNDCTL_DSP_GETODELAY:
1798 if (!(file->f_mode & FMODE_WRITE))
1800 spin_lock_irqsave(&card->lock, flags);
1802 val = s->dma_dac.count;
1803 spin_unlock_irqrestore(&card->lock, flags);
1804 return put_user(val, p);
1806 case SNDCTL_DSP_GETIPTR:
1807 if (!(file->f_mode & FMODE_READ))
1809 spin_lock_irqsave(&card->lock, flags);
1811 cinfo.bytes = s->dma_adc.total_bytes;
1812 cinfo.blocks = s->dma_adc.count >> s->dma_adc.fragshift;
1813 cinfo.ptr = s->dma_adc.hwptr;
1814 if (s->dma_adc.mapped)
1815 s->dma_adc.count &= s->dma_adc.fragsize-1;
1816 spin_unlock_irqrestore(&card->lock, flags);
1817 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1821 case SNDCTL_DSP_GETOPTR:
1822 if (!(file->f_mode & FMODE_WRITE))
1824 spin_lock_irqsave(&card->lock, flags);
1826 cinfo.bytes = s->dma_dac.total_bytes;
1827 cinfo.blocks = s->dma_dac.count >> s->dma_dac.fragshift;
1828 cinfo.ptr = s->dma_dac.hwptr;
1829 if (s->dma_dac.mapped)
1830 s->dma_dac.count &= s->dma_dac.fragsize-1;
1831 spin_unlock_irqrestore(&card->lock, flags);
1832 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1836 case SNDCTL_DSP_GETBLKSIZE:
1837 if (file->f_mode & FMODE_WRITE) {
1838 if ((val = prog_dmabuf(s, 0)))
1840 return put_user(s->dma_dac.fragsize, p);
1842 if ((val = prog_dmabuf(s, 1)))
1844 return put_user(s->dma_adc.fragsize, p);
1846 case SNDCTL_DSP_SETFRAGMENT:
1847 get_user_ret(val, p, -EFAULT);
1848 spin_lock_irqsave(&card->lock, flags);
1849 if (file->f_mode & FMODE_READ) {
1850 s->dma_adc.ossfragshift = val & 0xffff;
1851 s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
1852 if (s->dma_adc.ossfragshift < 4)
1853 s->dma_adc.ossfragshift = 4;
1854 if (s->dma_adc.ossfragshift > 15)
1855 s->dma_adc.ossfragshift = 15;
1856 if (s->dma_adc.ossmaxfrags < 4)
1857 s->dma_adc.ossmaxfrags = 4;
1859 if (file->f_mode & FMODE_WRITE) {
1860 s->dma_dac.ossfragshift = val & 0xffff;
1861 s->dma_dac.ossmaxfrags = (val >> 16) & 0xffff;
1862 if (s->dma_dac.ossfragshift < 4)
1863 s->dma_dac.ossfragshift = 4;
1864 if (s->dma_dac.ossfragshift > 15)
1865 s->dma_dac.ossfragshift = 15;
1866 if (s->dma_dac.ossmaxfrags < 4)
1867 s->dma_dac.ossmaxfrags = 4;
1869 spin_unlock_irqrestore(&card->lock, flags);
1872 case SNDCTL_DSP_SUBDIVIDE:
1873 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1874 (file->f_mode & FMODE_WRITE && s->dma_dac.subdivision))
1876 get_user_ret(val, p, -EFAULT);
1877 if (val != 1 && val != 2 && val != 4)
1879 if (file->f_mode & FMODE_READ)
1880 s->dma_adc.subdivision = val;
1881 if (file->f_mode & FMODE_WRITE)
1882 s->dma_dac.subdivision = val;
1885 case SOUND_PCM_READ_RATE:
1886 return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, p);
1888 case SOUND_PCM_READ_CHANNELS:
1889 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (ESS_FMT_STEREO << ESS_ADC_SHIFT)
1890 : (ESS_FMT_STEREO << ESS_DAC_SHIFT))) ? 2 : 1, p);
1892 case SOUND_PCM_READ_BITS:
1893 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (ESS_FMT_16BIT << ESS_ADC_SHIFT)
1894 : (ESS_FMT_16BIT << ESS_DAC_SHIFT))) ? 16 : 8, p);
1896 case SOUND_PCM_WRITE_FILTER:
1897 case SNDCTL_DSP_SETSYNCRO:
1898 case SOUND_PCM_READ_FILTER:
1906 allocate_dmabuf(struct pci_dev *pci_dev, struct dmabuf *db)
1910 DPRINTK(DPSTR,"allocating for dmabuf %p\n", db);
1913 * alloc as big a chunk as we can, start with
1914 * 64k 'cause we're insane. based on order cause
1915 * the amazingly complicated prog_dmabuf wants it.
1917 * pci_alloc_sonsistent guarantees that it won't cross a natural
1918 * boundary; the m3 hardware can't have dma cross a 64k bus
1921 for (order = 16-PAGE_SHIFT; order >= 1; order--) {
1922 db->rawbuf = pci_alloc_consistent(pci_dev, PAGE_SIZE << order,
1931 DPRINTK(DPSTR,"allocated %ld (%d) bytes at %p\n",
1932 PAGE_SIZE<<order, order, db->rawbuf);
1935 struct page *page, *pend;
1937 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << order) - 1);
1938 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
1939 SetPageReserved(page);
1943 db->buforder = order;
1951 nuke_lists(struct m3_card *card, struct dmabuf *db)
1953 m3_remove_list(card, &(card->dma_list), db->dma_index);
1954 m3_remove_list(card, &(card->msrc_list), db->msrc_index);
1959 free_dmabuf(struct pci_dev *pci_dev, struct dmabuf *db)
1961 if(db->rawbuf == NULL)
1964 DPRINTK(DPSTR,"freeing %p from dmabuf %p\n",db->rawbuf, db);
1967 struct page *page, *pend;
1968 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
1969 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
1970 ClearPageReserved(page);
1974 pci_free_consistent(pci_dev, PAGE_SIZE << db->buforder,
1975 db->rawbuf, db->handle);
1983 static int m3_open(struct inode *inode, struct file *file)
1985 unsigned int minor = iminor(inode);
1987 struct m3_state *s = NULL;
1989 unsigned char fmtm = ~0, fmts = 0;
1990 unsigned long flags;
1993 * Scan the cards and find the channel. We only
1994 * do this at open time so it is ok
1996 for(c = devs ; c != NULL ; c = c->next) {
1998 for(i=0;i<NR_DSPS;i++) {
2000 if(c->channels[i].dev_audio < 0)
2002 if((c->channels[i].dev_audio ^ minor) & ~0xf)
2005 s = &c->channels[i];
2015 file->private_data = s;
2017 /* wait for device to become free */
2018 mutex_lock(&s->open_mutex);
2019 while (s->open_mode & file->f_mode) {
2020 if (file->f_flags & O_NONBLOCK) {
2021 mutex_unlock(&s->open_mutex);
2022 return -EWOULDBLOCK;
2024 mutex_unlock(&s->open_mutex);
2025 interruptible_sleep_on(&s->open_wait);
2026 if (signal_pending(current))
2027 return -ERESTARTSYS;
2028 mutex_lock(&s->open_mutex);
2031 spin_lock_irqsave(&c->lock, flags);
2033 if (file->f_mode & FMODE_READ) {
2034 fmtm &= ~((ESS_FMT_STEREO | ESS_FMT_16BIT) << ESS_ADC_SHIFT);
2035 if ((minor & 0xf) == SND_DEV_DSP16)
2036 fmts |= ESS_FMT_16BIT << ESS_ADC_SHIFT;
2038 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
2039 set_adc_rate(s, 8000);
2041 if (file->f_mode & FMODE_WRITE) {
2042 fmtm &= ~((ESS_FMT_STEREO | ESS_FMT_16BIT) << ESS_DAC_SHIFT);
2043 if ((minor & 0xf) == SND_DEV_DSP16)
2044 fmts |= ESS_FMT_16BIT << ESS_DAC_SHIFT;
2046 s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags = s->dma_dac.subdivision = 0;
2047 set_dac_rate(s, 8000);
2049 set_fmt(s, fmtm, fmts);
2050 s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
2052 mutex_unlock(&s->open_mutex);
2053 spin_unlock_irqrestore(&c->lock, flags);
2054 return nonseekable_open(inode, file);
2057 static int m3_release(struct inode *inode, struct file *file)
2059 struct m3_state *s = (struct m3_state *)file->private_data;
2060 struct m3_card *card=s->card;
2061 unsigned long flags;
2064 if (file->f_mode & FMODE_WRITE)
2065 drain_dac(s, file->f_flags & O_NONBLOCK);
2067 mutex_lock(&s->open_mutex);
2068 spin_lock_irqsave(&card->lock, flags);
2070 if (file->f_mode & FMODE_WRITE) {
2072 if(s->dma_dac.in_lists) {
2073 m3_remove_list(s->card, &(s->card->mixer_list), s->dma_dac.mixer_index);
2074 nuke_lists(s->card, &(s->dma_dac));
2077 if (file->f_mode & FMODE_READ) {
2079 if(s->dma_adc.in_lists) {
2080 m3_remove_list(s->card, &(s->card->adc1_list), s->dma_adc.adc1_index);
2081 nuke_lists(s->card, &(s->dma_adc));
2085 s->open_mode &= (~file->f_mode) & (FMODE_READ|FMODE_WRITE);
2087 spin_unlock_irqrestore(&card->lock, flags);
2088 mutex_unlock(&s->open_mutex);
2089 wake_up(&s->open_wait);
2095 * Wait for the ac97 serial bus to be free.
2096 * return nonzero if the bus is still busy.
2098 static int m3_ac97_wait(struct m3_card *card)
2102 while( (m3_inb(card, 0x30) & 1) && i--) ;
2107 static u16 m3_ac97_read(struct ac97_codec *codec, u8 reg)
2110 struct m3_card *card = codec->private_data;
2112 spin_lock(&card->ac97_lock);
2114 if(m3_ac97_wait(card)) {
2115 printk(KERN_ERR PFX "serial bus busy reading reg 0x%x\n",reg);
2119 m3_outb(card, 0x80 | (reg & 0x7f), 0x30);
2121 if(m3_ac97_wait(card)) {
2122 printk(KERN_ERR PFX "serial bus busy finishing read reg 0x%x\n",reg);
2126 ret = m3_inw(card, 0x32);
2127 DPRINTK(DPCRAP,"reading 0x%04x from 0x%02x\n",ret, reg);
2130 spin_unlock(&card->ac97_lock);
2134 static void m3_ac97_write(struct ac97_codec *codec, u8 reg, u16 val)
2136 struct m3_card *card = codec->private_data;
2138 spin_lock(&card->ac97_lock);
2140 if(m3_ac97_wait(card)) {
2141 printk(KERN_ERR PFX "serial bus busy writing 0x%x to 0x%x\n",val, reg);
2144 DPRINTK(DPCRAP,"writing 0x%04x to 0x%02x\n", val, reg);
2146 m3_outw(card, val, 0x32);
2147 m3_outb(card, reg & 0x7f, 0x30);
2149 spin_unlock(&card->ac97_lock);
2151 /* OSS /dev/mixer file operation methods */
2152 static int m3_open_mixdev(struct inode *inode, struct file *file)
2154 unsigned int minor = iminor(inode);
2155 struct m3_card *card = devs;
2157 for (card = devs; card != NULL; card = card->next) {
2158 if((card->ac97 != NULL) && (card->ac97->dev_mixer == minor))
2166 file->private_data = card->ac97;
2168 return nonseekable_open(inode, file);
2171 static int m3_release_mixdev(struct inode *inode, struct file *file)
2176 static int m3_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd,
2179 struct ac97_codec *codec = (struct ac97_codec *)file->private_data;
2181 return codec->mixer_ioctl(codec, cmd, arg);
2184 static struct file_operations m3_mixer_fops = {
2185 .owner = THIS_MODULE,
2186 .llseek = no_llseek,
2187 .ioctl = m3_ioctl_mixdev,
2188 .open = m3_open_mixdev,
2189 .release = m3_release_mixdev,
2192 static void remote_codec_config(int io, int isremote)
2194 isremote = isremote ? 1 : 0;
2196 outw( (inw(io + RING_BUS_CTRL_B) & ~SECOND_CODEC_ID_MASK) | isremote,
2197 io + RING_BUS_CTRL_B);
2198 outw( (inw(io + SDO_OUT_DEST_CTRL) & ~COMMAND_ADDR_OUT) | isremote,
2199 io + SDO_OUT_DEST_CTRL);
2200 outw( (inw(io + SDO_IN_DEST_CTRL) & ~STATUS_ADDR_IN) | isremote,
2201 io + SDO_IN_DEST_CTRL);
2205 * hack, returns non zero on err
2207 static int try_read_vendor(struct m3_card *card)
2211 if(m3_ac97_wait(card))
2214 m3_outb(card, 0x80 | (AC97_VENDOR_ID1 & 0x7f), 0x30);
2216 if(m3_ac97_wait(card))
2219 ret = m3_inw(card, 0x32);
2221 return (ret == 0) || (ret == 0xffff);
2224 static void m3_codec_reset(struct m3_card *card, int busywait)
2227 int delay1 = 0, delay2 = 0, i;
2228 int io = card->iobase;
2230 switch (card->card_type) {
2232 * the onboard codec on the allegro seems
2233 * to want to wait a very long time before
2234 * coming back to life
2241 case ESS_MAESTRO3HW:
2247 for(i = 0; i < 5; i ++) {
2248 dir = inw(io + GPIO_DIRECTION);
2249 dir |= 0x10; /* assuming pci bus master? */
2251 remote_codec_config(io, 0);
2253 outw(IO_SRAM_ENABLE, io + RING_BUS_CTRL_A);
2256 outw(dir & ~GPO_PRIMARY_AC97 , io + GPIO_DIRECTION);
2257 outw(~GPO_PRIMARY_AC97 , io + GPIO_MASK);
2258 outw(0, io + GPIO_DATA);
2259 outw(dir | GPO_PRIMARY_AC97, io + GPIO_DIRECTION);
2264 set_current_state(TASK_UNINTERRUPTIBLE);
2265 schedule_timeout((delay1 * HZ) / 1000);
2268 outw(GPO_PRIMARY_AC97, io + GPIO_DATA);
2270 /* ok, bring back the ac-link */
2271 outw(IO_SRAM_ENABLE | SERIAL_AC_LINK_ENABLE, io + RING_BUS_CTRL_A);
2272 outw(~0, io + GPIO_MASK);
2277 set_current_state(TASK_UNINTERRUPTIBLE);
2278 schedule_timeout((delay2 * HZ) / 1000);
2280 if(! try_read_vendor(card))
2286 DPRINTK(DPMOD, "retrying codec reset with delays of %d and %d ms\n",
2291 /* more gung-ho reset that doesn't
2292 * seem to work anywhere :)
2294 tmp = inw(io + RING_BUS_CTRL_A);
2295 outw(RAC_SDFS_ENABLE|LAC_SDFS_ENABLE, io + RING_BUS_CTRL_A);
2297 outw(tmp, io + RING_BUS_CTRL_A);
2302 static int __devinit m3_codec_install(struct m3_card *card)
2304 struct ac97_codec *codec;
2306 if ((codec = ac97_alloc_codec()) == NULL)
2309 codec->private_data = card;
2310 codec->codec_read = m3_ac97_read;
2311 codec->codec_write = m3_ac97_write;
2312 /* someday we should support secondary codecs.. */
2315 if (ac97_probe_codec(codec) == 0) {
2316 printk(KERN_ERR PFX "codec probe failed\n");
2317 ac97_release_codec(codec);
2321 if ((codec->dev_mixer = register_sound_mixer(&m3_mixer_fops, -1)) < 0) {
2322 printk(KERN_ERR PFX "couldn't register mixer!\n");
2323 ac97_release_codec(codec);
2333 #define MINISRC_LPF_LEN 10
2334 static u16 minisrc_lpf[MINISRC_LPF_LEN] = {
2335 0X0743, 0X1104, 0X0A4C, 0XF88D, 0X242C,
2336 0X1023, 0X1AA9, 0X0B60, 0XEFDD, 0X186F
2338 static void m3_assp_init(struct m3_card *card)
2342 /* zero kernel data */
2343 for(i = 0 ; i < (REV_B_DATA_MEMORY_UNIT_LENGTH * NUM_UNITS_KERNEL_DATA) / 2; i++)
2344 m3_assp_write(card, MEMTYPE_INTERNAL_DATA,
2345 KDATA_BASE_ADDR + i, 0);
2347 /* zero mixer data? */
2348 for(i = 0 ; i < (REV_B_DATA_MEMORY_UNIT_LENGTH * NUM_UNITS_KERNEL_DATA) / 2; i++)
2349 m3_assp_write(card, MEMTYPE_INTERNAL_DATA,
2350 KDATA_BASE_ADDR2 + i, 0);
2352 /* init dma pointer */
2353 m3_assp_write(card, MEMTYPE_INTERNAL_DATA,
2357 /* write kernel into code memory.. */
2358 for(i = 0 ; i < sizeof(assp_kernel_image) / 2; i++) {
2359 m3_assp_write(card, MEMTYPE_INTERNAL_CODE,
2360 REV_B_CODE_MEMORY_BEGIN + i,
2361 assp_kernel_image[i]);
2365 * We only have this one client and we know that 0x400
2366 * is free in our kernel's mem map, so lets just
2367 * drop it there. It seems that the minisrc doesn't
2368 * need vectors, so we won't bother with them..
2370 for(i = 0 ; i < sizeof(assp_minisrc_image) / 2; i++) {
2371 m3_assp_write(card, MEMTYPE_INTERNAL_CODE,
2373 assp_minisrc_image[i]);
2377 * write the coefficients for the low pass filter?
2379 for(i = 0; i < MINISRC_LPF_LEN ; i++) {
2380 m3_assp_write(card, MEMTYPE_INTERNAL_CODE,
2381 0x400 + MINISRC_COEF_LOC + i,
2385 m3_assp_write(card, MEMTYPE_INTERNAL_CODE,
2386 0x400 + MINISRC_COEF_LOC + MINISRC_LPF_LEN,
2390 * the minisrc is the only thing on
2393 m3_assp_write(card, MEMTYPE_INTERNAL_DATA,
2398 * init the mixer number..
2401 m3_assp_write(card, MEMTYPE_INTERNAL_DATA,
2402 KDATA_MIXER_TASK_NUMBER,0);
2405 * EXTREME KERNEL MASTER VOLUME
2407 m3_assp_write(card, MEMTYPE_INTERNAL_DATA,
2408 KDATA_DAC_LEFT_VOLUME, ARB_VOLUME);
2409 m3_assp_write(card, MEMTYPE_INTERNAL_DATA,
2410 KDATA_DAC_RIGHT_VOLUME, ARB_VOLUME);
2412 card->mixer_list.mem_addr = KDATA_MIXER_XFER0;
2413 card->mixer_list.max = MAX_VIRTUAL_MIXER_CHANNELS;
2414 card->adc1_list.mem_addr = KDATA_ADC1_XFER0;
2415 card->adc1_list.max = MAX_VIRTUAL_ADC1_CHANNELS;
2416 card->dma_list.mem_addr = KDATA_DMA_XFER0;
2417 card->dma_list.max = MAX_VIRTUAL_DMA_CHANNELS;
2418 card->msrc_list.mem_addr = KDATA_INSTANCE0_MINISRC;
2419 card->msrc_list.max = MAX_INSTANCE_MINISRC;
2422 static int setup_msrc(struct m3_card *card,
2423 struct assp_instance *inst, int index)
2425 int data_bytes = 2 * ( MINISRC_TMP_BUFFER_SIZE / 2 +
2426 MINISRC_IN_BUFFER_SIZE / 2 +
2427 1 + MINISRC_OUT_BUFFER_SIZE / 2 + 1 );
2431 * the revb memory map has 0x1100 through 0x1c00
2436 * align instance address to 256 bytes so that it's
2437 * shifted list address is aligned.
2438 * list address = (mem address >> 1) >> 7;
2440 data_bytes = (data_bytes + 255) & ~255;
2441 address = 0x1100 + ((data_bytes/2) * index);
2443 if((address + (data_bytes/2)) >= 0x1c00) {
2444 printk(KERN_ERR PFX "no memory for %d bytes at ind %d (addr 0x%x)\n",
2445 data_bytes, index, address);
2449 for(i = 0; i < data_bytes/2 ; i++)
2450 m3_assp_write(card, MEMTYPE_INTERNAL_DATA,
2454 inst->data = address;
2459 static int m3_assp_client_init(struct m3_state *s)
2461 setup_msrc(s->card, &(s->dac_inst), s->index * 2);
2462 setup_msrc(s->card, &(s->adc_inst), (s->index * 2) + 1);
2467 static void m3_amp_enable(struct m3_card *card, int enable)
2470 * this works for the reference board, have to find
2473 * this needs more magic for 4 speaker, but..
2475 int io = card->iobase;
2476 u16 gpo, polarity_port, polarity;
2481 if (gpio_pin >= 0 && gpio_pin <= 15) {
2482 polarity_port = 0x1000 + (0x100 * gpio_pin);
2484 switch (card->card_type) {
2486 polarity_port = 0x1800;
2489 polarity_port = 0x1100;
2490 /* Panasonic toughbook CF72 has to be different... */
2491 if(card->pcidev->subsystem_vendor == 0x10F7 && card->pcidev->subsystem_device == 0x833D)
2492 polarity_port = 0x1D00;
2497 gpo = (polarity_port >> 8) & 0x0F;
2498 polarity = polarity_port >> 12;
2500 polarity = !polarity;
2501 polarity = polarity << gpo;
2504 outw(~gpo , io + GPIO_MASK);
2506 outw( inw(io + GPIO_DIRECTION) | gpo ,
2507 io + GPIO_DIRECTION);
2509 outw( (GPO_SECONDARY_AC97 | GPO_PRIMARY_AC97 | polarity) ,
2512 outw(0xffff , io + GPIO_MASK);
2516 maestro_config(struct m3_card *card)
2518 struct pci_dev *pcidev = card->pcidev;
2520 u8 t; /* makes as much sense as 'n', no? */
2522 pci_read_config_dword(pcidev, PCI_ALLEGRO_CONFIG, &n);
2523 n &= REDUCED_DEBOUNCE;
2524 n |= PM_CTRL_ENABLE | CLK_DIV_BY_49 | USE_PCI_TIMING;
2525 pci_write_config_dword(pcidev, PCI_ALLEGRO_CONFIG, n);
2527 outb(RESET_ASSP, card->iobase + ASSP_CONTROL_B);
2528 pci_read_config_dword(pcidev, PCI_ALLEGRO_CONFIG, &n);
2529 n &= ~INT_CLK_SELECT;
2530 if(card->card_type >= ESS_MAESTRO3) {
2531 n &= ~INT_CLK_MULT_ENABLE;
2532 n |= INT_CLK_SRC_NOT_PCI;
2534 n &= ~( CLK_MULT_MODE_SELECT | CLK_MULT_MODE_SELECT_2 );
2535 pci_write_config_dword(pcidev, PCI_ALLEGRO_CONFIG, n);
2537 if(card->card_type <= ESS_ALLEGRO) {
2538 pci_read_config_dword(pcidev, PCI_USER_CONFIG, &n);
2539 n |= IN_CLK_12MHZ_SELECT;
2540 pci_write_config_dword(pcidev, PCI_USER_CONFIG, n);
2543 t = inb(card->iobase + ASSP_CONTROL_A);
2544 t &= ~( DSP_CLK_36MHZ_SELECT | ASSP_CLK_49MHZ_SELECT);
2545 t |= ASSP_CLK_49MHZ_SELECT;
2546 t |= ASSP_0_WS_ENABLE;
2547 outb(t, card->iobase + ASSP_CONTROL_A);
2549 outb(RUN_ASSP, card->iobase + ASSP_CONTROL_B);
2554 static void m3_enable_ints(struct m3_card *card)
2556 unsigned long io = card->iobase;
2558 outw(ASSP_INT_ENABLE, io + HOST_INT_CTRL);
2559 outb(inb(io + ASSP_CONTROL_C) | ASSP_HOST_INT_ENABLE,
2560 io + ASSP_CONTROL_C);
2563 static struct file_operations m3_audio_fops = {
2564 .owner = THIS_MODULE,
2565 .llseek = no_llseek,
2572 .release = m3_release,
2576 static int alloc_dsp_suspendmem(struct m3_card *card)
2578 int len = sizeof(u16) * (REV_B_CODE_MEMORY_LENGTH + REV_B_DATA_MEMORY_LENGTH);
2580 if( (card->suspend_mem = vmalloc(len)) == NULL)
2585 static void free_dsp_suspendmem(struct m3_card *card)
2587 if(card->suspend_mem)
2588 vfree(card->suspend_mem);
2592 #define alloc_dsp_suspendmem(args...) 0
2593 #define free_dsp_suspendmem(args...)
2597 * great day! this function is ugly as hell.
2599 static int __devinit m3_probe(struct pci_dev *pci_dev, const struct pci_device_id *pci_id)
2603 struct m3_card *card = NULL;
2605 int card_type = pci_id->driver_data;
2607 DPRINTK(DPMOD, "in maestro_install\n");
2609 if (pci_enable_device(pci_dev))
2612 if (pci_set_dma_mask(pci_dev, M3_PCI_DMA_MASK)) {
2613 printk(KERN_ERR PFX "architecture does not support limiting to 28bit PCI bus addresses\n");
2617 pci_set_master(pci_dev);
2619 if( (card = kmalloc(sizeof(struct m3_card), GFP_KERNEL)) == NULL) {
2620 printk(KERN_WARNING PFX "out of memory\n");
2623 memset(card, 0, sizeof(struct m3_card));
2624 card->pcidev = pci_dev;
2625 init_waitqueue_head(&card->suspend_queue);
2627 if ( ! request_region(pci_resource_start(pci_dev, 0),
2628 pci_resource_len (pci_dev, 0), M3_MODULE_NAME)) {
2630 printk(KERN_WARNING PFX "unable to reserve I/O space.\n");
2635 card->iobase = pci_resource_start(pci_dev, 0);
2637 if(alloc_dsp_suspendmem(card)) {
2638 printk(KERN_WARNING PFX "couldn't alloc %d bytes for saving dsp state on suspend\n",
2639 REV_B_CODE_MEMORY_LENGTH + REV_B_DATA_MEMORY_LENGTH);
2644 card->card_type = card_type;
2645 card->irq = pci_dev->irq;
2647 card->magic = M3_CARD_MAGIC;
2648 spin_lock_init(&card->lock);
2649 spin_lock_init(&card->ac97_lock);
2651 for(i = 0; i<NR_DSPS; i++) {
2652 struct m3_state *s = &(card->channels[i]);
2656 printk(KERN_INFO PFX "Configuring ESS %s found at IO 0x%04X IRQ %d\n",
2657 card_names[card->card_type], card->iobase, card->irq);
2659 pci_read_config_dword(pci_dev, PCI_SUBSYSTEM_VENDOR_ID, &n);
2660 printk(KERN_INFO PFX " subvendor id: 0x%08x\n",n);
2662 maestro_config(card);
2665 m3_codec_reset(card, 0);
2667 if(m3_codec_install(card)) {
2673 m3_amp_enable(card, 1);
2675 for(i=0;i<NR_DSPS;i++) {
2676 struct m3_state *s=&card->channels[i];
2681 init_waitqueue_head(&s->dma_adc.wait);
2682 init_waitqueue_head(&s->dma_dac.wait);
2683 init_waitqueue_head(&s->open_wait);
2684 mutex_init(&(s->open_mutex));
2685 s->magic = M3_STATE_MAGIC;
2687 m3_assp_client_init(s);
2689 if(s->dma_adc.ready || s->dma_dac.ready || s->dma_adc.rawbuf)
2690 printk(KERN_WARNING PFX "initing a dsp device that is already in use?\n");
2691 /* register devices */
2692 if ((s->dev_audio = register_sound_dsp(&m3_audio_fops, -1)) < 0) {
2696 if( allocate_dmabuf(card->pcidev, &(s->dma_adc)) ||
2697 allocate_dmabuf(card->pcidev, &(s->dma_dac))) {
2703 if(request_irq(card->irq, m3_interrupt, SA_SHIRQ, card_names[card->card_type], card)) {
2705 printk(KERN_ERR PFX "unable to allocate irq %d,\n", card->irq);
2711 pci_set_drvdata(pci_dev, card);
2713 m3_enable_ints(card);
2714 m3_assp_continue(card);
2719 release_region(pci_resource_start(pci_dev, 0), pci_resource_len(pci_dev, 0));
2720 free_dsp_suspendmem(card);
2722 unregister_sound_mixer(card->ac97->dev_mixer);
2725 for(i=0;i<NR_DSPS;i++)
2727 struct m3_state *s = &card->channels[i];
2728 if(s->dev_audio != -1)
2729 unregister_sound_dsp(s->dev_audio);
2737 static void m3_remove(struct pci_dev *pci_dev)
2739 struct m3_card *card;
2741 unregister_reboot_notifier(&m3_reboot_nb);
2743 while ((card = devs)) {
2747 free_irq(card->irq, card);
2748 unregister_sound_mixer(card->ac97->dev_mixer);
2751 for(i=0;i<NR_DSPS;i++)
2753 struct m3_state *s = &card->channels[i];
2754 if(s->dev_audio < 0)
2757 unregister_sound_dsp(s->dev_audio);
2758 free_dmabuf(card->pcidev, &s->dma_adc);
2759 free_dmabuf(card->pcidev, &s->dma_dac);
2762 release_region(card->iobase, 256);
2763 free_dsp_suspendmem(card);
2770 * some bioses like the sound chip to be powered down
2771 * at shutdown. We're just calling _suspend to
2774 static int m3_notifier(struct notifier_block *nb, unsigned long event, void *buf)
2776 struct m3_card *card;
2778 DPRINTK(DPMOD, "notifier suspending all cards\n");
2780 for(card = devs; card != NULL; card = card->next) {
2781 if(!card->in_suspend)
2782 m3_suspend(card->pcidev, PMSG_SUSPEND); /* XXX legal? */
2787 static int m3_suspend(struct pci_dev *pci_dev, pm_message_t state)
2789 unsigned long flags;
2791 struct m3_card *card = pci_get_drvdata(pci_dev);
2793 /* must be a better way.. */
2794 spin_lock_irqsave(&card->lock, flags);
2796 DPRINTK(DPMOD, "pm in dev %p\n",card);
2798 for(i=0;i<NR_DSPS;i++) {
2799 struct m3_state *s = &card->channels[i];
2801 if(s->dev_audio == -1)
2804 DPRINTK(DPMOD, "stop_adc/dac() device %d\n",i);
2809 mdelay(10); /* give the assp a chance to idle.. */
2813 if(card->suspend_mem) {
2816 DPRINTK(DPMOD, "saving code\n");
2817 for(i = REV_B_CODE_MEMORY_BEGIN ; i <= REV_B_CODE_MEMORY_END; i++)
2818 card->suspend_mem[index++] =
2819 m3_assp_read(card, MEMTYPE_INTERNAL_CODE, i);
2820 DPRINTK(DPMOD, "saving data\n");
2821 for(i = REV_B_DATA_MEMORY_BEGIN ; i <= REV_B_DATA_MEMORY_END; i++)
2822 card->suspend_mem[index++] =
2823 m3_assp_read(card, MEMTYPE_INTERNAL_DATA, i);
2826 DPRINTK(DPMOD, "powering down apci regs\n");
2827 m3_outw(card, 0xffff, 0x54);
2828 m3_outw(card, 0xffff, 0x56);
2830 card->in_suspend = 1;
2832 spin_unlock_irqrestore(&card->lock, flags);
2837 static int m3_resume(struct pci_dev *pci_dev)
2839 unsigned long flags;
2842 struct m3_card *card = pci_get_drvdata(pci_dev);
2844 spin_lock_irqsave(&card->lock, flags);
2845 card->in_suspend = 0;
2847 DPRINTK(DPMOD, "resuming\n");
2849 /* first lets just bring everything back. .*/
2851 DPRINTK(DPMOD, "bringing power back on card 0x%p\n",card);
2852 m3_outw(card, 0, 0x54);
2853 m3_outw(card, 0, 0x56);
2855 DPRINTK(DPMOD, "restoring pci configs and reseting codec\n");
2856 maestro_config(card);
2858 m3_codec_reset(card, 1);
2860 DPRINTK(DPMOD, "restoring dsp code card\n");
2862 for(i = REV_B_CODE_MEMORY_BEGIN ; i <= REV_B_CODE_MEMORY_END; i++)
2863 m3_assp_write(card, MEMTYPE_INTERNAL_CODE, i,
2864 card->suspend_mem[index++]);
2865 for(i = REV_B_DATA_MEMORY_BEGIN ; i <= REV_B_DATA_MEMORY_END; i++)
2866 m3_assp_write(card, MEMTYPE_INTERNAL_DATA, i,
2867 card->suspend_mem[index++]);
2869 /* tell the dma engine to restart itself */
2870 m3_assp_write(card, MEMTYPE_INTERNAL_DATA,
2871 KDATA_DMA_ACTIVE, 0);
2873 DPRINTK(DPMOD, "resuming dsp\n");
2874 m3_assp_continue(card);
2876 DPRINTK(DPMOD, "enabling ints\n");
2877 m3_enable_ints(card);
2879 /* bring back the old school flavor */
2880 for(i = 0; i < SOUND_MIXER_NRDEVICES ; i++) {
2881 int state = card->ac97->mixer_state[i];
2882 if (!supported_mixer(card->ac97, i))
2885 card->ac97->write_mixer(card->ac97, i,
2886 state & 0xff, (state >> 8) & 0xff);
2889 m3_amp_enable(card, 1);
2892 * now we flip on the music
2894 for(i=0;i<NR_DSPS;i++) {
2895 struct m3_state *s = &card->channels[i];
2896 if(s->dev_audio == -1)
2899 * db->ready makes it so these guys can be
2900 * called unconditionally..
2902 DPRINTK(DPMOD, "turning on dacs ind %d\n",i);
2907 spin_unlock_irqrestore(&card->lock, flags);
2910 * all right, we think things are ready,
2911 * wake up people who were using the device
2914 wake_up(&card->suspend_queue);
2919 MODULE_AUTHOR("Zach Brown <zab@zabbo.net>");
2920 MODULE_DESCRIPTION("ESS Maestro3/Allegro Driver");
2921 MODULE_LICENSE("GPL");
2924 module_param(debug, int, 0);
2926 module_param(external_amp, int, 0);
2927 module_param(gpio_pin, int, 0);
2929 static struct pci_driver m3_pci_driver = {
2930 .name = "ess_m3_audio",
2931 .id_table = m3_id_table,
2933 .remove = m3_remove,
2934 .suspend = m3_suspend,
2935 .resume = m3_resume,
2938 static int __init m3_init_module(void)
2940 printk(KERN_INFO PFX "version " DRIVER_VERSION " built at " __TIME__ " " __DATE__ "\n");
2942 if (register_reboot_notifier(&m3_reboot_nb)) {
2943 printk(KERN_WARNING PFX "reboot notifier registration failed\n");
2944 return -ENODEV; /* ? */
2947 if (pci_register_driver(&m3_pci_driver)) {
2948 unregister_reboot_notifier(&m3_reboot_nb);
2954 static void __exit m3_cleanup_module(void)
2956 pci_unregister_driver(&m3_pci_driver);
2959 module_init(m3_init_module);
2960 module_exit(m3_cleanup_module);
2962 void check_suspend(struct m3_card *card)
2964 DECLARE_WAITQUEUE(wait, current);
2966 if(!card->in_suspend)
2970 add_wait_queue(&card->suspend_queue, &wait);
2971 set_current_state(TASK_UNINTERRUPTIBLE);
2973 remove_wait_queue(&card->suspend_queue, &wait);
2974 set_current_state(TASK_RUNNING);