1 # ==========================================================================
3 # ==========================================================================
10 # Init all relevant variables used in kbuild files so
11 # 1) they have correct type
12 # 2) they do not inherit any value from the environment
30 # Read auto.conf if it exists, otherwise ignore
31 -include include/config/auto.conf
33 include scripts/Kbuild.include
35 # For backward compatibility check that these variables do not change
36 save-cflags := $(CFLAGS)
38 # The filename Kbuild has precedence over Makefile
39 kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
40 kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
41 include $(kbuild-file)
43 # If the save-* variables changed error out
44 ifeq ($(KBUILD_NOPEDANTIC),)
45 ifneq ("$(save-cflags)","$(CFLAGS)")
46 $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use EXTRA_CFLAGS)
49 include scripts/Makefile.lib
52 ifneq ($(hostprogs-y),$(host-progs))
53 $(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
54 hostprogs-y += $(host-progs)
58 # Do not include host rules unless needed
59 ifneq ($(hostprogs-y)$(hostprogs-m),)
60 include scripts/Makefile.host
63 ifneq ($(KBUILD_SRC),)
64 # Create output directory if not already present
65 _dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
67 # Create directories for object files if directory does not exist
68 # Needed when obj-y := dir/file.o syntax is used
69 _dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
73 $(warning kbuild: Makefile.build is included improperly)
76 # ===========================================================================
78 ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
79 lib-target := $(obj)/lib.a
82 ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),)
83 builtin-target := $(obj)/built-in.o
86 modorder-target := $(obj)/modules.order
88 # We keep a list of all modules in $(MODVERDIR)
90 __build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
91 $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
92 $(subdir-ym) $(always)
95 # Linus' kernel sanity checking tool
96 ifneq ($(KBUILD_CHECKSRC),0)
97 ifeq ($(KBUILD_CHECKSRC),2)
98 quiet_cmd_force_checksrc = CHECK $<
99 cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
101 quiet_cmd_checksrc = CHECK $<
102 cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
106 # Do section mismatch analysis for each module/built-in.o
107 ifdef CONFIG_DEBUG_SECTION_MISMATCH
108 cmd_secanalysis = ; scripts/mod/modpost $@
111 # Compile C sources (.c)
112 # ---------------------------------------------------------------------------
114 # Default is built-in, unless we know otherwise
115 modkern_cflags := $(CFLAGS_KERNEL)
116 quiet_modtag := $(empty) $(empty)
118 $(real-objs-m) : modkern_cflags := $(CFLAGS_MODULE)
119 $(real-objs-m:.o=.i) : modkern_cflags := $(CFLAGS_MODULE)
120 $(real-objs-m:.o=.s) : modkern_cflags := $(CFLAGS_MODULE)
121 $(real-objs-m:.o=.lst): modkern_cflags := $(CFLAGS_MODULE)
123 $(real-objs-m) : quiet_modtag := [M]
124 $(real-objs-m:.o=.i) : quiet_modtag := [M]
125 $(real-objs-m:.o=.s) : quiet_modtag := [M]
126 $(real-objs-m:.o=.lst): quiet_modtag := [M]
128 $(obj-m) : quiet_modtag := [M]
130 # Default for not multi-part modules
131 modname = $(basetarget)
133 $(multi-objs-m) : modname = $(modname-multi)
134 $(multi-objs-m:.o=.i) : modname = $(modname-multi)
135 $(multi-objs-m:.o=.s) : modname = $(modname-multi)
136 $(multi-objs-m:.o=.lst) : modname = $(modname-multi)
137 $(multi-objs-y) : modname = $(modname-multi)
138 $(multi-objs-y:.o=.i) : modname = $(modname-multi)
139 $(multi-objs-y:.o=.s) : modname = $(modname-multi)
140 $(multi-objs-y:.o=.lst) : modname = $(modname-multi)
142 quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
143 cmd_cc_s_c = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<
145 $(obj)/%.s: $(src)/%.c FORCE
146 $(call if_changed_dep,cc_s_c)
148 quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
149 cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
151 $(obj)/%.i: $(src)/%.c FORCE
152 $(call if_changed_dep,cc_i_c)
154 quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
155 cmd_cc_symtypes_c = \
157 $(CPP) -D__GENKSYMS__ $(c_flags) $< \
158 | $(GENKSYMS) -T $@ \
159 -r $(firstword $(wildcard \
160 $(@:.symtypes=.symref) /dev/null)) \
161 $(if $(KBUILD_PRESERVE),-p) \
164 test -s $@ || rm -f $@
166 $(obj)/%.symtypes : $(src)/%.c FORCE
167 $(call cmd,cc_symtypes_c)
170 # The C file is compiled and updated dependency information is generated.
171 # (See cmd_cc_o_c + relevant part of rule_cc_o_c)
173 quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
175 ifndef CONFIG_MODVERSIONS
176 cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
179 # When module versioning is enabled the following steps are executed:
180 # o compile a .tmp_<file>.o from <file>.c
181 # o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
182 # not export symbols, we just rename .tmp_<file>.o to <file>.o and
184 # o otherwise, we calculate symbol versions using the good old
185 # genksyms on the preprocessed source and postprocess them in a way
186 # that they are usable as a linker script
187 # o generate <file>.o from .tmp_<file>.o using the linker to
188 # replace the unresolved symbols __crc_exported_symbol with
189 # the actual value of the checksum generated by genksyms
191 cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
193 if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
194 $(CPP) -D__GENKSYMS__ $(c_flags) $< \
195 | $(GENKSYMS) $(if $(KBUILD_SYMTYPES), \
196 -T $(@:.o=.symtypes)) \
197 -r $(firstword $(wildcard \
198 $(@:.o=.symref) /dev/null)) \
199 $(if $(KBUILD_PRESERVE),-p) \
201 > $(@D)/.tmp_$(@F:.o=.ver); \
203 $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
204 -T $(@D)/.tmp_$(@F:.o=.ver); \
205 rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
207 mv -f $(@D)/.tmp_$(@F) $@; \
217 ifdef CONFIG_FTRACE_MCOUNT_RECORD
218 cmd_record_mcount = perl $(srctree)/scripts/recordmcount.pl \
219 "$(ARCH)" "$(arch_bits)" "$(OBJDUMP)" "$(OBJCOPY)" "$(CC)" "$(LD)" \
220 "$(NM)" "$(RM)" "$(MV)" "$(@)";
224 $(call echo-cmd,checksrc) $(cmd_checksrc) \
225 $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
227 $(cmd_record_mcount) \
228 scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \
231 mv -f $(dot-target).tmp $(dot-target).cmd
234 # Built-in and composite module parts
235 $(obj)/%.o: $(src)/%.c FORCE
236 $(call cmd,force_checksrc)
237 $(call if_changed_rule,cc_o_c)
239 # Single-part modules are special since we need to mark them in $(MODVERDIR)
241 $(single-used-m): $(obj)/%.o: $(src)/%.c FORCE
242 $(call cmd,force_checksrc)
243 $(call if_changed_rule,cc_o_c)
244 @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
246 quiet_cmd_cc_lst_c = MKLST $@
247 cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
248 $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
249 System.map $(OBJDUMP) > $@
251 $(obj)/%.lst: $(src)/%.c FORCE
252 $(call if_changed_dep,cc_lst_c)
254 # Compile assembler sources (.S)
255 # ---------------------------------------------------------------------------
257 modkern_aflags := $(AFLAGS_KERNEL)
259 $(real-objs-m) : modkern_aflags := $(AFLAGS_MODULE)
260 $(real-objs-m:.o=.s): modkern_aflags := $(AFLAGS_MODULE)
262 quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
263 cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
265 $(obj)/%.s: $(src)/%.S FORCE
266 $(call if_changed_dep,as_s_S)
268 quiet_cmd_as_o_S = AS $(quiet_modtag) $@
269 cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
271 $(obj)/%.o: $(src)/%.S FORCE
272 $(call if_changed_dep,as_o_S)
274 targets += $(real-objs-y) $(real-objs-m) $(lib-y)
275 targets += $(extra-y) $(MAKECMDGOALS) $(always)
277 # Linker scripts preprocessor (.lds.S -> .lds)
278 # ---------------------------------------------------------------------------
279 quiet_cmd_cpp_lds_S = LDS $@
280 cmd_cpp_lds_S = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -o $@ $<
282 $(obj)/%.lds: $(src)/%.lds.S FORCE
283 $(call if_changed_dep,cpp_lds_S)
285 # Build the compiled-in targets
286 # ---------------------------------------------------------------------------
288 # To build objects in subdirs, we need to descend into the directories
289 $(sort $(subdir-obj-y)): $(subdir-ym) ;
292 # Rule to compile a set of .o files into one .o file
295 quiet_cmd_link_o_target = LD $@
296 # If the list of objects to link is empty, just create an empty built-in.o
297 cmd_link_o_target = $(if $(strip $(obj-y)),\
298 $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
300 rm -f $@; $(AR) rcs $@)
302 $(builtin-target): $(obj-y) FORCE
303 $(call if_changed,link_o_target)
305 targets += $(builtin-target)
306 endif # builtin-target
309 # Rule to create modules.order file
311 # Create commands to either record .ko file or cat modules.order from
314 $(foreach m, $(modorder), \
315 $(if $(filter %/modules.order, $m), \
316 cat $m;, echo kernel/$m;))
318 $(modorder-target): $(subdir-ym) FORCE
319 $(Q)(cat /dev/null; $(modorder-cmds)) > $@
322 # Rule to compile a set of .o files into one .a file
325 quiet_cmd_link_l_target = AR $@
326 cmd_link_l_target = rm -f $@; $(AR) rcs $@ $(lib-y)
328 $(lib-target): $(lib-y) FORCE
329 $(call if_changed,link_l_target)
331 targets += $(lib-target)
335 # Rule to link composite objects
337 # Composite objects are specified in kbuild makefile as follows:
338 # <composite-object>-objs := <list of .o files>
340 # <composite-object>-y := <list of .o files>
342 $(filter $(addprefix $(obj)/, \
343 $($(subst $(obj)/,,$(@:.o=-objs))) \
344 $($(subst $(obj)/,,$(@:.o=-y)))), $^)
346 quiet_cmd_link_multi-y = LD $@
347 cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
349 quiet_cmd_link_multi-m = LD [M] $@
350 cmd_link_multi-m = $(cmd_link_multi-y)
352 # We would rather have a list of rules like
354 # but that's not so easy, so we rather make all composite objects depend
355 # on the set of all their parts
356 $(multi-used-y) : %.o: $(multi-objs-y) FORCE
357 $(call if_changed,link_multi-y)
359 $(multi-used-m) : %.o: $(multi-objs-m) FORCE
360 $(call if_changed,link_multi-m)
361 @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
363 targets += $(multi-used-y) $(multi-used-m)
367 # ---------------------------------------------------------------------------
369 PHONY += $(subdir-ym)
371 $(Q)$(MAKE) $(build)=$@
373 # Add FORCE to the prequisites of a target to force it to be always rebuilt.
374 # ---------------------------------------------------------------------------
380 # Read all saved command lines and dependencies for the $(targets) we
381 # may be building above, using $(if_changed{,_dep}). As an
382 # optimization, we don't need to read them if the target does not
383 # exist, we will rebuild anyway in that case.
385 targets := $(wildcard $(sort $(targets)))
386 cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
388 ifneq ($(cmd_files),)
393 # Declare the contents of the .PHONY variable as phony. We keep that
394 # information in a variable se we can use it in if_changed and friends.