2 * Dynamic DMA mapping support.
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
17 * 08/12/11 beckyb Add highmem support
20 #include <linux/cache.h>
21 #include <linux/dma-mapping.h>
23 #include <linux/module.h>
24 #include <linux/spinlock.h>
25 #include <linux/string.h>
26 #include <linux/swiotlb.h>
27 #include <linux/pfn.h>
28 #include <linux/types.h>
29 #include <linux/ctype.h>
30 #include <linux/highmem.h>
34 #include <asm/scatterlist.h>
36 #include <linux/init.h>
37 #include <linux/bootmem.h>
38 #include <linux/iommu-helper.h>
40 #define OFFSET(val,align) ((unsigned long) \
41 ( (val) & ( (align) - 1)))
43 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
46 * Minimum IO TLB size to bother booting with. Systems with mainly
47 * 64bit capable cards will only lightly use the swiotlb. If we can't
48 * allocate a contiguous 1MB, we're probably in trouble anyway.
50 #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
53 * Enumeration for sync targets
55 enum dma_sync_target {
63 * Used to do a quick range check in swiotlb_unmap_single and
64 * swiotlb_sync_single_*, to see if the memory was in fact allocated by this
67 static char *io_tlb_start, *io_tlb_end;
70 * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
71 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
73 static unsigned long io_tlb_nslabs;
76 * When the IOMMU overflows we return a fallback buffer. This sets the size.
78 static unsigned long io_tlb_overflow = 32*1024;
80 void *io_tlb_overflow_buffer;
83 * This is a free list describing the number of free entries available from
86 static unsigned int *io_tlb_list;
87 static unsigned int io_tlb_index;
90 * We need to save away the original address corresponding to a mapped entry
91 * for the sync operations.
93 static phys_addr_t *io_tlb_orig_addr;
96 * Protect the above data structures in the map and unmap calls
98 static DEFINE_SPINLOCK(io_tlb_lock);
101 setup_io_tlb_npages(char *str)
104 io_tlb_nslabs = simple_strtoul(str, &str, 0);
105 /* avoid tail segment of size < IO_TLB_SEGSIZE */
106 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
110 if (!strcmp(str, "force"))
114 __setup("swiotlb=", setup_io_tlb_npages);
115 /* make io_tlb_overflow tunable too? */
117 void * __weak __init swiotlb_alloc_boot(size_t size, unsigned long nslabs)
119 return alloc_bootmem_low_pages(size);
122 void * __weak swiotlb_alloc(unsigned order, unsigned long nslabs)
124 return (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, order);
127 dma_addr_t __weak swiotlb_phys_to_bus(struct device *hwdev, phys_addr_t paddr)
132 phys_addr_t __weak swiotlb_bus_to_phys(dma_addr_t baddr)
137 static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
138 volatile void *address)
140 return swiotlb_phys_to_bus(hwdev, virt_to_phys(address));
143 static void *swiotlb_bus_to_virt(dma_addr_t address)
145 return phys_to_virt(swiotlb_bus_to_phys(address));
148 int __weak swiotlb_arch_range_needs_mapping(void *ptr, size_t size)
153 static void swiotlb_print_info(unsigned long bytes)
155 phys_addr_t pstart, pend;
157 pstart = virt_to_phys(io_tlb_start);
158 pend = virt_to_phys(io_tlb_end);
160 printk(KERN_INFO "Placing %luMB software IO TLB between %p - %p\n",
161 bytes >> 20, io_tlb_start, io_tlb_end);
162 printk(KERN_INFO "software IO TLB at phys %#llx - %#llx\n",
163 (unsigned long long)pstart,
164 (unsigned long long)pend);
168 * Statically reserve bounce buffer space and initialize bounce buffer data
169 * structures for the software IO TLB used to implement the DMA API.
172 swiotlb_init_with_default_size(size_t default_size)
174 unsigned long i, bytes;
176 if (!io_tlb_nslabs) {
177 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
178 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
181 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
184 * Get IO TLB memory from the low pages
186 io_tlb_start = swiotlb_alloc_boot(bytes, io_tlb_nslabs);
188 panic("Cannot allocate SWIOTLB buffer");
189 io_tlb_end = io_tlb_start + bytes;
192 * Allocate and initialize the free list array. This array is used
193 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
194 * between io_tlb_start and io_tlb_end.
196 io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
197 for (i = 0; i < io_tlb_nslabs; i++)
198 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
200 io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(phys_addr_t));
203 * Get the overflow emergency buffer
205 io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
206 if (!io_tlb_overflow_buffer)
207 panic("Cannot allocate SWIOTLB overflow buffer!\n");
209 swiotlb_print_info(bytes);
215 swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
219 * Systems with larger DMA zones (those that don't support ISA) can
220 * initialize the swiotlb later using the slab allocator if needed.
221 * This should be just like above, but with some error catching.
224 swiotlb_late_init_with_default_size(size_t default_size)
226 unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
229 if (!io_tlb_nslabs) {
230 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
231 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
235 * Get IO TLB memory from the low pages
237 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
238 io_tlb_nslabs = SLABS_PER_PAGE << order;
239 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
241 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
242 io_tlb_start = swiotlb_alloc(order, io_tlb_nslabs);
251 if (order != get_order(bytes)) {
252 printk(KERN_WARNING "Warning: only able to allocate %ld MB "
253 "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
254 io_tlb_nslabs = SLABS_PER_PAGE << order;
255 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
257 io_tlb_end = io_tlb_start + bytes;
258 memset(io_tlb_start, 0, bytes);
261 * Allocate and initialize the free list array. This array is used
262 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
263 * between io_tlb_start and io_tlb_end.
265 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
266 get_order(io_tlb_nslabs * sizeof(int)));
270 for (i = 0; i < io_tlb_nslabs; i++)
271 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
274 io_tlb_orig_addr = (phys_addr_t *)
275 __get_free_pages(GFP_KERNEL,
276 get_order(io_tlb_nslabs *
277 sizeof(phys_addr_t)));
278 if (!io_tlb_orig_addr)
281 memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t));
284 * Get the overflow emergency buffer
286 io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
287 get_order(io_tlb_overflow));
288 if (!io_tlb_overflow_buffer)
291 swiotlb_print_info(bytes);
296 free_pages((unsigned long)io_tlb_orig_addr,
297 get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
298 io_tlb_orig_addr = NULL;
300 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
305 free_pages((unsigned long)io_tlb_start, order);
308 io_tlb_nslabs = req_nslabs;
313 address_needs_mapping(struct device *hwdev, dma_addr_t addr, size_t size)
315 return !is_buffer_dma_capable(dma_get_mask(hwdev), addr, size);
318 static inline int range_needs_mapping(void *ptr, size_t size)
320 return swiotlb_force || swiotlb_arch_range_needs_mapping(ptr, size);
323 static int is_swiotlb_buffer(char *addr)
325 return addr >= io_tlb_start && addr < io_tlb_end;
329 * Bounce: copy the swiotlb buffer back to the original dma location
331 static void swiotlb_bounce(phys_addr_t phys, char *dma_addr, size_t size,
332 enum dma_data_direction dir)
334 unsigned long pfn = PFN_DOWN(phys);
336 if (PageHighMem(pfn_to_page(pfn))) {
337 /* The buffer does not have a mapping. Map it in and copy */
338 unsigned int offset = phys & ~PAGE_MASK;
344 sz = min(PAGE_SIZE - offset, size);
346 local_irq_save(flags);
347 buffer = kmap_atomic(pfn_to_page(pfn),
349 if (dir == DMA_TO_DEVICE)
350 memcpy(dma_addr, buffer + offset, sz);
352 memcpy(buffer + offset, dma_addr, sz);
353 kunmap_atomic(buffer, KM_BOUNCE_READ);
354 local_irq_restore(flags);
362 if (dir == DMA_TO_DEVICE)
363 memcpy(dma_addr, phys_to_virt(phys), size);
365 memcpy(phys_to_virt(phys), dma_addr, size);
370 * Allocates bounce buffer and returns its kernel virtual address.
373 map_single(struct device *hwdev, phys_addr_t phys, size_t size, int dir)
377 unsigned int nslots, stride, index, wrap;
379 unsigned long start_dma_addr;
381 unsigned long offset_slots;
382 unsigned long max_slots;
384 mask = dma_get_seg_boundary(hwdev);
385 start_dma_addr = swiotlb_virt_to_bus(hwdev, io_tlb_start) & mask;
387 offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
390 * Carefully handle integer overflow which can occur when mask == ~0UL.
393 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
394 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
397 * For mappings greater than a page, we limit the stride (and
398 * hence alignment) to a page size.
400 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
401 if (size > PAGE_SIZE)
402 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
409 * Find suitable number of IO TLB entries size that will fit this
410 * request and allocate a buffer from that IO TLB pool.
412 spin_lock_irqsave(&io_tlb_lock, flags);
413 index = ALIGN(io_tlb_index, stride);
414 if (index >= io_tlb_nslabs)
419 while (iommu_is_span_boundary(index, nslots, offset_slots,
422 if (index >= io_tlb_nslabs)
429 * If we find a slot that indicates we have 'nslots' number of
430 * contiguous buffers, we allocate the buffers from that slot
431 * and mark the entries as '0' indicating unavailable.
433 if (io_tlb_list[index] >= nslots) {
436 for (i = index; i < (int) (index + nslots); i++)
438 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
439 io_tlb_list[i] = ++count;
440 dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
443 * Update the indices to avoid searching in the next
446 io_tlb_index = ((index + nslots) < io_tlb_nslabs
447 ? (index + nslots) : 0);
452 if (index >= io_tlb_nslabs)
454 } while (index != wrap);
457 spin_unlock_irqrestore(&io_tlb_lock, flags);
460 spin_unlock_irqrestore(&io_tlb_lock, flags);
463 * Save away the mapping from the original address to the DMA address.
464 * This is needed when we sync the memory. Then we sync the buffer if
467 for (i = 0; i < nslots; i++)
468 io_tlb_orig_addr[index+i] = phys + (i << IO_TLB_SHIFT);
469 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
470 swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
476 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
479 unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
482 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
483 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
484 phys_addr_t phys = io_tlb_orig_addr[index];
487 * First, sync the memory before unmapping the entry
489 if (phys && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
490 swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
493 * Return the buffer to the free list by setting the corresponding
494 * entries to indicate the number of contigous entries available.
495 * While returning the entries to the free list, we merge the entries
496 * with slots below and above the pool being returned.
498 spin_lock_irqsave(&io_tlb_lock, flags);
500 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
501 io_tlb_list[index + nslots] : 0);
503 * Step 1: return the slots to the free list, merging the
504 * slots with superceeding slots
506 for (i = index + nslots - 1; i >= index; i--)
507 io_tlb_list[i] = ++count;
509 * Step 2: merge the returned slots with the preceding slots,
510 * if available (non zero)
512 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
513 io_tlb_list[i] = ++count;
515 spin_unlock_irqrestore(&io_tlb_lock, flags);
519 sync_single(struct device *hwdev, char *dma_addr, size_t size,
522 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
523 phys_addr_t phys = io_tlb_orig_addr[index];
525 phys += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1));
529 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
530 swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
532 BUG_ON(dir != DMA_TO_DEVICE);
534 case SYNC_FOR_DEVICE:
535 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
536 swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
538 BUG_ON(dir != DMA_FROM_DEVICE);
546 swiotlb_alloc_coherent(struct device *hwdev, size_t size,
547 dma_addr_t *dma_handle, gfp_t flags)
551 int order = get_order(size);
552 u64 dma_mask = DMA_32BIT_MASK;
554 if (hwdev && hwdev->coherent_dma_mask)
555 dma_mask = hwdev->coherent_dma_mask;
557 ret = (void *)__get_free_pages(flags, order);
559 !is_buffer_dma_capable(dma_mask, swiotlb_virt_to_bus(hwdev, ret),
562 * The allocated memory isn't reachable by the device.
563 * Fall back on swiotlb_map_single().
565 free_pages((unsigned long) ret, order);
570 * We are either out of memory or the device can't DMA
571 * to GFP_DMA memory; fall back on
572 * swiotlb_map_single(), which will grab memory from
573 * the lowest available address range.
575 ret = map_single(hwdev, 0, size, DMA_FROM_DEVICE);
580 memset(ret, 0, size);
581 dev_addr = swiotlb_virt_to_bus(hwdev, ret);
583 /* Confirm address can be DMA'd by device */
584 if (!is_buffer_dma_capable(dma_mask, dev_addr, size)) {
585 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
586 (unsigned long long)dma_mask,
587 (unsigned long long)dev_addr);
589 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
590 unmap_single(hwdev, ret, size, DMA_TO_DEVICE);
593 *dma_handle = dev_addr;
596 EXPORT_SYMBOL(swiotlb_alloc_coherent);
599 swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
600 dma_addr_t dma_handle)
602 WARN_ON(irqs_disabled());
603 if (!is_swiotlb_buffer(vaddr))
604 free_pages((unsigned long) vaddr, get_order(size));
606 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
607 unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE);
609 EXPORT_SYMBOL(swiotlb_free_coherent);
612 swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
615 * Ran out of IOMMU space for this operation. This is very bad.
616 * Unfortunately the drivers cannot handle this operation properly.
617 * unless they check for dma_mapping_error (most don't)
618 * When the mapping is small enough return a static buffer to limit
619 * the damage, or panic when the transfer is too big.
621 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
622 "device %s\n", size, dev ? dev_name(dev) : "?");
624 if (size > io_tlb_overflow && do_panic) {
625 if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
626 panic("DMA: Memory would be corrupted\n");
627 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
628 panic("DMA: Random memory would be DMAed\n");
633 * Map a single buffer of the indicated size for DMA in streaming mode. The
634 * physical address to use is returned.
636 * Once the device is given the dma address, the device owns this memory until
637 * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed.
640 swiotlb_map_single_attrs(struct device *hwdev, void *ptr, size_t size,
641 int dir, struct dma_attrs *attrs)
643 dma_addr_t dev_addr = swiotlb_virt_to_bus(hwdev, ptr);
646 BUG_ON(dir == DMA_NONE);
648 * If the pointer passed in happens to be in the device's DMA window,
649 * we can safely return the device addr and not worry about bounce
652 if (!address_needs_mapping(hwdev, dev_addr, size) &&
653 !range_needs_mapping(ptr, size))
657 * Oh well, have to allocate and map a bounce buffer.
659 map = map_single(hwdev, virt_to_phys(ptr), size, dir);
661 swiotlb_full(hwdev, size, dir, 1);
662 map = io_tlb_overflow_buffer;
665 dev_addr = swiotlb_virt_to_bus(hwdev, map);
668 * Ensure that the address returned is DMA'ble
670 if (address_needs_mapping(hwdev, dev_addr, size))
671 panic("map_single: bounce buffer is not DMA'ble");
675 EXPORT_SYMBOL(swiotlb_map_single_attrs);
678 swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir)
680 return swiotlb_map_single_attrs(hwdev, ptr, size, dir, NULL);
682 EXPORT_SYMBOL(swiotlb_map_single);
685 * Unmap a single streaming mode DMA translation. The dma_addr and size must
686 * match what was provided for in a previous swiotlb_map_single call. All
687 * other usages are undefined.
689 * After this call, reads by the cpu to the buffer are guaranteed to see
690 * whatever the device wrote there.
693 swiotlb_unmap_single_attrs(struct device *hwdev, dma_addr_t dev_addr,
694 size_t size, int dir, struct dma_attrs *attrs)
696 char *dma_addr = swiotlb_bus_to_virt(dev_addr);
698 BUG_ON(dir == DMA_NONE);
699 if (is_swiotlb_buffer(dma_addr))
700 unmap_single(hwdev, dma_addr, size, dir);
701 else if (dir == DMA_FROM_DEVICE)
702 dma_mark_clean(dma_addr, size);
704 EXPORT_SYMBOL(swiotlb_unmap_single_attrs);
707 swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size,
710 return swiotlb_unmap_single_attrs(hwdev, dev_addr, size, dir, NULL);
712 EXPORT_SYMBOL(swiotlb_unmap_single);
715 * Make physical memory consistent for a single streaming mode DMA translation
718 * If you perform a swiotlb_map_single() but wish to interrogate the buffer
719 * using the cpu, yet do not wish to teardown the dma mapping, you must
720 * call this function before doing so. At the next point you give the dma
721 * address back to the card, you must first perform a
722 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
725 swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
726 size_t size, int dir, int target)
728 char *dma_addr = swiotlb_bus_to_virt(dev_addr);
730 BUG_ON(dir == DMA_NONE);
731 if (is_swiotlb_buffer(dma_addr))
732 sync_single(hwdev, dma_addr, size, dir, target);
733 else if (dir == DMA_FROM_DEVICE)
734 dma_mark_clean(dma_addr, size);
738 swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
739 size_t size, int dir)
741 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
743 EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
746 swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
747 size_t size, int dir)
749 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
751 EXPORT_SYMBOL(swiotlb_sync_single_for_device);
754 * Same as above, but for a sub-range of the mapping.
757 swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr,
758 unsigned long offset, size_t size,
761 char *dma_addr = swiotlb_bus_to_virt(dev_addr) + offset;
763 BUG_ON(dir == DMA_NONE);
764 if (is_swiotlb_buffer(dma_addr))
765 sync_single(hwdev, dma_addr, size, dir, target);
766 else if (dir == DMA_FROM_DEVICE)
767 dma_mark_clean(dma_addr, size);
771 swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
772 unsigned long offset, size_t size, int dir)
774 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
777 EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu);
780 swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr,
781 unsigned long offset, size_t size, int dir)
783 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
786 EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device);
789 * Map a set of buffers described by scatterlist in streaming mode for DMA.
790 * This is the scatter-gather version of the above swiotlb_map_single
791 * interface. Here the scatter gather list elements are each tagged with the
792 * appropriate dma address and length. They are obtained via
793 * sg_dma_{address,length}(SG).
795 * NOTE: An implementation may be able to use a smaller number of
796 * DMA address/length pairs than there are SG table elements.
797 * (for example via virtual mapping capabilities)
798 * The routine returns the number of addr/length pairs actually
799 * used, at most nents.
801 * Device ownership issues as mentioned above for swiotlb_map_single are the
805 swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
806 int dir, struct dma_attrs *attrs)
808 struct scatterlist *sg;
811 BUG_ON(dir == DMA_NONE);
813 for_each_sg(sgl, sg, nelems, i) {
814 void *addr = sg_virt(sg);
815 dma_addr_t dev_addr = swiotlb_virt_to_bus(hwdev, addr);
817 if (range_needs_mapping(addr, sg->length) ||
818 address_needs_mapping(hwdev, dev_addr, sg->length)) {
819 void *map = map_single(hwdev, sg_phys(sg),
822 /* Don't panic here, we expect map_sg users
823 to do proper error handling. */
824 swiotlb_full(hwdev, sg->length, dir, 0);
825 swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
827 sgl[0].dma_length = 0;
830 sg->dma_address = swiotlb_virt_to_bus(hwdev, map);
832 sg->dma_address = dev_addr;
833 sg->dma_length = sg->length;
837 EXPORT_SYMBOL(swiotlb_map_sg_attrs);
840 swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
843 return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
845 EXPORT_SYMBOL(swiotlb_map_sg);
848 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
849 * concerning calls here are the same as for swiotlb_unmap_single() above.
852 swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
853 int nelems, int dir, struct dma_attrs *attrs)
855 struct scatterlist *sg;
858 BUG_ON(dir == DMA_NONE);
860 for_each_sg(sgl, sg, nelems, i) {
861 if (sg->dma_address != swiotlb_virt_to_bus(hwdev, sg_virt(sg)))
862 unmap_single(hwdev, swiotlb_bus_to_virt(sg->dma_address),
863 sg->dma_length, dir);
864 else if (dir == DMA_FROM_DEVICE)
865 dma_mark_clean(sg_virt(sg), sg->dma_length);
868 EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
871 swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
874 return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
876 EXPORT_SYMBOL(swiotlb_unmap_sg);
879 * Make physical memory consistent for a set of streaming mode DMA translations
882 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
886 swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
887 int nelems, int dir, int target)
889 struct scatterlist *sg;
892 BUG_ON(dir == DMA_NONE);
894 for_each_sg(sgl, sg, nelems, i) {
895 if (sg->dma_address != swiotlb_virt_to_bus(hwdev, sg_virt(sg)))
896 sync_single(hwdev, swiotlb_bus_to_virt(sg->dma_address),
897 sg->dma_length, dir, target);
898 else if (dir == DMA_FROM_DEVICE)
899 dma_mark_clean(sg_virt(sg), sg->dma_length);
904 swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
907 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
909 EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
912 swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
915 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
917 EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
920 swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
922 return (dma_addr == swiotlb_virt_to_bus(hwdev, io_tlb_overflow_buffer));
924 EXPORT_SYMBOL(swiotlb_dma_mapping_error);
927 * Return whether the given device DMA address mask can be supported
928 * properly. For example, if your device can only drive the low 24-bits
929 * during bus mastering, then you would pass 0x00ffffff as the mask to
933 swiotlb_dma_supported(struct device *hwdev, u64 mask)
935 return swiotlb_virt_to_bus(hwdev, io_tlb_end - 1) <= mask;
937 EXPORT_SYMBOL(swiotlb_dma_supported);