include/linux/sh_clk.h

   1 #ifndef __SH_CLOCK_H
   2 #define __SH_CLOCK_H
   3
   4 #include <linux/list.h>
   5 #include <linux/seq_file.h>
   6 #include <linux/cpufreq.h>
   7 #include <linux/clk.h>
   8 #include <linux/err.h>
   9
  10 struct clk;
  11
  12 struct clk_ops {
  13         void (*init)(struct clk *clk);
  14         int (*enable)(struct clk *clk);
  15         void (*disable)(struct clk *clk);
  16         unsigned long (*recalc)(struct clk *clk);
  17         int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id);
  18         int (*set_parent)(struct clk *clk, struct clk *parent);
  19         long (*round_rate)(struct clk *clk, unsigned long rate);
  20 };
  21
  22 struct clk {
  23         struct list_head        node;
  24         const char              *name;
  25         int                     id;
  26
  27         struct clk              *parent;
  28         struct clk_ops          *ops;
  29
  30         struct list_head        children;
  31         struct list_head        sibling;        /* node for children */
  32
  33         int                     usecount;
  34
  35         unsigned long           rate;
  36         unsigned long           flags;
  37
  38         void __iomem            *enable_reg;
  39         unsigned int            enable_bit;
  40
  41         unsigned long           arch_flags;
  42         void                    *priv;
  43         struct dentry           *dentry;
  44         struct cpufreq_frequency_table *freq_table;
  45 };
  46
  47 #define CLK_ENABLE_ON_INIT      (1 << 0)
  48
  49 /* arch/sh/kernel/cpu/clock.c */
  50 unsigned long followparent_recalc(struct clk *);
  51 void recalculate_root_clocks(void);
  52 void propagate_rate(struct clk *);
  53 int clk_reparent(struct clk *child, struct clk *parent);
  54 int clk_register(struct clk *);
  55 void clk_unregister(struct clk *);
  56 void clk_enable_init_clocks(void);
  57
  58 /* the exported API, in addition to clk_set_rate */
  59 /**
  60  * clk_set_rate_ex - set the clock rate for a clock source, with additional parameter
  61  * @clk: clock source
  62  * @rate: desired clock rate in Hz
  63  * @algo_id: algorithm id to be passed down to ops->set_rate
  64  *
  65  * Returns success (0) or negative errno.
  66  */
  67 int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id);
  68
  69 enum clk_sh_algo_id {
  70         NO_CHANGE = 0,
  71
  72         IUS_N1_N1,
  73         IUS_322,
  74         IUS_522,
  75         IUS_N11,
  76
  77         SB_N1,
  78
  79         SB3_N1,
  80         SB3_32,
  81         SB3_43,
  82         SB3_54,
  83
  84         BP_N1,
  85
  86         IP_N1,
  87 };
  88
  89 struct clk_div_mult_table {
  90         unsigned int *divisors;
  91         unsigned int nr_divisors;
  92         unsigned int *multipliers;
  93         unsigned int nr_multipliers;
  94 };
  95
  96 struct cpufreq_frequency_table;
  97 void clk_rate_table_build(struct clk *clk,
  98                           struct cpufreq_frequency_table *freq_table,
  99                           int nr_freqs,
 100                           struct clk_div_mult_table *src_table,
 101                           unsigned long *bitmap);
 102
 103 long clk_rate_table_round(struct clk *clk,
 104                           struct cpufreq_frequency_table *freq_table,
 105                           unsigned long rate);
 106
 107 int clk_rate_table_find(struct clk *clk,
 108                         struct cpufreq_frequency_table *freq_table,
 109                         unsigned long rate);
 110
 111 #define SH_CLK_MSTP32(_parent, _enable_reg, _enable_bit, _flags)        \
 112 {                                                                       \
 113         .parent         = _parent,                                      \
 114         .enable_reg     = (void __iomem *)_enable_reg,                  \
 115         .enable_bit     = _enable_bit,                                  \
 116         .flags          = _flags,                                       \
 117 }
 118
 119 int sh_clk_mstp32_register(struct clk *clks, int nr);
 120
 121 #define SH_CLK_DIV4(_parent, _reg, _shift, _div_bitmap, _flags) \
 122 {                                                               \
 123         .parent = _parent,                                      \
 124         .enable_reg = (void __iomem *)_reg,                     \
 125         .enable_bit = _shift,                                   \
 126         .arch_flags = _div_bitmap,                              \
 127         .flags = _flags,                                        \
 128 }
 129
 130 struct clk_div4_table {
 131         struct clk_div_mult_table *div_mult_table;
 132         void (*kick)(struct clk *clk);
 133 };
 134
 135 int sh_clk_div4_register(struct clk *clks, int nr,
 136                          struct clk_div4_table *table);
 137 int sh_clk_div4_enable_register(struct clk *clks, int nr,
 138                          struct clk_div4_table *table);
 139 int sh_clk_div4_reparent_register(struct clk *clks, int nr,
 140                          struct clk_div4_table *table);
 141
 142 #define SH_CLK_DIV6(_parent, _reg, _flags)      \
 143 {                                               \
 144         .parent = _parent,                      \
 145         .enable_reg = (void __iomem *)_reg,     \
 146         .flags = _flags,                        \
 147 }
 148
 149 int sh_clk_div6_register(struct clk *clks, int nr);
 150
 151 #endif /* __SH_CLOCK_H */