4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
20 #include <linux/pci_regs.h> /* The pci register defines */
23 * The PCI interface treats multi-function devices as independent
24 * devices. The slot/function address of each device is encoded
25 * in a single byte as follows:
30 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
31 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
32 #define PCI_FUNC(devfn) ((devfn) & 0x07)
34 /* Ioctls for /proc/bus/pci/X/Y nodes. */
35 #define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
36 #define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
37 #define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
38 #define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
39 #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
43 #include <linux/mod_devicetable.h>
45 #include <linux/types.h>
46 #include <linux/init.h>
47 #include <linux/ioport.h>
48 #include <linux/list.h>
49 #include <linux/compiler.h>
50 #include <linux/errno.h>
51 #include <linux/kobject.h>
52 #include <linux/atomic.h>
53 #include <linux/device.h>
55 #include <linux/irqreturn.h>
57 /* Include the ID list */
58 #include <linux/pci_ids.h>
60 /* pci_slot represents a physical slot */
62 struct pci_bus *bus; /* The bus this slot is on */
63 struct list_head list; /* node in list of slots on this bus */
64 struct hotplug_slot *hotplug; /* Hotplug info (migrate over time) */
65 unsigned char number; /* PCI_SLOT(pci_dev->devfn) */
69 static inline const char *pci_slot_name(const struct pci_slot *slot)
71 return kobject_name(&slot->kobj);
74 /* File state for mmap()s on /proc/bus/pci/X/Y */
80 /* This defines the direction arg to the DMA mapping routines. */
81 #define PCI_DMA_BIDIRECTIONAL 0
82 #define PCI_DMA_TODEVICE 1
83 #define PCI_DMA_FROMDEVICE 2
84 #define PCI_DMA_NONE 3
87 * For PCI devices, the region numbers are assigned this way:
90 /* #0-5: standard PCI resources */
92 PCI_STD_RESOURCE_END = 5,
94 /* #6: expansion ROM resource */
97 /* device specific resources */
100 PCI_IOV_RESOURCE_END = PCI_IOV_RESOURCES + PCI_SRIOV_NUM_BARS - 1,
103 /* resources assigned to buses behind the bridge */
104 #define PCI_BRIDGE_RESOURCE_NUM 4
106 PCI_BRIDGE_RESOURCES,
107 PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES +
108 PCI_BRIDGE_RESOURCE_NUM - 1,
110 /* total resources associated with a PCI device */
113 /* preserve this for compatibility */
114 DEVICE_COUNT_RESOURCE
117 typedef int __bitwise pci_power_t;
119 #define PCI_D0 ((pci_power_t __force) 0)
120 #define PCI_D1 ((pci_power_t __force) 1)
121 #define PCI_D2 ((pci_power_t __force) 2)
122 #define PCI_D3hot ((pci_power_t __force) 3)
123 #define PCI_D3cold ((pci_power_t __force) 4)
124 #define PCI_UNKNOWN ((pci_power_t __force) 5)
125 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
127 /* Remember to update this when the list above changes! */
128 extern const char *pci_power_names[];
130 static inline const char *pci_power_name(pci_power_t state)
132 return pci_power_names[1 + (int) state];
135 #define PCI_PM_D2_DELAY 200
136 #define PCI_PM_D3_WAIT 10
137 #define PCI_PM_BUS_WAIT 50
139 /** The pci_channel state describes connectivity between the CPU and
140 * the pci device. If some PCI bus between here and the pci device
141 * has crashed or locked up, this info is reflected here.
143 typedef unsigned int __bitwise pci_channel_state_t;
145 enum pci_channel_state {
146 /* I/O channel is in normal state */
147 pci_channel_io_normal = (__force pci_channel_state_t) 1,
149 /* I/O to channel is blocked */
150 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
152 /* PCI card is dead */
153 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
156 typedef unsigned int __bitwise pcie_reset_state_t;
158 enum pcie_reset_state {
159 /* Reset is NOT asserted (Use to deassert reset) */
160 pcie_deassert_reset = (__force pcie_reset_state_t) 1,
162 /* Use #PERST to reset PCI-E device */
163 pcie_warm_reset = (__force pcie_reset_state_t) 2,
165 /* Use PCI-E Hot Reset to reset device */
166 pcie_hot_reset = (__force pcie_reset_state_t) 3
169 typedef unsigned short __bitwise pci_dev_flags_t;
171 /* INTX_DISABLE in PCI_COMMAND register disables MSI
174 PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1,
175 /* Device configuration is irrevocably lost if disabled into D3 */
176 PCI_DEV_FLAGS_NO_D3 = (__force pci_dev_flags_t) 2,
177 /* Provide indication device is assigned by a Virtual Machine Manager */
178 PCI_DEV_FLAGS_ASSIGNED = (__force pci_dev_flags_t) 4,
179 /* Get VPD from function 0 VPD */
180 PCI_DEV_FLAGS_VPD_REF_F0 = (__force pci_dev_flags_t) (1 << 8),
183 enum pci_irq_reroute_variant {
184 INTEL_IRQ_REROUTE_VARIANT = 1,
185 MAX_IRQ_REROUTE_VARIANTS = 3
188 typedef unsigned short __bitwise pci_bus_flags_t;
190 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
191 PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2,
194 /* Based on the PCI Hotplug Spec, but some values are made up by us */
196 PCI_SPEED_33MHz = 0x00,
197 PCI_SPEED_66MHz = 0x01,
198 PCI_SPEED_66MHz_PCIX = 0x02,
199 PCI_SPEED_100MHz_PCIX = 0x03,
200 PCI_SPEED_133MHz_PCIX = 0x04,
201 PCI_SPEED_66MHz_PCIX_ECC = 0x05,
202 PCI_SPEED_100MHz_PCIX_ECC = 0x06,
203 PCI_SPEED_133MHz_PCIX_ECC = 0x07,
204 PCI_SPEED_66MHz_PCIX_266 = 0x09,
205 PCI_SPEED_100MHz_PCIX_266 = 0x0a,
206 PCI_SPEED_133MHz_PCIX_266 = 0x0b,
212 PCI_SPEED_66MHz_PCIX_533 = 0x11,
213 PCI_SPEED_100MHz_PCIX_533 = 0x12,
214 PCI_SPEED_133MHz_PCIX_533 = 0x13,
215 PCIE_SPEED_2_5GT = 0x14,
216 PCIE_SPEED_5_0GT = 0x15,
217 PCIE_SPEED_8_0GT = 0x16,
218 PCI_SPEED_UNKNOWN = 0xff,
221 struct pci_cap_saved_data {
227 struct pci_cap_saved_state {
228 struct hlist_node next;
229 struct pci_cap_saved_data cap;
232 struct pcie_link_state;
238 * The pci_dev structure is used to describe PCI devices.
241 struct list_head bus_list; /* node in per-bus list */
242 struct pci_bus *bus; /* bus this device is on */
243 struct pci_bus *subordinate; /* bus this device bridges to */
245 void *sysdata; /* hook for sys-specific extension */
246 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
247 struct pci_slot *slot; /* Physical slot this device is in */
249 unsigned int devfn; /* encoded device & function index */
250 unsigned short vendor;
251 unsigned short device;
252 unsigned short subsystem_vendor;
253 unsigned short subsystem_device;
254 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
255 u8 revision; /* PCI revision, low byte of class word */
256 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
257 u8 pcie_cap; /* PCI-E capability offset */
258 u8 pcie_type:4; /* PCI-E device/port type */
259 u8 pcie_mpss:3; /* PCI-E Max Payload Size Supported */
260 u8 rom_base_reg; /* which config register controls the ROM */
261 u8 pin; /* which interrupt pin this device uses */
263 struct pci_driver *driver; /* which driver has allocated this device */
264 u64 dma_mask; /* Mask of the bits of bus address this
265 device implements. Normally this is
266 0xffffffff. You only need to change
267 this if your device has broken DMA
268 or supports 64-bit transfers. */
270 struct device_dma_parameters dma_parms;
272 pci_power_t current_state; /* Current operating state. In ACPI-speak,
273 this is D0-D3, D0 being fully functional,
275 int pm_cap; /* PM capability offset in the
276 configuration space */
277 unsigned int pme_support:5; /* Bitmask of states from which PME#
279 unsigned int pme_interrupt:1;
280 unsigned int pme_poll:1; /* Poll device's PME status bit */
281 unsigned int d1_support:1; /* Low power state D1 is supported */
282 unsigned int d2_support:1; /* Low power state D2 is supported */
283 unsigned int no_d1d2:1; /* Only allow D0 and D3 */
284 unsigned int mmio_always_on:1; /* disallow turning off io/mem
285 decoding during bar sizing */
286 unsigned int wakeup_prepared:1;
287 unsigned int d3_delay; /* D3->D0 transition time in ms */
289 #ifdef CONFIG_PCIEASPM
290 struct pcie_link_state *link_state; /* ASPM link state. */
293 pci_channel_state_t error_state; /* current connectivity state */
294 struct device dev; /* Generic device interface */
296 int cfg_size; /* Size of configuration space */
299 * Instead of touching interrupt line and base address registers
300 * directly, use the values stored here. They might be different!
303 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
304 resource_size_t fw_addr[DEVICE_COUNT_RESOURCE]; /* FW-assigned addr */
306 /* These fields are used by common fixups */
307 unsigned int transparent:1; /* Transparent PCI bridge */
308 unsigned int multifunction:1;/* Part of multi-function device */
309 /* keep track of device state */
310 unsigned int is_added:1;
311 unsigned int is_busmaster:1; /* device is busmaster */
312 unsigned int no_msi:1; /* device may not use msi */
313 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
314 unsigned int broken_parity_status:1; /* Device generates false positive parity */
315 unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting variant */
316 unsigned int msi_enabled:1;
317 unsigned int msix_enabled:1;
318 unsigned int ari_enabled:1; /* ARI forwarding */
319 unsigned int is_managed:1;
320 unsigned int is_pcie:1; /* Obsolete. Will be removed.
321 Use pci_is_pcie() instead */
322 unsigned int needs_freset:1; /* Dev requires fundamental reset */
323 unsigned int state_saved:1;
324 unsigned int is_physfn:1;
325 unsigned int is_virtfn:1;
326 unsigned int reset_fn:1;
327 unsigned int is_hotplug_bridge:1;
328 unsigned int __aer_firmware_first_valid:1;
329 unsigned int __aer_firmware_first:1;
330 unsigned int non_compliant_bars:1; /* broken BARs; ignore them */
331 pci_dev_flags_t dev_flags;
332 atomic_t enable_cnt; /* pci_enable_device has been called */
334 u32 saved_config_space[16]; /* config space saved at suspend time */
335 struct hlist_head saved_cap_space;
336 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
337 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
338 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
339 struct bin_attribute *res_attr_wc[DEVICE_COUNT_RESOURCE]; /* sysfs file for WC mapping of resources */
340 #ifdef CONFIG_PCI_MSI
341 struct list_head msi_list;
344 #ifdef CONFIG_PCI_ATS
346 struct pci_sriov *sriov; /* SR-IOV capability related */
347 struct pci_dev *physfn; /* the PF this VF is associated with */
349 struct pci_ats *ats; /* Address Translation Service */
353 static inline struct pci_dev *pci_physfn(struct pci_dev *dev)
355 #ifdef CONFIG_PCI_IOV
363 extern struct pci_dev *alloc_pci_dev(void);
365 #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
366 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
367 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
369 static inline int pci_channel_offline(struct pci_dev *pdev)
371 return (pdev->error_state != pci_channel_io_normal);
374 static inline struct pci_cap_saved_state *pci_find_saved_cap(
375 struct pci_dev *pci_dev, char cap)
377 struct pci_cap_saved_state *tmp;
378 struct hlist_node *pos;
380 hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
381 if (tmp->cap.cap_nr == cap)
387 static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
388 struct pci_cap_saved_state *new_cap)
390 hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
394 * The first PCI_BRIDGE_RESOURCE_NUM PCI bus resources (those that correspond
395 * to P2P or CardBus bridge windows) go in a table. Additional ones (for
396 * buses below host bridges or subtractive decode bridges) go in the list.
397 * Use pci_bus_for_each_resource() to iterate through all the resources.
401 * PCI_SUBTRACTIVE_DECODE means the bridge forwards the window implicitly
402 * and there's no way to program the bridge with the details of the window.
403 * This does not apply to ACPI _CRS windows, even with the _DEC subtractive-
404 * decode bit set, because they are explicit and can be programmed with _SRS.
406 #define PCI_SUBTRACTIVE_DECODE 0x1
408 struct pci_bus_resource {
409 struct list_head list;
410 struct resource *res;
414 #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
417 struct list_head node; /* node in list of buses */
418 struct pci_bus *parent; /* parent bus this bridge is on */
419 struct list_head children; /* list of child buses */
420 struct list_head devices; /* list of devices on this bus */
421 struct pci_dev *self; /* bridge device as seen by parent */
422 struct list_head slots; /* list of slots on this bus */
423 struct resource *resource[PCI_BRIDGE_RESOURCE_NUM];
424 struct list_head resources; /* address space routed to this bus */
426 struct pci_ops *ops; /* configuration access functions */
427 void *sysdata; /* hook for sys-specific extension */
428 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
430 unsigned char number; /* bus number */
431 unsigned char primary; /* number of primary bridge */
432 unsigned char secondary; /* number of secondary bridge */
433 unsigned char subordinate; /* max number of subordinate buses */
434 unsigned char max_bus_speed; /* enum pci_bus_speed */
435 unsigned char cur_bus_speed; /* enum pci_bus_speed */
439 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
440 pci_bus_flags_t bus_flags; /* Inherited by child busses */
441 struct device *bridge;
443 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
444 struct bin_attribute *legacy_mem; /* legacy mem */
445 unsigned int is_added:1;
448 #define pci_bus_b(n) list_entry(n, struct pci_bus, node)
449 #define to_pci_bus(n) container_of(n, struct pci_bus, dev)
452 * Returns true if the pci bus is root (behind host-pci bridge),
455 static inline bool pci_is_root_bus(struct pci_bus *pbus)
457 return !(pbus->parent);
460 #ifdef CONFIG_PCI_MSI
461 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev)
463 return pci_dev->msi_enabled || pci_dev->msix_enabled;
466 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false; }
470 * Error values that may be returned by PCI functions.
472 #define PCIBIOS_SUCCESSFUL 0x00
473 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
474 #define PCIBIOS_BAD_VENDOR_ID 0x83
475 #define PCIBIOS_DEVICE_NOT_FOUND 0x86
476 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87
477 #define PCIBIOS_SET_FAILED 0x88
478 #define PCIBIOS_BUFFER_TOO_SMALL 0x89
480 /* Low-level architecture-dependent routines */
483 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
484 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
488 * ACPI needs to be able to access PCI config space before we've done a
489 * PCI bus scan and created pci_bus structures.
491 extern int raw_pci_read(unsigned int domain, unsigned int bus,
492 unsigned int devfn, int reg, int len, u32 *val);
493 extern int raw_pci_write(unsigned int domain, unsigned int bus,
494 unsigned int devfn, int reg, int len, u32 val);
496 struct pci_bus_region {
497 resource_size_t start;
502 spinlock_t lock; /* protects list, index */
503 struct list_head list; /* for IDs added at runtime */
506 /* ---------------------------------------------------------------- */
507 /** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
508 * a set of callbacks in struct pci_error_handlers, then that device driver
509 * will be notified of PCI bus errors, and will be driven to recovery
510 * when an error occurs.
513 typedef unsigned int __bitwise pci_ers_result_t;
515 enum pci_ers_result {
516 /* no result/none/not supported in device driver */
517 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
519 /* Device driver can recover without slot reset */
520 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
522 /* Device driver wants slot to be reset. */
523 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
525 /* Device has completely failed, is unrecoverable */
526 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
528 /* Device driver is fully recovered and operational */
529 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
532 /* PCI bus error event callbacks */
533 struct pci_error_handlers {
534 /* PCI bus error detected on this device */
535 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
536 enum pci_channel_state error);
538 /* MMIO has been re-enabled, but not DMA */
539 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
541 /* PCI Express link has been reset */
542 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
544 /* PCI slot has been reset */
545 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
547 /* Device driver may resume normal operations */
548 void (*resume)(struct pci_dev *dev);
551 /* ---------------------------------------------------------------- */
555 struct list_head node;
557 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
558 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
559 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
560 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
561 int (*suspend_late) (struct pci_dev *dev, pm_message_t state);
562 int (*resume_early) (struct pci_dev *dev);
563 int (*resume) (struct pci_dev *dev); /* Device woken up */
564 void (*shutdown) (struct pci_dev *dev);
565 struct pci_error_handlers *err_handler;
566 struct device_driver driver;
567 struct pci_dynids dynids;
570 #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver)
573 * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table
574 * @_table: device table name
576 * This macro is used to create a struct pci_device_id array (a device table)
577 * in a generic manner.
579 #define DEFINE_PCI_DEVICE_TABLE(_table) \
580 const struct pci_device_id _table[] __devinitconst
583 * PCI_DEVICE - macro used to describe a specific pci device
584 * @vend: the 16 bit PCI Vendor ID
585 * @dev: the 16 bit PCI Device ID
587 * This macro is used to create a struct pci_device_id that matches a
588 * specific device. The subvendor and subdevice fields will be set to
591 #define PCI_DEVICE(vend,dev) \
592 .vendor = (vend), .device = (dev), \
593 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
596 * PCI_DEVICE_SUB - macro used to describe a specific pci device with subsystem
597 * @vend: the 16 bit PCI Vendor ID
598 * @dev: the 16 bit PCI Device ID
599 * @subvend: the 16 bit PCI Subvendor ID
600 * @subdev: the 16 bit PCI Subdevice ID
602 * This macro is used to create a struct pci_device_id that matches a
603 * specific device with subsystem information.
605 #define PCI_DEVICE_SUB(vend, dev, subvend, subdev) \
606 .vendor = (vend), .device = (dev), \
607 .subvendor = (subvend), .subdevice = (subdev)
610 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
611 * @dev_class: the class, subclass, prog-if triple for this device
612 * @dev_class_mask: the class mask for this device
614 * This macro is used to create a struct pci_device_id that matches a
615 * specific PCI class. The vendor, device, subvendor, and subdevice
616 * fields will be set to PCI_ANY_ID.
618 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
619 .class = (dev_class), .class_mask = (dev_class_mask), \
620 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
621 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
624 * PCI_VDEVICE - macro used to describe a specific pci device in short form
625 * @vendor: the vendor name
626 * @device: the 16 bit PCI Device ID
628 * This macro is used to create a struct pci_device_id that matches a
629 * specific PCI device. The subvendor, and subdevice fields will be set
630 * to PCI_ANY_ID. The macro allows the next field to follow as the device
634 #define PCI_VDEVICE(vendor, device) \
635 PCI_VENDOR_ID_##vendor, (device), \
636 PCI_ANY_ID, PCI_ANY_ID, 0, 0
638 /* these external functions are only available when PCI support is enabled */
641 extern void pcie_bus_configure_settings(struct pci_bus *bus, u8 smpss);
643 enum pcie_bus_config_types {
646 PCIE_BUS_PERFORMANCE,
650 extern enum pcie_bus_config_types pcie_bus_config;
652 extern struct bus_type pci_bus_type;
654 /* Do NOT directly access these two variables, unless you are arch specific pci
655 * code, or pci core code. */
656 extern struct list_head pci_root_buses; /* list of all known PCI buses */
657 /* Some device drivers need know if pci is initiated */
658 extern int no_pci_devices(void);
660 void pcibios_fixup_bus(struct pci_bus *);
661 int __must_check pcibios_enable_device(struct pci_dev *, int mask);
662 char *pcibios_setup(char *str);
664 /* Used only when drivers/pci/setup.c is used */
665 resource_size_t pcibios_align_resource(void *, const struct resource *,
668 void pcibios_update_irq(struct pci_dev *, int irq);
670 /* Weak but can be overriden by arch */
671 void pci_fixup_cardbus(struct pci_bus *);
673 /* Generic PCI functions used internally */
675 void pcibios_scan_specific_bus(int busn);
676 extern struct pci_bus *pci_find_bus(int domain, int busnr);
677 void pci_bus_add_devices(const struct pci_bus *bus);
678 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus,
679 struct pci_ops *ops, void *sysdata);
680 static inline struct pci_bus * __devinit pci_scan_bus(int bus, struct pci_ops *ops,
683 struct pci_bus *root_bus;
684 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
686 pci_bus_add_devices(root_bus);
689 struct pci_bus *pci_create_bus(struct device *parent, int bus,
690 struct pci_ops *ops, void *sysdata);
691 struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
693 void pcie_update_link_speed(struct pci_bus *bus, u16 link_status);
694 struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr,
696 struct hotplug_slot *hotplug);
697 void pci_destroy_slot(struct pci_slot *slot);
698 void pci_renumber_slot(struct pci_slot *slot, int slot_nr);
699 int pci_scan_slot(struct pci_bus *bus, int devfn);
700 struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn);
701 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
702 unsigned int pci_scan_child_bus(struct pci_bus *bus);
703 int __must_check pci_bus_add_device(struct pci_dev *dev);
704 void pci_read_bridge_bases(struct pci_bus *child);
705 struct resource *pci_find_parent_resource(const struct pci_dev *dev,
706 struct resource *res);
707 u8 pci_swizzle_interrupt_pin(struct pci_dev *dev, u8 pin);
708 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
709 u8 pci_common_swizzle(struct pci_dev *dev, u8 *pinp);
710 extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
711 extern void pci_dev_put(struct pci_dev *dev);
712 extern void pci_remove_bus(struct pci_bus *b);
713 extern void pci_remove_bus_device(struct pci_dev *dev);
714 extern void pci_stop_bus_device(struct pci_dev *dev);
715 void pci_setup_cardbus(struct pci_bus *bus);
716 extern void pci_sort_breadthfirst(void);
717 #define dev_is_pci(d) ((d)->bus == &pci_bus_type)
718 #define dev_is_pf(d) ((dev_is_pci(d) ? to_pci_dev(d)->is_physfn : false))
719 #define dev_num_vf(d) ((dev_is_pci(d) ? pci_num_vf(to_pci_dev(d)) : 0))
721 /* Generic PCI functions exported to card drivers */
723 enum pci_lost_interrupt_reason {
724 PCI_LOST_IRQ_NO_INFORMATION = 0,
725 PCI_LOST_IRQ_DISABLE_MSI,
726 PCI_LOST_IRQ_DISABLE_MSIX,
727 PCI_LOST_IRQ_DISABLE_ACPI,
729 enum pci_lost_interrupt_reason pci_lost_interrupt(struct pci_dev *dev);
730 int pci_find_capability(struct pci_dev *dev, int cap);
731 int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
732 int pci_find_ext_capability(struct pci_dev *dev, int cap);
733 int pci_bus_find_ext_capability(struct pci_bus *bus, unsigned int devfn,
735 int pci_find_ht_capability(struct pci_dev *dev, int ht_cap);
736 int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap);
737 struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
739 struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
740 struct pci_dev *from);
741 struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,
742 unsigned int ss_vendor, unsigned int ss_device,
743 struct pci_dev *from);
744 struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn);
745 struct pci_dev *pci_get_domain_bus_and_slot(int domain, unsigned int bus,
747 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
750 return pci_get_domain_bus_and_slot(0, bus, devfn);
752 struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from);
753 int pci_dev_present(const struct pci_device_id *ids);
755 int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn,
757 int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn,
758 int where, u16 *val);
759 int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn,
760 int where, u32 *val);
761 int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn,
763 int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn,
765 int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn,
767 struct pci_ops *pci_bus_set_ops(struct pci_bus *bus, struct pci_ops *ops);
769 static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
771 return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val);
773 static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
775 return pci_bus_read_config_word(dev->bus, dev->devfn, where, val);
777 static inline int pci_read_config_dword(struct pci_dev *dev, int where,
780 return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val);
782 static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
784 return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val);
786 static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
788 return pci_bus_write_config_word(dev->bus, dev->devfn, where, val);
790 static inline int pci_write_config_dword(struct pci_dev *dev, int where,
793 return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val);
796 int __must_check pci_enable_device(struct pci_dev *dev);
797 int __must_check pci_enable_device_io(struct pci_dev *dev);
798 int __must_check pci_enable_device_mem(struct pci_dev *dev);
799 int __must_check pci_reenable_device(struct pci_dev *);
800 int __must_check pcim_enable_device(struct pci_dev *pdev);
801 void pcim_pin_device(struct pci_dev *pdev);
803 static inline int pci_is_enabled(struct pci_dev *pdev)
805 return (atomic_read(&pdev->enable_cnt) > 0);
808 static inline int pci_is_managed(struct pci_dev *pdev)
810 return pdev->is_managed;
813 void pci_disable_device(struct pci_dev *dev);
814 void pci_set_master(struct pci_dev *dev);
815 void pci_clear_master(struct pci_dev *dev);
816 int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
817 int pci_set_cacheline_size(struct pci_dev *dev);
818 #define HAVE_PCI_SET_MWI
819 int __must_check pci_set_mwi(struct pci_dev *dev);
820 int pci_try_set_mwi(struct pci_dev *dev);
821 void pci_clear_mwi(struct pci_dev *dev);
822 void pci_intx(struct pci_dev *dev, int enable);
823 void pci_msi_off(struct pci_dev *dev);
824 int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size);
825 int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask);
826 int pcix_get_max_mmrbc(struct pci_dev *dev);
827 int pcix_get_mmrbc(struct pci_dev *dev);
828 int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
829 int pcie_get_readrq(struct pci_dev *dev);
830 int pcie_set_readrq(struct pci_dev *dev, int rq);
831 int pcie_get_mps(struct pci_dev *dev);
832 int pcie_set_mps(struct pci_dev *dev, int mps);
833 int __pci_reset_function(struct pci_dev *dev);
834 int pci_reset_function(struct pci_dev *dev);
835 void pci_update_resource(struct pci_dev *dev, int resno);
836 int __must_check pci_assign_resource(struct pci_dev *dev, int i);
837 int __must_check pci_reassign_resource(struct pci_dev *dev, int i, resource_size_t add_size, resource_size_t align);
838 int pci_select_bars(struct pci_dev *dev, unsigned long flags);
840 /* ROM control related routines */
841 int pci_enable_rom(struct pci_dev *pdev);
842 void pci_disable_rom(struct pci_dev *pdev);
843 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
844 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
845 size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size);
847 /* Power management related routines */
848 int pci_save_state(struct pci_dev *dev);
849 void pci_restore_state(struct pci_dev *dev);
850 struct pci_saved_state *pci_store_saved_state(struct pci_dev *dev);
851 int pci_load_saved_state(struct pci_dev *dev, struct pci_saved_state *state);
852 int pci_load_and_free_saved_state(struct pci_dev *dev,
853 struct pci_saved_state **state);
854 int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state);
855 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
856 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
857 bool pci_pme_capable(struct pci_dev *dev, pci_power_t state);
858 void pci_pme_active(struct pci_dev *dev, bool enable);
859 int __pci_enable_wake(struct pci_dev *dev, pci_power_t state,
860 bool runtime, bool enable);
861 int pci_wake_from_d3(struct pci_dev *dev, bool enable);
862 pci_power_t pci_target_state(struct pci_dev *dev);
863 int pci_prepare_to_sleep(struct pci_dev *dev);
864 int pci_back_from_sleep(struct pci_dev *dev);
865 bool pci_dev_run_wake(struct pci_dev *dev);
866 bool pci_check_pme_status(struct pci_dev *dev);
867 void pci_pme_wakeup_bus(struct pci_bus *bus);
869 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
872 return __pci_enable_wake(dev, state, false, enable);
875 #define PCI_EXP_IDO_REQUEST (1<<0)
876 #define PCI_EXP_IDO_COMPLETION (1<<1)
877 void pci_enable_ido(struct pci_dev *dev, unsigned long type);
878 void pci_disable_ido(struct pci_dev *dev, unsigned long type);
880 enum pci_obff_signal_type {
881 PCI_EXP_OBFF_SIGNAL_L0 = 0,
882 PCI_EXP_OBFF_SIGNAL_ALWAYS = 1,
884 int pci_enable_obff(struct pci_dev *dev, enum pci_obff_signal_type);
885 void pci_disable_obff(struct pci_dev *dev);
887 bool pci_ltr_supported(struct pci_dev *dev);
888 int pci_enable_ltr(struct pci_dev *dev);
889 void pci_disable_ltr(struct pci_dev *dev);
890 int pci_set_ltr(struct pci_dev *dev, int snoop_lat_ns, int nosnoop_lat_ns);
892 /* For use by arch with custom probe code */
893 void set_pcie_port_type(struct pci_dev *pdev);
894 void set_pcie_hotplug_bridge(struct pci_dev *pdev);
896 /* Functions for PCI Hotplug drivers to use */
897 int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap);
898 #ifdef CONFIG_HOTPLUG
899 unsigned int pci_rescan_bus(struct pci_bus *bus);
902 /* Vital product data routines */
903 ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
904 ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
905 int pci_vpd_truncate(struct pci_dev *dev, size_t size);
907 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
908 void pci_bus_assign_resources(const struct pci_bus *bus);
909 void pci_bus_size_bridges(struct pci_bus *bus);
910 int pci_claim_resource(struct pci_dev *, int);
911 void pci_assign_unassigned_resources(void);
912 void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge);
913 void pdev_enable_device(struct pci_dev *);
914 void pdev_sort_resources(struct pci_dev *, struct resource_list *);
915 int pci_enable_resources(struct pci_dev *, int mask);
916 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
917 int (*)(const struct pci_dev *, u8, u8));
918 #define HAVE_PCI_REQ_REGIONS 2
919 int __must_check pci_request_regions(struct pci_dev *, const char *);
920 int __must_check pci_request_regions_exclusive(struct pci_dev *, const char *);
921 void pci_release_regions(struct pci_dev *);
922 int __must_check pci_request_region(struct pci_dev *, int, const char *);
923 int __must_check pci_request_region_exclusive(struct pci_dev *, int, const char *);
924 void pci_release_region(struct pci_dev *, int);
925 int pci_request_selected_regions(struct pci_dev *, int, const char *);
926 int pci_request_selected_regions_exclusive(struct pci_dev *, int, const char *);
927 void pci_release_selected_regions(struct pci_dev *, int);
929 /* drivers/pci/bus.c */
930 void pci_bus_add_resource(struct pci_bus *bus, struct resource *res, unsigned int flags);
931 struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n);
932 void pci_bus_remove_resources(struct pci_bus *bus);
934 #define pci_bus_for_each_resource(bus, res, i) \
936 (res = pci_bus_resource_n(bus, i)) || i < PCI_BRIDGE_RESOURCE_NUM; \
939 int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
940 struct resource *res, resource_size_t size,
941 resource_size_t align, resource_size_t min,
942 unsigned int type_mask,
943 resource_size_t (*alignf)(void *,
944 const struct resource *,
948 void pci_enable_bridges(struct pci_bus *bus);
950 /* Proper probing supporting hot-pluggable devices */
951 int __must_check __pci_register_driver(struct pci_driver *, struct module *,
952 const char *mod_name);
955 * pci_register_driver must be a macro so that KBUILD_MODNAME can be expanded
957 #define pci_register_driver(driver) \
958 __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME)
960 void pci_unregister_driver(struct pci_driver *dev);
961 void pci_remove_behind_bridge(struct pci_dev *dev);
962 struct pci_driver *pci_dev_driver(const struct pci_dev *dev);
963 int pci_add_dynid(struct pci_driver *drv,
964 unsigned int vendor, unsigned int device,
965 unsigned int subvendor, unsigned int subdevice,
966 unsigned int class, unsigned int class_mask,
967 unsigned long driver_data);
968 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
969 struct pci_dev *dev);
970 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
973 void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
975 int pci_cfg_space_size_ext(struct pci_dev *dev);
976 int pci_cfg_space_size(struct pci_dev *dev);
977 unsigned char pci_bus_max_busnr(struct pci_bus *bus);
978 void pci_setup_bridge(struct pci_bus *bus);
980 #define PCI_VGA_STATE_CHANGE_BRIDGE (1 << 0)
981 #define PCI_VGA_STATE_CHANGE_DECODES (1 << 1)
983 int pci_set_vga_state(struct pci_dev *pdev, bool decode,
984 unsigned int command_bits, u32 flags);
985 /* kmem_cache style wrapper around pci_alloc_consistent() */
987 #include <linux/pci-dma.h>
988 #include <linux/dmapool.h>
990 #define pci_pool dma_pool
991 #define pci_pool_create(name, pdev, size, align, allocation) \
992 dma_pool_create(name, &pdev->dev, size, align, allocation)
993 #define pci_pool_destroy(pool) dma_pool_destroy(pool)
994 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
995 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
997 enum pci_dma_burst_strategy {
998 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
999 strategy_parameter is N/A */
1000 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
1002 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
1003 strategy_parameter byte boundaries */
1007 u32 vector; /* kernel uses to write allocated vector */
1008 u16 entry; /* driver uses to specify entry, OS writes */
1012 #ifndef CONFIG_PCI_MSI
1013 static inline int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec)
1018 static inline void pci_msi_shutdown(struct pci_dev *dev)
1020 static inline void pci_disable_msi(struct pci_dev *dev)
1023 static inline int pci_msix_table_size(struct pci_dev *dev)
1027 static inline int pci_enable_msix(struct pci_dev *dev,
1028 struct msix_entry *entries, int nvec)
1033 static inline void pci_msix_shutdown(struct pci_dev *dev)
1035 static inline void pci_disable_msix(struct pci_dev *dev)
1038 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev)
1041 static inline void pci_restore_msi_state(struct pci_dev *dev)
1043 static inline int pci_msi_enabled(void)
1048 extern int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec);
1049 extern void pci_msi_shutdown(struct pci_dev *dev);
1050 extern void pci_disable_msi(struct pci_dev *dev);
1051 extern int pci_msix_table_size(struct pci_dev *dev);
1052 extern int pci_enable_msix(struct pci_dev *dev,
1053 struct msix_entry *entries, int nvec);
1054 extern void pci_msix_shutdown(struct pci_dev *dev);
1055 extern void pci_disable_msix(struct pci_dev *dev);
1056 extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
1057 extern void pci_restore_msi_state(struct pci_dev *dev);
1058 extern int pci_msi_enabled(void);
1061 #ifdef CONFIG_PCIEPORTBUS
1062 extern bool pcie_ports_disabled;
1063 extern bool pcie_ports_auto;
1065 #define pcie_ports_disabled true
1066 #define pcie_ports_auto false
1069 #ifndef CONFIG_PCIEASPM
1070 static inline int pcie_aspm_enabled(void) { return 0; }
1071 static inline bool pcie_aspm_support_enabled(void) { return false; }
1073 extern int pcie_aspm_enabled(void);
1074 extern bool pcie_aspm_support_enabled(void);
1077 #ifdef CONFIG_PCIEAER
1078 void pci_no_aer(void);
1079 bool pci_aer_available(void);
1081 static inline void pci_no_aer(void) { }
1082 static inline bool pci_aer_available(void) { return false; }
1085 #ifndef CONFIG_PCIE_ECRC
1086 static inline void pcie_set_ecrc_checking(struct pci_dev *dev)
1090 static inline void pcie_ecrc_get_policy(char *str) {};
1092 extern void pcie_set_ecrc_checking(struct pci_dev *dev);
1093 extern void pcie_ecrc_get_policy(char *str);
1096 #define pci_enable_msi(pdev) pci_enable_msi_block(pdev, 1)
1098 #ifdef CONFIG_HT_IRQ
1099 /* The functions a driver should call */
1100 int ht_create_irq(struct pci_dev *dev, int idx);
1101 void ht_destroy_irq(unsigned int irq);
1102 #endif /* CONFIG_HT_IRQ */
1104 extern void pci_block_user_cfg_access(struct pci_dev *dev);
1105 extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
1108 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
1109 * a PCI domain is defined to be a set of PCI busses which share
1110 * configuration space.
1112 #ifdef CONFIG_PCI_DOMAINS
1113 extern int pci_domains_supported;
1115 enum { pci_domains_supported = 0 };
1116 static inline int pci_domain_nr(struct pci_bus *bus)
1121 static inline int pci_proc_domain(struct pci_bus *bus)
1125 #endif /* CONFIG_PCI_DOMAINS */
1127 /* some architectures require additional setup to direct VGA traffic */
1128 typedef int (*arch_set_vga_state_t)(struct pci_dev *pdev, bool decode,
1129 unsigned int command_bits, u32 flags);
1130 extern void pci_register_set_vga_state(arch_set_vga_state_t func);
1132 #else /* CONFIG_PCI is not enabled */
1135 * If the system does not have PCI, clearly these return errors. Define
1136 * these as simple inline functions to avoid hair in drivers.
1139 #define _PCI_NOP(o, s, t) \
1140 static inline int pci_##o##_config_##s(struct pci_dev *dev, \
1142 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
1144 #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \
1145 _PCI_NOP(o, word, u16 x) \
1146 _PCI_NOP(o, dword, u32 x)
1147 _PCI_NOP_ALL(read, *)
1148 _PCI_NOP_ALL(write,)
1150 static inline struct pci_dev *pci_get_device(unsigned int vendor,
1151 unsigned int device,
1152 struct pci_dev *from)
1157 static inline struct pci_dev *pci_get_subsys(unsigned int vendor,
1158 unsigned int device,
1159 unsigned int ss_vendor,
1160 unsigned int ss_device,
1161 struct pci_dev *from)
1166 static inline struct pci_dev *pci_get_class(unsigned int class,
1167 struct pci_dev *from)
1172 #define pci_dev_present(ids) (0)
1173 #define no_pci_devices() (1)
1174 #define pci_dev_put(dev) do { } while (0)
1176 static inline void pci_set_master(struct pci_dev *dev)
1179 static inline int pci_enable_device(struct pci_dev *dev)
1184 static inline void pci_disable_device(struct pci_dev *dev)
1187 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
1192 static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
1197 static inline int pci_set_dma_max_seg_size(struct pci_dev *dev,
1203 static inline int pci_set_dma_seg_boundary(struct pci_dev *dev,
1209 static inline int pci_assign_resource(struct pci_dev *dev, int i)
1214 static inline int __pci_register_driver(struct pci_driver *drv,
1215 struct module *owner)
1220 static inline int pci_register_driver(struct pci_driver *drv)
1225 static inline void pci_unregister_driver(struct pci_driver *drv)
1228 static inline int pci_find_capability(struct pci_dev *dev, int cap)
1233 static inline int pci_find_next_capability(struct pci_dev *dev, u8 post,
1239 static inline int pci_find_ext_capability(struct pci_dev *dev, int cap)
1244 /* Power management related routines */
1245 static inline int pci_save_state(struct pci_dev *dev)
1250 static inline void pci_restore_state(struct pci_dev *dev)
1253 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
1258 static inline int pci_wake_from_d3(struct pci_dev *dev, bool enable)
1263 static inline pci_power_t pci_choose_state(struct pci_dev *dev,
1269 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
1275 static inline void pci_enable_ido(struct pci_dev *dev, unsigned long type)
1279 static inline void pci_disable_ido(struct pci_dev *dev, unsigned long type)
1283 static inline int pci_enable_obff(struct pci_dev *dev, unsigned long type)
1288 static inline void pci_disable_obff(struct pci_dev *dev)
1292 static inline int pci_request_regions(struct pci_dev *dev, const char *res_name)
1297 static inline void pci_release_regions(struct pci_dev *dev)
1300 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
1302 static inline void pci_block_user_cfg_access(struct pci_dev *dev)
1305 static inline void pci_unblock_user_cfg_access(struct pci_dev *dev)
1308 static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from)
1311 static inline struct pci_dev *pci_get_slot(struct pci_bus *bus,
1315 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
1319 static inline int pci_domain_nr(struct pci_bus *bus)
1322 #define dev_is_pci(d) (false)
1323 #define dev_is_pf(d) (false)
1324 #define dev_num_vf(d) (0)
1325 #endif /* CONFIG_PCI */
1327 /* Include architecture-dependent settings and functions */
1329 #include <asm/pci.h>
1331 #ifndef PCIBIOS_MAX_MEM_32
1332 #define PCIBIOS_MAX_MEM_32 (-1)
1335 /* these helpers provide future and backwards compatibility
1336 * for accessing popular PCI BAR info */
1337 #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start)
1338 #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end)
1339 #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags)
1340 #define pci_resource_len(dev,bar) \
1341 ((pci_resource_start((dev), (bar)) == 0 && \
1342 pci_resource_end((dev), (bar)) == \
1343 pci_resource_start((dev), (bar))) ? 0 : \
1345 (pci_resource_end((dev), (bar)) - \
1346 pci_resource_start((dev), (bar)) + 1))
1348 /* Similar to the helpers above, these manipulate per-pci_dev
1349 * driver-specific data. They are really just a wrapper around
1350 * the generic device structure functions of these calls.
1352 static inline void *pci_get_drvdata(struct pci_dev *pdev)
1354 return dev_get_drvdata(&pdev->dev);
1357 static inline void pci_set_drvdata(struct pci_dev *pdev, void *data)
1359 dev_set_drvdata(&pdev->dev, data);
1362 /* If you want to know what to call your pci_dev, ask this function.
1363 * Again, it's a wrapper around the generic device.
1365 static inline const char *pci_name(const struct pci_dev *pdev)
1367 return dev_name(&pdev->dev);
1371 /* Some archs don't want to expose struct resource to userland as-is
1372 * in sysfs and /proc
1374 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
1375 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
1376 const struct resource *rsrc, resource_size_t *start,
1377 resource_size_t *end)
1379 *start = rsrc->start;
1382 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
1386 * The world is not perfect and supplies us with broken PCI devices.
1387 * For at least a part of these bugs we need a work-around, so both
1388 * generic (drivers/pci/quirks.c) and per-architecture code can define
1389 * fixup hooks to be called for particular buggy devices.
1393 u16 vendor, device; /* You can use PCI_ANY_ID here of course */
1394 void (*hook)(struct pci_dev *dev);
1397 enum pci_fixup_pass {
1398 pci_fixup_early, /* Before probing BARs */
1399 pci_fixup_header, /* After reading configuration header */
1400 pci_fixup_final, /* Final phase of device fixups */
1401 pci_fixup_enable, /* pci_enable_device() time */
1402 pci_fixup_resume, /* pci_device_resume() */
1403 pci_fixup_suspend, /* pci_device_suspend */
1404 pci_fixup_resume_early, /* pci_device_resume_early() */
1407 /* Anonymous variables would be nice... */
1408 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
1409 static const struct pci_fixup __pci_fixup_##name __used \
1410 __attribute__((__section__(#section))) = { vendor, device, hook };
1411 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
1412 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
1413 vendor##device##hook, vendor, device, hook)
1414 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
1415 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
1416 vendor##device##hook, vendor, device, hook)
1417 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
1418 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
1419 vendor##device##hook, vendor, device, hook)
1420 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
1421 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
1422 vendor##device##hook, vendor, device, hook)
1423 #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \
1424 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
1425 resume##vendor##device##hook, vendor, device, hook)
1426 #define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook) \
1427 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \
1428 resume_early##vendor##device##hook, vendor, device, hook)
1429 #define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook) \
1430 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \
1431 suspend##vendor##device##hook, vendor, device, hook)
1433 #ifdef CONFIG_PCI_QUIRKS
1434 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
1436 static inline void pci_fixup_device(enum pci_fixup_pass pass,
1437 struct pci_dev *dev) {}
1440 void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen);
1441 void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr);
1442 void __iomem * const *pcim_iomap_table(struct pci_dev *pdev);
1443 int pcim_iomap_regions(struct pci_dev *pdev, u16 mask, const char *name);
1444 int pcim_iomap_regions_request_all(struct pci_dev *pdev, u16 mask,
1446 void pcim_iounmap_regions(struct pci_dev *pdev, u16 mask);
1448 extern int pci_pci_problems;
1449 #define PCIPCI_FAIL 1 /* No PCI PCI DMA */
1450 #define PCIPCI_TRITON 2
1451 #define PCIPCI_NATOMA 4
1452 #define PCIPCI_VIAETBF 8
1453 #define PCIPCI_VSFX 16
1454 #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */
1455 #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */
1457 extern unsigned long pci_cardbus_io_size;
1458 extern unsigned long pci_cardbus_mem_size;
1459 extern u8 __devinitdata pci_dfl_cache_line_size;
1460 extern u8 pci_cache_line_size;
1462 extern unsigned long pci_hotplug_io_size;
1463 extern unsigned long pci_hotplug_mem_size;
1465 int pcibios_add_platform_entries(struct pci_dev *dev);
1466 void pcibios_disable_device(struct pci_dev *dev);
1467 int pcibios_set_pcie_reset_state(struct pci_dev *dev,
1468 enum pcie_reset_state state);
1470 #ifdef CONFIG_PCI_MMCONFIG
1471 extern void __init pci_mmcfg_early_init(void);
1472 extern void __init pci_mmcfg_late_init(void);
1474 static inline void pci_mmcfg_early_init(void) { }
1475 static inline void pci_mmcfg_late_init(void) { }
1478 int pci_ext_cfg_avail(struct pci_dev *dev);
1480 void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar);
1482 #ifdef CONFIG_PCI_IOV
1483 extern int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn);
1484 extern void pci_disable_sriov(struct pci_dev *dev);
1485 extern irqreturn_t pci_sriov_migration(struct pci_dev *dev);
1486 extern int pci_num_vf(struct pci_dev *dev);
1488 static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
1492 static inline void pci_disable_sriov(struct pci_dev *dev)
1495 static inline irqreturn_t pci_sriov_migration(struct pci_dev *dev)
1499 static inline int pci_num_vf(struct pci_dev *dev)
1505 #if defined(CONFIG_HOTPLUG_PCI) || defined(CONFIG_HOTPLUG_PCI_MODULE)
1506 extern void pci_hp_create_module_link(struct pci_slot *pci_slot);
1507 extern void pci_hp_remove_module_link(struct pci_slot *pci_slot);
1511 * pci_pcie_cap - get the saved PCIe capability offset
1514 * PCIe capability offset is calculated at PCI device initialization
1515 * time and saved in the data structure. This function returns saved
1516 * PCIe capability offset. Using this instead of pci_find_capability()
1517 * reduces unnecessary search in the PCI configuration space. If you
1518 * need to calculate PCIe capability offset from raw device for some
1519 * reasons, please use pci_find_capability() instead.
1521 static inline int pci_pcie_cap(struct pci_dev *dev)
1523 return dev->pcie_cap;
1527 * pci_is_pcie - check if the PCI device is PCI Express capable
1530 * Retrun true if the PCI device is PCI Express capable, false otherwise.
1532 static inline bool pci_is_pcie(struct pci_dev *dev)
1534 return !!pci_pcie_cap(dev);
1537 void pci_request_acs(void);
1540 #define PCI_VPD_LRDT 0x80 /* Large Resource Data Type */
1541 #define PCI_VPD_LRDT_ID(x) (x | PCI_VPD_LRDT)
1543 /* Large Resource Data Type Tag Item Names */
1544 #define PCI_VPD_LTIN_ID_STRING 0x02 /* Identifier String */
1545 #define PCI_VPD_LTIN_RO_DATA 0x10 /* Read-Only Data */
1546 #define PCI_VPD_LTIN_RW_DATA 0x11 /* Read-Write Data */
1548 #define PCI_VPD_LRDT_ID_STRING PCI_VPD_LRDT_ID(PCI_VPD_LTIN_ID_STRING)
1549 #define PCI_VPD_LRDT_RO_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RO_DATA)
1550 #define PCI_VPD_LRDT_RW_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RW_DATA)
1552 /* Small Resource Data Type Tag Item Names */
1553 #define PCI_VPD_STIN_END 0x78 /* End */
1555 #define PCI_VPD_SRDT_END PCI_VPD_STIN_END
1557 #define PCI_VPD_SRDT_TIN_MASK 0x78
1558 #define PCI_VPD_SRDT_LEN_MASK 0x07
1560 #define PCI_VPD_LRDT_TAG_SIZE 3
1561 #define PCI_VPD_SRDT_TAG_SIZE 1
1563 #define PCI_VPD_INFO_FLD_HDR_SIZE 3
1565 #define PCI_VPD_RO_KEYWORD_PARTNO "PN"
1566 #define PCI_VPD_RO_KEYWORD_MFR_ID "MN"
1567 #define PCI_VPD_RO_KEYWORD_VENDOR0 "V0"
1568 #define PCI_VPD_RO_KEYWORD_CHKSUM "RV"
1571 * pci_vpd_lrdt_size - Extracts the Large Resource Data Type length
1572 * @lrdt: Pointer to the beginning of the Large Resource Data Type tag
1574 * Returns the extracted Large Resource Data Type length.
1576 static inline u16 pci_vpd_lrdt_size(const u8 *lrdt)
1578 return (u16)lrdt[1] + ((u16)lrdt[2] << 8);
1582 * pci_vpd_srdt_size - Extracts the Small Resource Data Type length
1583 * @lrdt: Pointer to the beginning of the Small Resource Data Type tag
1585 * Returns the extracted Small Resource Data Type length.
1587 static inline u8 pci_vpd_srdt_size(const u8 *srdt)
1589 return (*srdt) & PCI_VPD_SRDT_LEN_MASK;
1593 * pci_vpd_info_field_size - Extracts the information field length
1594 * @lrdt: Pointer to the beginning of an information field header
1596 * Returns the extracted information field length.
1598 static inline u8 pci_vpd_info_field_size(const u8 *info_field)
1600 return info_field[2];
1604 * pci_vpd_find_tag - Locates the Resource Data Type tag provided
1605 * @buf: Pointer to buffered vpd data
1606 * @off: The offset into the buffer at which to begin the search
1607 * @len: The length of the vpd buffer
1608 * @rdt: The Resource Data Type to search for
1610 * Returns the index where the Resource Data Type was found or
1611 * -ENOENT otherwise.
1613 int pci_vpd_find_tag(const u8 *buf, unsigned int off, unsigned int len, u8 rdt);
1616 * pci_vpd_find_info_keyword - Locates an information field keyword in the VPD
1617 * @buf: Pointer to buffered vpd data
1618 * @off: The offset into the buffer at which to begin the search
1619 * @len: The length of the buffer area, relative to off, in which to search
1620 * @kw: The keyword to search for
1622 * Returns the index where the information field keyword was found or
1623 * -ENOENT otherwise.
1625 int pci_vpd_find_info_keyword(const u8 *buf, unsigned int off,
1626 unsigned int len, const char *kw);
1628 /* PCI <-> OF binding helpers */
1631 extern void pci_set_of_node(struct pci_dev *dev);
1632 extern void pci_release_of_node(struct pci_dev *dev);
1633 extern void pci_set_bus_of_node(struct pci_bus *bus);
1634 extern void pci_release_bus_of_node(struct pci_bus *bus);
1636 /* Arch may override this (weak) */
1637 extern struct device_node * __weak pcibios_get_phb_of_node(struct pci_bus *bus);
1639 static inline struct device_node *pci_device_to_OF_node(struct pci_dev *pdev)
1641 return pdev ? pdev->dev.of_node : NULL;
1644 static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
1646 return bus ? bus->dev.of_node : NULL;
1649 #else /* CONFIG_OF */
1650 static inline void pci_set_of_node(struct pci_dev *dev) { }
1651 static inline void pci_release_of_node(struct pci_dev *dev) { }
1652 static inline void pci_set_bus_of_node(struct pci_bus *bus) { }
1653 static inline void pci_release_bus_of_node(struct pci_bus *bus) { }
1654 #endif /* CONFIG_OF */
1657 * pci_find_upstream_pcie_bridge - find upstream PCIe-to-PCI bridge of a device
1658 * @pdev: the PCI device
1660 * if the device is PCIE, return NULL
1661 * if the device isn't connected to a PCIe bridge (that is its parent is a
1662 * legacy PCI bridge and the bridge is directly connected to bus 0), return its
1665 struct pci_dev *pci_find_upstream_pcie_bridge(struct pci_dev *pdev);
1667 #endif /* __KERNEL__ */
1668 #endif /* LINUX_PCI_H */