2 * Marvell 88PM860x Interface
4 * Copyright (C) 2009 Marvell International Ltd.
5 * Haojian Zhuang <haojian.zhuang@marvell.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #ifndef __LINUX_MFD_88PM860X_H
13 #define __LINUX_MFD_88PM860X_H
43 #define PM8607_VERSION (0x40) /* 8607 chip ID */
44 #define PM8607_VERSION_MASK (0xF0) /* 8607 chip ID mask */
46 /* Interrupt Registers */
47 #define PM8607_STATUS_1 (0x01)
48 #define PM8607_STATUS_2 (0x02)
49 #define PM8607_INT_STATUS1 (0x03)
50 #define PM8607_INT_STATUS2 (0x04)
51 #define PM8607_INT_STATUS3 (0x05)
52 #define PM8607_INT_MASK_1 (0x06)
53 #define PM8607_INT_MASK_2 (0x07)
54 #define PM8607_INT_MASK_3 (0x08)
56 /* Regulator Control Registers */
57 #define PM8607_LDO1 (0x10)
58 #define PM8607_LDO2 (0x11)
59 #define PM8607_LDO3 (0x12)
60 #define PM8607_LDO4 (0x13)
61 #define PM8607_LDO5 (0x14)
62 #define PM8607_LDO6 (0x15)
63 #define PM8607_LDO7 (0x16)
64 #define PM8607_LDO8 (0x17)
65 #define PM8607_LDO9 (0x18)
66 #define PM8607_LDO10 (0x19)
67 #define PM8607_LDO12 (0x1A)
68 #define PM8607_LDO14 (0x1B)
69 #define PM8607_SLEEP_MODE1 (0x1C)
70 #define PM8607_SLEEP_MODE2 (0x1D)
71 #define PM8607_SLEEP_MODE3 (0x1E)
72 #define PM8607_SLEEP_MODE4 (0x1F)
73 #define PM8607_GO (0x20)
74 #define PM8607_SLEEP_BUCK1 (0x21)
75 #define PM8607_SLEEP_BUCK2 (0x22)
76 #define PM8607_SLEEP_BUCK3 (0x23)
77 #define PM8607_BUCK1 (0x24)
78 #define PM8607_BUCK2 (0x25)
79 #define PM8607_BUCK3 (0x26)
80 #define PM8607_BUCK_CONTROLS (0x27)
81 #define PM8607_SUPPLIES_EN11 (0x2B)
82 #define PM8607_SUPPLIES_EN12 (0x2C)
83 #define PM8607_GROUP1 (0x2D)
84 #define PM8607_GROUP2 (0x2E)
85 #define PM8607_GROUP3 (0x2F)
86 #define PM8607_GROUP4 (0x30)
87 #define PM8607_GROUP5 (0x31)
88 #define PM8607_GROUP6 (0x32)
89 #define PM8607_SUPPLIES_EN21 (0x33)
90 #define PM8607_SUPPLIES_EN22 (0x34)
92 /* RTC Control Registers */
93 #define PM8607_RTC1 (0xA0)
94 #define PM8607_RTC_COUNTER1 (0xA1)
95 #define PM8607_RTC_COUNTER2 (0xA2)
96 #define PM8607_RTC_COUNTER3 (0xA3)
97 #define PM8607_RTC_COUNTER4 (0xA4)
98 #define PM8607_RTC_EXPIRE1 (0xA5)
99 #define PM8607_RTC_EXPIRE2 (0xA6)
100 #define PM8607_RTC_EXPIRE3 (0xA7)
101 #define PM8607_RTC_EXPIRE4 (0xA8)
102 #define PM8607_RTC_TRIM1 (0xA9)
103 #define PM8607_RTC_TRIM2 (0xAA)
104 #define PM8607_RTC_TRIM3 (0xAB)
105 #define PM8607_RTC_TRIM4 (0xAC)
106 #define PM8607_RTC_MISC1 (0xAD)
107 #define PM8607_RTC_MISC2 (0xAE)
108 #define PM8607_RTC_MISC3 (0xAF)
111 #define PM8607_CHIP_ID (0x00)
112 #define PM8607_LDO1 (0x10)
113 #define PM8607_DVC3 (0x26)
114 #define PM8607_MISC1 (0x40)
116 /* bit definitions for PM8607 events */
117 #define PM8607_EVENT_ONKEY (1 << 0)
118 #define PM8607_EVENT_EXTON (1 << 1)
119 #define PM8607_EVENT_CHG (1 << 2)
120 #define PM8607_EVENT_BAT (1 << 3)
121 #define PM8607_EVENT_RTC (1 << 4)
122 #define PM8607_EVENT_CC (1 << 5)
123 #define PM8607_EVENT_VBAT (1 << 8)
124 #define PM8607_EVENT_VCHG (1 << 9)
125 #define PM8607_EVENT_VSYS (1 << 10)
126 #define PM8607_EVENT_TINT (1 << 11)
127 #define PM8607_EVENT_GPADC0 (1 << 12)
128 #define PM8607_EVENT_GPADC1 (1 << 13)
129 #define PM8607_EVENT_GPADC2 (1 << 14)
130 #define PM8607_EVENT_GPADC3 (1 << 15)
131 #define PM8607_EVENT_AUDIO_SHORT (1 << 16)
132 #define PM8607_EVENT_PEN (1 << 17)
133 #define PM8607_EVENT_HEADSET (1 << 18)
134 #define PM8607_EVENT_HOOK (1 << 19)
135 #define PM8607_EVENT_MICIN (1 << 20)
136 #define PM8607_EVENT_CHG_TIMEOUT (1 << 21)
137 #define PM8607_EVENT_CHG_DONE (1 << 22)
138 #define PM8607_EVENT_CHG_FAULT (1 << 23)
140 /* bit definitions of Status Query Interface */
141 #define PM8607_STATUS_CC (1 << 3)
142 #define PM8607_STATUS_PEN (1 << 4)
143 #define PM8607_STATUS_HEADSET (1 << 5)
144 #define PM8607_STATUS_HOOK (1 << 6)
145 #define PM8607_STATUS_MICIN (1 << 7)
146 #define PM8607_STATUS_ONKEY (1 << 8)
147 #define PM8607_STATUS_EXTON (1 << 9)
148 #define PM8607_STATUS_CHG (1 << 10)
149 #define PM8607_STATUS_BAT (1 << 11)
150 #define PM8607_STATUS_VBUS (1 << 12)
151 #define PM8607_STATUS_OV (1 << 13)
153 /* bit definitions of BUCK3 */
154 #define PM8607_BUCK3_DOUBLE (1 << 6)
156 /* bit definitions of Misc1 */
157 #define PM8607_MISC1_PI2C (1 << 0)
159 /* Interrupt Number in 88PM8607 */
161 PM8607_IRQ_ONKEY = 0,
174 PM8607_IRQ_AUDIO_SHORT = 16,
181 PM8607_IRQ_CHG_FAULT,
185 PM8607_CHIP_A0 = 0x40,
186 PM8607_CHIP_A1 = 0x41,
187 PM8607_CHIP_B0 = 0x48,
192 struct mutex io_lock;
193 struct i2c_client *client;
194 struct i2c_client *companion; /* companion chip client */
196 int buck3_double; /* DVC ramp slope double */
197 unsigned short companion_addr;
199 unsigned char chip_version;
203 #define PM8607_MAX_REGULATOR 15 /* 3 Bucks, 12 LDOs */
210 struct pm860x_platform_data {
211 unsigned short companion_addr; /* I2C address of companion chip */
212 int i2c_port; /* Controlled by GI2C or PI2C */
213 struct regulator_init_data *regulator[PM8607_MAX_REGULATOR];
216 extern int pm860x_reg_read(struct i2c_client *, int);
217 extern int pm860x_reg_write(struct i2c_client *, int, unsigned char);
218 extern int pm860x_bulk_read(struct i2c_client *, int, int, unsigned char *);
219 extern int pm860x_bulk_write(struct i2c_client *, int, int, unsigned char *);
220 extern int pm860x_set_bits(struct i2c_client *, int, unsigned char,
223 extern int pm860x_device_init(struct pm860x_chip *chip,
224 struct pm860x_platform_data *pdata);
225 extern void pm860x_device_exit(struct pm860x_chip *chip);
227 #endif /* __LINUX_MFD_88PM860X_H */