1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2015 Freescale Semiconductor
4 * Copyright 2019-2021 NXP
7 #ifndef __LS1043A_COMMON_H
8 #define __LS1043A_COMMON_H
11 #ifdef CONFIG_SPL_BUILD
22 #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT))
25 #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT_QSPI))
29 #include <asm/arch/stream_id_lsch2.h>
30 #include <asm/arch/config.h>
32 /* Link Definitions */
34 #define CONFIG_VERY_BIG_RAM
35 #define CFG_SYS_DDR_SDRAM_BASE 0x80000000
36 #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
37 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE
38 #define CFG_SYS_DDR_BLOCK2_BASE 0x880000000ULL
40 #define CPU_RELEASE_ADDR secondary_boot_addr
43 #define CFG_SYS_NS16550_CLK (get_serial_clock())
47 #ifdef CONFIG_NXP_ESBC
48 #define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
50 * HDR would be appended at end of image and copied to DDR along
51 * with U-Boot image. Here u-boot max. size is 512K. So if binary
52 * size increases then increase this size in case of secure boot as
53 * it uses raw u-boot image instead of fit image.
55 #endif /* ifdef CONFIG_NXP_ESBC */
59 #ifdef CONFIG_NAND_BOOT
60 #define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE
61 #define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
63 #ifdef CONFIG_NXP_ESBC
64 #define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
65 #endif /* ifdef CONFIG_NXP_ESBC */
67 #ifdef CONFIG_U_BOOT_HDR_SIZE
69 * HDR would be appended at end of image and copied to DDR along
70 * with U-Boot image. Here u-boot max. size is 512K. So if binary
71 * size increases then increase this size in case of secure boot as
72 * it uses raw u-boot image instead of fit image.
74 #endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */
82 #if defined(CONFIG_TFABOOT) || \
83 (!defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI))
85 * CFG_SYS_FLASH_BASE has the final address (core view)
86 * CFG_SYS_FLASH_BASE_PHYS has the final address (IFC view)
87 * CFG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address
88 * CONFIG_TEXT_BASE is linked to 0x60000000 for booting
90 #define CFG_SYS_FLASH_BASE 0x60000000
91 #define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE
92 #define CFG_SYS_FLASH_BASE_PHYS_EARLY 0x00000000
94 #ifdef CONFIG_MTD_NOR_FLASH
95 #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
106 #ifdef CONFIG_SYS_DPAA_FMAN
107 #define CFG_SYS_FM_MURAM_SIZE 0x60000
111 /* Miscellaneous configurable options */
113 #define CONFIG_HWCONFIG
114 #define HWCONFIG_BUFFER_SIZE 128
117 #define BOOT_TARGET_DEVICES(func) \
121 #include <config_distro_bootcmd.h>
123 /* Initial environment variables */
124 #define CONFIG_EXTRA_ENV_SETTINGS \
125 "hwconfig=fsl_ddr:bank_intlv=auto\0" \
126 "fdt_high=0xffffffffffffffff\0" \
127 "initrd_high=0xffffffffffffffff\0" \
128 "kernel_addr=0x61000000\0" \
129 "scriptaddr=0x80000000\0" \
130 "scripthdraddr=0x80080000\0" \
131 "fdtheader_addr_r=0x80100000\0" \
132 "kernelheader_addr_r=0x80200000\0" \
133 "kernel_addr_r=0x81000000\0" \
134 "kernel_start=0x1000000\0" \
135 "kernelheader_start=0x800000\0" \
136 "fdt_addr_r=0x90000000\0" \
137 "load_addr=0xa0000000\0" \
138 "kernelheader_addr=0x60600000\0" \
139 "kernel_size=0x2800000\0" \
140 "kernelheader_size=0x40000\0" \
141 "kernel_addr_sd=0x8000\0" \
142 "kernel_size_sd=0x14000\0" \
143 "kernelhdr_addr_sd=0x3000\0" \
144 "kernelhdr_size_sd=0x10\0" \
145 "console=ttyS0,115200\0" \
148 "boot_scripts=ls1043ardb_boot.scr\0" \
149 "boot_script_hdr=hdr_ls1043ardb_bs.out\0" \
150 "scan_dev_for_boot_part=" \
151 "part list ${devtype} ${devnum} devplist; " \
152 "env exists devplist || setenv devplist 1; " \
153 "for distro_bootpart in ${devplist}; do " \
154 "if fstype ${devtype} " \
155 "${devnum}:${distro_bootpart} " \
156 "bootfstype; then " \
157 "run scan_dev_for_boot; " \
161 "load ${devtype} ${devnum}:${distro_bootpart} " \
162 "${scriptaddr} ${prefix}${script}; " \
163 "env exists secureboot && load ${devtype} " \
164 "${devnum}:${distro_bootpart} " \
165 "${scripthdraddr} ${prefix}${boot_script_hdr}; " \
166 "env exists secureboot " \
167 "&& esbc_validate ${scripthdraddr};" \
168 "source ${scriptaddr}\0" \
169 "qspi_bootcmd=echo Trying load from qspi..;" \
170 "sf probe && sf read $load_addr " \
171 "$kernel_start $kernel_size; env exists secureboot " \
172 "&& sf read $kernelheader_addr_r $kernelheader_start " \
173 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
174 "bootm $load_addr#$board\0" \
175 "nor_bootcmd=echo Trying load from nor..;" \
176 "cp.b $kernel_addr $load_addr " \
177 "$kernel_size; env exists secureboot " \
178 "&& cp.b $kernelheader_addr $kernelheader_addr_r " \
179 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
180 "bootm $load_addr#$board\0" \
181 "nand_bootcmd=echo Trying load from NAND..;" \
182 "nand info; nand read $load_addr " \
183 "$kernel_start $kernel_size; env exists secureboot " \
184 "&& nand read $kernelheader_addr_r $kernelheader_start " \
185 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
186 "bootm $load_addr#$board\0" \
187 "sd_bootcmd=echo Trying load from SD ..;" \
188 "mmcinfo; mmc read $load_addr " \
189 "$kernel_addr_sd $kernel_size_sd && " \
190 "env exists secureboot && mmc read $kernelheader_addr_r " \
191 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
192 " && esbc_validate ${kernelheader_addr_r};" \
193 "bootm $load_addr#$board\0"
196 #ifdef CONFIG_TFABOOT
197 #define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \
198 "env exists secureboot && esbc_halt;"
199 #define SD_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; " \
200 "env exists secureboot && esbc_halt;"
201 #define IFC_NOR_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; " \
202 "env exists secureboot && esbc_halt;"
203 #define IFC_NAND_BOOTCOMMAND "run distro_bootcmd; run nand_bootcmd; " \
204 "env exists secureboot && esbc_halt;"
208 #include <asm/arch/soc.h>
210 #endif /* __LS1043A_COMMON_H */