1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Configuration settings for the EXYNOS 78x0 based boards.
5 * Copyright (c) 2020 Dzmitry Sankouski (dsankouski@gmail.com)
6 * based on include/exynos7420-common.h
7 * Copyright (C) 2016 Samsung Electronics
8 * Thomas Abraham <thomas.ab@samsung.com>
11 #ifndef __CONFIG_EXYNOS78x0_COMMON_H
12 #define __CONFIG_EXYNOS78x0_COMMON_H
14 #include <asm/arch/cpu.h> /* get chip and board defs */
15 #include <linux/sizes.h>
17 /* Miscellaneous configurable options */
19 #define CPU_RELEASE_ADDR secondary_boot_addr
21 #define CFG_SYS_BAUDRATE_TABLE \
22 {9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600}
24 #define CFG_SYS_SDRAM_BASE 0x40000000
25 /* DRAM Memory Banks */
26 #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
27 #define PHYS_SDRAM_1 CFG_SYS_SDRAM_BASE
28 #define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
29 #define PHYS_SDRAM_2 (CFG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
30 #define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
31 #define PHYS_SDRAM_3 (CFG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
32 #define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
33 #define PHYS_SDRAM_4 (CFG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
34 #define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
35 #define PHYS_SDRAM_5 (CFG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE))
36 #define PHYS_SDRAM_5_SIZE SDRAM_BANK_SIZE
37 #define PHYS_SDRAM_6 (CFG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE))
38 #define PHYS_SDRAM_6_SIZE SDRAM_BANK_SIZE
39 #define PHYS_SDRAM_7 (CFG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE))
40 #define PHYS_SDRAM_7_SIZE SDRAM_BANK_SIZE
41 #define PHYS_SDRAM_8 (CFG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE))
42 #define PHYS_SDRAM_8_SIZE SDRAM_BANK_SIZE
43 #define PHYS_SDRAM_9 (CFG_SYS_SDRAM_BASE + (8 * SDRAM_BANK_SIZE))
44 #define PHYS_SDRAM_9_SIZE SDRAM_BANK_SIZE
45 #define PHYS_SDRAM_10 (CFG_SYS_SDRAM_BASE + (9 * SDRAM_BANK_SIZE))
46 #define PHYS_SDRAM_10_SIZE SDRAM_BANK_SIZE
47 #define PHYS_SDRAM_11 (CFG_SYS_SDRAM_BASE + (10 * SDRAM_BANK_SIZE))
48 #define PHYS_SDRAM_11_SIZE SDRAM_BANK_SIZE
49 #define PHYS_SDRAM_12 (CFG_SYS_SDRAM_BASE + (11 * SDRAM_BANK_SIZE))
50 #define PHYS_SDRAM_12_SIZE SDRAM_BANK_SIZE
52 #ifndef MEM_LAYOUT_ENV_SETTINGS
53 #define MEM_LAYOUT_ENV_SETTINGS \
54 "bootm_size=0x10000000\0" \
55 "bootm_low=0x40000000\0"
58 #ifndef EXYNOS_DEVICE_SETTINGS
59 #define EXYNOS_DEVICE_SETTINGS \
65 #ifndef EXYNOS_FDTFILE_SETTING
66 #define EXYNOS_FDTFILE_SETTING
69 /* Cannot use bootdelay > 0, because timer is not working */
70 #define EXTRA_ENV_SETTINGS \
72 "bootcmd=source $prevbl_initrd_start_addr:bootscript\0" \
73 EXYNOS_DEVICE_SETTINGS \
74 EXYNOS_FDTFILE_SETTING \
75 MEM_LAYOUT_ENV_SETTINGS
77 #define CONFIG_EXTRA_ENV_SETTINGS \
80 #endif /* __CONFIG_EXYNOS78x0_COMMON_H */