2 * (C) Copyright 2003-2014
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * (C) Copyright 2004-2006
6 * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
8 * SPDX-License-Identifier: GPL-2.0+
15 * High Level Configuration Options
19 #define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */
20 #define CONFIG_TQM5200 1 /* ... on TQM5200 module */
21 #undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */
24 * Valid values for CONFIG_SYS_TEXT_BASE are:
25 * 0xFC000000 boot low (standard configuration with room for
26 * max 64 MByte Flash ROM)
27 * 0xFFF00000 boot high (for a backup copy of U-Boot)
28 * 0x00100000 boot from RAM (for testing only)
30 #ifndef CONFIG_SYS_TEXT_BASE
31 #define CONFIG_SYS_TEXT_BASE 0xFC000000
34 /* On a Cameron or on a FO300 board or ... */
35 #if !defined(CONFIG_CAM5200) && !defined(CONFIG_CHARON) \
36 && !defined(CONFIG_FO300)
37 #define CONFIG_STK52XX 1 /* ... on a STK52XX board */
40 #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
42 #define CONFIG_HIGH_BATS 1 /* High BATs supported */
45 * Serial console configuration
47 #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
48 #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
49 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
50 #define CONFIG_BOOTCOUNT_LIMIT 1
53 #define CONFIG_SYS_DEVICE_NULLDEV 1 /* enable null device */
54 #define CONFIG_BOARD_EARLY_INIT_F 1 /* used to detect S1 switch position */
55 #define CONFIG_USB_BIN_FIXUP 1 /* for a buggy USB device */
57 #define FO300_SILENT_CONSOLE_WHEN_S1_CLOSED 1 /* silent console on PSC1 when S1 */
58 /* switch is closed */
61 #undef FO300_SILENT_CONSOLE_WHEN_S1_CLOSED /* silent console on PSC1 when S1 */
63 #endif /* CONFIG_FO300 */
65 #if defined(CONFIG_CHARON) || defined(CONFIG_STK52XX)
66 #define CONFIG_PS2KBD /* AT-PS/2 Keyboard */
67 #define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */
68 #define CONFIG_PS2SERIAL 6 /* .. on PSC6 */
69 #define CONFIG_PS2MULT_DELAY (CONFIG_SYS_HZ/2) /* Initial delay */
70 #define CONFIG_BOARD_EARLY_INIT_R
71 #endif /* CONFIG_STK52XX */
75 * 0x40000000 - 0x4fffffff - PCI Memory
76 * 0x50000000 - 0x50ffffff - PCI IO Space
78 #if defined(CONFIG_CHARON) || defined(CONFIG_STK52XX)
80 #define CONFIG_PCI_PNP 1
81 /* #define CONFIG_PCI_SCAN_SHOW 1 */
83 #define CONFIG_PCI_MEM_BUS 0x40000000
84 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
85 #define CONFIG_PCI_MEM_SIZE 0x10000000
87 #define CONFIG_PCI_IO_BUS 0x50000000
88 #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
89 #define CONFIG_PCI_IO_SIZE 0x01000000
91 #define CONFIG_EEPRO100 1
92 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
93 #define CONFIG_NS8382X 1
94 #endif /* CONFIG_STK52XX */
99 #ifndef CONFIG_TQM5200S /* No graphics controller on TQM5200S */
100 #define CONFIG_VIDEO_SM501
101 #define CONFIG_VIDEO_SM501_32BPP
102 #define CONFIG_VIDEO_LOGO
105 #define CONFIG_CONSOLE_EXTRA_INFO
107 #define CONFIG_VIDEO_BMP_LOGO
110 #define CONFIG_VGA_AS_SINGLE_DEVICE
111 #define CONFIG_VIDEO_SW_CURSOR
112 #define CONFIG_SPLASH_SCREEN
113 #endif /* #ifndef CONFIG_TQM5200S */
116 #define CONFIG_MAC_PARTITION
117 #define CONFIG_DOS_PARTITION
118 #define CONFIG_ISO_PARTITION
121 #if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
122 defined(CONFIG_STK52XX)
123 #define CONFIG_USB_OHCI_NEW
124 #define CONFIG_SYS_OHCI_BE_CONTROLLER
126 #undef CONFIG_SYS_USB_OHCI_BOARD_INIT
127 #define CONFIG_SYS_USB_OHCI_CPU_INIT
128 #define CONFIG_SYS_USB_OHCI_REGS_BASE MPC5XXX_USB
129 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "mpc5200"
130 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
134 #ifndef CONFIG_CAM5200
136 #define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \
137 CONFIG_SYS_POST_CPU | \
142 /* preserve space for the post_word at end of on-chip SRAM */
143 #define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
149 #define CONFIG_BOOTP_BOOTFILESIZE
150 #define CONFIG_BOOTP_BOOTPATH
151 #define CONFIG_BOOTP_GATEWAY
152 #define CONFIG_BOOTP_HOSTNAME
155 * Command line configuration.
157 #define CONFIG_CMD_DATE
158 #define CONFIG_CMD_EEPROM
159 #define CONFIG_CMD_JFFS2
160 #define CONFIG_CMD_REGINFO
161 #define CONFIG_CMD_BSP
164 #define CONFIG_CMD_BMP
168 #define CONFIG_CMD_PCI
169 #define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
172 #if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
173 defined(CONFIG_MINIFAP) || defined(CONFIG_STK52XX)
174 #define CONFIG_CMD_IDE
177 #if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
178 defined(CONFIG_STK52XX)
179 #define CONFIG_CFG_USB
180 #define CONFIG_CFG_FAT
184 #define CONFIG_CMD_DIAG
187 #define CONFIG_TIMESTAMP /* display image timestamps */
189 #if (CONFIG_SYS_TEXT_BASE != 0xFFF00000)
190 # define CONFIG_SYS_LOWBOOT 1 /* Boot low */
197 #define CONFIG_PREBOOT "echo;" \
198 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
201 #undef CONFIG_BOOTARGS
203 #if defined(CONFIG_TQM5200_B) && !defined(CONFIG_SYS_LOWBOOT)
205 "update=protect off FFF00000 +${filesize};" \
206 "erase FFF00000 +${filesize};" \
207 "cp.b 200000 FFF00000 ${filesize};" \
208 "protect on FFF00000 +${filesize}\0"
209 #else /* default lowboot configuration */
211 "update=protect off FC000000 +${filesize};" \
212 "erase FC000000 +${filesize};" \
213 "cp.b 200000 FC000000 ${filesize};" \
214 "protect on FC000000 +${filesize}\0"
217 #if defined(CONFIG_TQM5200)
218 #define CUSTOM_ENV_SETTINGS \
219 "hostname=tqm5200\0" \
220 "bootfile=/tftpboot/tqm5200/uImage\0" \
221 "fdt_file=/tftpboot/tqm5200/tqm5200.dtb\0" \
222 "u-boot=/tftpboot/tqm5200/u-boot.bin\0"
223 #elif defined(CONFIG_CAM5200)
224 #define CUSTOM_ENV_SETTINGS \
225 "bootfile=cam5200/uImage\0" \
226 "u-boot=cam5200/u-boot.bin\0" \
227 "setup=tftp 200000 cam5200/setup.img; source 200000\0"
230 #if defined(CONFIG_TQM5200_B)
231 #define ENV_FLASH_LAYOUT \
232 "fdt_addr=FC100000\0" \
233 "kernel_addr=FC140000\0" \
234 "ramdisk_addr=FC600000\0"
235 #elif defined(CONFIG_CHARON)
236 #define ENV_FLASH_LAYOUT \
237 "fdt_addr=FDFC0000\0" \
238 "kernel_addr=FC0A0000\0" \
239 "ramdisk_addr=FC200000\0"
240 #else /* !CONFIG_TQM5200_B */
241 #define ENV_FLASH_LAYOUT \
242 "fdt_addr=FC0A0000\0" \
243 "kernel_addr=FC0C0000\0" \
244 "ramdisk_addr=FC300000\0"
247 #define CONFIG_EXTRA_ENV_SETTINGS \
249 "console=ttyPSC0\0" \
251 "kernel_addr_r=400000\0" \
252 "fdt_addr_r=600000\0" \
253 "rootpath=/opt/eldk/ppc_6xx\0" \
254 "ramargs=setenv bootargs root=/dev/ram rw\0" \
255 "nfsargs=setenv bootargs root=/dev/nfs rw " \
256 "nfsroot=${serverip}:${rootpath}\0" \
257 "addip=setenv bootargs ${bootargs} " \
258 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
259 ":${hostname}:${netdev}:off panic=1\0" \
260 "addcons=setenv bootargs ${bootargs} " \
261 "console=${console},${baudrate}\0" \
262 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
263 "flash_self_old=sete console ttyS0; " \
264 "run ramargs addip addcons addmtd; " \
265 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
266 "flash_self=run ramargs addip addcons;" \
267 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
268 "flash_nfs_old=sete console ttyS0; run nfsargs addip addcons;" \
269 "bootm ${kernel_addr}\0" \
270 "flash_nfs=run nfsargs addip addcons;" \
271 "bootm ${kernel_addr} - ${fdt_addr}\0" \
272 "net_nfs_old=tftp ${kernel_addr_r} ${bootfile};" \
273 "sete console ttyS0; run nfsargs addip addcons;bootm\0" \
274 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
275 "tftp ${fdt_addr_r} ${fdt_file}; " \
276 "run nfsargs addip addcons addmtd; " \
277 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
278 CUSTOM_ENV_SETTINGS \
279 "load=tftp 200000 ${u-boot}\0" \
283 #define CONFIG_BOOTCOMMAND "run net_nfs"
286 * IPB Bus clocking configuration.
288 #define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
290 #if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK) && !defined(CONFIG_CAM5200)
292 * PCI Bus clocking configuration
294 * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
295 * CONFIG_SYS_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock of
296 * 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
298 #define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
304 #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
305 #ifdef CONFIG_TQM5200_REV100
306 #define CONFIG_SYS_I2C_MODULE 1 /* Select I2C module #1 for rev. 100 board */
308 #define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #2 for all other revs */
312 * I2C clock frequency
314 * Please notice, that the resulting clock frequency could differ from the
315 * configured value. This is because the I2C clock is derived from system
316 * clock over a frequency divider with only a few divider values. U-Boot
317 * calculates the best approximation for CONFIG_SYS_I2C_SPEED. However the calculated
318 * approximation allways lies below the configured value, never above.
320 #define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
321 #define CONFIG_SYS_I2C_SLAVE 0x7F
324 * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
325 * also). For other EEPROMs configuration should be verified. On Mini-FAP the
326 * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
327 * same configuration could be used.
329 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
330 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
331 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
332 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
335 * HW-Monitor configuration on Mini-FAP
337 #if defined (CONFIG_MINIFAP)
338 #define CONFIG_SYS_I2C_HWMON_ADDR 0x2C
341 /* List of I2C addresses to be verified by POST */
342 #if defined (CONFIG_MINIFAP)
343 #undef CONFIG_SYS_POST_I2C_ADDRS
344 #define CONFIG_SYS_POST_I2C_ADDRS {CONFIG_SYS_I2C_EEPROM_ADDR, \
345 CONFIG_SYS_I2C_HWMON_ADDR, \
346 CONFIG_SYS_I2C_SLAVE}
350 * Flash configuration
352 #define CONFIG_SYS_FLASH_BASE 0xFC000000
354 #if defined(CONFIG_CAM5200) && defined(CONFIG_CAM5200_NIOSFLASH)
355 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max num of flash banks
357 #define CONFIG_SYS_FLASH_WORD_SIZE unsigned int /* main flash device with */
358 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
359 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
361 #define CONFIG_SYS_FLASH_ADDR0 0x555
362 #define CONFIG_SYS_FLASH_ADDR1 0x2AA
363 #define CONFIG_SYS_FLASH_2ND_16BIT_DEV 1 /* NIOS flash is a 16bit device */
364 #define CONFIG_SYS_MAX_FLASH_SECT 128
366 /* use CFI flash driver */
367 #define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */
368 #define CONFIG_FLASH_CFI_DRIVER 1 /* Use the common driver */
369 #define CONFIG_FLASH_CFI_MTD /* with MTD support */
370 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_BOOTCS_START }
371 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks
373 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max num of sects on one chip */
376 #define CONFIG_SYS_FLASH_EMPTY_INFO
377 #define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MByte */
378 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
380 #if defined (CONFIG_CAM5200)
381 # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00040000)
382 #elif defined(CONFIG_TQM5200_B)
383 # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00080000)
385 # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00060000)
388 /* Dynamic MTD partition support */
389 #define CONFIG_CMD_MTDPARTS
390 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
391 #define MTDIDS_DEFAULT "nor0=fc000000.flash"
393 #if defined(CONFIG_STK52XX)
394 # if defined(CONFIG_TQM5200_B)
395 # if defined(CONFIG_SYS_LOWBOOT)
396 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:1m(firmware)," \
403 # else /* highboot */
404 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:2560k(kernel),"\
410 # endif /* CONFIG_SYS_LOWBOOT */
411 # else /* !CONFIG_TQM5200_B */
412 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
419 # endif /* CONFIG_TQM5200_B */
420 #elif defined (CONFIG_CAM5200)
421 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:768k(firmware),"\
425 #elif defined (CONFIG_CHARON)
426 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
432 #elif defined (CONFIG_FO300)
433 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
440 # error "Unknown Carrier Board"
441 #endif /* CONFIG_STK52XX */
444 * Environment settings
446 #define CONFIG_ENV_IS_IN_FLASH 1
447 #define CONFIG_ENV_SIZE 0x4000 /* 16 k - keep small for fast booting */
448 #if defined(CONFIG_TQM5200_B) || defined (CONFIG_CAM5200)
449 #define CONFIG_ENV_SECT_SIZE 0x40000
451 #define CONFIG_ENV_SECT_SIZE 0x20000
452 #endif /* CONFIG_TQM5200_B */
453 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
454 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
459 #define CONFIG_SYS_MBAR 0xF0000000
460 #define CONFIG_SYS_SDRAM_BASE 0x00000000
461 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
463 /* Use ON-Chip SRAM until RAM will be available */
464 #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
466 /* preserve space for the post_word at end of on-chip SRAM */
467 #define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_POST_SIZE
469 #define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE
472 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
473 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
475 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
476 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
477 # define CONFIG_SYS_RAMBOOT 1
480 #if defined (CONFIG_CAM5200)
481 # define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
482 #elif defined(CONFIG_TQM5200_B)
483 # define CONFIG_SYS_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
485 # define CONFIG_SYS_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
488 #define CONFIG_SYS_MALLOC_LEN (1024 << 10) /* Reserve 1024 kB for malloc() */
489 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
492 * Ethernet configuration
494 #define CONFIG_MPC5xxx_FEC 1
495 #define CONFIG_MPC5xxx_FEC_MII100
497 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
499 /* #define CONFIG_MPC5xxx_FEC_MII10 */
500 #define CONFIG_PHY_ADDR 0x00
505 * use CS1: Bit 0 (mask: 0x80000000):
506 * 1 -> Pin gpio_wkup_6 as second SDRAM chip select (mem_cs1).
507 * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
508 * 00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
509 * SPI on PSC3 according to PSC3 setting. Use for CAM5200.
510 * 01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
511 * Use for REV200 STK52XX boards and FO300 boards. Do not use
512 * with REV100 modules (because, there I2C1 is used as I2C bus).
513 * use ATA: Bits 6-7 (mask 0x03000000):
514 * 00 -> No ATA chip selects, csb_4/5 used as normal chip selects.
515 * Use for CAM5200 board.
516 * 01 -> ATA cs0/1 on csb_4/5. Use for the remaining boards.
517 * use PSC6: Bits 9-11 (mask 0x00700000):
518 * 000 -> use PSC6_0 to PSC6_3 as GPIO, PSC6 could not be used as
519 * UART, CODEC or IrDA.
520 * GPIO on PSC6_3 is used in post_hotkeys_pressed() to
521 * enable extended POST tests.
522 * Use for MINI-FAP and TQM5200_IB boards.
523 * 101 -> use PSC6 as UART. Pins PSC6_0 to PSC6_3 are used.
524 * Extended POST test is not available.
525 * Use for STK52xx, FO300 and CAM5200 boards.
526 * WARNING: When the extended POST is enabled, these bits will
527 * be overridden by this code as GPIOs!
528 * use PCI_DIS: Bit 16 (mask 0x00008000):
529 * 1 -> disable PCI controller (on CAM5200 board).
530 * use USB: Bits 18-19 (mask 0x00003000):
531 * 10 -> two UARTs (on FO300 and CAM5200).
532 * use PSC3: Bits 20-23 (mask: 0x00000f00):
533 * 0000 -> All PSC3 pins are GPIOs.
534 * 1100 -> UART/SPI (on FO300 board).
535 * 0100 -> UART (on CAM5200 board).
536 * use PSC2: Bits 25:27 (mask: 0x00000030):
537 * 000 -> All PSC2 pins are GPIOs.
538 * 100 -> UART (on CAM5200 board).
539 * 001 -> CAN1/2 on PSC2 pins.
540 * Use for REV100 STK52xx boards
541 * 01x -> Use AC97 (on FO300 board).
542 * use PSC1: Bits 29-31 (mask: 0x00000007):
543 * 100 -> UART (on all boards).
545 #if !defined(CONFIG_SYS_GPS_PORT_CONFIG)
546 #if defined (CONFIG_MINIFAP)
547 # define CONFIG_SYS_GPS_PORT_CONFIG 0x91000004
548 #elif defined (CONFIG_STK52XX)
549 # if defined (CONFIG_STK52XX_REV100)
550 # define CONFIG_SYS_GPS_PORT_CONFIG 0x81500014
551 # else /* STK52xx REV200 and above */
552 # if defined (CONFIG_TQM5200_REV100)
553 # error TQM5200 REV100 not supported on STK52XX REV200 or above
554 # else/* TQM5200 REV200 and above */
555 # define CONFIG_SYS_GPS_PORT_CONFIG 0x91500404
558 #elif defined (CONFIG_FO300)
559 # define CONFIG_SYS_GPS_PORT_CONFIG 0x91502c24
560 #elif defined (CONFIG_CAM5200)
561 # define CONFIG_SYS_GPS_PORT_CONFIG 0x8050A444
562 #else /* TMQ5200 Inbetriebnahme-Board */
563 # define CONFIG_SYS_GPS_PORT_CONFIG 0x81000004
570 #if defined (CONFIG_STK52XX) && !defined (CONFIG_STK52XX_REV100)
571 # define CONFIG_RTC_M41T11 1
572 # define CONFIG_SYS_I2C_RTC_ADDR 0x68
573 # define CONFIG_SYS_M41T11_BASE_YEAR 1900 /* because Linux uses the same base
576 # define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
580 * Miscellaneous configurable options
582 #define CONFIG_SYS_LONGHELP /* undef to save memory */
584 #define CONFIG_CMDLINE_EDITING 1 /* add command line history */
586 #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
587 #if defined(CONFIG_CMD_KGDB)
588 #define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
591 #if defined(CONFIG_CMD_KGDB)
592 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
594 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
596 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
597 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
598 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
600 /* Enable an alternate, more extensive memory test */
601 #define CONFIG_SYS_ALT_MEMTEST
603 #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
604 #define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
606 #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
609 * Various low-level settings
611 #define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
612 #define CONFIG_SYS_HID0_FINAL HID0_ICE
614 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
615 #define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
616 #ifdef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
617 #define CONFIG_SYS_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
619 #define CONFIG_SYS_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
621 #define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
622 #define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
624 #define CONFIG_LAST_STAGE_INIT
627 * SRAM - Do not map below 2 GB in address space, because this area is used
628 * for SDRAM autosizing.
630 #define CONFIG_SYS_CS2_START 0xE5000000
631 #define CONFIG_SYS_CS2_SIZE 0x100000 /* 1 MByte */
632 #define CONFIG_SYS_CS2_CFG 0x0004D930
635 * Grafic controller - Do not map below 2 GB in address space, because this
636 * area is used for SDRAM autosizing.
638 #define SM501_FB_BASE 0xE0000000
639 #define CONFIG_SYS_CS1_START (SM501_FB_BASE)
640 #define CONFIG_SYS_CS1_SIZE 0x4000000 /* 64 MByte */
641 #define CONFIG_SYS_CS1_CFG 0x8F48FF70
642 #define SM501_MMIO_BASE CONFIG_SYS_CS1_START + 0x03E00000
644 #define CONFIG_SYS_CS_BURST 0x00000000
645 #define CONFIG_SYS_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */
647 #if defined(CONFIG_CAM5200)
648 #define CONFIG_SYS_CS4_START 0xB0000000
649 #define CONFIG_SYS_CS4_SIZE 0x00010000
650 #define CONFIG_SYS_CS4_CFG 0x01019C10
652 #define CONFIG_SYS_CS5_START 0xD0000000
653 #define CONFIG_SYS_CS5_SIZE 0x01208000
654 #define CONFIG_SYS_CS5_CFG 0x1414BF10
657 #define CONFIG_SYS_RESET_ADDRESS 0xff000000
659 /*-----------------------------------------------------------------------
661 *-----------------------------------------------------------------------
663 #define CONFIG_USB_CLOCK 0x0001BBBB
664 #define CONFIG_USB_CONFIG 0x00001000
666 /*-----------------------------------------------------------------------
667 * IDE/ATA stuff Supports IDE harddisk
668 *-----------------------------------------------------------------------
671 #undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
673 #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
674 #undef CONFIG_IDE_LED /* LED for ide not supported */
676 #define CONFIG_IDE_RESET /* reset for ide supported */
677 #define CONFIG_IDE_PREINIT
679 #define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
680 #define CONFIG_SYS_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
682 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
684 #define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA
686 /* Offset for data I/O */
687 #define CONFIG_SYS_ATA_DATA_OFFSET (0x0060)
689 /* Offset for normal register accesses */
690 #define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET)
692 /* Offset for alternate registers */
693 #define CONFIG_SYS_ATA_ALT_OFFSET (0x005C)
695 /* Interval between registers */
696 #define CONFIG_SYS_ATA_STRIDE 4
698 /* Support ATAPI devices */
699 #define CONFIG_ATAPI 1
701 /*-----------------------------------------------------------------------
702 * Open firmware flat tree support
703 *-----------------------------------------------------------------------
705 #define OF_CPU "PowerPC,5200@0"
706 #define OF_SOC "soc5200@f0000000"
707 #define OF_TBCLK (bd->bi_busfreq / 4)
708 #define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
710 #endif /* __CONFIG_H */