1 #ifndef _ASM_IA64_TLB_H
2 #define _ASM_IA64_TLB_H
4 * Based on <asm-generic/tlb.h>.
6 * Copyright (C) 2002-2003 Hewlett-Packard Co
7 * David Mosberger-Tang <davidm@hpl.hp.com>
10 * Removing a translation from a page table (including TLB-shootdown) is a four-step
13 * (1) Flush (virtual) caches --- ensures virtual memory is coherent with kernel memory
14 * (this is a no-op on ia64).
15 * (2) Clear the relevant portions of the page-table
16 * (3) Flush the TLBs --- ensures that stale content is gone from CPU TLBs
17 * (4) Release the pages that were freed up in step (2).
19 * Note that the ordering of these steps is crucial to avoid races on MP machines.
21 * The Linux kernel defines several platform-specific hooks for TLB-shootdown. When
22 * unmapping a portion of the virtual address space, these hooks are called according to
23 * the following template:
25 * tlb <- tlb_gather_mmu(mm, full_mm_flush); // start unmap for address space MM
27 * for each vma that needs a shootdown do {
28 * tlb_start_vma(tlb, vma);
29 * for each page-table-entry PTE that needs to be removed do {
30 * tlb_remove_tlb_entry(tlb, pte, address);
31 * if (pte refers to a normal page) {
32 * tlb_remove_page(tlb, page);
35 * tlb_end_vma(tlb, vma);
38 * tlb_finish_mmu(tlb, start, end); // finish unmap for address space MM
40 #include <linux/config.h>
42 #include <linux/pagemap.h>
43 #include <linux/swap.h>
45 #include <asm/pgalloc.h>
46 #include <asm/processor.h>
47 #include <asm/tlbflush.h>
48 #include <asm/machvec.h>
51 # define FREE_PTE_NR 2048
52 # define tlb_fast_mode(tlb) ((tlb)->nr == ~0U)
54 # define FREE_PTE_NR 0
55 # define tlb_fast_mode(tlb) (1)
60 unsigned int nr; /* == ~0U => fast mode */
61 unsigned char fullmm; /* non-zero means full mm flush */
62 unsigned char need_flush; /* really unmapped some PTEs? */
63 unsigned long start_addr;
64 unsigned long end_addr;
65 struct page *pages[FREE_PTE_NR];
68 /* Users of the generic TLB shootdown code must declare this storage space. */
69 DECLARE_PER_CPU(struct mmu_gather, mmu_gathers);
72 * Flush the TLB for address range START to END and, if not in fast mode, release the
73 * freed pages that where gathered up to this point.
76 ia64_tlb_flush_mmu (struct mmu_gather *tlb, unsigned long start, unsigned long end)
86 * Tearing down the entire address space. This happens both as a result
87 * of exit() and execve(). The latter case necessitates the call to
88 * flush_tlb_mm() here.
90 flush_tlb_mm(tlb->mm);
91 } else if (unlikely (end - start >= 1024*1024*1024*1024UL
92 || REGION_NUMBER(start) != REGION_NUMBER(end - 1)))
95 * If we flush more than a tera-byte or across regions, we're probably
96 * better off just flushing the entire TLB(s). This should be very rare
97 * and is not worth optimizing for.
102 * XXX fix me: flush_tlb_range() should take an mm pointer instead of a
105 struct vm_area_struct vma;
108 /* flush the address range from the tlb: */
109 flush_tlb_range(&vma, start, end);
110 /* now flush the virt. page-table area mapping the address range: */
111 flush_tlb_range(&vma, ia64_thash(start), ia64_thash(end));
114 /* lastly, release the freed pages */
116 if (!tlb_fast_mode(tlb)) {
119 tlb->start_addr = ~0UL;
120 for (i = 0; i < nr; ++i)
121 free_page_and_swap_cache(tlb->pages[i]);
126 * Return a pointer to an initialized struct mmu_gather.
128 static inline struct mmu_gather *
129 tlb_gather_mmu (struct mm_struct *mm, unsigned int full_mm_flush)
131 struct mmu_gather *tlb = &get_cpu_var(mmu_gathers);
135 * Use fast mode if only 1 CPU is online.
137 * It would be tempting to turn on fast-mode for full_mm_flush as well. But this
138 * doesn't work because of speculative accesses and software prefetching: the page
139 * table of "mm" may (and usually is) the currently active page table and even
140 * though the kernel won't do any user-space accesses during the TLB shoot down, a
141 * compiler might use speculation or lfetch.fault on what happens to be a valid
142 * user-space address. This in turn could trigger a TLB miss fault (or a VHPT
143 * walk) and re-insert a TLB entry we just removed. Slow mode avoids such
144 * problems. (We could make fast-mode work by switching the current task to a
145 * different "mm" during the shootdown.) --davidm 08/02/2002
147 tlb->nr = (num_online_cpus() == 1) ? ~0U : 0;
148 tlb->fullmm = full_mm_flush;
149 tlb->start_addr = ~0UL;
154 * Called at the end of the shootdown operation to free up any resources that were
158 tlb_finish_mmu (struct mmu_gather *tlb, unsigned long start, unsigned long end)
161 * Note: tlb->nr may be 0 at this point, so we can't rely on tlb->start_addr and
164 ia64_tlb_flush_mmu(tlb, start, end);
166 /* keep the page table cache within bounds */
169 put_cpu_var(mmu_gathers);
173 * Logically, this routine frees PAGE. On MP machines, the actual freeing of the page
174 * must be delayed until after the TLB has been flushed (see comments at the beginning of
178 tlb_remove_page (struct mmu_gather *tlb, struct page *page)
182 if (tlb_fast_mode(tlb)) {
183 free_page_and_swap_cache(page);
186 tlb->pages[tlb->nr++] = page;
187 if (tlb->nr >= FREE_PTE_NR)
188 ia64_tlb_flush_mmu(tlb, tlb->start_addr, tlb->end_addr);
192 * Remove TLB entry for PTE mapped at virtual address ADDRESS. This is called for any
193 * PTE, not just those pointing to (normal) physical memory.
196 __tlb_remove_tlb_entry (struct mmu_gather *tlb, pte_t *ptep, unsigned long address)
198 if (tlb->start_addr == ~0UL)
199 tlb->start_addr = address;
200 tlb->end_addr = address + PAGE_SIZE;
203 #define tlb_migrate_finish(mm) platform_tlb_migrate_finish(mm)
205 #define tlb_start_vma(tlb, vma) do { } while (0)
206 #define tlb_end_vma(tlb, vma) do { } while (0)
208 #define tlb_remove_tlb_entry(tlb, ptep, addr) \
210 tlb->need_flush = 1; \
211 __tlb_remove_tlb_entry(tlb, ptep, addr); \
214 #define pte_free_tlb(tlb, ptep) \
216 tlb->need_flush = 1; \
217 __pte_free_tlb(tlb, ptep); \
220 #define pmd_free_tlb(tlb, ptep) \
222 tlb->need_flush = 1; \
223 __pmd_free_tlb(tlb, ptep); \
226 #define pud_free_tlb(tlb, pudp) \
228 tlb->need_flush = 1; \
229 __pud_free_tlb(tlb, pudp); \
232 #endif /* _ASM_IA64_TLB_H */