5 #include <asm/segment.h>
9 #include <linux/preempt.h>
10 #include <linux/smp.h>
11 #include <linux/percpu.h>
15 extern struct desc_struct cpu_gdt_table[GDT_ENTRIES];
17 struct Xgt_desc_struct {
19 unsigned long address __attribute__((packed));
21 } __attribute__ ((packed));
23 extern struct Xgt_desc_struct idt_descr;
24 DECLARE_PER_CPU(struct Xgt_desc_struct, cpu_gdt_descr);
25 DECLARE_PER_CPU(struct desc_struct, cpu_gdt[GDT_ENTRIES]);
26 extern struct Xgt_desc_struct early_gdt_descr;
28 static inline struct desc_struct *get_cpu_gdt_table(unsigned int cpu)
30 return (struct desc_struct *)per_cpu(cpu_gdt_descr, cpu).address;
33 extern struct desc_struct idt_table[];
34 extern void set_intr_gate(unsigned int irq, void * addr);
36 static inline void pack_descriptor(__u32 *a, __u32 *b,
37 unsigned long base, unsigned long limit, unsigned char type, unsigned char flags)
39 *a = ((base & 0xffff) << 16) | (limit & 0xffff);
40 *b = (base & 0xff000000) | ((base & 0xff0000) >> 16) |
41 (limit & 0x000f0000) | ((type & 0xff) << 8) | ((flags & 0xf) << 20);
44 static inline void pack_gate(__u32 *a, __u32 *b,
45 unsigned long base, unsigned short seg, unsigned char type, unsigned char flags)
47 *a = (seg << 16) | (base & 0xffff);
48 *b = (base & 0xffff0000) | ((type & 0xff) << 8) | (flags & 0xff);
51 #define DESCTYPE_LDT 0x82 /* present, system, DPL-0, LDT */
52 #define DESCTYPE_TSS 0x89 /* present, system, DPL-0, 32-bit TSS */
53 #define DESCTYPE_TASK 0x85 /* present, system, DPL-0, task gate */
54 #define DESCTYPE_INT 0x8e /* present, system, DPL-0, interrupt gate */
55 #define DESCTYPE_TRAP 0x8f /* present, system, DPL-0, trap gate */
56 #define DESCTYPE_DPL3 0x60 /* DPL-3 */
57 #define DESCTYPE_S 0x10 /* !system */
59 #ifdef CONFIG_PARAVIRT
60 #include <asm/paravirt.h>
62 #define load_TR_desc() __asm__ __volatile__("ltr %w0"::"q" (GDT_ENTRY_TSS*8))
64 #define load_gdt(dtr) __asm__ __volatile("lgdt %0"::"m" (*dtr))
65 #define load_idt(dtr) __asm__ __volatile("lidt %0"::"m" (*dtr))
66 #define load_tr(tr) __asm__ __volatile("ltr %0"::"m" (tr))
67 #define load_ldt(ldt) __asm__ __volatile("lldt %0"::"m" (ldt))
69 #define store_gdt(dtr) __asm__ ("sgdt %0":"=m" (*dtr))
70 #define store_idt(dtr) __asm__ ("sidt %0":"=m" (*dtr))
71 #define store_tr(tr) __asm__ ("str %0":"=m" (tr))
72 #define store_ldt(ldt) __asm__ ("sldt %0":"=m" (ldt))
75 # error update this code.
78 static inline void load_TLS(struct thread_struct *t, unsigned int cpu)
80 #define C(i) get_cpu_gdt_table(cpu)[GDT_ENTRY_TLS_MIN + i] = t->tls_array[i]
85 #define write_ldt_entry(dt, entry, a, b) write_dt_entry(dt, entry, a, b)
86 #define write_gdt_entry(dt, entry, a, b) write_dt_entry(dt, entry, a, b)
87 #define write_idt_entry(dt, entry, a, b) write_dt_entry(dt, entry, a, b)
89 static inline void write_dt_entry(void *dt, int entry, __u32 entry_a, __u32 entry_b)
91 __u32 *lp = (__u32 *)((char *)dt + entry*8);
96 #define set_ldt native_set_ldt
97 #endif /* CONFIG_PARAVIRT */
99 static inline fastcall void native_set_ldt(const void *addr,
100 unsigned int entries)
102 if (likely(entries == 0))
103 __asm__ __volatile__("lldt %w0"::"q" (0));
105 unsigned cpu = smp_processor_id();
108 pack_descriptor(&a, &b, (unsigned long)addr,
109 entries * sizeof(struct desc_struct) - 1,
111 write_gdt_entry(get_cpu_gdt_table(cpu), GDT_ENTRY_LDT, a, b);
112 __asm__ __volatile__("lldt %w0"::"q" (GDT_ENTRY_LDT*8));
116 static inline void _set_gate(int gate, unsigned int type, void *addr, unsigned short seg)
119 pack_gate(&a, &b, (unsigned long)addr, seg, type, 0);
120 write_idt_entry(idt_table, gate, a, b);
123 static inline void __set_tss_desc(unsigned int cpu, unsigned int entry, const void *addr)
126 pack_descriptor(&a, &b, (unsigned long)addr,
127 offsetof(struct tss_struct, __cacheline_filler) - 1,
129 write_gdt_entry(get_cpu_gdt_table(cpu), entry, a, b);
133 #define set_tss_desc(cpu,addr) __set_tss_desc(cpu, GDT_ENTRY_TSS, addr)
135 #define LDT_entry_a(info) \
136 ((((info)->base_addr & 0x0000ffff) << 16) | ((info)->limit & 0x0ffff))
138 #define LDT_entry_b(info) \
139 (((info)->base_addr & 0xff000000) | \
140 (((info)->base_addr & 0x00ff0000) >> 16) | \
141 ((info)->limit & 0xf0000) | \
142 (((info)->read_exec_only ^ 1) << 9) | \
143 ((info)->contents << 10) | \
144 (((info)->seg_not_present ^ 1) << 15) | \
145 ((info)->seg_32bit << 22) | \
146 ((info)->limit_in_pages << 23) | \
147 ((info)->useable << 20) | \
150 #define LDT_empty(info) (\
151 (info)->base_addr == 0 && \
152 (info)->limit == 0 && \
153 (info)->contents == 0 && \
154 (info)->read_exec_only == 1 && \
155 (info)->seg_32bit == 0 && \
156 (info)->limit_in_pages == 0 && \
157 (info)->seg_not_present == 1 && \
158 (info)->useable == 0 )
160 static inline void clear_LDT(void)
166 * load one particular LDT into the current CPU
168 static inline void load_LDT_nolock(mm_context_t *pc)
170 set_ldt(pc->ldt, pc->size);
173 static inline void load_LDT(mm_context_t *pc)
180 static inline unsigned long get_desc_base(unsigned long *desc)
183 base = ((desc[0] >> 16) & 0x0000ffff) |
184 ((desc[1] << 16) & 0x00ff0000) |
185 (desc[1] & 0xff000000);
189 #else /* __ASSEMBLY__ */
192 * GET_DESC_BASE reads the descriptor base of the specified segment.
195 * idx - descriptor index
197 * base - 32bit register to which the base will be written
198 * lo_w - lo word of the "base" register
199 * lo_b - lo byte of the "base" register
200 * hi_b - hi byte of the low word of the "base" register
203 * GET_DESC_BASE(GDT_ENTRY_ESPFIX_SS, %ebx, %eax, %ax, %al, %ah)
204 * Will read the base address of GDT_ENTRY_ESPFIX_SS and put it into %eax.
206 #define GET_DESC_BASE(idx, gdt, base, lo_w, lo_b, hi_b) \
207 movb idx*8+4(gdt), lo_b; \
208 movb idx*8+7(gdt), hi_b; \
210 movw idx*8+2(gdt), lo_w;
212 #endif /* !__ASSEMBLY__ */