2 * include/asm-arm/arch-realview/board-eb.h
4 * Copyright (C) 2007 ARM Limited
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
21 #ifndef __ASM_ARCH_BOARD_EB_H
22 #define __ASM_ARCH_BOARD_EB_H
24 #include <asm/arch/platform.h>
27 * RealView EB + ARM11MPCore peripheral addresses
29 #define REALVIEW_EB_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */
30 #define REALVIEW_EB_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */
31 #define REALVIEW_EB_GIC_CPU_BASE 0x10040000 /* Generic interrupt controller CPU interface */
32 #define REALVIEW_EB_GIC_DIST_BASE 0x10041000 /* Generic interrupt controller distributor */
34 #define REALVIEW_EB_FLASH_BASE 0x40000000
35 #define REALVIEW_EB_FLASH_SIZE SZ_64M
37 #ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB
38 #define REALVIEW_EB11MP_SCU_BASE 0x10100000 /* SCU registers */
39 #define REALVIEW_EB11MP_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */
40 #define REALVIEW_EB11MP_TWD_BASE 0x10100700
41 #define REALVIEW_EB11MP_TWD_SIZE 0x00000100
42 #define REALVIEW_EB11MP_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */
43 #define REALVIEW_EB11MP_L220_BASE 0x10102000 /* L220 registers */
44 #define REALVIEW_EB11MP_SYS_PLD_CTRL1 0xD8 /* Register offset for MPCore sysctl */
46 #define REALVIEW_EB11MP_SCU_BASE 0x1F000000 /* SCU registers */
47 #define REALVIEW_EB11MP_GIC_CPU_BASE 0x1F000100 /* Generic interrupt controller CPU interface */
48 #define REALVIEW_EB11MP_TWD_BASE 0x1F000700
49 #define REALVIEW_EB11MP_TWD_SIZE 0x00000100
50 #define REALVIEW_EB11MP_GIC_DIST_BASE 0x1F001000 /* Generic interrupt controller distributor */
51 #define REALVIEW_EB11MP_L220_BASE 0x1F002000 /* L220 registers */
52 #define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */
55 #define IRQ_EB_GIC_START 32
58 * RealView EB interrupt sources
60 #define IRQ_EB_WDOG (IRQ_EB_GIC_START + 0) /* Watchdog timer */
61 #define IRQ_EB_SOFT (IRQ_EB_GIC_START + 1) /* Software interrupt */
62 #define IRQ_EB_COMMRx (IRQ_EB_GIC_START + 2) /* Debug Comm Rx interrupt */
63 #define IRQ_EB_COMMTx (IRQ_EB_GIC_START + 3) /* Debug Comm Tx interrupt */
64 #define IRQ_EB_TIMER0_1 (IRQ_EB_GIC_START + 4) /* Timer 0 and 1 */
65 #define IRQ_EB_TIMER2_3 (IRQ_EB_GIC_START + 5) /* Timer 2 and 3 */
66 #define IRQ_EB_GPIO0 (IRQ_EB_GIC_START + 6) /* GPIO 0 */
67 #define IRQ_EB_GPIO1 (IRQ_EB_GIC_START + 7) /* GPIO 1 */
68 #define IRQ_EB_GPIO2 (IRQ_EB_GIC_START + 8) /* GPIO 2 */
70 #define IRQ_EB_RTC (IRQ_EB_GIC_START + 10) /* Real Time Clock */
71 #define IRQ_EB_SSP (IRQ_EB_GIC_START + 11) /* Synchronous Serial Port */
72 #define IRQ_EB_UART0 (IRQ_EB_GIC_START + 12) /* UART 0 on development chip */
73 #define IRQ_EB_UART1 (IRQ_EB_GIC_START + 13) /* UART 1 on development chip */
74 #define IRQ_EB_UART2 (IRQ_EB_GIC_START + 14) /* UART 2 on development chip */
75 #define IRQ_EB_UART3 (IRQ_EB_GIC_START + 15) /* UART 3 on development chip */
76 #define IRQ_EB_SCI (IRQ_EB_GIC_START + 16) /* Smart Card Interface */
77 #define IRQ_EB_MMCI0A (IRQ_EB_GIC_START + 17) /* Multimedia Card 0A */
78 #define IRQ_EB_MMCI0B (IRQ_EB_GIC_START + 18) /* Multimedia Card 0B */
79 #define IRQ_EB_AACI (IRQ_EB_GIC_START + 19) /* Audio Codec */
80 #define IRQ_EB_KMI0 (IRQ_EB_GIC_START + 20) /* Keyboard/Mouse port 0 */
81 #define IRQ_EB_KMI1 (IRQ_EB_GIC_START + 21) /* Keyboard/Mouse port 1 */
82 #define IRQ_EB_CHARLCD (IRQ_EB_GIC_START + 22) /* Character LCD */
83 #define IRQ_EB_CLCD (IRQ_EB_GIC_START + 23) /* CLCD controller */
84 #define IRQ_EB_DMA (IRQ_EB_GIC_START + 24) /* DMA controller */
85 #define IRQ_EB_PWRFAIL (IRQ_EB_GIC_START + 25) /* Power failure */
86 #define IRQ_EB_PISMO (IRQ_EB_GIC_START + 26) /* PISMO interface */
87 #define IRQ_EB_DoC (IRQ_EB_GIC_START + 27) /* Disk on Chip memory controller */
88 #define IRQ_EB_ETH (IRQ_EB_GIC_START + 28) /* Ethernet controller */
89 #define IRQ_EB_USB (IRQ_EB_GIC_START + 29) /* USB controller */
90 #define IRQ_EB_TSPEN (IRQ_EB_GIC_START + 30) /* Touchscreen pen */
91 #define IRQ_EB_TSKPAD (IRQ_EB_GIC_START + 31) /* Touchscreen keypad */
94 * RealView EB + ARM11MPCore interrupt sources (primary GIC on the core tile)
96 #define IRQ_EB11MP_AACI (IRQ_EB_GIC_START + 0)
97 #define IRQ_EB11MP_TIMER0_1 (IRQ_EB_GIC_START + 1)
98 #define IRQ_EB11MP_TIMER2_3 (IRQ_EB_GIC_START + 2)
99 #define IRQ_EB11MP_USB (IRQ_EB_GIC_START + 3)
100 #define IRQ_EB11MP_UART0 (IRQ_EB_GIC_START + 4)
101 #define IRQ_EB11MP_UART1 (IRQ_EB_GIC_START + 5)
102 #define IRQ_EB11MP_RTC (IRQ_EB_GIC_START + 6)
103 #define IRQ_EB11MP_KMI0 (IRQ_EB_GIC_START + 7)
104 #define IRQ_EB11MP_KMI1 (IRQ_EB_GIC_START + 8)
105 #define IRQ_EB11MP_ETH (IRQ_EB_GIC_START + 9)
106 #define IRQ_EB11MP_EB_IRQ1 (IRQ_EB_GIC_START + 10) /* main GIC */
107 #define IRQ_EB11MP_EB_IRQ2 (IRQ_EB_GIC_START + 11) /* tile GIC */
108 #define IRQ_EB11MP_EB_FIQ1 (IRQ_EB_GIC_START + 12) /* main GIC */
109 #define IRQ_EB11MP_EB_FIQ2 (IRQ_EB_GIC_START + 13) /* tile GIC */
110 #define IRQ_EB11MP_MMCI0A (IRQ_EB_GIC_START + 14)
111 #define IRQ_EB11MP_MMCI0B (IRQ_EB_GIC_START + 15)
113 #define IRQ_EB11MP_PMU_CPU0 (IRQ_EB_GIC_START + 17)
114 #define IRQ_EB11MP_PMU_CPU1 (IRQ_EB_GIC_START + 18)
115 #define IRQ_EB11MP_PMU_CPU2 (IRQ_EB_GIC_START + 19)
116 #define IRQ_EB11MP_PMU_CPU3 (IRQ_EB_GIC_START + 20)
117 #define IRQ_EB11MP_PMU_SCU0 (IRQ_EB_GIC_START + 21)
118 #define IRQ_EB11MP_PMU_SCU1 (IRQ_EB_GIC_START + 22)
119 #define IRQ_EB11MP_PMU_SCU2 (IRQ_EB_GIC_START + 23)
120 #define IRQ_EB11MP_PMU_SCU3 (IRQ_EB_GIC_START + 24)
121 #define IRQ_EB11MP_PMU_SCU4 (IRQ_EB_GIC_START + 25)
122 #define IRQ_EB11MP_PMU_SCU5 (IRQ_EB_GIC_START + 26)
123 #define IRQ_EB11MP_PMU_SCU6 (IRQ_EB_GIC_START + 27)
124 #define IRQ_EB11MP_PMU_SCU7 (IRQ_EB_GIC_START + 28)
126 #define IRQ_EB11MP_L220_EVENT (IRQ_EB_GIC_START + 29)
127 #define IRQ_EB11MP_L220_SLAVE (IRQ_EB_GIC_START + 30)
128 #define IRQ_EB11MP_L220_DECODE (IRQ_EB_GIC_START + 31)
130 #define IRQ_EB11MP_UART2 -1
131 #define IRQ_EB11MP_UART3 -1
132 #define IRQ_EB11MP_CLCD -1
133 #define IRQ_EB11MP_DMA -1
134 #define IRQ_EB11MP_WDOG -1
135 #define IRQ_EB11MP_GPIO0 -1
136 #define IRQ_EB11MP_GPIO1 -1
137 #define IRQ_EB11MP_GPIO2 -1
138 #define IRQ_EB11MP_SCI -1
139 #define IRQ_EB11MP_SSP -1
141 #define NR_GIC_EB11MP 2
144 * Only define NR_IRQS if less than NR_IRQS_EB
146 #define NR_IRQS_EB (IRQ_EB_GIC_START + 96)
148 #if defined(CONFIG_MACH_REALVIEW_EB) \
149 && (!defined(NR_IRQS) || (NR_IRQS < NR_IRQS_EB))
151 #define NR_IRQS NR_IRQS_EB
154 #if defined(CONFIG_REALVIEW_EB_ARM11MP) \
155 && (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP))
157 #define MAX_GIC_NR NR_GIC_EB11MP
161 * Core tile identification (REALVIEW_SYS_PROCID)
163 #define REALVIEW_EB_PROC_MASK 0xFF000000
164 #define REALVIEW_EB_PROC_ARM7TDMI 0x00000000
165 #define REALVIEW_EB_PROC_ARM9 0x02000000
166 #define REALVIEW_EB_PROC_ARM11 0x04000000
167 #define REALVIEW_EB_PROC_ARM11MP 0x06000000
169 #define check_eb_proc(proc_type) \
170 ((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_EB_PROC_MASK) \
173 #ifdef CONFIG_REALVIEW_EB_ARM11MP
174 #define core_tile_eb11mp() check_eb_proc(REALVIEW_EB_PROC_ARM11MP)
176 #define core_tile_eb11mp() 0
179 #endif /* __ASM_ARCH_BOARD_EB_H */