4 * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog
6 * Author: MontaVista Software, Inc.
7 * <gdavis@mvista.com> or <source@mvista.com>
9 * 2003 (c) MontaVista Software, Inc. This file is licensed under the
10 * terms of the GNU General Public License version 2. This program is
11 * licensed "as is" without any warranty of any kind, whether express
16 * 20030527: George G. Davis <gdavis@mvista.com>
17 * Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
18 * (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
19 * Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk>
21 * Copyright (c) 2004 Texas Instruments.
22 * 1. Modified to support OMAP1610 32-KHz watchdog timer
23 * 2. Ported to 2.6 kernel
25 * Copyright (c) 2005 David Brownell
26 * Use the driver model and standard identifiers; handle bigger timeouts.
29 #include <linux/module.h>
30 #include <linux/types.h>
31 #include <linux/kernel.h>
34 #include <linux/miscdevice.h>
35 #include <linux/watchdog.h>
36 #include <linux/reboot.h>
37 #include <linux/init.h>
38 #include <linux/err.h>
39 #include <linux/platform_device.h>
40 #include <linux/moduleparam.h>
41 #include <linux/bitops.h>
43 #include <linux/uaccess.h>
44 #include <linux/slab.h>
45 #include <linux/pm_runtime.h>
46 #include <mach/hardware.h>
47 #include <plat/prcm.h>
51 static struct platform_device *omap_wdt_dev;
53 static unsigned timer_margin;
54 module_param(timer_margin, uint, 0);
55 MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
57 static unsigned int wdt_trgr_pattern = 0x1234;
58 static spinlock_t wdt_lock;
61 void __iomem *base; /* physical */
65 struct miscdevice omap_wdt_miscdev;
68 static void omap_wdt_ping(struct omap_wdt_dev *wdev)
70 void __iomem *base = wdev->base;
72 /* wait for posted write to complete */
73 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
76 wdt_trgr_pattern = ~wdt_trgr_pattern;
77 __raw_writel(wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR));
79 /* wait for posted write to complete */
80 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
82 /* reloaded WCRR from WLDR */
85 static void omap_wdt_enable(struct omap_wdt_dev *wdev)
87 void __iomem *base = wdev->base;
89 /* Sequence to enable the watchdog */
90 __raw_writel(0xBBBB, base + OMAP_WATCHDOG_SPR);
91 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
94 __raw_writel(0x4444, base + OMAP_WATCHDOG_SPR);
95 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
99 static void omap_wdt_disable(struct omap_wdt_dev *wdev)
101 void __iomem *base = wdev->base;
103 /* sequence required to disable watchdog */
104 __raw_writel(0xAAAA, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
105 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
108 __raw_writel(0x5555, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
109 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
113 static void omap_wdt_adjust_timeout(unsigned new_timeout)
115 if (new_timeout < TIMER_MARGIN_MIN)
116 new_timeout = TIMER_MARGIN_DEFAULT;
117 if (new_timeout > TIMER_MARGIN_MAX)
118 new_timeout = TIMER_MARGIN_MAX;
119 timer_margin = new_timeout;
122 static void omap_wdt_set_timeout(struct omap_wdt_dev *wdev)
124 u32 pre_margin = GET_WLDR_VAL(timer_margin);
125 void __iomem *base = wdev->base;
127 pm_runtime_get_sync(wdev->dev);
129 /* just count up at 32 KHz */
130 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
133 __raw_writel(pre_margin, base + OMAP_WATCHDOG_LDR);
134 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
137 pm_runtime_put_sync(wdev->dev);
141 * Allow only one task to hold it open
143 static int omap_wdt_open(struct inode *inode, struct file *file)
145 struct omap_wdt_dev *wdev = platform_get_drvdata(omap_wdt_dev);
146 void __iomem *base = wdev->base;
148 if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users)))
151 pm_runtime_get_sync(wdev->dev);
154 * Make sure the watchdog is disabled. This is unfortunately required
155 * because writing to various registers with the watchdog running has no
158 omap_wdt_disable(wdev);
160 /* initialize prescaler */
161 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
164 __raw_writel((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
165 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
168 file->private_data = (void *) wdev;
170 omap_wdt_set_timeout(wdev);
171 omap_wdt_ping(wdev); /* trigger loading of new timeout value */
172 omap_wdt_enable(wdev);
174 pm_runtime_put_sync(wdev->dev);
176 return nonseekable_open(inode, file);
179 static int omap_wdt_release(struct inode *inode, struct file *file)
181 struct omap_wdt_dev *wdev = file->private_data;
184 * Shut off the timer unless NOWAYOUT is defined.
186 #ifndef CONFIG_WATCHDOG_NOWAYOUT
187 pm_runtime_get_sync(wdev->dev);
189 omap_wdt_disable(wdev);
191 pm_runtime_put_sync(wdev->dev);
193 printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n");
195 wdev->omap_wdt_users = 0;
200 static ssize_t omap_wdt_write(struct file *file, const char __user *data,
201 size_t len, loff_t *ppos)
203 struct omap_wdt_dev *wdev = file->private_data;
205 /* Refresh LOAD_TIME. */
207 pm_runtime_get_sync(wdev->dev);
208 spin_lock(&wdt_lock);
210 spin_unlock(&wdt_lock);
211 pm_runtime_put_sync(wdev->dev);
216 static long omap_wdt_ioctl(struct file *file, unsigned int cmd,
219 struct omap_wdt_dev *wdev;
221 static const struct watchdog_info ident = {
222 .identity = "OMAP Watchdog",
223 .options = WDIOF_SETTIMEOUT,
224 .firmware_version = 0,
227 wdev = file->private_data;
230 case WDIOC_GETSUPPORT:
231 return copy_to_user((struct watchdog_info __user *)arg, &ident,
233 case WDIOC_GETSTATUS:
234 return put_user(0, (int __user *)arg);
235 case WDIOC_GETBOOTSTATUS:
236 if (cpu_is_omap16xx())
237 return put_user(__raw_readw(ARM_SYSST),
239 if (cpu_is_omap24xx())
240 return put_user(omap_prcm_get_reset_sources(),
242 case WDIOC_KEEPALIVE:
243 pm_runtime_get_sync(wdev->dev);
244 spin_lock(&wdt_lock);
246 spin_unlock(&wdt_lock);
247 pm_runtime_put_sync(wdev->dev);
249 case WDIOC_SETTIMEOUT:
250 if (get_user(new_margin, (int __user *)arg))
252 omap_wdt_adjust_timeout(new_margin);
254 pm_runtime_get_sync(wdev->dev);
255 spin_lock(&wdt_lock);
256 omap_wdt_disable(wdev);
257 omap_wdt_set_timeout(wdev);
258 omap_wdt_enable(wdev);
261 spin_unlock(&wdt_lock);
262 pm_runtime_put_sync(wdev->dev);
264 case WDIOC_GETTIMEOUT:
265 return put_user(timer_margin, (int __user *)arg);
271 static const struct file_operations omap_wdt_fops = {
272 .owner = THIS_MODULE,
273 .write = omap_wdt_write,
274 .unlocked_ioctl = omap_wdt_ioctl,
275 .open = omap_wdt_open,
276 .release = omap_wdt_release,
280 static int __devinit omap_wdt_probe(struct platform_device *pdev)
282 struct resource *res, *mem;
283 struct omap_wdt_dev *wdev;
286 /* reserve static register mappings */
287 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
290 goto err_get_resource;
298 mem = request_mem_region(res->start, resource_size(res), pdev->name);
304 wdev = kzalloc(sizeof(struct omap_wdt_dev), GFP_KERNEL);
310 wdev->omap_wdt_users = 0;
312 wdev->dev = &pdev->dev;
314 wdev->base = ioremap(res->start, resource_size(res));
320 platform_set_drvdata(pdev, wdev);
322 pm_runtime_enable(wdev->dev);
323 pm_runtime_get_sync(wdev->dev);
325 omap_wdt_disable(wdev);
326 omap_wdt_adjust_timeout(timer_margin);
328 wdev->omap_wdt_miscdev.parent = &pdev->dev;
329 wdev->omap_wdt_miscdev.minor = WATCHDOG_MINOR;
330 wdev->omap_wdt_miscdev.name = "watchdog";
331 wdev->omap_wdt_miscdev.fops = &omap_wdt_fops;
333 ret = misc_register(&(wdev->omap_wdt_miscdev));
337 pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
338 __raw_readl(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
341 pm_runtime_put_sync(wdev->dev);
348 platform_set_drvdata(pdev, NULL);
356 release_mem_region(res->start, resource_size(res));
364 static void omap_wdt_shutdown(struct platform_device *pdev)
366 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
368 if (wdev->omap_wdt_users) {
369 pm_runtime_get_sync(wdev->dev);
370 omap_wdt_disable(wdev);
371 pm_runtime_put_sync(wdev->dev);
375 static int __devexit omap_wdt_remove(struct platform_device *pdev)
377 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
378 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
383 misc_deregister(&(wdev->omap_wdt_miscdev));
384 release_mem_region(res->start, resource_size(res));
385 platform_set_drvdata(pdev, NULL);
397 /* REVISIT ... not clear this is the best way to handle system suspend; and
398 * it's very inappropriate for selective device suspend (e.g. suspending this
399 * through sysfs rather than by stopping the watchdog daemon). Also, this
400 * may not play well enough with NOWAYOUT...
403 static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
405 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
407 if (wdev->omap_wdt_users) {
408 pm_runtime_get_sync(wdev->dev);
409 omap_wdt_disable(wdev);
410 pm_runtime_put_sync(wdev->dev);
416 static int omap_wdt_resume(struct platform_device *pdev)
418 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
420 if (wdev->omap_wdt_users) {
421 pm_runtime_get_sync(wdev->dev);
422 omap_wdt_enable(wdev);
424 pm_runtime_put_sync(wdev->dev);
431 #define omap_wdt_suspend NULL
432 #define omap_wdt_resume NULL
435 static struct platform_driver omap_wdt_driver = {
436 .probe = omap_wdt_probe,
437 .remove = __devexit_p(omap_wdt_remove),
438 .shutdown = omap_wdt_shutdown,
439 .suspend = omap_wdt_suspend,
440 .resume = omap_wdt_resume,
442 .owner = THIS_MODULE,
447 static int __init omap_wdt_init(void)
449 spin_lock_init(&wdt_lock);
450 return platform_driver_register(&omap_wdt_driver);
453 static void __exit omap_wdt_exit(void)
455 platform_driver_unregister(&omap_wdt_driver);
458 module_init(omap_wdt_init);
459 module_exit(omap_wdt_exit);
461 MODULE_AUTHOR("George G. Davis");
462 MODULE_LICENSE("GPL");
463 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
464 MODULE_ALIAS("platform:omap_wdt");