sm501: restructure init to allow only 1 fb on an SM501
[pandora-kernel.git] / drivers / video / sm501fb.c
1 /* linux/drivers/video/sm501fb.c
2  *
3  * Copyright (c) 2006 Simtec Electronics
4  *      Vincent Sanders <vince@simtec.co.uk>
5  *      Ben Dooks <ben@simtec.co.uk>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  *
11  * Framebuffer driver for the Silicon Motion SM501
12  */
13
14 #include <linux/module.h>
15 #include <linux/kernel.h>
16 #include <linux/errno.h>
17 #include <linux/string.h>
18 #include <linux/mm.h>
19 #include <linux/tty.h>
20 #include <linux/slab.h>
21 #include <linux/delay.h>
22 #include <linux/fb.h>
23 #include <linux/init.h>
24 #include <linux/vmalloc.h>
25 #include <linux/dma-mapping.h>
26 #include <linux/interrupt.h>
27 #include <linux/workqueue.h>
28 #include <linux/wait.h>
29 #include <linux/platform_device.h>
30 #include <linux/clk.h>
31 #include <linux/console.h>
32
33 #include <asm/io.h>
34 #include <asm/uaccess.h>
35 #include <asm/div64.h>
36
37 #ifdef CONFIG_PM
38 #include <linux/pm.h>
39 #endif
40
41 #include <linux/sm501.h>
42 #include <linux/sm501-regs.h>
43
44 #define NR_PALETTE      256
45
46 enum sm501_controller {
47         HEAD_CRT        = 0,
48         HEAD_PANEL      = 1,
49 };
50
51 /* SM501 memory address */
52 struct sm501_mem {
53         unsigned long    size;
54         unsigned long    sm_addr;
55         void __iomem    *k_addr;
56 };
57
58 /* private data that is shared between all frambuffers* */
59 struct sm501fb_info {
60         struct device           *dev;
61         struct fb_info          *fb[2];         /* fb info for both heads */
62         struct resource         *fbmem_res;     /* framebuffer resource */
63         struct resource         *regs_res;      /* registers resource */
64         struct sm501_platdata_fb *pdata;        /* our platform data */
65
66         unsigned long            pm_crt_ctrl;   /* pm: crt ctrl save */
67
68         int                      irq;
69         int                      swap_endian;   /* set to swap rgb=>bgr */
70         void __iomem            *regs;          /* remapped registers */
71         void __iomem            *fbmem;         /* remapped framebuffer */
72         size_t                   fbmem_len;     /* length of remapped region */
73 };
74
75 /* per-framebuffer private data */
76 struct sm501fb_par {
77         u32                      pseudo_palette[16];
78
79         enum sm501_controller    head;
80         struct sm501_mem         cursor;
81         struct sm501_mem         screen;
82         struct fb_ops            ops;
83
84         void                    *store_fb;
85         void                    *store_cursor;
86         void __iomem            *cursor_regs;
87         struct sm501fb_info     *info;
88 };
89
90 /* Helper functions */
91
92 static inline int h_total(struct fb_var_screeninfo *var)
93 {
94         return var->xres + var->left_margin +
95                 var->right_margin + var->hsync_len;
96 }
97
98 static inline int v_total(struct fb_var_screeninfo *var)
99 {
100         return var->yres + var->upper_margin +
101                 var->lower_margin + var->vsync_len;
102 }
103
104 /* sm501fb_sync_regs()
105  *
106  * This call is mainly for PCI bus systems where we need to
107  * ensure that any writes to the bus are completed before the
108  * next phase, or after completing a function.
109 */
110
111 static inline void sm501fb_sync_regs(struct sm501fb_info *info)
112 {
113         readl(info->regs);
114 }
115
116 /* sm501_alloc_mem
117  *
118  * This is an attempt to lay out memory for the two framebuffers and
119  * everything else
120  *
121  * |fbmem_res->start                                           fbmem_res->end|
122  * |                                                                         |
123  * |fb[0].fix.smem_start    |         |fb[1].fix.smem_start    |     2K      |
124  * |-> fb[0].fix.smem_len <-| spare   |-> fb[1].fix.smem_len <-|-> cursors <-|
125  *
126  * The "spare" space is for the 2d engine data
127  * the fixed is space for the cursors (2x1Kbyte)
128  *
129  * we need to allocate memory for the 2D acceleration engine
130  * command list and the data for the engine to deal with.
131  *
132  * - all allocations must be 128bit aligned
133  * - cursors are 64x64x2 bits (1Kbyte)
134  *
135  */
136
137 #define SM501_MEMF_CURSOR               (1)
138 #define SM501_MEMF_PANEL                (2)
139 #define SM501_MEMF_CRT                  (4)
140 #define SM501_MEMF_ACCEL                (8)
141
142 static int sm501_alloc_mem(struct sm501fb_info *inf, struct sm501_mem *mem,
143                            unsigned int why, size_t size)
144 {
145         unsigned int ptr = 0;
146         unsigned int end;
147         struct fb_info *fbi;
148
149         switch (why) {
150         case SM501_MEMF_CURSOR:
151                 ptr = inf->fbmem_len - size;
152                 inf->fbmem_len = ptr;
153                 break;
154
155         case SM501_MEMF_PANEL:
156                 ptr = inf->fbmem_len - size;
157                 fbi = inf->fb[0];
158
159                 if (fbi && ptr < fbi->fix.smem_len)
160                         return -ENOMEM;
161
162                 break;
163
164         case SM501_MEMF_CRT:
165                 ptr = 0;
166                 break;
167
168         case SM501_MEMF_ACCEL:
169                 fbi = inf->fb[0];
170                 ptr = fbi ? fbi->fix.smem_len : 0;
171
172                 fbi = inf->fb[1];
173                 if (fbi)
174                         end = (fbi->fix.smem_start - inf->fbmem_res->start);
175                 else
176                         end = inf->fbmem_len;
177
178                 if ((ptr + size) > end)
179                         return -ENOMEM;
180
181                 break;
182
183         default:
184                 return -EINVAL;
185         }
186
187         mem->size    = size;
188         mem->sm_addr = ptr;
189         mem->k_addr  = inf->fbmem + ptr;
190
191         dev_dbg(inf->dev, "%s: result %08lx, %p - %u, %zd\n",
192                 __func__, mem->sm_addr, mem->k_addr, why, size);
193
194         return 0;
195 }
196
197 /* sm501fb_ps_to_hz
198  *
199  * Converts a period in picoseconds to Hz.
200  *
201  * Note, we try to keep this in Hz to minimise rounding with
202  * the limited PLL settings on the SM501.
203 */
204
205 static unsigned long sm501fb_ps_to_hz(unsigned long psvalue)
206 {
207         unsigned long long numerator=1000000000000ULL;
208
209         /* 10^12 / picosecond period gives frequency in Hz */
210         do_div(numerator, psvalue);
211         return (unsigned long)numerator;
212 }
213
214 /* sm501fb_hz_to_ps is identical to the oposite transform */
215
216 #define sm501fb_hz_to_ps(x) sm501fb_ps_to_hz(x)
217
218 /* sm501fb_setup_gamma
219  *
220  * Programs a linear 1.0 gamma ramp in case the gamma
221  * correction is enabled without programming anything else.
222 */
223
224 static void sm501fb_setup_gamma(struct sm501fb_info *fbi,
225                                 unsigned long palette)
226 {
227         unsigned long value = 0;
228         int offset;
229
230         /* set gamma values */
231         for (offset = 0; offset < 256 * 4; offset += 4) {
232                 writel(value, fbi->regs + palette + offset);
233                 value += 0x010101;      /* Advance RGB by 1,1,1.*/
234         }
235 }
236
237 /* sm501fb_check_var
238  *
239  * check common variables for both panel and crt
240 */
241
242 static int sm501fb_check_var(struct fb_var_screeninfo *var,
243                              struct fb_info *info)
244 {
245         struct sm501fb_par  *par = info->par;
246         struct sm501fb_info *sm  = par->info;
247         unsigned long tmp;
248
249         /* check we can fit these values into the registers */
250
251         if (var->hsync_len > 255 || var->vsync_len > 63)
252                 return -EINVAL;
253
254         /* hdisplay end and hsync start */
255         if ((var->xres + var->right_margin) > 4096)
256                 return -EINVAL;
257
258         /* vdisplay end and vsync start */
259         if ((var->yres + var->lower_margin) > 2048)
260                 return -EINVAL;
261
262         /* hard limits of device */
263
264         if (h_total(var) > 4096 || v_total(var) > 2048)
265                 return -EINVAL;
266
267         /* check our line length is going to be 128 bit aligned */
268
269         tmp = (var->xres * var->bits_per_pixel) / 8;
270         if ((tmp & 15) != 0)
271                 return -EINVAL;
272
273         /* check the virtual size */
274
275         if (var->xres_virtual > 4096 || var->yres_virtual > 2048)
276                 return -EINVAL;
277
278         /* can cope with 8,16 or 32bpp */
279
280         if (var->bits_per_pixel <= 8)
281                 var->bits_per_pixel = 8;
282         else if (var->bits_per_pixel <= 16)
283                 var->bits_per_pixel = 16;
284         else if (var->bits_per_pixel == 24)
285                 var->bits_per_pixel = 32;
286
287         /* set r/g/b positions and validate bpp */
288         switch(var->bits_per_pixel) {
289         case 8:
290                 var->red.length         = var->bits_per_pixel;
291                 var->red.offset         = 0;
292                 var->green.length       = var->bits_per_pixel;
293                 var->green.offset       = 0;
294                 var->blue.length        = var->bits_per_pixel;
295                 var->blue.offset        = 0;
296                 var->transp.length      = 0;
297                 var->transp.offset      = 0;
298
299                 break;
300
301         case 16:
302                 if (sm->pdata->flags & SM501_FBPD_SWAP_FB_ENDIAN) {
303                         var->blue.offset        = 11;
304                         var->green.offset       = 5;
305                         var->red.offset         = 0;
306                 } else {
307                         var->red.offset         = 11;
308                         var->green.offset       = 5;
309                         var->blue.offset        = 0;
310                 }
311                 var->transp.offset      = 0;
312
313                 var->red.length         = 5;
314                 var->green.length       = 6;
315                 var->blue.length        = 5;
316                 var->transp.length      = 0;
317                 break;
318
319         case 32:
320                 if (sm->pdata->flags & SM501_FBPD_SWAP_FB_ENDIAN) {
321                         var->transp.offset      = 0;
322                         var->red.offset         = 8;
323                         var->green.offset       = 16;
324                         var->blue.offset        = 24;
325                 } else {
326                         var->transp.offset      = 24;
327                         var->red.offset         = 16;
328                         var->green.offset       = 8;
329                         var->blue.offset        = 0;
330                 }
331
332                 var->red.length         = 8;
333                 var->green.length       = 8;
334                 var->blue.length        = 8;
335                 var->transp.length      = 0;
336                 break;
337
338         default:
339                 return -EINVAL;
340         }
341
342         return 0;
343 }
344
345 /*
346  * sm501fb_check_var_crt():
347  *
348  * check the parameters for the CRT head, and either bring them
349  * back into range, or return -EINVAL.
350 */
351
352 static int sm501fb_check_var_crt(struct fb_var_screeninfo *var,
353                                  struct fb_info *info)
354 {
355         return sm501fb_check_var(var, info);
356 }
357
358 /* sm501fb_check_var_pnl():
359  *
360  * check the parameters for the CRT head, and either bring them
361  * back into range, or return -EINVAL.
362 */
363
364 static int sm501fb_check_var_pnl(struct fb_var_screeninfo *var,
365                                  struct fb_info *info)
366 {
367         return sm501fb_check_var(var, info);
368 }
369
370 /* sm501fb_set_par_common
371  *
372  * set common registers for framebuffers
373 */
374
375 static int sm501fb_set_par_common(struct fb_info *info,
376                                   struct fb_var_screeninfo *var)
377 {
378         struct sm501fb_par  *par = info->par;
379         struct sm501fb_info *fbi = par->info;
380         unsigned long pixclock;      /* pixelclock in Hz */
381         unsigned long sm501pixclock; /* pixelclock the 501 can achive in Hz */
382         unsigned int mem_type;
383         unsigned int clock_type;
384         unsigned int head_addr;
385
386         dev_dbg(fbi->dev, "%s: %dx%d, bpp = %d, virtual %dx%d\n",
387                 __func__, var->xres, var->yres, var->bits_per_pixel,
388                 var->xres_virtual, var->yres_virtual);
389
390         switch (par->head) {
391         case HEAD_CRT:
392                 mem_type = SM501_MEMF_CRT;
393                 clock_type = SM501_CLOCK_V2XCLK;
394                 head_addr = SM501_DC_CRT_FB_ADDR;
395                 break;
396
397         case HEAD_PANEL:
398                 mem_type = SM501_MEMF_PANEL;
399                 clock_type = SM501_CLOCK_P2XCLK;
400                 head_addr = SM501_DC_PANEL_FB_ADDR;
401                 break;
402
403         default:
404                 mem_type = 0;           /* stop compiler warnings */
405                 head_addr = 0;
406                 clock_type = 0;
407         }
408
409         switch (var->bits_per_pixel) {
410         case 8:
411                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
412                 break;
413
414         case 16:
415                 info->fix.visual = FB_VISUAL_TRUECOLOR;
416                 break;
417
418         case 32:
419                 info->fix.visual = FB_VISUAL_TRUECOLOR;
420                 break;
421         }
422
423         /* allocate fb memory within 501 */
424         info->fix.line_length = (var->xres_virtual * var->bits_per_pixel)/8;
425         info->fix.smem_len    = info->fix.line_length * var->yres_virtual;
426
427         dev_dbg(fbi->dev, "%s: line length = %u\n", __func__,
428                 info->fix.line_length);
429
430         if (sm501_alloc_mem(fbi, &par->screen, mem_type,
431                             info->fix.smem_len)) {
432                 dev_err(fbi->dev, "no memory available\n");
433                 return -ENOMEM;
434         }
435
436         info->fix.smem_start = fbi->fbmem_res->start + par->screen.sm_addr;
437
438         info->screen_base = fbi->fbmem + par->screen.sm_addr;
439         info->screen_size = info->fix.smem_len;
440
441         /* set start of framebuffer to the screen */
442
443         writel(par->screen.sm_addr | SM501_ADDR_FLIP, fbi->regs + head_addr);
444
445         /* program CRT clock  */
446
447         pixclock = sm501fb_ps_to_hz(var->pixclock);
448
449         sm501pixclock = sm501_set_clock(fbi->dev->parent, clock_type,
450                                         pixclock);
451
452         /* update fb layer with actual clock used */
453         var->pixclock = sm501fb_hz_to_ps(sm501pixclock);
454
455         dev_dbg(fbi->dev, "%s: pixclock(ps) = %u, pixclock(Hz)  = %lu, "
456                "sm501pixclock = %lu,  error = %ld%%\n",
457                __func__, var->pixclock, pixclock, sm501pixclock,
458                ((pixclock - sm501pixclock)*100)/pixclock);
459
460         return 0;
461 }
462
463 /* sm501fb_set_par_geometry
464  *
465  * set the geometry registers for specified framebuffer.
466 */
467
468 static void sm501fb_set_par_geometry(struct fb_info *info,
469                                      struct fb_var_screeninfo *var)
470 {
471         struct sm501fb_par  *par = info->par;
472         struct sm501fb_info *fbi = par->info;
473         void __iomem *base = fbi->regs;
474         unsigned long reg;
475
476         if (par->head == HEAD_CRT)
477                 base += SM501_DC_CRT_H_TOT;
478         else
479                 base += SM501_DC_PANEL_H_TOT;
480
481         /* set framebuffer width and display width */
482
483         reg = info->fix.line_length;
484         reg |= ((var->xres * var->bits_per_pixel)/8) << 16;
485
486         writel(reg, fbi->regs + (par->head == HEAD_CRT ?
487                     SM501_DC_CRT_FB_OFFSET :  SM501_DC_PANEL_FB_OFFSET));
488
489         /* program horizontal total */
490
491         reg  = (h_total(var) - 1) << 16;
492         reg |= (var->xres - 1);
493
494         writel(reg, base + SM501_OFF_DC_H_TOT);
495
496         /* program horizontal sync */
497
498         reg  = var->hsync_len << 16;
499         reg |= var->xres + var->right_margin - 1;
500
501         writel(reg, base + SM501_OFF_DC_H_SYNC);
502
503         /* program vertical total */
504
505         reg  = (v_total(var) - 1) << 16;
506         reg |= (var->yres - 1);
507
508         writel(reg, base + SM501_OFF_DC_V_TOT);
509
510         /* program vertical sync */
511         reg  = var->vsync_len << 16;
512         reg |= var->yres + var->lower_margin - 1;
513
514         writel(reg, base + SM501_OFF_DC_V_SYNC);
515 }
516
517 /* sm501fb_pan_crt
518  *
519  * pan the CRT display output within an virtual framebuffer
520 */
521
522 static int sm501fb_pan_crt(struct fb_var_screeninfo *var,
523                            struct fb_info *info)
524 {
525         struct sm501fb_par  *par = info->par;
526         struct sm501fb_info *fbi = par->info;
527         unsigned int bytes_pixel = var->bits_per_pixel / 8;
528         unsigned long reg;
529         unsigned long xoffs;
530
531         xoffs = var->xoffset * bytes_pixel;
532
533         reg = readl(fbi->regs + SM501_DC_CRT_CONTROL);
534
535         reg &= ~SM501_DC_CRT_CONTROL_PIXEL_MASK;
536         reg |= ((xoffs & 15) / bytes_pixel) << 4;
537         writel(reg, fbi->regs + SM501_DC_CRT_CONTROL);
538
539         reg = (par->screen.sm_addr + xoffs +
540                var->yoffset * info->fix.line_length);
541         writel(reg | SM501_ADDR_FLIP, fbi->regs + SM501_DC_CRT_FB_ADDR);
542
543         sm501fb_sync_regs(fbi);
544         return 0;
545 }
546
547 /* sm501fb_pan_pnl
548  *
549  * pan the panel display output within an virtual framebuffer
550 */
551
552 static int sm501fb_pan_pnl(struct fb_var_screeninfo *var,
553                            struct fb_info *info)
554 {
555         struct sm501fb_par  *par = info->par;
556         struct sm501fb_info *fbi = par->info;
557         unsigned long reg;
558
559         reg = var->xoffset | (var->xres_virtual << 16);
560         writel(reg, fbi->regs + SM501_DC_PANEL_FB_WIDTH);
561
562         reg = var->yoffset | (var->yres_virtual << 16);
563         writel(reg, fbi->regs + SM501_DC_PANEL_FB_HEIGHT);
564
565         sm501fb_sync_regs(fbi);
566         return 0;
567 }
568
569 /* sm501fb_set_par_crt
570  *
571  * Set the CRT video mode from the fb_info structure
572 */
573
574 static int sm501fb_set_par_crt(struct fb_info *info)
575 {
576         struct sm501fb_par  *par = info->par;
577         struct sm501fb_info *fbi = par->info;
578         struct fb_var_screeninfo *var = &info->var;
579         unsigned long control;       /* control register */
580         int ret;
581
582         /* activate new configuration */
583
584         dev_dbg(fbi->dev, "%s(%p)\n", __func__, info);
585
586         /* enable CRT DAC - note 0 is on!*/
587         sm501_misc_control(fbi->dev->parent, 0, SM501_MISC_DAC_POWER);
588
589         control = readl(fbi->regs + SM501_DC_CRT_CONTROL);
590
591         control &= (SM501_DC_CRT_CONTROL_PIXEL_MASK |
592                     SM501_DC_CRT_CONTROL_GAMMA |
593                     SM501_DC_CRT_CONTROL_BLANK |
594                     SM501_DC_CRT_CONTROL_SEL |
595                     SM501_DC_CRT_CONTROL_CP |
596                     SM501_DC_CRT_CONTROL_TVP);
597
598         /* set the sync polarities before we check data source  */
599
600         if ((var->sync & FB_SYNC_HOR_HIGH_ACT) == 0)
601                 control |= SM501_DC_CRT_CONTROL_HSP;
602
603         if ((var->sync & FB_SYNC_VERT_HIGH_ACT) == 0)
604                 control |= SM501_DC_CRT_CONTROL_VSP;
605
606         if ((control & SM501_DC_CRT_CONTROL_SEL) == 0) {
607                 /* the head is displaying panel data... */
608
609                 sm501_alloc_mem(fbi, &par->screen, SM501_MEMF_CRT, 0);
610                 goto out_update;
611         }
612
613         ret = sm501fb_set_par_common(info, var);
614         if (ret) {
615                 dev_err(fbi->dev, "failed to set common parameters\n");
616                 return ret;
617         }
618
619         sm501fb_pan_crt(var, info);
620         sm501fb_set_par_geometry(info, var);
621
622         control |= SM501_FIFO_3;        /* fill if >3 free slots */
623
624         switch(var->bits_per_pixel) {
625         case 8:
626                 control |= SM501_DC_CRT_CONTROL_8BPP;
627                 break;
628
629         case 16:
630                 control |= SM501_DC_CRT_CONTROL_16BPP;
631                 sm501fb_setup_gamma(fbi, SM501_DC_CRT_PALETTE);
632                 break;
633
634         case 32:
635                 control |= SM501_DC_CRT_CONTROL_32BPP;
636                 sm501fb_setup_gamma(fbi, SM501_DC_CRT_PALETTE);
637                 break;
638
639         default:
640                 BUG();
641         }
642
643         control |= SM501_DC_CRT_CONTROL_SEL;    /* CRT displays CRT data */
644         control |= SM501_DC_CRT_CONTROL_TE;     /* enable CRT timing */
645         control |= SM501_DC_CRT_CONTROL_ENABLE; /* enable CRT plane */
646
647  out_update:
648         dev_dbg(fbi->dev, "new control is %08lx\n", control);
649
650         writel(control, fbi->regs + SM501_DC_CRT_CONTROL);
651         sm501fb_sync_regs(fbi);
652
653         return 0;
654 }
655
656 static void sm501fb_panel_power(struct sm501fb_info *fbi, int to)
657 {
658         unsigned long control;
659         void __iomem *ctrl_reg = fbi->regs + SM501_DC_PANEL_CONTROL;
660         struct sm501_platdata_fbsub *pd = fbi->pdata->fb_pnl;
661
662         control = readl(ctrl_reg);
663
664         if (to && (control & SM501_DC_PANEL_CONTROL_VDD) == 0) {
665                 /* enable panel power */
666
667                 control |= SM501_DC_PANEL_CONTROL_VDD;  /* FPVDDEN */
668                 writel(control, ctrl_reg);
669                 sm501fb_sync_regs(fbi);
670                 mdelay(10);
671
672                 control |= SM501_DC_PANEL_CONTROL_DATA; /* DATA */
673                 writel(control, ctrl_reg);
674                 sm501fb_sync_regs(fbi);
675                 mdelay(10);
676
677                 /* VBIASEN */
678
679                 if (!(pd->flags & SM501FB_FLAG_PANEL_NO_VBIASEN)) {
680                         if (pd->flags & SM501FB_FLAG_PANEL_INV_VBIASEN)
681                                 control &= ~SM501_DC_PANEL_CONTROL_BIAS;
682                         else
683                                 control |= SM501_DC_PANEL_CONTROL_BIAS;
684
685                         writel(control, ctrl_reg);
686                         sm501fb_sync_regs(fbi);
687                         mdelay(10);
688                 }
689
690                 if (!(pd->flags & SM501FB_FLAG_PANEL_NO_FPEN)) {
691                         if (pd->flags & SM501FB_FLAG_PANEL_INV_FPEN)
692                                 control &= ~SM501_DC_PANEL_CONTROL_FPEN;
693                         else
694                                 control |= SM501_DC_PANEL_CONTROL_FPEN;
695
696                         writel(control, ctrl_reg);
697                         sm501fb_sync_regs(fbi);
698                         mdelay(10);
699                 }
700         } else if (!to && (control & SM501_DC_PANEL_CONTROL_VDD) != 0) {
701                 /* disable panel power */
702                 if (!(pd->flags & SM501FB_FLAG_PANEL_NO_FPEN)) {
703                         if (pd->flags & SM501FB_FLAG_PANEL_INV_FPEN)
704                                 control |= SM501_DC_PANEL_CONTROL_FPEN;
705                         else
706                                 control &= ~SM501_DC_PANEL_CONTROL_FPEN;
707
708                         writel(control, ctrl_reg);
709                         sm501fb_sync_regs(fbi);
710                         mdelay(10);
711                 }
712
713                 if (!(pd->flags & SM501FB_FLAG_PANEL_NO_VBIASEN)) {
714                         if (pd->flags & SM501FB_FLAG_PANEL_INV_VBIASEN)
715                                 control |= SM501_DC_PANEL_CONTROL_BIAS;
716                         else
717                                 control &= ~SM501_DC_PANEL_CONTROL_BIAS;
718
719                         writel(control, ctrl_reg);
720                         sm501fb_sync_regs(fbi);
721                         mdelay(10);
722                 }
723
724                 control &= ~SM501_DC_PANEL_CONTROL_DATA;
725                 writel(control, ctrl_reg);
726                 sm501fb_sync_regs(fbi);
727                 mdelay(10);
728
729                 control &= ~SM501_DC_PANEL_CONTROL_VDD;
730                 writel(control, ctrl_reg);
731                 sm501fb_sync_regs(fbi);
732                 mdelay(10);
733         }
734
735         sm501fb_sync_regs(fbi);
736 }
737
738 /* sm501fb_set_par_pnl
739  *
740  * Set the panel video mode from the fb_info structure
741 */
742
743 static int sm501fb_set_par_pnl(struct fb_info *info)
744 {
745         struct sm501fb_par  *par = info->par;
746         struct sm501fb_info *fbi = par->info;
747         struct fb_var_screeninfo *var = &info->var;
748         unsigned long control;
749         unsigned long reg;
750         int ret;
751
752         dev_dbg(fbi->dev, "%s(%p)\n", __func__, info);
753
754         /* activate this new configuration */
755
756         ret = sm501fb_set_par_common(info, var);
757         if (ret)
758                 return ret;
759
760         sm501fb_pan_pnl(var, info);
761         sm501fb_set_par_geometry(info, var);
762
763         /* update control register */
764
765         control = readl(fbi->regs + SM501_DC_PANEL_CONTROL);
766         control &= (SM501_DC_PANEL_CONTROL_GAMMA |
767                     SM501_DC_PANEL_CONTROL_VDD  |
768                     SM501_DC_PANEL_CONTROL_DATA |
769                     SM501_DC_PANEL_CONTROL_BIAS |
770                     SM501_DC_PANEL_CONTROL_FPEN |
771                     SM501_DC_PANEL_CONTROL_CP |
772                     SM501_DC_PANEL_CONTROL_CK |
773                     SM501_DC_PANEL_CONTROL_HP |
774                     SM501_DC_PANEL_CONTROL_VP |
775                     SM501_DC_PANEL_CONTROL_HPD |
776                     SM501_DC_PANEL_CONTROL_VPD);
777
778         control |= SM501_FIFO_3;        /* fill if >3 free slots */
779
780         switch(var->bits_per_pixel) {
781         case 8:
782                 control |= SM501_DC_PANEL_CONTROL_8BPP;
783                 break;
784
785         case 16:
786                 control |= SM501_DC_PANEL_CONTROL_16BPP;
787                 sm501fb_setup_gamma(fbi, SM501_DC_PANEL_PALETTE);
788                 break;
789
790         case 32:
791                 control |= SM501_DC_PANEL_CONTROL_32BPP;
792                 sm501fb_setup_gamma(fbi, SM501_DC_PANEL_PALETTE);
793                 break;
794
795         default:
796                 BUG();
797         }
798
799         writel(0x0, fbi->regs + SM501_DC_PANEL_PANNING_CONTROL);
800
801         /* panel plane top left and bottom right location */
802
803         writel(0x00, fbi->regs + SM501_DC_PANEL_TL_LOC);
804
805         reg  = var->xres - 1;
806         reg |= (var->yres - 1) << 16;
807
808         writel(reg, fbi->regs + SM501_DC_PANEL_BR_LOC);
809
810         /* program panel control register */
811
812         control |= SM501_DC_PANEL_CONTROL_TE;   /* enable PANEL timing */
813         control |= SM501_DC_PANEL_CONTROL_EN;   /* enable PANEL gfx plane */
814
815         if ((var->sync & FB_SYNC_HOR_HIGH_ACT) == 0)
816                 control |= SM501_DC_PANEL_CONTROL_HSP;
817
818         if ((var->sync & FB_SYNC_VERT_HIGH_ACT) == 0)
819                 control |= SM501_DC_PANEL_CONTROL_VSP;
820
821         writel(control, fbi->regs + SM501_DC_PANEL_CONTROL);
822         sm501fb_sync_regs(fbi);
823
824         /* ensure the panel interface is not tristated at this point */
825
826         sm501_modify_reg(fbi->dev->parent, SM501_SYSTEM_CONTROL,
827                          0, SM501_SYSCTRL_PANEL_TRISTATE);
828
829         /* power the panel up */
830         sm501fb_panel_power(fbi, 1);
831         return 0;
832 }
833
834
835 /* chan_to_field
836  *
837  * convert a colour value into a field position
838  *
839  * from pxafb.c
840 */
841
842 static inline unsigned int chan_to_field(unsigned int chan,
843                                          struct fb_bitfield *bf)
844 {
845         chan &= 0xffff;
846         chan >>= 16 - bf->length;
847         return chan << bf->offset;
848 }
849
850 /* sm501fb_setcolreg
851  *
852  * set the colour mapping for modes that support palettised data
853 */
854
855 static int sm501fb_setcolreg(unsigned regno,
856                              unsigned red, unsigned green, unsigned blue,
857                              unsigned transp, struct fb_info *info)
858 {
859         struct sm501fb_par  *par = info->par;
860         struct sm501fb_info *fbi = par->info;
861         void __iomem *base = fbi->regs;
862         unsigned int val;
863
864         if (par->head == HEAD_CRT)
865                 base += SM501_DC_CRT_PALETTE;
866         else
867                 base += SM501_DC_PANEL_PALETTE;
868
869         switch (info->fix.visual) {
870         case FB_VISUAL_TRUECOLOR:
871                 /* true-colour, use pseuo-palette */
872
873                 if (regno < 16) {
874                         u32 *pal = par->pseudo_palette;
875
876                         val  = chan_to_field(red,   &info->var.red);
877                         val |= chan_to_field(green, &info->var.green);
878                         val |= chan_to_field(blue,  &info->var.blue);
879
880                         pal[regno] = val;
881                 }
882                 break;
883
884         case FB_VISUAL_PSEUDOCOLOR:
885                 if (regno < 256) {
886                         val = (red >> 8) << 16;
887                         val |= (green >> 8) << 8;
888                         val |= blue >> 8;
889
890                         writel(val, base + (regno * 4));
891                 }
892
893                 break;
894
895         default:
896                 return 1;   /* unknown type */
897         }
898
899         return 0;
900 }
901
902 /* sm501fb_blank_pnl
903  *
904  * Blank or un-blank the panel interface
905 */
906
907 static int sm501fb_blank_pnl(int blank_mode, struct fb_info *info)
908 {
909         struct sm501fb_par  *par = info->par;
910         struct sm501fb_info *fbi = par->info;
911
912         dev_dbg(fbi->dev, "%s(mode=%d, %p)\n", __func__, blank_mode, info);
913
914         switch (blank_mode) {
915         case FB_BLANK_POWERDOWN:
916                 sm501fb_panel_power(fbi, 0);
917                 break;
918
919         case FB_BLANK_UNBLANK:
920                 sm501fb_panel_power(fbi, 1);
921                 break;
922
923         case FB_BLANK_NORMAL:
924         case FB_BLANK_VSYNC_SUSPEND:
925         case FB_BLANK_HSYNC_SUSPEND:
926         default:
927                 return 1;
928         }
929
930         return 0;
931 }
932
933 /* sm501fb_blank_crt
934  *
935  * Blank or un-blank the crt interface
936 */
937
938 static int sm501fb_blank_crt(int blank_mode, struct fb_info *info)
939 {
940         struct sm501fb_par  *par = info->par;
941         struct sm501fb_info *fbi = par->info;
942         unsigned long ctrl;
943
944         dev_dbg(fbi->dev, "%s(mode=%d, %p)\n", __func__, blank_mode, info);
945
946         ctrl = readl(fbi->regs + SM501_DC_CRT_CONTROL);
947
948         switch (blank_mode) {
949         case FB_BLANK_POWERDOWN:
950                 ctrl &= ~SM501_DC_CRT_CONTROL_ENABLE;
951                 sm501_misc_control(fbi->dev->parent, SM501_MISC_DAC_POWER, 0);
952
953         case FB_BLANK_NORMAL:
954                 ctrl |= SM501_DC_CRT_CONTROL_BLANK;
955                 break;
956
957         case FB_BLANK_UNBLANK:
958                 ctrl &= ~SM501_DC_CRT_CONTROL_BLANK;
959                 ctrl |=  SM501_DC_CRT_CONTROL_ENABLE;
960                 sm501_misc_control(fbi->dev->parent, 0, SM501_MISC_DAC_POWER);
961                 break;
962
963         case FB_BLANK_VSYNC_SUSPEND:
964         case FB_BLANK_HSYNC_SUSPEND:
965         default:
966                 return 1;
967
968         }
969
970         writel(ctrl, fbi->regs + SM501_DC_CRT_CONTROL);
971         sm501fb_sync_regs(fbi);
972
973         return 0;
974 }
975
976 /* sm501fb_cursor
977  *
978  * set or change the hardware cursor parameters
979 */
980
981 static int sm501fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
982 {
983         struct sm501fb_par  *par = info->par;
984         struct sm501fb_info *fbi = par->info;
985         void __iomem *base = fbi->regs;
986         unsigned long hwc_addr;
987         unsigned long fg, bg;
988
989         dev_dbg(fbi->dev, "%s(%p,%p)\n", __func__, info, cursor);
990
991         if (par->head == HEAD_CRT)
992                 base += SM501_DC_CRT_HWC_BASE;
993         else
994                 base += SM501_DC_PANEL_HWC_BASE;
995
996         /* check not being asked to exceed capabilities */
997
998         if (cursor->image.width > 64)
999                 return -EINVAL;
1000
1001         if (cursor->image.height > 64)
1002                 return -EINVAL;
1003
1004         if (cursor->image.depth > 1)
1005                 return -EINVAL;
1006
1007         hwc_addr = readl(base + SM501_OFF_HWC_ADDR);
1008
1009         if (cursor->enable)
1010                 writel(hwc_addr | SM501_HWC_EN, base + SM501_OFF_HWC_ADDR);
1011         else
1012                 writel(hwc_addr & ~SM501_HWC_EN, base + SM501_OFF_HWC_ADDR);
1013
1014         /* set data */
1015         if (cursor->set & FB_CUR_SETPOS) {
1016                 unsigned int x = cursor->image.dx;
1017                 unsigned int y = cursor->image.dy;
1018
1019                 if (x >= 2048 || y >= 2048 )
1020                         return -EINVAL;
1021
1022                 dev_dbg(fbi->dev, "set position %d,%d\n", x, y);
1023
1024                 //y += cursor->image.height;
1025
1026                 writel(x | (y << 16), base + SM501_OFF_HWC_LOC);
1027         }
1028
1029         if (cursor->set & FB_CUR_SETCMAP) {
1030                 unsigned int bg_col = cursor->image.bg_color;
1031                 unsigned int fg_col = cursor->image.fg_color;
1032
1033                 dev_dbg(fbi->dev, "%s: update cmap (%08x,%08x)\n",
1034                         __func__, bg_col, fg_col);
1035
1036                 bg = ((info->cmap.red[bg_col] & 0xF8) << 8) |
1037                         ((info->cmap.green[bg_col] & 0xFC) << 3) |
1038                         ((info->cmap.blue[bg_col] & 0xF8) >> 3);
1039
1040                 fg = ((info->cmap.red[fg_col] & 0xF8) << 8) |
1041                         ((info->cmap.green[fg_col] & 0xFC) << 3) |
1042                         ((info->cmap.blue[fg_col] & 0xF8) >> 3);
1043
1044                 dev_dbg(fbi->dev, "fgcol %08lx, bgcol %08lx\n", fg, bg);
1045
1046                 writel(bg, base + SM501_OFF_HWC_COLOR_1_2);
1047                 writel(fg, base + SM501_OFF_HWC_COLOR_3);
1048         }
1049
1050         if (cursor->set & FB_CUR_SETSIZE ||
1051             cursor->set & (FB_CUR_SETIMAGE | FB_CUR_SETSHAPE)) {
1052                 /* SM501 cursor is a two bpp 64x64 bitmap this routine
1053                  * clears it to transparent then combines the cursor
1054                  * shape plane with the colour plane to set the
1055                  * cursor */
1056                 int x, y;
1057                 const unsigned char *pcol = cursor->image.data;
1058                 const unsigned char *pmsk = cursor->mask;
1059                 void __iomem   *dst = par->cursor.k_addr;
1060                 unsigned char  dcol = 0;
1061                 unsigned char  dmsk = 0;
1062                 unsigned int   op;
1063
1064                 dev_dbg(fbi->dev, "%s: setting shape (%d,%d)\n",
1065                         __func__, cursor->image.width, cursor->image.height);
1066
1067                 for (op = 0; op < (64*64*2)/8; op+=4)
1068                         writel(0x0, dst + op);
1069
1070                 for (y = 0; y < cursor->image.height; y++) {
1071                         for (x = 0; x < cursor->image.width; x++) {
1072                                 if ((x % 8) == 0) {
1073                                         dcol = *pcol++;
1074                                         dmsk = *pmsk++;
1075                                 } else {
1076                                         dcol >>= 1;
1077                                         dmsk >>= 1;
1078                                 }
1079
1080                                 if (dmsk & 1) {
1081                                         op = (dcol & 1) ? 1 : 3;
1082                                         op <<= ((x % 4) * 2);
1083
1084                                         op |= readb(dst + (x / 4));
1085                                         writeb(op, dst + (x / 4));
1086                                 }
1087                         }
1088                         dst += (64*2)/8;
1089                 }
1090         }
1091
1092         sm501fb_sync_regs(fbi); /* ensure cursor data flushed */
1093         return 0;
1094 }
1095
1096 /* sm501fb_crtsrc_show
1097  *
1098  * device attribute code to show where the crt output is sourced from
1099 */
1100
1101 static ssize_t sm501fb_crtsrc_show(struct device *dev,
1102                                struct device_attribute *attr, char *buf)
1103 {
1104         struct sm501fb_info *info = dev_get_drvdata(dev);
1105         unsigned long ctrl;
1106
1107         ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1108         ctrl &= SM501_DC_CRT_CONTROL_SEL;
1109
1110         return snprintf(buf, PAGE_SIZE, "%s\n", ctrl ? "crt" : "panel");
1111 }
1112
1113 /* sm501fb_crtsrc_show
1114  *
1115  * device attribute code to set where the crt output is sourced from
1116 */
1117
1118 static ssize_t sm501fb_crtsrc_store(struct device *dev,
1119                                 struct device_attribute *attr,
1120                                 const char *buf, size_t len)
1121 {
1122         struct sm501fb_info *info = dev_get_drvdata(dev);
1123         enum sm501_controller head;
1124         unsigned long ctrl;
1125
1126         if (len < 1)
1127                 return -EINVAL;
1128
1129         if (strnicmp(buf, "crt", 3) == 0)
1130                 head = HEAD_CRT;
1131         else if (strnicmp(buf, "panel", 5) == 0)
1132                 head = HEAD_PANEL;
1133         else
1134                 return -EINVAL;
1135
1136         dev_info(dev, "setting crt source to head %d\n", head);
1137
1138         ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1139
1140         if (head == HEAD_CRT) {
1141                 ctrl |= SM501_DC_CRT_CONTROL_SEL;
1142                 ctrl |= SM501_DC_CRT_CONTROL_ENABLE;
1143                 ctrl |= SM501_DC_CRT_CONTROL_TE;
1144         } else {
1145                 ctrl &= ~SM501_DC_CRT_CONTROL_SEL;
1146                 ctrl &= ~SM501_DC_CRT_CONTROL_ENABLE;
1147                 ctrl &= ~SM501_DC_CRT_CONTROL_TE;
1148         }
1149
1150         writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1151         sm501fb_sync_regs(info);
1152
1153         return len;
1154 }
1155
1156 /* Prepare the device_attr for registration with sysfs later */
1157 static DEVICE_ATTR(crt_src, 0666, sm501fb_crtsrc_show, sm501fb_crtsrc_store);
1158
1159 /* sm501fb_show_regs
1160  *
1161  * show the primary sm501 registers
1162 */
1163 static int sm501fb_show_regs(struct sm501fb_info *info, char *ptr,
1164                              unsigned int start, unsigned int len)
1165 {
1166         void __iomem *mem = info->regs;
1167         char *buf = ptr;
1168         unsigned int reg;
1169
1170         for (reg = start; reg < (len + start); reg += 4)
1171                 ptr += sprintf(ptr, "%08x = %08x\n", reg, readl(mem + reg));
1172
1173         return ptr - buf;
1174 }
1175
1176 /* sm501fb_debug_show_crt
1177  *
1178  * show the crt control and cursor registers
1179 */
1180
1181 static ssize_t sm501fb_debug_show_crt(struct device *dev,
1182                                   struct device_attribute *attr, char *buf)
1183 {
1184         struct sm501fb_info *info = dev_get_drvdata(dev);
1185         char *ptr = buf;
1186
1187         ptr += sm501fb_show_regs(info, ptr, SM501_DC_CRT_CONTROL, 0x40);
1188         ptr += sm501fb_show_regs(info, ptr, SM501_DC_CRT_HWC_BASE, 0x10);
1189
1190         return ptr - buf;
1191 }
1192
1193 static DEVICE_ATTR(fbregs_crt, 0444, sm501fb_debug_show_crt, NULL);
1194
1195 /* sm501fb_debug_show_pnl
1196  *
1197  * show the panel control and cursor registers
1198 */
1199
1200 static ssize_t sm501fb_debug_show_pnl(struct device *dev,
1201                                   struct device_attribute *attr, char *buf)
1202 {
1203         struct sm501fb_info *info = dev_get_drvdata(dev);
1204         char *ptr = buf;
1205
1206         ptr += sm501fb_show_regs(info, ptr, 0x0, 0x40);
1207         ptr += sm501fb_show_regs(info, ptr, SM501_DC_PANEL_HWC_BASE, 0x10);
1208
1209         return ptr - buf;
1210 }
1211
1212 static DEVICE_ATTR(fbregs_pnl, 0444, sm501fb_debug_show_pnl, NULL);
1213
1214 /* framebuffer ops */
1215
1216 static struct fb_ops sm501fb_ops_crt = {
1217         .owner          = THIS_MODULE,
1218         .fb_check_var   = sm501fb_check_var_crt,
1219         .fb_set_par     = sm501fb_set_par_crt,
1220         .fb_blank       = sm501fb_blank_crt,
1221         .fb_setcolreg   = sm501fb_setcolreg,
1222         .fb_pan_display = sm501fb_pan_crt,
1223         .fb_cursor      = sm501fb_cursor,
1224         .fb_fillrect    = cfb_fillrect,
1225         .fb_copyarea    = cfb_copyarea,
1226         .fb_imageblit   = cfb_imageblit,
1227 };
1228
1229 static struct fb_ops sm501fb_ops_pnl = {
1230         .owner          = THIS_MODULE,
1231         .fb_check_var   = sm501fb_check_var_pnl,
1232         .fb_set_par     = sm501fb_set_par_pnl,
1233         .fb_pan_display = sm501fb_pan_pnl,
1234         .fb_blank       = sm501fb_blank_pnl,
1235         .fb_setcolreg   = sm501fb_setcolreg,
1236         .fb_cursor      = sm501fb_cursor,
1237         .fb_fillrect    = cfb_fillrect,
1238         .fb_copyarea    = cfb_copyarea,
1239         .fb_imageblit   = cfb_imageblit,
1240 };
1241
1242 /* sm501_init_cursor
1243  *
1244  * initialise hw cursor parameters
1245 */
1246
1247 static int sm501_init_cursor(struct fb_info *fbi, unsigned int reg_base)
1248 {
1249         struct sm501fb_par *par;
1250         struct sm501fb_info *info;
1251         int ret;
1252
1253         if (fbi == NULL)
1254                 return 0;
1255
1256         par = fbi->par;
1257         info = par->info;
1258
1259         par->cursor_regs = info->regs + reg_base;
1260
1261         ret = sm501_alloc_mem(info, &par->cursor, SM501_MEMF_CURSOR, 1024);
1262         if (ret < 0)
1263                 return ret;
1264
1265         /* initialise the colour registers */
1266
1267         writel(par->cursor.sm_addr, par->cursor_regs + SM501_OFF_HWC_ADDR);
1268
1269         writel(0x00, par->cursor_regs + SM501_OFF_HWC_LOC);
1270         writel(0x00, par->cursor_regs + SM501_OFF_HWC_COLOR_1_2);
1271         writel(0x00, par->cursor_regs + SM501_OFF_HWC_COLOR_3);
1272         sm501fb_sync_regs(info);
1273
1274         return 0;
1275 }
1276
1277 /* sm501fb_info_start
1278  *
1279  * fills the par structure claiming resources and remapping etc.
1280 */
1281
1282 static int sm501fb_start(struct sm501fb_info *info,
1283                          struct platform_device *pdev)
1284 {
1285         struct resource *res;
1286         struct device *dev = &pdev->dev;
1287         int k;
1288         int ret;
1289
1290         info->irq = ret = platform_get_irq(pdev, 0);
1291         if (ret < 0) {
1292                 /* we currently do not use the IRQ */
1293                 dev_warn(dev, "no irq for device\n");
1294         }
1295
1296         /* allocate, reserve and remap resources for registers */
1297         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1298         if (res == NULL) {
1299                 dev_err(dev, "no resource definition for registers\n");
1300                 ret = -ENOENT;
1301                 goto err_release;
1302         }
1303
1304         info->regs_res = request_mem_region(res->start,
1305                                             res->end - res->start,
1306                                             pdev->name);
1307
1308         if (info->regs_res == NULL) {
1309                 dev_err(dev, "cannot claim registers\n");
1310                 ret = -ENXIO;
1311                 goto err_release;
1312         }
1313
1314         info->regs = ioremap(res->start, (res->end - res->start)+1);
1315         if (info->regs == NULL) {
1316                 dev_err(dev, "cannot remap registers\n");
1317                 ret = -ENXIO;
1318                 goto err_regs_res;
1319         }
1320
1321         /* allocate, reserve resources for framebuffer */
1322         res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
1323         if (res == NULL) {
1324                 dev_err(dev, "no memory resource defined\n");
1325                 ret = -ENXIO;
1326                 goto err_regs_map;
1327         }
1328
1329         info->fbmem_res = request_mem_region(res->start,
1330                                              (res->end - res->start)+1,
1331                                              pdev->name);
1332         if (info->fbmem_res == NULL) {
1333                 dev_err(dev, "cannot claim framebuffer\n");
1334                 ret = -ENXIO;
1335                 goto err_regs_map;
1336         }
1337
1338         info->fbmem = ioremap(res->start, (res->end - res->start)+1);
1339         if (info->fbmem == NULL) {
1340                 dev_err(dev, "cannot remap framebuffer\n");
1341                 goto err_mem_res;
1342         }
1343
1344         info->fbmem_len = (res->end - res->start)+1;
1345
1346         /* clear framebuffer memory - avoids garbage data on unused fb */
1347         memset(info->fbmem, 0, info->fbmem_len);
1348
1349         /* clear palette ram - undefined at power on */
1350         for (k = 0; k < (256 * 3); k++)
1351                 writel(0, info->regs + SM501_DC_PANEL_PALETTE + (k * 4));
1352
1353         /* enable display controller */
1354         sm501_unit_power(dev->parent, SM501_GATE_DISPLAY, 1);
1355
1356         /* setup cursors */
1357
1358         sm501_init_cursor(info->fb[HEAD_CRT], SM501_DC_CRT_HWC_ADDR);
1359         sm501_init_cursor(info->fb[HEAD_PANEL], SM501_DC_PANEL_HWC_ADDR);
1360
1361         return 0; /* everything is setup */
1362
1363  err_mem_res:
1364         release_resource(info->fbmem_res);
1365         kfree(info->fbmem_res);
1366
1367  err_regs_map:
1368         iounmap(info->regs);
1369
1370  err_regs_res:
1371         release_resource(info->regs_res);
1372         kfree(info->regs_res);
1373
1374  err_release:
1375         return ret;
1376 }
1377
1378 static void sm501fb_stop(struct sm501fb_info *info)
1379 {
1380         /* disable display controller */
1381         sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 0);
1382
1383         iounmap(info->fbmem);
1384         release_resource(info->fbmem_res);
1385         kfree(info->fbmem_res);
1386
1387         iounmap(info->regs);
1388         release_resource(info->regs_res);
1389         kfree(info->regs_res);
1390 }
1391
1392 static int sm501fb_init_fb(struct fb_info *fb,
1393                            enum sm501_controller head,
1394                            const char *fbname)
1395 {
1396         struct sm501_platdata_fbsub *pd;
1397         struct sm501fb_par *par = fb->par;
1398         struct sm501fb_info *info = par->info;
1399         unsigned long ctrl;
1400         unsigned int enable;
1401         int ret;
1402
1403         switch (head) {
1404         case HEAD_CRT:
1405                 pd = info->pdata->fb_crt;
1406                 ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1407                 enable = (ctrl & SM501_DC_CRT_CONTROL_ENABLE) ? 1 : 0;
1408
1409                 /* ensure we set the correct source register */
1410                 if (info->pdata->fb_route != SM501_FB_CRT_PANEL) {
1411                         ctrl |= SM501_DC_CRT_CONTROL_SEL;
1412                         writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1413                 }
1414
1415                 break;
1416
1417         case HEAD_PANEL:
1418                 pd = info->pdata->fb_pnl;
1419                 ctrl = readl(info->regs + SM501_DC_PANEL_CONTROL);
1420                 enable = (ctrl & SM501_DC_PANEL_CONTROL_EN) ? 1 : 0;
1421                 break;
1422
1423         default:
1424                 pd = NULL;              /* stop compiler warnings */
1425                 ctrl = 0;
1426                 enable = 0;
1427                 BUG();
1428         }
1429
1430         dev_info(info->dev, "fb %s %sabled at start\n",
1431                  fbname, enable ? "en" : "dis");
1432
1433         /* check to see if our routing allows this */
1434
1435         if (head == HEAD_CRT && info->pdata->fb_route == SM501_FB_CRT_PANEL) {
1436                 ctrl &= ~SM501_DC_CRT_CONTROL_SEL;
1437                 writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1438                 enable = 0;
1439         }
1440
1441         strlcpy(fb->fix.id, fbname, sizeof(fb->fix.id));
1442
1443         memcpy(&par->ops,
1444                (head == HEAD_CRT) ? &sm501fb_ops_crt : &sm501fb_ops_pnl,
1445                sizeof(struct fb_ops));
1446
1447         /* update ops dependant on what we've been passed */
1448
1449         if ((pd->flags & SM501FB_FLAG_USE_HWCURSOR) == 0)
1450                 par->ops.fb_cursor = NULL;
1451
1452         fb->fbops = &par->ops;
1453         fb->flags = FBINFO_FLAG_DEFAULT |
1454                 FBINFO_HWACCEL_XPAN | FBINFO_HWACCEL_YPAN;
1455
1456         /* fixed data */
1457
1458         fb->fix.type            = FB_TYPE_PACKED_PIXELS;
1459         fb->fix.type_aux        = 0;
1460         fb->fix.xpanstep        = 1;
1461         fb->fix.ypanstep        = 1;
1462         fb->fix.ywrapstep       = 0;
1463         fb->fix.accel           = FB_ACCEL_NONE;
1464
1465         /* screenmode */
1466
1467         fb->var.nonstd          = 0;
1468         fb->var.activate        = FB_ACTIVATE_NOW;
1469         fb->var.accel_flags     = 0;
1470         fb->var.vmode           = FB_VMODE_NONINTERLACED;
1471         fb->var.bits_per_pixel  = 16;
1472
1473         if (enable && (pd->flags & SM501FB_FLAG_USE_INIT_MODE) && 0) {
1474                 /* TODO read the mode from the current display */
1475
1476         } else {
1477                 if (pd->def_mode) {
1478                         dev_info(info->dev, "using supplied mode\n");
1479                         fb_videomode_to_var(&fb->var, pd->def_mode);
1480
1481                         fb->var.bits_per_pixel = pd->def_bpp ? pd->def_bpp : 8;
1482                         fb->var.xres_virtual = fb->var.xres;
1483                         fb->var.yres_virtual = fb->var.yres;
1484                 } else {
1485                         ret = fb_find_mode(&fb->var, fb,
1486                                            NULL, NULL, 0, NULL, 8);
1487
1488                         if (ret == 0 || ret == 4) {
1489                                 dev_err(info->dev,
1490                                         "failed to get initial mode\n");
1491                                 return -EINVAL;
1492                         }
1493                 }
1494         }
1495
1496         /* initialise and set the palette */
1497         fb_alloc_cmap(&fb->cmap, NR_PALETTE, 0);
1498         fb_set_cmap(&fb->cmap, fb);
1499
1500         ret = (fb->fbops->fb_check_var)(&fb->var, fb);
1501         if (ret)
1502                 dev_err(info->dev, "check_var() failed on initial setup?\n");
1503
1504         /* ensure we've activated our new configuration */
1505         (fb->fbops->fb_set_par)(fb);
1506
1507         return 0;
1508 }
1509
1510 /* default platform data if none is supplied (ie, PCI device) */
1511
1512 static struct sm501_platdata_fbsub sm501fb_pdata_crt = {
1513         .flags          = (SM501FB_FLAG_USE_INIT_MODE |
1514                            SM501FB_FLAG_USE_HWCURSOR |
1515                            SM501FB_FLAG_USE_HWACCEL |
1516                            SM501FB_FLAG_DISABLE_AT_EXIT),
1517
1518 };
1519
1520 static struct sm501_platdata_fbsub sm501fb_pdata_pnl = {
1521         .flags          = (SM501FB_FLAG_USE_INIT_MODE |
1522                            SM501FB_FLAG_USE_HWCURSOR |
1523                            SM501FB_FLAG_USE_HWACCEL |
1524                            SM501FB_FLAG_DISABLE_AT_EXIT),
1525 };
1526
1527 static struct sm501_platdata_fb sm501fb_def_pdata = {
1528         .fb_route               = SM501_FB_OWN,
1529         .fb_crt                 = &sm501fb_pdata_crt,
1530         .fb_pnl                 = &sm501fb_pdata_pnl,
1531 };
1532
1533 static char driver_name_crt[] = "sm501fb-crt";
1534 static char driver_name_pnl[] = "sm501fb-panel";
1535
1536 static int __devinit sm501fb_probe_one(struct sm501fb_info *info,
1537                                        enum sm501_controller head)
1538 {
1539         unsigned char *name = (head == HEAD_CRT) ? "crt" : "panel";
1540         struct sm501_platdata_fbsub *pd;
1541         struct sm501fb_par *par;
1542         struct fb_info *fbi;
1543
1544         pd = (head == HEAD_CRT) ? info->pdata->fb_crt : info->pdata->fb_pnl;
1545
1546         /* Do not initialise if we've not been given any platform data */
1547         if (pd == NULL) {
1548                 dev_info(info->dev, "no data for fb %s (disabled)\n", name);
1549                 return 0;
1550         }
1551
1552         fbi = framebuffer_alloc(sizeof(struct sm501fb_par), info->dev);
1553         if (fbi == NULL) {
1554                 dev_err(info->dev, "cannot allocate %s framebuffer\n", name);
1555                 return -ENOMEM;
1556         }
1557
1558         par = fbi->par;
1559         par->info = info;
1560         par->head = head;
1561         fbi->pseudo_palette = &par->pseudo_palette;
1562
1563         info->fb[head] = fbi;
1564
1565         return 0;
1566 }
1567
1568 /* Free up anything allocated by sm501fb_init_fb */
1569
1570 static void sm501_free_init_fb(struct sm501fb_info *info,
1571                                 enum sm501_controller head)
1572 {
1573         struct fb_info *fbi = info->fb[head];
1574
1575         fb_dealloc_cmap(&fbi->cmap);
1576 }
1577
1578 static int __devinit sm501fb_start_one(struct sm501fb_info *info,
1579                                        enum sm501_controller head,
1580                                        const char *drvname)
1581 {
1582         struct fb_info *fbi = info->fb[head];
1583         int ret;
1584
1585         if (!fbi)
1586                 return 0;
1587
1588         ret = sm501fb_init_fb(info->fb[head], head, drvname);
1589         if (ret) {
1590                 dev_err(info->dev, "cannot initialise fb %s\n", drvname);
1591                 return ret;
1592         }
1593
1594         ret = register_framebuffer(info->fb[head]);
1595         if (ret) {
1596                 dev_err(info->dev, "failed to register fb %s\n", drvname);
1597                 sm501_free_init_fb(info, head);
1598                 return ret;
1599         }
1600
1601         dev_info(info->dev, "fb%d: %s frame buffer\n", fbi->node, fbi->fix.id);
1602
1603         return 0;
1604 }
1605
1606 static int __devinit sm501fb_probe(struct platform_device *pdev)
1607 {
1608         struct sm501fb_info *info;
1609         struct device *dev = &pdev->dev;
1610         int ret;
1611
1612         /* allocate our framebuffers */
1613
1614         info = kzalloc(sizeof(struct sm501fb_info), GFP_KERNEL);
1615         if (!info) {
1616                 dev_err(dev, "failed to allocate state\n");
1617                 return -ENOMEM;
1618         }
1619
1620         info->dev = dev = &pdev->dev;
1621         platform_set_drvdata(pdev, info);
1622
1623         if (dev->parent->platform_data) {
1624                 struct sm501_platdata *pd = dev->parent->platform_data;
1625                 info->pdata = pd->fb;
1626         }
1627
1628         if (info->pdata == NULL) {
1629                 dev_info(dev, "using default configuration data\n");
1630                 info->pdata = &sm501fb_def_pdata;
1631         }
1632
1633         /* probe for the presence of each panel */
1634
1635         ret = sm501fb_probe_one(info, HEAD_CRT);
1636         if (ret < 0) {
1637                 dev_err(dev, "failed to probe CRT\n");
1638                 goto err_alloc;
1639         }
1640
1641         ret = sm501fb_probe_one(info, HEAD_PANEL);
1642         if (ret < 0) {
1643                 dev_err(dev, "failed to probe PANEL\n");
1644                 goto err_probed_crt;
1645         }
1646
1647         if (info->fb[HEAD_PANEL] == NULL &&
1648             info->fb[HEAD_CRT] == NULL) {
1649                 dev_err(dev, "no framebuffers found\n");
1650                 goto err_alloc;
1651         }
1652
1653         /* get the resources for both of the framebuffers */
1654
1655         ret = sm501fb_start(info, pdev);
1656         if (ret) {
1657                 dev_err(dev, "cannot initialise SM501\n");
1658                 goto err_probed_panel;
1659         }
1660
1661         ret = sm501fb_start_one(info, HEAD_CRT, driver_name_crt);
1662         if (ret) {
1663                 dev_err(dev, "failed to start CRT\n");
1664                 goto err_started;
1665         }
1666
1667         ret = sm501fb_start_one(info, HEAD_PANEL, driver_name_pnl);
1668         if (ret) {
1669                 dev_err(dev, "failed to start Panel\n");
1670                 goto err_started_crt;
1671         }
1672
1673         /* create device files */
1674
1675         ret = device_create_file(dev, &dev_attr_crt_src);
1676         if (ret)
1677                 goto err_started_panel;
1678
1679         ret = device_create_file(dev, &dev_attr_fbregs_pnl);
1680         if (ret)
1681                 goto err_attached_crtsrc_file;
1682
1683         ret = device_create_file(dev, &dev_attr_fbregs_crt);
1684         if (ret)
1685                 goto err_attached_pnlregs_file;
1686
1687         /* we registered, return ok */
1688         return 0;
1689
1690 err_attached_pnlregs_file:
1691         device_remove_file(dev, &dev_attr_fbregs_pnl);
1692
1693 err_attached_crtsrc_file:
1694         device_remove_file(dev, &dev_attr_crt_src);
1695
1696 err_started_panel:
1697         unregister_framebuffer(info->fb[HEAD_PANEL]);
1698         sm501_free_init_fb(info, HEAD_PANEL);
1699
1700 err_started_crt:
1701         unregister_framebuffer(info->fb[HEAD_CRT]);
1702         sm501_free_init_fb(info, HEAD_CRT);
1703
1704 err_started:
1705         sm501fb_stop(info);
1706
1707 err_probed_panel:
1708         framebuffer_release(info->fb[HEAD_PANEL]);
1709
1710 err_probed_crt:
1711         framebuffer_release(info->fb[HEAD_CRT]);
1712
1713 err_alloc:
1714         kfree(info);
1715
1716         return ret;
1717 }
1718
1719
1720 /*
1721  *  Cleanup
1722  */
1723 static int sm501fb_remove(struct platform_device *pdev)
1724 {
1725         struct sm501fb_info *info = platform_get_drvdata(pdev);
1726         struct fb_info     *fbinfo_crt = info->fb[0];
1727         struct fb_info     *fbinfo_pnl = info->fb[1];
1728
1729         device_remove_file(&pdev->dev, &dev_attr_fbregs_crt);
1730         device_remove_file(&pdev->dev, &dev_attr_fbregs_pnl);
1731         device_remove_file(&pdev->dev, &dev_attr_crt_src);
1732
1733         sm501_free_init_fb(info, HEAD_CRT);
1734         sm501_free_init_fb(info, HEAD_PANEL);
1735
1736         unregister_framebuffer(fbinfo_crt);
1737         unregister_framebuffer(fbinfo_pnl);
1738
1739         sm501fb_stop(info);
1740         kfree(info);
1741
1742         framebuffer_release(fbinfo_pnl);
1743         framebuffer_release(fbinfo_crt);
1744
1745         return 0;
1746 }
1747
1748 #ifdef CONFIG_PM
1749
1750 static int sm501fb_suspend_fb(struct sm501fb_info *info,
1751                               enum sm501_controller head)
1752 {
1753         struct fb_info *fbi = info->fb[head];
1754         struct sm501fb_par *par = fbi->par;
1755
1756         if (par->screen.size == 0)
1757                 return 0;
1758
1759         /* blank the relevant interface to ensure unit power minimised */
1760         (par->ops.fb_blank)(FB_BLANK_POWERDOWN, fbi);
1761
1762         /* tell console/fb driver we are suspending */
1763
1764         acquire_console_sem();
1765         fb_set_suspend(fbi, 1);
1766         release_console_sem();
1767
1768         /* backup copies in case chip is powered down over suspend */
1769
1770         par->store_fb = vmalloc(par->screen.size);
1771         if (par->store_fb == NULL) {
1772                 dev_err(info->dev, "no memory to store screen\n");
1773                 return -ENOMEM;
1774         }
1775
1776         par->store_cursor = vmalloc(par->cursor.size);
1777         if (par->store_cursor == NULL) {
1778                 dev_err(info->dev, "no memory to store cursor\n");
1779                 goto err_nocursor;
1780         }
1781
1782         dev_dbg(info->dev, "suspending screen to %p\n", par->store_fb);
1783         dev_dbg(info->dev, "suspending cursor to %p\n", par->store_cursor);
1784
1785         memcpy_fromio(par->store_fb, par->screen.k_addr, par->screen.size);
1786         memcpy_fromio(par->store_cursor, par->cursor.k_addr, par->cursor.size);
1787
1788         return 0;
1789
1790  err_nocursor:
1791         vfree(par->store_fb);
1792         par->store_fb = NULL;
1793
1794         return -ENOMEM;
1795 }
1796
1797 static void sm501fb_resume_fb(struct sm501fb_info *info,
1798                               enum sm501_controller head)
1799 {
1800         struct fb_info *fbi = info->fb[head];
1801         struct sm501fb_par *par = fbi->par;
1802
1803         if (par->screen.size == 0)
1804                 return;
1805
1806         /* re-activate the configuration */
1807
1808         (par->ops.fb_set_par)(fbi);
1809
1810         /* restore the data */
1811
1812         dev_dbg(info->dev, "restoring screen from %p\n", par->store_fb);
1813         dev_dbg(info->dev, "restoring cursor from %p\n", par->store_cursor);
1814
1815         if (par->store_fb)
1816                 memcpy_toio(par->screen.k_addr, par->store_fb,
1817                             par->screen.size);
1818
1819         if (par->store_cursor)
1820                 memcpy_toio(par->cursor.k_addr, par->store_cursor,
1821                             par->cursor.size);
1822
1823         acquire_console_sem();
1824         fb_set_suspend(fbi, 0);
1825         release_console_sem();
1826
1827         vfree(par->store_fb);
1828         vfree(par->store_cursor);
1829 }
1830
1831
1832 /* suspend and resume support */
1833
1834 static int sm501fb_suspend(struct platform_device *pdev, pm_message_t state)
1835 {
1836         struct sm501fb_info *info = platform_get_drvdata(pdev);
1837
1838         /* store crt control to resume with */
1839         info->pm_crt_ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1840
1841         sm501fb_suspend_fb(info, HEAD_CRT);
1842         sm501fb_suspend_fb(info, HEAD_PANEL);
1843
1844         /* turn off the clocks, in case the device is not powered down */
1845         sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 0);
1846
1847         return 0;
1848 }
1849
1850 #define SM501_CRT_CTRL_SAVE (SM501_DC_CRT_CONTROL_TVP |        \
1851                              SM501_DC_CRT_CONTROL_SEL)
1852
1853
1854 static int sm501fb_resume(struct platform_device *pdev)
1855 {
1856         struct sm501fb_info *info = platform_get_drvdata(pdev);
1857         unsigned long crt_ctrl;
1858
1859         sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 1);
1860
1861         /* restore the items we want to be saved for crt control */
1862
1863         crt_ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1864         crt_ctrl &= ~SM501_CRT_CTRL_SAVE;
1865         crt_ctrl |= info->pm_crt_ctrl & SM501_CRT_CTRL_SAVE;
1866         writel(crt_ctrl, info->regs + SM501_DC_CRT_CONTROL);
1867
1868         sm501fb_resume_fb(info, HEAD_CRT);
1869         sm501fb_resume_fb(info, HEAD_PANEL);
1870
1871         return 0;
1872 }
1873
1874 #else
1875 #define sm501fb_suspend NULL
1876 #define sm501fb_resume  NULL
1877 #endif
1878
1879 static struct platform_driver sm501fb_driver = {
1880         .probe          = sm501fb_probe,
1881         .remove         = sm501fb_remove,
1882         .suspend        = sm501fb_suspend,
1883         .resume         = sm501fb_resume,
1884         .driver         = {
1885                 .name   = "sm501-fb",
1886                 .owner  = THIS_MODULE,
1887         },
1888 };
1889
1890 static int __devinit sm501fb_init(void)
1891 {
1892         return platform_driver_register(&sm501fb_driver);
1893 }
1894
1895 static void __exit sm501fb_cleanup(void)
1896 {
1897         platform_driver_unregister(&sm501fb_driver);
1898 }
1899
1900 module_init(sm501fb_init);
1901 module_exit(sm501fb_cleanup);
1902
1903 MODULE_AUTHOR("Ben Dooks, Vincent Sanders");
1904 MODULE_DESCRIPTION("SM501 Framebuffer driver");
1905 MODULE_LICENSE("GPL v2");