2 * linux/drivers/video/omap2/dss/rfbi.c
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
7 * Some code and ideas taken from drivers/video/omap/ driver
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
23 #define DSS_SUBSYS_NAME "RFBI"
25 #include <linux/kernel.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/vmalloc.h>
28 #include <linux/clk.h>
30 #include <linux/delay.h>
31 #include <linux/kfifo.h>
32 #include <linux/ktime.h>
33 #include <linux/hrtimer.h>
34 #include <linux/seq_file.h>
35 #include <linux/semaphore.h>
37 #include <video/omapdss.h>
40 struct rfbi_reg { u16 idx; };
42 #define RFBI_REG(idx) ((const struct rfbi_reg) { idx })
44 #define RFBI_REVISION RFBI_REG(0x0000)
45 #define RFBI_SYSCONFIG RFBI_REG(0x0010)
46 #define RFBI_SYSSTATUS RFBI_REG(0x0014)
47 #define RFBI_CONTROL RFBI_REG(0x0040)
48 #define RFBI_PIXEL_CNT RFBI_REG(0x0044)
49 #define RFBI_LINE_NUMBER RFBI_REG(0x0048)
50 #define RFBI_CMD RFBI_REG(0x004c)
51 #define RFBI_PARAM RFBI_REG(0x0050)
52 #define RFBI_DATA RFBI_REG(0x0054)
53 #define RFBI_READ RFBI_REG(0x0058)
54 #define RFBI_STATUS RFBI_REG(0x005c)
56 #define RFBI_CONFIG(n) RFBI_REG(0x0060 + (n)*0x18)
57 #define RFBI_ONOFF_TIME(n) RFBI_REG(0x0064 + (n)*0x18)
58 #define RFBI_CYCLE_TIME(n) RFBI_REG(0x0068 + (n)*0x18)
59 #define RFBI_DATA_CYCLE1(n) RFBI_REG(0x006c + (n)*0x18)
60 #define RFBI_DATA_CYCLE2(n) RFBI_REG(0x0070 + (n)*0x18)
61 #define RFBI_DATA_CYCLE3(n) RFBI_REG(0x0074 + (n)*0x18)
63 #define RFBI_VSYNC_WIDTH RFBI_REG(0x0090)
64 #define RFBI_HSYNC_WIDTH RFBI_REG(0x0094)
66 #define REG_FLD_MOD(idx, val, start, end) \
67 rfbi_write_reg(idx, FLD_MOD(rfbi_read_reg(idx), val, start, end))
69 enum omap_rfbi_cycleformat {
70 OMAP_DSS_RFBI_CYCLEFORMAT_1_1 = 0,
71 OMAP_DSS_RFBI_CYCLEFORMAT_2_1 = 1,
72 OMAP_DSS_RFBI_CYCLEFORMAT_3_1 = 2,
73 OMAP_DSS_RFBI_CYCLEFORMAT_3_2 = 3,
76 enum omap_rfbi_datatype {
77 OMAP_DSS_RFBI_DATATYPE_12 = 0,
78 OMAP_DSS_RFBI_DATATYPE_16 = 1,
79 OMAP_DSS_RFBI_DATATYPE_18 = 2,
80 OMAP_DSS_RFBI_DATATYPE_24 = 3,
83 enum omap_rfbi_parallelmode {
84 OMAP_DSS_RFBI_PARALLELMODE_8 = 0,
85 OMAP_DSS_RFBI_PARALLELMODE_9 = 1,
86 OMAP_DSS_RFBI_PARALLELMODE_12 = 2,
87 OMAP_DSS_RFBI_PARALLELMODE_16 = 3,
90 static int rfbi_convert_timings(struct rfbi_timings *t);
91 static void rfbi_get_clk_info(u32 *clk_period, u32 *max_clk_div);
94 struct platform_device *pdev;
99 enum omap_rfbi_datatype datatype;
100 enum omap_rfbi_parallelmode parallelmode;
102 enum omap_rfbi_te_mode te_mode;
105 void (*framedone_callback)(void *data);
106 void *framedone_callback_data;
108 struct omap_dss_device *dssdev[2];
110 struct semaphore bus_lock;
113 static inline void rfbi_write_reg(const struct rfbi_reg idx, u32 val)
115 __raw_writel(val, rfbi.base + idx.idx);
118 static inline u32 rfbi_read_reg(const struct rfbi_reg idx)
120 return __raw_readl(rfbi.base + idx.idx);
123 static void rfbi_enable_clocks(bool enable)
126 dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
128 dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
131 void rfbi_bus_lock(void)
133 down(&rfbi.bus_lock);
135 EXPORT_SYMBOL(rfbi_bus_lock);
137 void rfbi_bus_unlock(void)
141 EXPORT_SYMBOL(rfbi_bus_unlock);
143 void omap_rfbi_write_command(const void *buf, u32 len)
145 switch (rfbi.parallelmode) {
146 case OMAP_DSS_RFBI_PARALLELMODE_8:
150 rfbi_write_reg(RFBI_CMD, *b++);
154 case OMAP_DSS_RFBI_PARALLELMODE_16:
158 for (; len; len -= 2)
159 rfbi_write_reg(RFBI_CMD, *w++);
163 case OMAP_DSS_RFBI_PARALLELMODE_9:
164 case OMAP_DSS_RFBI_PARALLELMODE_12:
169 EXPORT_SYMBOL(omap_rfbi_write_command);
171 void omap_rfbi_read_data(void *buf, u32 len)
173 switch (rfbi.parallelmode) {
174 case OMAP_DSS_RFBI_PARALLELMODE_8:
178 rfbi_write_reg(RFBI_READ, 0);
179 *b++ = rfbi_read_reg(RFBI_READ);
184 case OMAP_DSS_RFBI_PARALLELMODE_16:
188 for (; len; len -= 2) {
189 rfbi_write_reg(RFBI_READ, 0);
190 *w++ = rfbi_read_reg(RFBI_READ);
195 case OMAP_DSS_RFBI_PARALLELMODE_9:
196 case OMAP_DSS_RFBI_PARALLELMODE_12:
201 EXPORT_SYMBOL(omap_rfbi_read_data);
203 void omap_rfbi_write_data(const void *buf, u32 len)
205 switch (rfbi.parallelmode) {
206 case OMAP_DSS_RFBI_PARALLELMODE_8:
210 rfbi_write_reg(RFBI_PARAM, *b++);
214 case OMAP_DSS_RFBI_PARALLELMODE_16:
218 for (; len; len -= 2)
219 rfbi_write_reg(RFBI_PARAM, *w++);
223 case OMAP_DSS_RFBI_PARALLELMODE_9:
224 case OMAP_DSS_RFBI_PARALLELMODE_12:
230 EXPORT_SYMBOL(omap_rfbi_write_data);
232 void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
236 int start_offset = scr_width * y + x;
237 int horiz_offset = scr_width - w;
240 if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_16 &&
241 rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_8) {
242 const u16 __iomem *pd = buf;
246 for (i = 0; i < w; ++i) {
247 const u8 __iomem *b = (const u8 __iomem *)pd;
248 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+1));
249 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+0));
254 } else if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_24 &&
255 rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_8) {
256 const u32 __iomem *pd = buf;
260 for (i = 0; i < w; ++i) {
261 const u8 __iomem *b = (const u8 __iomem *)pd;
262 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+2));
263 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+1));
264 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+0));
269 } else if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_16 &&
270 rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_16) {
271 const u16 __iomem *pd = buf;
275 for (i = 0; i < w; ++i) {
276 rfbi_write_reg(RFBI_PARAM, __raw_readw(pd));
285 EXPORT_SYMBOL(omap_rfbi_write_pixels);
287 static void rfbi_transfer_area(struct omap_dss_device *dssdev, u16 width,
288 u16 height, void (*callback)(void *data), void *data)
292 /*BUG_ON(callback == 0);*/
293 BUG_ON(rfbi.framedone_callback != NULL);
295 DSSDBG("rfbi_transfer_area %dx%d\n", width, height);
297 dispc_set_lcd_size(dssdev->manager->id, width, height);
299 dispc_enable_channel(dssdev->manager->id, true);
301 rfbi.framedone_callback = callback;
302 rfbi.framedone_callback_data = data;
304 rfbi_write_reg(RFBI_PIXEL_CNT, width * height);
306 l = rfbi_read_reg(RFBI_CONTROL);
307 l = FLD_MOD(l, 1, 0, 0); /* enable */
308 if (!rfbi.te_enabled)
309 l = FLD_MOD(l, 1, 4, 4); /* ITE */
311 rfbi_write_reg(RFBI_CONTROL, l);
314 static void framedone_callback(void *data, u32 mask)
316 void (*callback)(void *data);
318 DSSDBG("FRAMEDONE\n");
320 REG_FLD_MOD(RFBI_CONTROL, 0, 0, 0);
322 callback = rfbi.framedone_callback;
323 rfbi.framedone_callback = NULL;
325 if (callback != NULL)
326 callback(rfbi.framedone_callback_data);
330 static void rfbi_print_timings(void)
335 l = rfbi_read_reg(RFBI_CONFIG(0));
336 time = 1000000000 / rfbi.l4_khz;
340 DSSDBG("Tick time %u ps\n", time);
341 l = rfbi_read_reg(RFBI_ONOFF_TIME(0));
342 DSSDBG("CSONTIME %d, CSOFFTIME %d, WEONTIME %d, WEOFFTIME %d, "
343 "REONTIME %d, REOFFTIME %d\n",
344 l & 0x0f, (l >> 4) & 0x3f, (l >> 10) & 0x0f, (l >> 14) & 0x3f,
345 (l >> 20) & 0x0f, (l >> 24) & 0x3f);
347 l = rfbi_read_reg(RFBI_CYCLE_TIME(0));
348 DSSDBG("WECYCLETIME %d, RECYCLETIME %d, CSPULSEWIDTH %d, "
350 (l & 0x3f), (l >> 6) & 0x3f, (l >> 12) & 0x3f,
354 static void rfbi_print_timings(void) {}
360 static u32 extif_clk_period;
362 static inline unsigned long round_to_extif_ticks(unsigned long ps, int div)
364 int bus_tick = extif_clk_period * div;
365 return (ps + bus_tick - 1) / bus_tick * bus_tick;
368 static int calc_reg_timing(struct rfbi_timings *t, int div)
372 t->cs_on_time = round_to_extif_ticks(t->cs_on_time, div);
374 t->we_on_time = round_to_extif_ticks(t->we_on_time, div);
375 t->we_off_time = round_to_extif_ticks(t->we_off_time, div);
376 t->we_cycle_time = round_to_extif_ticks(t->we_cycle_time, div);
378 t->re_on_time = round_to_extif_ticks(t->re_on_time, div);
379 t->re_off_time = round_to_extif_ticks(t->re_off_time, div);
380 t->re_cycle_time = round_to_extif_ticks(t->re_cycle_time, div);
382 t->access_time = round_to_extif_ticks(t->access_time, div);
383 t->cs_off_time = round_to_extif_ticks(t->cs_off_time, div);
384 t->cs_pulse_width = round_to_extif_ticks(t->cs_pulse_width, div);
386 DSSDBG("[reg]cson %d csoff %d reon %d reoff %d\n",
387 t->cs_on_time, t->cs_off_time, t->re_on_time, t->re_off_time);
388 DSSDBG("[reg]weon %d weoff %d recyc %d wecyc %d\n",
389 t->we_on_time, t->we_off_time, t->re_cycle_time,
391 DSSDBG("[reg]rdaccess %d cspulse %d\n",
392 t->access_time, t->cs_pulse_width);
394 return rfbi_convert_timings(t);
397 static int calc_extif_timings(struct rfbi_timings *t)
402 rfbi_get_clk_info(&extif_clk_period, &max_clk_div);
403 for (div = 1; div <= max_clk_div; div++) {
404 if (calc_reg_timing(t, div) == 0)
408 if (div <= max_clk_div)
411 DSSERR("can't setup timings\n");
416 static void rfbi_set_timings(int rfbi_module, struct rfbi_timings *t)
421 r = calc_extif_timings(t);
423 DSSERR("Failed to calc timings\n");
426 BUG_ON(!t->converted);
428 rfbi_write_reg(RFBI_ONOFF_TIME(rfbi_module), t->tim[0]);
429 rfbi_write_reg(RFBI_CYCLE_TIME(rfbi_module), t->tim[1]);
431 /* TIMEGRANULARITY */
432 REG_FLD_MOD(RFBI_CONFIG(rfbi_module),
433 (t->tim[2] ? 1 : 0), 4, 4);
435 rfbi_print_timings();
438 static int ps_to_rfbi_ticks(int time, int div)
440 unsigned long tick_ps;
443 /* Calculate in picosecs to yield more exact results */
444 tick_ps = 1000000000 / (rfbi.l4_khz) * div;
446 ret = (time + tick_ps - 1) / tick_ps;
451 static void rfbi_get_clk_info(u32 *clk_period, u32 *max_clk_div)
453 *clk_period = 1000000000 / rfbi.l4_khz;
457 static int rfbi_convert_timings(struct rfbi_timings *t)
460 int reon, reoff, weon, weoff, cson, csoff, cs_pulse;
461 int actim, recyc, wecyc;
462 int div = t->clk_div;
464 if (div <= 0 || div > 2)
467 /* Make sure that after conversion it still holds that:
468 * weoff > weon, reoff > reon, recyc >= reoff, wecyc >= weoff,
469 * csoff > cson, csoff >= max(weoff, reoff), actim > reon
471 weon = ps_to_rfbi_ticks(t->we_on_time, div);
472 weoff = ps_to_rfbi_ticks(t->we_off_time, div);
480 reon = ps_to_rfbi_ticks(t->re_on_time, div);
481 reoff = ps_to_rfbi_ticks(t->re_off_time, div);
489 cson = ps_to_rfbi_ticks(t->cs_on_time, div);
490 csoff = ps_to_rfbi_ticks(t->cs_off_time, div);
493 if (csoff < max(weoff, reoff))
494 csoff = max(weoff, reoff);
509 actim = ps_to_rfbi_ticks(t->access_time, div);
515 wecyc = ps_to_rfbi_ticks(t->we_cycle_time, div);
521 recyc = ps_to_rfbi_ticks(t->re_cycle_time, div);
527 cs_pulse = ps_to_rfbi_ticks(t->cs_pulse_width, div);
545 /* xxx FIX module selection missing */
546 int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
547 unsigned hs_pulse_time, unsigned vs_pulse_time,
548 int hs_pol_inv, int vs_pol_inv, int extif_div)
554 hs = ps_to_rfbi_ticks(hs_pulse_time, 1);
555 vs = ps_to_rfbi_ticks(vs_pulse_time, 1);
558 if (mode == OMAP_DSS_RFBI_TE_MODE_2)
560 else /* OMAP_DSS_RFBI_TE_MODE_1 */
567 DSSDBG("setup_te: mode %d hs %d vs %d hs_inv %d vs_inv %d\n",
568 mode, hs, vs, hs_pol_inv, vs_pol_inv);
570 rfbi_write_reg(RFBI_HSYNC_WIDTH, hs);
571 rfbi_write_reg(RFBI_VSYNC_WIDTH, vs);
573 l = rfbi_read_reg(RFBI_CONFIG(0));
585 EXPORT_SYMBOL(omap_rfbi_setup_te);
587 /* xxx FIX module selection missing */
588 int omap_rfbi_enable_te(bool enable, unsigned line)
592 DSSDBG("te %d line %d mode %d\n", enable, line, rfbi.te_mode);
593 if (line > (1 << 11) - 1)
596 l = rfbi_read_reg(RFBI_CONFIG(0));
600 l |= rfbi.te_mode << 2;
603 rfbi_write_reg(RFBI_CONFIG(0), l);
604 rfbi_write_reg(RFBI_LINE_NUMBER, line);
608 EXPORT_SYMBOL(omap_rfbi_enable_te);
610 static int rfbi_configure(int rfbi_module, int bpp, int lines)
613 int cycle1 = 0, cycle2 = 0, cycle3 = 0;
614 enum omap_rfbi_cycleformat cycleformat;
615 enum omap_rfbi_datatype datatype;
616 enum omap_rfbi_parallelmode parallelmode;
620 datatype = OMAP_DSS_RFBI_DATATYPE_12;
623 datatype = OMAP_DSS_RFBI_DATATYPE_16;
626 datatype = OMAP_DSS_RFBI_DATATYPE_18;
629 datatype = OMAP_DSS_RFBI_DATATYPE_24;
635 rfbi.datatype = datatype;
639 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_8;
642 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_9;
645 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_12;
648 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_16;
654 rfbi.parallelmode = parallelmode;
656 if ((bpp % lines) == 0) {
657 switch (bpp / lines) {
659 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_1_1;
662 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_2_1;
665 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_3_1;
671 } else if ((2 * bpp % lines) == 0) {
672 if ((2 * bpp / lines) == 3)
673 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_3_2;
683 switch (cycleformat) {
684 case OMAP_DSS_RFBI_CYCLEFORMAT_1_1:
688 case OMAP_DSS_RFBI_CYCLEFORMAT_2_1:
693 case OMAP_DSS_RFBI_CYCLEFORMAT_3_1:
699 case OMAP_DSS_RFBI_CYCLEFORMAT_3_2:
701 cycle2 = (lines / 2) | ((lines / 2) << 16);
702 cycle3 = (lines << 16);
706 REG_FLD_MOD(RFBI_CONTROL, 0, 3, 2); /* clear CS */
709 l |= FLD_VAL(parallelmode, 1, 0);
710 l |= FLD_VAL(0, 3, 2); /* TRIGGERMODE: ITE */
711 l |= FLD_VAL(0, 4, 4); /* TIMEGRANULARITY */
712 l |= FLD_VAL(datatype, 6, 5);
713 /* l |= FLD_VAL(2, 8, 7); */ /* L4FORMAT, 2pix/L4 */
714 l |= FLD_VAL(0, 8, 7); /* L4FORMAT, 1pix/L4 */
715 l |= FLD_VAL(cycleformat, 10, 9);
716 l |= FLD_VAL(0, 12, 11); /* UNUSEDBITS */
717 l |= FLD_VAL(0, 16, 16); /* A0POLARITY */
718 l |= FLD_VAL(0, 17, 17); /* REPOLARITY */
719 l |= FLD_VAL(0, 18, 18); /* WEPOLARITY */
720 l |= FLD_VAL(0, 19, 19); /* CSPOLARITY */
721 l |= FLD_VAL(1, 20, 20); /* TE_VSYNC_POLARITY */
722 l |= FLD_VAL(1, 21, 21); /* HSYNCPOLARITY */
723 rfbi_write_reg(RFBI_CONFIG(rfbi_module), l);
725 rfbi_write_reg(RFBI_DATA_CYCLE1(rfbi_module), cycle1);
726 rfbi_write_reg(RFBI_DATA_CYCLE2(rfbi_module), cycle2);
727 rfbi_write_reg(RFBI_DATA_CYCLE3(rfbi_module), cycle3);
730 l = rfbi_read_reg(RFBI_CONTROL);
731 l = FLD_MOD(l, rfbi_module+1, 3, 2); /* Select CSx */
732 l = FLD_MOD(l, 0, 1, 1); /* clear bypass */
733 rfbi_write_reg(RFBI_CONTROL, l);
736 DSSDBG("RFBI config: bpp %d, lines %d, cycles: 0x%x 0x%x 0x%x\n",
737 bpp, lines, cycle1, cycle2, cycle3);
742 int omap_rfbi_configure(struct omap_dss_device *dssdev, int pixel_size,
745 return rfbi_configure(dssdev->phy.rfbi.channel, pixel_size, data_lines);
747 EXPORT_SYMBOL(omap_rfbi_configure);
749 int omap_rfbi_prepare_update(struct omap_dss_device *dssdev,
750 u16 *x, u16 *y, u16 *w, u16 *h)
754 dssdev->driver->get_resolution(dssdev, &dw, &dh);
756 if (*x > dw || *y > dh)
768 if (*w == 0 || *h == 0)
771 if (dssdev->manager->caps & OMAP_DSS_OVL_MGR_CAP_DISPC) {
772 dss_setup_partial_planes(dssdev, x, y, w, h, true);
773 dispc_set_lcd_size(dssdev->manager->id, *w, *h);
778 EXPORT_SYMBOL(omap_rfbi_prepare_update);
780 int omap_rfbi_update(struct omap_dss_device *dssdev,
781 u16 x, u16 y, u16 w, u16 h,
782 void (*callback)(void *), void *data)
784 if (dssdev->manager->caps & OMAP_DSS_OVL_MGR_CAP_DISPC) {
785 rfbi_transfer_area(dssdev, w, h, callback, data);
787 struct omap_overlay *ovl;
791 ovl = dssdev->manager->overlays[0];
792 scr_width = ovl->info.screen_width;
793 addr = ovl->info.vaddr;
795 omap_rfbi_write_pixels(addr, scr_width, x, y, w, h);
802 EXPORT_SYMBOL(omap_rfbi_update);
804 void rfbi_dump_regs(struct seq_file *s)
806 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, rfbi_read_reg(r))
808 dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
810 DUMPREG(RFBI_REVISION);
811 DUMPREG(RFBI_SYSCONFIG);
812 DUMPREG(RFBI_SYSSTATUS);
813 DUMPREG(RFBI_CONTROL);
814 DUMPREG(RFBI_PIXEL_CNT);
815 DUMPREG(RFBI_LINE_NUMBER);
820 DUMPREG(RFBI_STATUS);
822 DUMPREG(RFBI_CONFIG(0));
823 DUMPREG(RFBI_ONOFF_TIME(0));
824 DUMPREG(RFBI_CYCLE_TIME(0));
825 DUMPREG(RFBI_DATA_CYCLE1(0));
826 DUMPREG(RFBI_DATA_CYCLE2(0));
827 DUMPREG(RFBI_DATA_CYCLE3(0));
829 DUMPREG(RFBI_CONFIG(1));
830 DUMPREG(RFBI_ONOFF_TIME(1));
831 DUMPREG(RFBI_CYCLE_TIME(1));
832 DUMPREG(RFBI_DATA_CYCLE1(1));
833 DUMPREG(RFBI_DATA_CYCLE2(1));
834 DUMPREG(RFBI_DATA_CYCLE3(1));
836 DUMPREG(RFBI_VSYNC_WIDTH);
837 DUMPREG(RFBI_HSYNC_WIDTH);
839 dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
843 int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev)
847 rfbi_enable_clocks(1);
849 r = omap_dss_start_device(dssdev);
851 DSSERR("failed to start device\n");
855 r = omap_dispc_register_isr(framedone_callback, NULL,
856 DISPC_IRQ_FRAMEDONE);
858 DSSERR("can't get FRAMEDONE irq\n");
862 dispc_set_lcd_display_type(dssdev->manager->id,
863 OMAP_DSS_LCD_DISPLAY_TFT);
865 dispc_set_parallel_interface_mode(dssdev->manager->id,
866 OMAP_DSS_PARALLELMODE_RFBI);
868 dispc_set_tft_data_lines(dssdev->manager->id, dssdev->ctrl.pixel_size);
870 rfbi_configure(dssdev->phy.rfbi.channel,
871 dssdev->ctrl.pixel_size,
872 dssdev->phy.rfbi.data_lines);
874 rfbi_set_timings(dssdev->phy.rfbi.channel,
875 &dssdev->ctrl.rfbi_timings);
880 omap_dss_stop_device(dssdev);
884 EXPORT_SYMBOL(omapdss_rfbi_display_enable);
886 void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev)
888 omap_dispc_unregister_isr(framedone_callback, NULL,
889 DISPC_IRQ_FRAMEDONE);
890 omap_dss_stop_device(dssdev);
892 rfbi_enable_clocks(0);
894 EXPORT_SYMBOL(omapdss_rfbi_display_disable);
896 int rfbi_init_display(struct omap_dss_device *dssdev)
898 rfbi.dssdev[dssdev->phy.rfbi.channel] = dssdev;
899 dssdev->caps = OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE;
903 /* RFBI HW IP initialisation */
904 static int omap_rfbihw_probe(struct platform_device *pdev)
908 struct resource *rfbi_mem;
912 sema_init(&rfbi.bus_lock, 1);
914 rfbi_mem = platform_get_resource(rfbi.pdev, IORESOURCE_MEM, 0);
916 DSSERR("can't get IORESOURCE_MEM RFBI\n");
919 rfbi.base = ioremap(rfbi_mem->start, resource_size(rfbi_mem));
921 DSSERR("can't ioremap RFBI\n");
925 rfbi_enable_clocks(1);
929 rfbi.l4_khz = dss_clk_get_rate(DSS_CLK_ICK) / 1000;
931 /* Enable autoidle and smart-idle */
932 l = rfbi_read_reg(RFBI_SYSCONFIG);
933 l |= (1 << 0) | (2 << 3);
934 rfbi_write_reg(RFBI_SYSCONFIG, l);
936 rev = rfbi_read_reg(RFBI_REVISION);
937 dev_dbg(&pdev->dev, "OMAP RFBI rev %d.%d\n",
938 FLD_GET(rev, 7, 4), FLD_GET(rev, 3, 0));
940 rfbi_enable_clocks(0);
945 static int omap_rfbihw_remove(struct platform_device *pdev)
951 static struct platform_driver omap_rfbihw_driver = {
952 .probe = omap_rfbihw_probe,
953 .remove = omap_rfbihw_remove,
955 .name = "omapdss_rfbi",
956 .owner = THIS_MODULE,
960 int rfbi_init_platform_driver(void)
962 return platform_driver_register(&omap_rfbihw_driver);
965 void rfbi_uninit_platform_driver(void)
967 return platform_driver_unregister(&omap_rfbihw_driver);