2 * linux/drivers/video/omap2/dss/dss.h
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
7 * Some code and ideas taken from drivers/video/omap/ driver
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
26 #ifdef CONFIG_OMAP2_DSS_DEBUG_SUPPORT
31 extern unsigned int dss_debug;
32 #ifdef DSS_SUBSYS_NAME
33 #define DSSDBG(format, ...) \
35 printk(KERN_DEBUG "omapdss " DSS_SUBSYS_NAME ": " format, \
38 #define DSSDBG(format, ...) \
40 printk(KERN_DEBUG "omapdss: " format, ## __VA_ARGS__)
43 #ifdef DSS_SUBSYS_NAME
44 #define DSSDBGF(format, ...) \
46 printk(KERN_DEBUG "omapdss " DSS_SUBSYS_NAME \
47 ": %s(" format ")\n", \
51 #define DSSDBGF(format, ...) \
53 printk(KERN_DEBUG "omapdss: " \
54 ": %s(" format ")\n", \
60 #define DSSDBG(format, ...)
61 #define DSSDBGF(format, ...)
65 #ifdef DSS_SUBSYS_NAME
66 #define DSSERR(format, ...) \
67 printk(KERN_ERR "omapdss " DSS_SUBSYS_NAME " error: " format, \
70 #define DSSERR(format, ...) \
71 printk(KERN_ERR "omapdss error: " format, ## __VA_ARGS__)
74 #ifdef DSS_SUBSYS_NAME
75 #define DSSINFO(format, ...) \
76 printk(KERN_INFO "omapdss " DSS_SUBSYS_NAME ": " format, \
79 #define DSSINFO(format, ...) \
80 printk(KERN_INFO "omapdss: " format, ## __VA_ARGS__)
83 #ifdef DSS_SUBSYS_NAME
84 #define DSSWARN(format, ...) \
85 printk(KERN_WARNING "omapdss " DSS_SUBSYS_NAME ": " format, \
88 #define DSSWARN(format, ...) \
89 printk(KERN_WARNING "omapdss: " format, ## __VA_ARGS__)
92 /* OMAP TRM gives bitfields as start:end, where start is the higher bit
93 number. For example 7:0 */
94 #define FLD_MASK(start, end) (((1 << (start - end + 1)) - 1) << (end))
95 #define FLD_VAL(val, start, end) (((val) << end) & FLD_MASK(start, end))
96 #define FLD_GET(val, start, end) (((val) & FLD_MASK(start, end)) >> (end))
97 #define FLD_MOD(orig, val, start, end) \
98 (((orig) & ~FLD_MASK(start, end)) | FLD_VAL(val, start, end))
100 #define DISPC_MAX_FCK 173000000
102 enum omap_burst_size {
103 OMAP_DSS_BURST_4x32 = 0,
104 OMAP_DSS_BURST_8x32 = 1,
105 OMAP_DSS_BURST_16x32 = 2,
108 enum omap_parallel_interface_mode {
109 OMAP_DSS_PARALLELMODE_BYPASS, /* MIPI DPI */
110 OMAP_DSS_PARALLELMODE_RFBI, /* MIPI DBI */
111 OMAP_DSS_PARALLELMODE_DSI,
115 DSS_CLK_ICK = 1 << 0,
116 DSS_CLK_FCK1 = 1 << 1,
117 DSS_CLK_FCK2 = 1 << 2,
118 DSS_CLK_54M = 1 << 3,
119 DSS_CLK_96M = 1 << 4,
122 struct dispc_clock_info {
123 /* rates that we get with dividers below */
134 struct dsi_clock_info {
135 /* rates that we get with dividers below */
137 unsigned long dsiphy;
139 unsigned long dsi1_pll_fclk;
140 unsigned long dsi2_pll_fclk;
158 struct platform_device;
161 void dss_clk_enable(enum dss_clock clks);
162 void dss_clk_disable(enum dss_clock clks);
163 unsigned long dss_clk_get_rate(enum dss_clock clk);
164 int dss_need_ctx_restore(void);
165 void dss_dump_clocks(struct seq_file *s);
167 int dss_dsi_power_up(void);
168 void dss_dsi_power_down(void);
171 void dss_init_displays(struct platform_device *pdev);
172 void dss_uninit_displays(struct platform_device *pdev);
173 int dss_suspend_all_displays(void);
174 int dss_resume_all_displays(void);
175 struct omap_display *dss_get_display(int no);
178 int dss_init_overlay_managers(struct platform_device *pdev);
179 void dss_uninit_overlay_managers(struct platform_device *pdev);
182 void dss_init_overlays(struct platform_device *pdev, const char *def_disp_name);
183 void dss_uninit_overlays(struct platform_device *pdev);
184 int dss_check_overlay(struct omap_overlay *ovl, struct omap_display *display);
185 void dss_overlay_setup_dispc_manager(struct omap_overlay_manager *mgr);
188 int dss_init(bool skip_init);
191 void dss_save_context(void);
192 void dss_restore_context(void);
194 void dss_dump_regs(struct seq_file *s);
196 void dss_sdi_init(u8 datapairs);
197 void dss_sdi_enable(void);
198 void dss_sdi_disable(void);
200 void dss_select_clk_source(bool dsi, bool dispc);
201 int dss_get_dsi_clk_source(void);
202 int dss_get_dispc_clk_source(void);
203 void dss_set_venc_output(enum omap_dss_venc_type type);
204 void dss_set_dac_pwrdn_bgz(bool enable);
207 int sdi_init(bool skip_init);
209 void sdi_init_display(struct omap_display *display);
215 void dsi_dump_clocks(struct seq_file *s);
216 void dsi_dump_regs(struct seq_file *s);
218 void dsi_save_context(void);
219 void dsi_restore_context(void);
221 void dsi_init_display(struct omap_display *display);
222 void dsi_irq_handler(void);
223 unsigned long dsi_get_dsi1_pll_rate(void);
224 unsigned long dsi_get_dsi2_pll_rate(void);
225 int dsi_pll_calc_pck(bool is_tft, unsigned long req_pck,
226 struct dsi_clock_info *cinfo);
227 int dsi_pll_program(struct dsi_clock_info *cinfo);
228 int dsi_pll_init(bool enable_hsclk, bool enable_hsdiv);
229 void dsi_pll_uninit(void);
234 void dpi_init_display(struct omap_display *display);
237 int dispc_init(void);
238 void dispc_exit(void);
239 void dispc_dump_clocks(struct seq_file *s);
240 void dispc_dump_regs(struct seq_file *s);
241 void dispc_irq_handler(void);
242 void dispc_fake_vsync_irq(void);
244 void dispc_save_context(void);
245 void dispc_restore_context(void);
247 void dispc_enable_sidle(void);
248 void dispc_disable_sidle(void);
250 void dispc_lcd_enable_signal_polarity(bool act_high);
251 void dispc_lcd_enable_signal(bool enable);
252 void dispc_pck_free_enable(bool enable);
253 void dispc_enable_fifohandcheck(bool enable);
255 void dispc_set_lcd_size(u16 width, u16 height);
256 void dispc_set_digit_size(u16 width, u16 height);
257 u32 dispc_get_plane_fifo_size(enum omap_plane plane);
258 void dispc_setup_plane_fifo(enum omap_plane plane, u32 low, u32 high);
259 void dispc_enable_fifomerge(bool enable);
260 void dispc_set_burst_size(enum omap_plane plane,
261 enum omap_burst_size burst_size);
263 void dispc_set_plane_ba0(enum omap_plane plane, u32 paddr);
264 void dispc_set_plane_ba1(enum omap_plane plane, u32 paddr);
265 void dispc_set_plane_pos(enum omap_plane plane, u16 x, u16 y);
266 void dispc_set_plane_size(enum omap_plane plane, u16 width, u16 height);
268 int dispc_setup_plane(enum omap_plane plane, enum omap_channel channel_out,
269 u32 paddr, u16 screen_width,
270 u16 pos_x, u16 pos_y,
271 u16 width, u16 height,
272 u16 out_width, u16 out_height,
273 enum omap_color_mode color_mode,
275 u8 rotation, bool mirror);
277 void dispc_go(enum omap_channel channel);
278 void dispc_enable_lcd_out(bool enable);
279 void dispc_enable_digit_out(bool enable);
280 int dispc_enable_plane(enum omap_plane plane, bool enable);
282 void dispc_set_parallel_interface_mode(enum omap_parallel_interface_mode mode);
283 void dispc_set_tft_data_lines(u8 data_lines);
284 void dispc_set_lcd_display_type(enum omap_lcd_display_type type);
285 void dispc_set_loadmode(enum omap_dss_load_mode mode);
287 void dispc_set_default_color(enum omap_channel channel, u32 color);
288 u32 dispc_get_default_color(enum omap_channel channel);
289 void dispc_set_trans_key(enum omap_channel ch,
290 enum omap_dss_color_key_type type,
292 void dispc_get_trans_key(enum omap_channel ch,
293 enum omap_dss_color_key_type *type,
295 void dispc_enable_trans_key(enum omap_channel ch, bool enable);
296 bool dispc_trans_key_enabled(enum omap_channel ch);
298 void dispc_set_lcd_timings(struct omap_video_timings *timings);
299 unsigned long dispc_fclk_rate(void);
300 unsigned long dispc_lclk_rate(void);
301 unsigned long dispc_pclk_rate(void);
302 void dispc_set_pol_freq(struct omap_panel *panel);
303 void find_lck_pck_divs(bool is_tft, unsigned long req_pck, unsigned long fck,
304 u16 *lck_div, u16 *pck_div);
305 int dispc_calc_clock_div(bool is_tft, unsigned long req_pck,
306 struct dispc_clock_info *cinfo);
307 int dispc_set_clock_div(struct dispc_clock_info *cinfo);
308 int dispc_get_clock_div(struct dispc_clock_info *cinfo);
309 void dispc_set_lcd_divisor(u16 lck_div, u16 pck_div);
311 void dispc_setup_partial_planes(struct omap_display *display,
312 u16 *x, u16 *y, u16 *w, u16 *h);
313 void dispc_draw_partial_planes(struct omap_display *display);
318 void venc_exit(void);
319 void venc_dump_regs(struct seq_file *s);
320 void venc_init_display(struct omap_display *display);
324 void rfbi_exit(void);
325 void rfbi_dump_regs(struct seq_file *s);
327 int rfbi_configure(int rfbi_module, int bpp, int lines);
328 void rfbi_enable_rfbi(bool enable);
329 void rfbi_transfer_area(u16 width, u16 height,
330 void (callback)(void *data), void *data);
331 void rfbi_set_timings(int rfbi_module, struct rfbi_timings *t);
332 unsigned long rfbi_get_max_tx_rate(void);
333 void rfbi_init_display(struct omap_display *display);