drivers/video/fbdev/omap2/dss/dpi.c

   1 /*
   2  * linux/drivers/video/omap2/dss/dpi.c
   3  *
   4  * Copyright (C) 2009 Nokia Corporation
   5  * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
   6  *
   7  * Some code and ideas taken from drivers/video/omap/ driver
   8  * by Imre Deak.
   9  *
  10  * This program is free software; you can redistribute it and/or modify it
  11  * under the terms of the GNU General Public License version 2 as published by
  12  * the Free Software Foundation.
  13  *
  14  * This program is distributed in the hope that it will be useful, but WITHOUT
  15  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  16  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  17  * more details.
  18  *
  19  * You should have received a copy of the GNU General Public License along with
  20  * this program.  If not, see <http://www.gnu.org/licenses/>.
  21  */
  22
  23 #define DSS_SUBSYS_NAME "DPI"
  24
  25 #include <linux/kernel.h>
  26 #include <linux/delay.h>
  27 #include <linux/export.h>
  28 #include <linux/err.h>
  29 #include <linux/errno.h>
  30 #include <linux/platform_device.h>
  31 #include <linux/regulator/consumer.h>
  32 #include <linux/string.h>
  33 #include <linux/of.h>
  34
  35 #include <video/omapdss.h>
  36
  37 #include "dss.h"
  38 #include "dss_features.h"
  39
  40 static struct {
  41         struct platform_device *pdev;
  42
  43         struct regulator *vdds_dsi_reg;
  44         struct platform_device *dsidev;
  45
  46         struct mutex lock;
  47
  48         struct omap_video_timings timings;
  49         struct dss_lcd_mgr_config mgr_config;
  50         int data_lines;
  51
  52         struct omap_dss_device output;
  53
  54         bool port_initialized;
  55 } dpi;
  56
  57 static struct platform_device *dpi_get_dsidev(enum omap_channel channel)
  58 {
  59         /*
  60          * XXX we can't currently use DSI PLL for DPI with OMAP3, as the DSI PLL
  61          * would also be used for DISPC fclk. Meaning, when the DPI output is
  62          * disabled, DISPC clock will be disabled, and TV out will stop.
  63          */
  64         switch (omapdss_get_version()) {
  65         case OMAPDSS_VER_OMAP24xx:
  66         case OMAPDSS_VER_OMAP34xx_ES1:
  67         case OMAPDSS_VER_OMAP34xx_ES3:
  68         case OMAPDSS_VER_OMAP3630:
  69         case OMAPDSS_VER_AM35xx:
  70                 return NULL;
  71
  72         case OMAPDSS_VER_OMAP4430_ES1:
  73         case OMAPDSS_VER_OMAP4430_ES2:
  74         case OMAPDSS_VER_OMAP4:
  75                 switch (channel) {
  76                 case OMAP_DSS_CHANNEL_LCD:
  77                         return dsi_get_dsidev_from_id(0);
  78                 case OMAP_DSS_CHANNEL_LCD2:
  79                         return dsi_get_dsidev_from_id(1);
  80                 default:
  81                         return NULL;
  82                 }
  83
  84         case OMAPDSS_VER_OMAP5:
  85                 switch (channel) {
  86                 case OMAP_DSS_CHANNEL_LCD:
  87                         return dsi_get_dsidev_from_id(0);
  88                 case OMAP_DSS_CHANNEL_LCD3:
  89                         return dsi_get_dsidev_from_id(1);
  90                 default:
  91                         return NULL;
  92                 }
  93
  94         default:
  95                 return NULL;
  96         }
  97 }
  98
  99 static enum omap_dss_clk_source dpi_get_alt_clk_src(enum omap_channel channel)
 100 {
 101         switch (channel) {
 102         case OMAP_DSS_CHANNEL_LCD:
 103                 return OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC;
 104         case OMAP_DSS_CHANNEL_LCD2:
 105                 return OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC;
 106         default:
 107                 /* this shouldn't happen */
 108                 WARN_ON(1);
 109                 return OMAP_DSS_CLK_SRC_FCK;
 110         }
 111 }
 112
 113 struct dpi_clk_calc_ctx {
 114         struct platform_device *dsidev;
 115
 116         /* inputs */
 117
 118         unsigned long pck_min, pck_max;
 119
 120         /* outputs */
 121
 122         struct dsi_clock_info dsi_cinfo;
 123         unsigned long fck;
 124         struct dispc_clock_info dispc_cinfo;
 125 };
 126
 127 static bool dpi_calc_dispc_cb(int lckd, int pckd, unsigned long lck,
 128                 unsigned long pck, void *data)
 129 {
 130         struct dpi_clk_calc_ctx *ctx = data;
 131
 132         /*
 133          * Odd dividers give us uneven duty cycle, causing problem when level
 134          * shifted. So skip all odd dividers when the pixel clock is on the
 135          * higher side.
 136          */
 137         if (ctx->pck_min >= 100000000) {
 138                 if (lckd > 1 && lckd % 2 != 0)
 139                         return false;
 140
 141                 if (pckd > 1 && pckd % 2 != 0)
 142                         return false;
 143         }
 144
 145         ctx->dispc_cinfo.lck_div = lckd;
 146         ctx->dispc_cinfo.pck_div = pckd;
 147         ctx->dispc_cinfo.lck = lck;
 148         ctx->dispc_cinfo.pck = pck;
 149
 150         return true;
 151 }
 152
 153
 154 static bool dpi_calc_hsdiv_cb(int regm_dispc, unsigned long dispc,
 155                 void *data)
 156 {
 157         struct dpi_clk_calc_ctx *ctx = data;
 158
 159         /*
 160          * Odd dividers give us uneven duty cycle, causing problem when level
 161          * shifted. So skip all odd dividers when the pixel clock is on the
 162          * higher side.
 163          */
 164         if (regm_dispc > 1 && regm_dispc % 2 != 0 && ctx->pck_min >= 100000000)
 165                 return false;
 166
 167         ctx->dsi_cinfo.regm_dispc = regm_dispc;
 168         ctx->dsi_cinfo.dsi_pll_hsdiv_dispc_clk = dispc;
 169
 170         return dispc_div_calc(dispc, ctx->pck_min, ctx->pck_max,
 171                         dpi_calc_dispc_cb, ctx);
 172 }
 173
 174
 175 static bool dpi_calc_pll_cb(int regn, int regm, unsigned long fint,
 176                 unsigned long pll,
 177                 void *data)
 178 {
 179         struct dpi_clk_calc_ctx *ctx = data;
 180
 181         ctx->dsi_cinfo.regn = regn;
 182         ctx->dsi_cinfo.regm = regm;
 183         ctx->dsi_cinfo.fint = fint;
 184         ctx->dsi_cinfo.clkin4ddr = pll;
 185
 186         return dsi_hsdiv_calc(ctx->dsidev, pll, ctx->pck_min,
 187                         dpi_calc_hsdiv_cb, ctx);
 188 }
 189
 190 static bool dpi_calc_dss_cb(unsigned long fck, void *data)
 191 {
 192         struct dpi_clk_calc_ctx *ctx = data;
 193
 194         ctx->fck = fck;
 195
 196         return dispc_div_calc(fck, ctx->pck_min, ctx->pck_max,
 197                         dpi_calc_dispc_cb, ctx);
 198 }
 199
 200 static bool dpi_dsi_clk_calc(unsigned long pck, struct dpi_clk_calc_ctx *ctx)
 201 {
 202         unsigned long clkin;
 203         unsigned long pll_min, pll_max;
 204
 205         clkin = dsi_get_pll_clkin(dpi.dsidev);
 206
 207         memset(ctx, 0, sizeof(*ctx));
 208         ctx->dsidev = dpi.dsidev;
 209         ctx->pck_min = pck - 1000;
 210         ctx->pck_max = pck + 1000;
 211         ctx->dsi_cinfo.clkin = clkin;
 212
 213         pll_min = 0;
 214         pll_max = 0;
 215
 216         return dsi_pll_calc(dpi.dsidev, clkin,
 217                         pll_min, pll_max,
 218                         dpi_calc_pll_cb, ctx);
 219 }
 220
 221 static bool dpi_dss_clk_calc(unsigned long pck, struct dpi_clk_calc_ctx *ctx)
 222 {
 223         int i;
 224
 225         /*
 226          * DSS fck gives us very few possibilities, so finding a good pixel
 227          * clock may not be possible. We try multiple times to find the clock,
 228          * each time widening the pixel clock range we look for, up to
 229          * +/- ~15MHz.
 230          */
 231
 232         for (i = 0; i < 25; ++i) {
 233                 bool ok;
 234
 235                 memset(ctx, 0, sizeof(*ctx));
 236                 if (pck > 1000 * i * i * i)
 237                         ctx->pck_min = max(pck - 1000 * i * i * i, 0lu);
 238                 else
 239                         ctx->pck_min = 0;
 240                 ctx->pck_max = pck + 1000 * i * i * i;
 241
 242                 ok = dss_div_calc(pck, ctx->pck_min, dpi_calc_dss_cb, ctx);
 243                 if (ok)
 244                         return ok;
 245         }
 246
 247         return false;
 248 }
 249
 250
 251
 252 static int dpi_set_dsi_clk(enum omap_channel channel,
 253                 unsigned long pck_req, unsigned long *fck, int *lck_div,
 254                 int *pck_div)
 255 {
 256         struct dpi_clk_calc_ctx ctx;
 257         int r;
 258         bool ok;
 259
 260         ok = dpi_dsi_clk_calc(pck_req, &ctx);
 261         if (!ok)
 262                 return -EINVAL;
 263
 264         r = dsi_pll_set_clock_div(dpi.dsidev, &ctx.dsi_cinfo);
 265         if (r)
 266                 return r;
 267
 268         dss_select_lcd_clk_source(channel,
 269                         dpi_get_alt_clk_src(channel));
 270
 271         dpi.mgr_config.clock_info = ctx.dispc_cinfo;
 272
 273         *fck = ctx.dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
 274         *lck_div = ctx.dispc_cinfo.lck_div;
 275         *pck_div = ctx.dispc_cinfo.pck_div;
 276
 277         return 0;
 278 }
 279
 280 static int dpi_set_dispc_clk(unsigned long pck_req, unsigned long *fck,
 281                 int *lck_div, int *pck_div)
 282 {
 283         struct dpi_clk_calc_ctx ctx;
 284         int r;
 285         bool ok;
 286
 287         ok = dpi_dss_clk_calc(pck_req, &ctx);
 288         if (!ok)
 289                 return -EINVAL;
 290
 291         r = dss_set_fck_rate(ctx.fck);
 292         if (r)
 293                 return r;
 294
 295         dpi.mgr_config.clock_info = ctx.dispc_cinfo;
 296
 297         *fck = ctx.fck;
 298         *lck_div = ctx.dispc_cinfo.lck_div;
 299         *pck_div = ctx.dispc_cinfo.pck_div;
 300
 301         return 0;
 302 }
 303
 304 static int dpi_set_mode(struct omap_overlay_manager *mgr)
 305 {
 306         struct omap_video_timings *t = &dpi.timings;
 307         int lck_div = 0, pck_div = 0;
 308         unsigned long fck = 0;
 309         unsigned long pck;
 310         int r = 0;
 311
 312         if (dpi.dsidev)
 313                 r = dpi_set_dsi_clk(mgr->id, t->pixelclock, &fck,
 314                                 &lck_div, &pck_div);
 315         else
 316                 r = dpi_set_dispc_clk(t->pixelclock, &fck,
 317                                 &lck_div, &pck_div);
 318         if (r)
 319                 return r;
 320
 321         pck = fck / lck_div / pck_div;
 322
 323         if (pck != t->pixelclock) {
 324                 DSSWARN("Could not find exact pixel clock. Requested %d Hz, got %lu Hz\n",
 325                         t->pixelclock, pck);
 326
 327                 t->pixelclock = pck;
 328         }
 329
 330         dss_mgr_set_timings(mgr, t);
 331
 332         return 0;
 333 }
 334
 335 static void dpi_config_lcd_manager(struct omap_overlay_manager *mgr)
 336 {
 337         dpi.mgr_config.io_pad_mode = DSS_IO_PAD_MODE_BYPASS;
 338
 339         dpi.mgr_config.stallmode = false;
 340         dpi.mgr_config.fifohandcheck = false;
 341
 342         dpi.mgr_config.video_port_width = dpi.data_lines;
 343
 344         dpi.mgr_config.lcden_sig_polarity = 0;
 345
 346         dss_mgr_set_lcd_config(mgr, &dpi.mgr_config);
 347 }
 348
 349 static int dpi_display_enable(struct omap_dss_device *dssdev)
 350 {
 351         struct omap_dss_device *out = &dpi.output;
 352         int r;
 353
 354         mutex_lock(&dpi.lock);
 355
 356         if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI) && !dpi.vdds_dsi_reg) {
 357                 DSSERR("no VDSS_DSI regulator\n");
 358                 r = -ENODEV;
 359                 goto err_no_reg;
 360         }
 361
 362         if (out == NULL || out->manager == NULL) {
 363                 DSSERR("failed to enable display: no output/manager\n");
 364                 r = -ENODEV;
 365                 goto err_no_out_mgr;
 366         }
 367
 368         if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI)) {
 369                 r = regulator_enable(dpi.vdds_dsi_reg);
 370                 if (r)
 371                         goto err_reg_enable;
 372         }
 373
 374         r = dispc_runtime_get();
 375         if (r)
 376                 goto err_get_dispc;
 377
 378         r = dss_dpi_select_source(out->manager->id);
 379         if (r)
 380                 goto err_src_sel;
 381
 382         if (dpi.dsidev) {
 383                 r = dsi_runtime_get(dpi.dsidev);
 384                 if (r)
 385                         goto err_get_dsi;
 386
 387                 r = dsi_pll_init(dpi.dsidev, 0, 1);
 388                 if (r)
 389                         goto err_dsi_pll_init;
 390         }
 391
 392         r = dpi_set_mode(out->manager);
 393         if (r)
 394                 goto err_set_mode;
 395
 396         dpi_config_lcd_manager(out->manager);
 397
 398         mdelay(2);
 399
 400         r = dss_mgr_enable(out->manager);
 401         if (r)
 402                 goto err_mgr_enable;
 403
 404         mutex_unlock(&dpi.lock);
 405
 406         return 0;
 407
 408 err_mgr_enable:
 409 err_set_mode:
 410         if (dpi.dsidev)
 411                 dsi_pll_uninit(dpi.dsidev, true);
 412 err_dsi_pll_init:
 413         if (dpi.dsidev)
 414                 dsi_runtime_put(dpi.dsidev);
 415 err_get_dsi:
 416 err_src_sel:
 417         dispc_runtime_put();
 418 err_get_dispc:
 419         if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
 420                 regulator_disable(dpi.vdds_dsi_reg);
 421 err_reg_enable:
 422 err_no_out_mgr:
 423 err_no_reg:
 424         mutex_unlock(&dpi.lock);
 425         return r;
 426 }
 427
 428 static void dpi_display_disable(struct omap_dss_device *dssdev)
 429 {
 430         struct omap_overlay_manager *mgr = dpi.output.manager;
 431
 432         mutex_lock(&dpi.lock);
 433
 434         dss_mgr_disable(mgr);
 435
 436         if (dpi.dsidev) {
 437                 dss_select_lcd_clk_source(mgr->id, OMAP_DSS_CLK_SRC_FCK);
 438                 dsi_pll_uninit(dpi.dsidev, true);
 439                 dsi_runtime_put(dpi.dsidev);
 440         }
 441
 442         dispc_runtime_put();
 443
 444         if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
 445                 regulator_disable(dpi.vdds_dsi_reg);
 446
 447         mutex_unlock(&dpi.lock);
 448 }
 449
 450 static void dpi_set_timings(struct omap_dss_device *dssdev,
 451                 struct omap_video_timings *timings)
 452 {
 453         DSSDBG("dpi_set_timings\n");
 454
 455         mutex_lock(&dpi.lock);
 456
 457         dpi.timings = *timings;
 458
 459         mutex_unlock(&dpi.lock);
 460 }
 461
 462 static void dpi_get_timings(struct omap_dss_device *dssdev,
 463                 struct omap_video_timings *timings)
 464 {
 465         mutex_lock(&dpi.lock);
 466
 467         *timings = dpi.timings;
 468
 469         mutex_unlock(&dpi.lock);
 470 }
 471
 472 static int dpi_check_timings(struct omap_dss_device *dssdev,
 473                         struct omap_video_timings *timings)
 474 {
 475         struct omap_overlay_manager *mgr = dpi.output.manager;
 476         int lck_div, pck_div;
 477         unsigned long fck;
 478         unsigned long pck;
 479         struct dpi_clk_calc_ctx ctx;
 480         bool ok;
 481
 482         if (mgr && !dispc_mgr_timings_ok(mgr->id, timings))
 483                 return -EINVAL;
 484
 485         if (timings->pixelclock == 0)
 486                 return -EINVAL;
 487
 488         if (dpi.dsidev) {
 489                 ok = dpi_dsi_clk_calc(timings->pixelclock, &ctx);
 490                 if (!ok)
 491                         return -EINVAL;
 492
 493                 fck = ctx.dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
 494         } else {
 495                 ok = dpi_dss_clk_calc(timings->pixelclock, &ctx);
 496                 if (!ok)
 497                         return -EINVAL;
 498
 499                 fck = ctx.fck;
 500         }
 501
 502         lck_div = ctx.dispc_cinfo.lck_div;
 503         pck_div = ctx.dispc_cinfo.pck_div;
 504
 505         pck = fck / lck_div / pck_div;
 506
 507         timings->pixelclock = pck;
 508
 509         return 0;
 510 }
 511
 512 static void dpi_set_data_lines(struct omap_dss_device *dssdev, int data_lines)
 513 {
 514         mutex_lock(&dpi.lock);
 515
 516         dpi.data_lines = data_lines;
 517
 518         mutex_unlock(&dpi.lock);
 519 }
 520
 521 static int dpi_verify_dsi_pll(struct platform_device *dsidev)
 522 {
 523         int r;
 524
 525         /* do initial setup with the PLL to see if it is operational */
 526
 527         r = dsi_runtime_get(dsidev);
 528         if (r)
 529                 return r;
 530
 531         r = dsi_pll_init(dsidev, 0, 1);
 532         if (r) {
 533                 dsi_runtime_put(dsidev);
 534                 return r;
 535         }
 536
 537         dsi_pll_uninit(dsidev, true);
 538         dsi_runtime_put(dsidev);
 539
 540         return 0;
 541 }
 542
 543 static int dpi_init_regulator(void)
 544 {
 545         struct regulator *vdds_dsi;
 546
 547         if (!dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
 548                 return 0;
 549
 550         if (dpi.vdds_dsi_reg)
 551                 return 0;
 552
 553         vdds_dsi = devm_regulator_get(&dpi.pdev->dev, "vdds_dsi");
 554         if (IS_ERR(vdds_dsi)) {
 555                 if (PTR_ERR(vdds_dsi) != -EPROBE_DEFER)
 556                         DSSERR("can't get VDDS_DSI regulator\n");
 557                 return PTR_ERR(vdds_dsi);
 558         }
 559
 560         dpi.vdds_dsi_reg = vdds_dsi;
 561
 562         return 0;
 563 }
 564
 565 static void dpi_init_pll(void)
 566 {
 567         struct platform_device *dsidev;
 568
 569         if (dpi.dsidev)
 570                 return;
 571
 572         dsidev = dpi_get_dsidev(dpi.output.dispc_channel);
 573         if (!dsidev)
 574                 return;
 575
 576         if (dpi_verify_dsi_pll(dsidev)) {
 577                 DSSWARN("DSI PLL not operational\n");
 578                 return;
 579         }
 580
 581         dpi.dsidev = dsidev;
 582 }
 583
 584 /*
 585  * Return a hardcoded channel for the DPI output. This should work for
 586  * current use cases, but this can be later expanded to either resolve
 587  * the channel in some more dynamic manner, or get the channel as a user
 588  * parameter.
 589  */
 590 static enum omap_channel dpi_get_channel(void)
 591 {
 592         switch (omapdss_get_version()) {
 593         case OMAPDSS_VER_OMAP24xx:
 594         case OMAPDSS_VER_OMAP34xx_ES1:
 595         case OMAPDSS_VER_OMAP34xx_ES3:
 596         case OMAPDSS_VER_OMAP3630:
 597         case OMAPDSS_VER_AM35xx:
 598                 return OMAP_DSS_CHANNEL_LCD;
 599
 600         case OMAPDSS_VER_OMAP4430_ES1:
 601         case OMAPDSS_VER_OMAP4430_ES2:
 602         case OMAPDSS_VER_OMAP4:
 603                 return OMAP_DSS_CHANNEL_LCD2;
 604
 605         case OMAPDSS_VER_OMAP5:
 606                 return OMAP_DSS_CHANNEL_LCD3;
 607
 608         default:
 609                 DSSWARN("unsupported DSS version\n");
 610                 return OMAP_DSS_CHANNEL_LCD;
 611         }
 612 }
 613
 614 static int dpi_connect(struct omap_dss_device *dssdev,
 615                 struct omap_dss_device *dst)
 616 {
 617         struct omap_overlay_manager *mgr;
 618         int r;
 619
 620         r = dpi_init_regulator();
 621         if (r)
 622                 return r;
 623
 624         dpi_init_pll();
 625
 626         mgr = omap_dss_get_overlay_manager(dssdev->dispc_channel);
 627         if (!mgr)
 628                 return -ENODEV;
 629
 630         r = dss_mgr_connect(mgr, dssdev);
 631         if (r)
 632                 return r;
 633
 634         r = omapdss_output_set_device(dssdev, dst);
 635         if (r) {
 636                 DSSERR("failed to connect output to new device: %s\n",
 637                                 dst->name);
 638                 dss_mgr_disconnect(mgr, dssdev);
 639                 return r;
 640         }
 641
 642         return 0;
 643 }
 644
 645 static void dpi_disconnect(struct omap_dss_device *dssdev,
 646                 struct omap_dss_device *dst)
 647 {
 648         WARN_ON(dst != dssdev->dst);
 649
 650         if (dst != dssdev->dst)
 651                 return;
 652
 653         omapdss_output_unset_device(dssdev);
 654
 655         if (dssdev->manager)
 656                 dss_mgr_disconnect(dssdev->manager, dssdev);
 657 }
 658
 659 static const struct omapdss_dpi_ops dpi_ops = {
 660         .connect = dpi_connect,
 661         .disconnect = dpi_disconnect,
 662
 663         .enable = dpi_display_enable,
 664         .disable = dpi_display_disable,
 665
 666         .check_timings = dpi_check_timings,
 667         .set_timings = dpi_set_timings,
 668         .get_timings = dpi_get_timings,
 669
 670         .set_data_lines = dpi_set_data_lines,
 671 };
 672
 673 static void dpi_init_output(struct platform_device *pdev)
 674 {
 675         struct omap_dss_device *out = &dpi.output;
 676
 677         out->dev = &pdev->dev;
 678         out->id = OMAP_DSS_OUTPUT_DPI;
 679         out->output_type = OMAP_DISPLAY_TYPE_DPI;
 680         out->name = "dpi.0";
 681         out->dispc_channel = dpi_get_channel();
 682         out->ops.dpi = &dpi_ops;
 683         out->owner = THIS_MODULE;
 684
 685         omapdss_register_output(out);
 686 }
 687
 688 static void __exit dpi_uninit_output(struct platform_device *pdev)
 689 {
 690         struct omap_dss_device *out = &dpi.output;
 691
 692         omapdss_unregister_output(out);
 693 }
 694
 695 static int omap_dpi_probe(struct platform_device *pdev)
 696 {
 697         dpi.pdev = pdev;
 698
 699         mutex_init(&dpi.lock);
 700
 701         dpi_init_output(pdev);
 702
 703         return 0;
 704 }
 705
 706 static int __exit omap_dpi_remove(struct platform_device *pdev)
 707 {
 708         dpi_uninit_output(pdev);
 709
 710         return 0;
 711 }
 712
 713 static struct platform_driver omap_dpi_driver = {
 714         .probe          = omap_dpi_probe,
 715         .remove         = __exit_p(omap_dpi_remove),
 716         .driver         = {
 717                 .name   = "omapdss_dpi",
 718                 .owner  = THIS_MODULE,
 719         },
 720 };
 721
 722 int __init dpi_init_platform_driver(void)
 723 {
 724         return platform_driver_register(&omap_dpi_driver);
 725 }
 726
 727 void __exit dpi_uninit_platform_driver(void)
 728 {
 729         platform_driver_unregister(&omap_dpi_driver);
 730 }
 731
 732 int __init dpi_init_port(struct platform_device *pdev, struct device_node *port)
 733 {
 734         struct device_node *ep;
 735         u32 datalines;
 736         int r;
 737
 738         ep = omapdss_of_get_next_endpoint(port, NULL);
 739         if (!ep)
 740                 return 0;
 741
 742         r = of_property_read_u32(ep, "data-lines", &datalines);
 743         if (r) {
 744                 DSSERR("failed to parse datalines\n");
 745                 goto err_datalines;
 746         }
 747
 748         dpi.data_lines = datalines;
 749
 750         of_node_put(ep);
 751
 752         dpi.pdev = pdev;
 753
 754         mutex_init(&dpi.lock);
 755
 756         dpi_init_output(pdev);
 757
 758         dpi.port_initialized = true;
 759
 760         return 0;
 761
 762 err_datalines:
 763         of_node_put(ep);
 764
 765         return r;
 766 }
 767
 768 void __exit dpi_uninit_port(void)
 769 {
 770         if (!dpi.port_initialized)
 771                 return;
 772
 773         dpi_uninit_output(dpi.pdev);
 774 }