drivers/video/cyber2000fb.c

   1 /*
   2  *  linux/drivers/video/cyber2000fb.c
   3  *
   4  *  Copyright (C) 1998-2002 Russell King
   5  *
   6  *  MIPS and 50xx clock support
   7  *  Copyright (C) 2001 Bradley D. LaRonde <brad@ltc.com>
   8  *
   9  *  32 bit support, text color and panning fixes for modes != 8 bit
  10  *  Copyright (C) 2002 Denis Oliver Kropp <dok@directfb.org>
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15  *
  16  * Integraphics CyberPro 2000, 2010 and 5000 frame buffer device
  17  *
  18  * Based on cyberfb.c.
  19  *
  20  * Note that we now use the new fbcon fix, var and cmap scheme.  We do
  21  * still have to check which console is the currently displayed one
  22  * however, especially for the colourmap stuff.
  23  *
  24  * We also use the new hotplug PCI subsystem.  I'm not sure if there
  25  * are any such cards, but I'm erring on the side of caution.  We don't
  26  * want to go pop just because someone does have one.
  27  *
  28  * Note that this doesn't work fully in the case of multiple CyberPro
  29  * cards with grabbers.  We currently can only attach to the first
  30  * CyberPro card found.
  31  *
  32  * When we're in truecolour mode, we power down the LUT RAM as a power
  33  * saving feature.  Also, when we enter any of the powersaving modes
  34  * (except soft blanking) we power down the RAMDACs.  This saves about
  35  * 1W, which is roughly 8% of the power consumption of a NetWinder
  36  * (which, incidentally, is about the same saving as a 2.5in hard disk
  37  * entering standby mode.)
  38  */
  39 #include <linux/module.h>
  40 #include <linux/kernel.h>
  41 #include <linux/errno.h>
  42 #include <linux/string.h>
  43 #include <linux/mm.h>
  44 #include <linux/slab.h>
  45 #include <linux/delay.h>
  46 #include <linux/fb.h>
  47 #include <linux/pci.h>
  48 #include <linux/init.h>
  49 #include <linux/io.h>
  50 #include <linux/i2c.h>
  51 #include <linux/i2c-algo-bit.h>
  52
  53 #include <asm/pgtable.h>
  54 #include <asm/system.h>
  55
  56 #ifdef __arm__
  57 #include <asm/mach-types.h>
  58 #endif
  59
  60 #include "cyber2000fb.h"
  61
  62 struct cfb_info {
  63         struct fb_info          fb;
  64         struct display_switch   *dispsw;
  65         struct display          *display;
  66         unsigned char           __iomem *region;
  67         unsigned char           __iomem *regs;
  68         u_int                   id;
  69         u_int                   irq;
  70         int                     func_use_count;
  71         u_long                  ref_ps;
  72
  73         /*
  74          * Clock divisors
  75          */
  76         u_int                   divisors[4];
  77
  78         struct {
  79                 u8 red, green, blue;
  80         } palette[NR_PALETTE];
  81
  82         u_char                  mem_ctl1;
  83         u_char                  mem_ctl2;
  84         u_char                  mclk_mult;
  85         u_char                  mclk_div;
  86         /*
  87          * RAMDAC control register is both of these or'ed together
  88          */
  89         u_char                  ramdac_ctrl;
  90         u_char                  ramdac_powerdown;
  91
  92         u32                     pseudo_palette[16];
  93
  94         spinlock_t              reg_b0_lock;
  95
  96 #ifdef CONFIG_FB_CYBER2000_DDC
  97         bool                    ddc_registered;
  98         struct i2c_adapter      ddc_adapter;
  99         struct i2c_algo_bit_data        ddc_algo;
 100 #endif
 101
 102 #ifdef CONFIG_FB_CYBER2000_I2C
 103         struct i2c_adapter      i2c_adapter;
 104         struct i2c_algo_bit_data i2c_algo;
 105 #endif
 106 };
 107
 108 static char *default_font = "Acorn8x8";
 109 module_param(default_font, charp, 0);
 110 MODULE_PARM_DESC(default_font, "Default font name");
 111
 112 /*
 113  * Our access methods.
 114  */
 115 #define cyber2000fb_writel(val, reg, cfb)       writel(val, (cfb)->regs + (reg))
 116 #define cyber2000fb_writew(val, reg, cfb)       writew(val, (cfb)->regs + (reg))
 117 #define cyber2000fb_writeb(val, reg, cfb)       writeb(val, (cfb)->regs + (reg))
 118
 119 #define cyber2000fb_readb(reg, cfb)             readb((cfb)->regs + (reg))
 120
 121 static inline void
 122 cyber2000_crtcw(unsigned int reg, unsigned int val, struct cfb_info *cfb)
 123 {
 124         cyber2000fb_writew((reg & 255) | val << 8, 0x3d4, cfb);
 125 }
 126
 127 static inline void
 128 cyber2000_grphw(unsigned int reg, unsigned int val, struct cfb_info *cfb)
 129 {
 130         cyber2000fb_writew((reg & 255) | val << 8, 0x3ce, cfb);
 131 }
 132
 133 static inline unsigned int
 134 cyber2000_grphr(unsigned int reg, struct cfb_info *cfb)
 135 {
 136         cyber2000fb_writeb(reg, 0x3ce, cfb);
 137         return cyber2000fb_readb(0x3cf, cfb);
 138 }
 139
 140 static inline void
 141 cyber2000_attrw(unsigned int reg, unsigned int val, struct cfb_info *cfb)
 142 {
 143         cyber2000fb_readb(0x3da, cfb);
 144         cyber2000fb_writeb(reg, 0x3c0, cfb);
 145         cyber2000fb_readb(0x3c1, cfb);
 146         cyber2000fb_writeb(val, 0x3c0, cfb);
 147 }
 148
 149 static inline void
 150 cyber2000_seqw(unsigned int reg, unsigned int val, struct cfb_info *cfb)
 151 {
 152         cyber2000fb_writew((reg & 255) | val << 8, 0x3c4, cfb);
 153 }
 154
 155 /* -------------------- Hardware specific routines ------------------------- */
 156
 157 /*
 158  * Hardware Cyber2000 Acceleration
 159  */
 160 static void
 161 cyber2000fb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
 162 {
 163         struct cfb_info *cfb = (struct cfb_info *)info;
 164         unsigned long dst, col;
 165
 166         if (!(cfb->fb.var.accel_flags & FB_ACCELF_TEXT)) {
 167                 cfb_fillrect(info, rect);
 168                 return;
 169         }
 170
 171         cyber2000fb_writeb(0, CO_REG_CONTROL, cfb);
 172         cyber2000fb_writew(rect->width - 1, CO_REG_PIXWIDTH, cfb);
 173         cyber2000fb_writew(rect->height - 1, CO_REG_PIXHEIGHT, cfb);
 174
 175         col = rect->color;
 176         if (cfb->fb.var.bits_per_pixel > 8)
 177                 col = ((u32 *)cfb->fb.pseudo_palette)[col];
 178         cyber2000fb_writel(col, CO_REG_FGCOLOUR, cfb);
 179
 180         dst = rect->dx + rect->dy * cfb->fb.var.xres_virtual;
 181         if (cfb->fb.var.bits_per_pixel == 24) {
 182                 cyber2000fb_writeb(dst, CO_REG_X_PHASE, cfb);
 183                 dst *= 3;
 184         }
 185
 186         cyber2000fb_writel(dst, CO_REG_DEST_PTR, cfb);
 187         cyber2000fb_writeb(CO_FG_MIX_SRC, CO_REG_FGMIX, cfb);
 188         cyber2000fb_writew(CO_CMD_L_PATTERN_FGCOL, CO_REG_CMD_L, cfb);
 189         cyber2000fb_writew(CO_CMD_H_BLITTER, CO_REG_CMD_H, cfb);
 190 }
 191
 192 static void
 193 cyber2000fb_copyarea(struct fb_info *info, const struct fb_copyarea *region)
 194 {
 195         struct cfb_info *cfb = (struct cfb_info *)info;
 196         unsigned int cmd = CO_CMD_L_PATTERN_FGCOL;
 197         unsigned long src, dst;
 198
 199         if (!(cfb->fb.var.accel_flags & FB_ACCELF_TEXT)) {
 200                 cfb_copyarea(info, region);
 201                 return;
 202         }
 203
 204         cyber2000fb_writeb(0, CO_REG_CONTROL, cfb);
 205         cyber2000fb_writew(region->width - 1, CO_REG_PIXWIDTH, cfb);
 206         cyber2000fb_writew(region->height - 1, CO_REG_PIXHEIGHT, cfb);
 207
 208         src = region->sx + region->sy * cfb->fb.var.xres_virtual;
 209         dst = region->dx + region->dy * cfb->fb.var.xres_virtual;
 210
 211         if (region->sx < region->dx) {
 212                 src += region->width - 1;
 213                 dst += region->width - 1;
 214                 cmd |= CO_CMD_L_INC_LEFT;
 215         }
 216
 217         if (region->sy < region->dy) {
 218                 src += (region->height - 1) * cfb->fb.var.xres_virtual;
 219                 dst += (region->height - 1) * cfb->fb.var.xres_virtual;
 220                 cmd |= CO_CMD_L_INC_UP;
 221         }
 222
 223         if (cfb->fb.var.bits_per_pixel == 24) {
 224                 cyber2000fb_writeb(dst, CO_REG_X_PHASE, cfb);
 225                 src *= 3;
 226                 dst *= 3;
 227         }
 228         cyber2000fb_writel(src, CO_REG_SRC1_PTR, cfb);
 229         cyber2000fb_writel(dst, CO_REG_DEST_PTR, cfb);
 230         cyber2000fb_writew(CO_FG_MIX_SRC, CO_REG_FGMIX, cfb);
 231         cyber2000fb_writew(cmd, CO_REG_CMD_L, cfb);
 232         cyber2000fb_writew(CO_CMD_H_FGSRCMAP | CO_CMD_H_BLITTER,
 233                            CO_REG_CMD_H, cfb);
 234 }
 235
 236 static void
 237 cyber2000fb_imageblit(struct fb_info *info, const struct fb_image *image)
 238 {
 239         cfb_imageblit(info, image);
 240         return;
 241 }
 242
 243 static int cyber2000fb_sync(struct fb_info *info)
 244 {
 245         struct cfb_info *cfb = (struct cfb_info *)info;
 246         int count = 100000;
 247
 248         if (!(cfb->fb.var.accel_flags & FB_ACCELF_TEXT))
 249                 return 0;
 250
 251         while (cyber2000fb_readb(CO_REG_CONTROL, cfb) & CO_CTRL_BUSY) {
 252                 if (!count--) {
 253                         debug_printf("accel_wait timed out\n");
 254                         cyber2000fb_writeb(0, CO_REG_CONTROL, cfb);
 255                         break;
 256                 }
 257                 udelay(1);
 258         }
 259         return 0;
 260 }
 261
 262 /*
 263  * ===========================================================================
 264  */
 265
 266 static inline u32 convert_bitfield(u_int val, struct fb_bitfield *bf)
 267 {
 268         u_int mask = (1 << bf->length) - 1;
 269
 270         return (val >> (16 - bf->length) & mask) << bf->offset;
 271 }
 272
 273 /*
 274  *    Set a single color register. Return != 0 for invalid regno.
 275  */
 276 static int
 277 cyber2000fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
 278                       u_int transp, struct fb_info *info)
 279 {
 280         struct cfb_info *cfb = (struct cfb_info *)info;
 281         struct fb_var_screeninfo *var = &cfb->fb.var;
 282         u32 pseudo_val;
 283         int ret = 1;
 284
 285         switch (cfb->fb.fix.visual) {
 286         default:
 287                 return 1;
 288
 289         /*
 290          * Pseudocolour:
 291          *         8     8
 292          * pixel --/--+--/-->  red lut  --> red dac
 293          *            |  8
 294          *            +--/--> green lut --> green dac
 295          *            |  8
 296          *            +--/-->  blue lut --> blue dac
 297          */
 298         case FB_VISUAL_PSEUDOCOLOR:
 299                 if (regno >= NR_PALETTE)
 300                         return 1;
 301
 302                 red >>= 8;
 303                 green >>= 8;
 304                 blue >>= 8;
 305
 306                 cfb->palette[regno].red = red;
 307                 cfb->palette[regno].green = green;
 308                 cfb->palette[regno].blue = blue;
 309
 310                 cyber2000fb_writeb(regno, 0x3c8, cfb);
 311                 cyber2000fb_writeb(red, 0x3c9, cfb);
 312                 cyber2000fb_writeb(green, 0x3c9, cfb);
 313                 cyber2000fb_writeb(blue, 0x3c9, cfb);
 314                 return 0;
 315
 316         /*
 317          * Direct colour:
 318          *         n     rl
 319          * pixel --/--+--/-->  red lut  --> red dac
 320          *            |  gl
 321          *            +--/--> green lut --> green dac
 322          *            |  bl
 323          *            +--/-->  blue lut --> blue dac
 324          * n = bpp, rl = red length, gl = green length, bl = blue length
 325          */
 326         case FB_VISUAL_DIRECTCOLOR:
 327                 red >>= 8;
 328                 green >>= 8;
 329                 blue >>= 8;
 330
 331                 if (var->green.length == 6 && regno < 64) {
 332                         cfb->palette[regno << 2].green = green;
 333
 334                         /*
 335                          * The 6 bits of the green component are applied
 336                          * to the high 6 bits of the LUT.
 337                          */
 338                         cyber2000fb_writeb(regno << 2, 0x3c8, cfb);
 339                         cyber2000fb_writeb(cfb->palette[regno >> 1].red,
 340                                            0x3c9, cfb);
 341                         cyber2000fb_writeb(green, 0x3c9, cfb);
 342                         cyber2000fb_writeb(cfb->palette[regno >> 1].blue,
 343                                            0x3c9, cfb);
 344
 345                         green = cfb->palette[regno << 3].green;
 346
 347                         ret = 0;
 348                 }
 349
 350                 if (var->green.length >= 5 && regno < 32) {
 351                         cfb->palette[regno << 3].red = red;
 352                         cfb->palette[regno << 3].green = green;
 353                         cfb->palette[regno << 3].blue = blue;
 354
 355                         /*
 356                          * The 5 bits of each colour component are
 357                          * applied to the high 5 bits of the LUT.
 358                          */
 359                         cyber2000fb_writeb(regno << 3, 0x3c8, cfb);
 360                         cyber2000fb_writeb(red, 0x3c9, cfb);
 361                         cyber2000fb_writeb(green, 0x3c9, cfb);
 362                         cyber2000fb_writeb(blue, 0x3c9, cfb);
 363                         ret = 0;
 364                 }
 365
 366                 if (var->green.length == 4 && regno < 16) {
 367                         cfb->palette[regno << 4].red = red;
 368                         cfb->palette[regno << 4].green = green;
 369                         cfb->palette[regno << 4].blue = blue;
 370
 371                         /*
 372                          * The 5 bits of each colour component are
 373                          * applied to the high 5 bits of the LUT.
 374                          */
 375                         cyber2000fb_writeb(regno << 4, 0x3c8, cfb);
 376                         cyber2000fb_writeb(red, 0x3c9, cfb);
 377                         cyber2000fb_writeb(green, 0x3c9, cfb);
 378                         cyber2000fb_writeb(blue, 0x3c9, cfb);
 379                         ret = 0;
 380                 }
 381
 382                 /*
 383                  * Since this is only used for the first 16 colours, we
 384                  * don't have to care about overflowing for regno >= 32
 385                  */
 386                 pseudo_val = regno << var->red.offset |
 387                              regno << var->green.offset |
 388                              regno << var->blue.offset;
 389                 break;
 390
 391         /*
 392          * True colour:
 393          *         n     rl
 394          * pixel --/--+--/--> red dac
 395          *            |  gl
 396          *            +--/--> green dac
 397          *            |  bl
 398          *            +--/--> blue dac
 399          * n = bpp, rl = red length, gl = green length, bl = blue length
 400          */
 401         case FB_VISUAL_TRUECOLOR:
 402                 pseudo_val = convert_bitfield(transp ^ 0xffff, &var->transp);
 403                 pseudo_val |= convert_bitfield(red, &var->red);
 404                 pseudo_val |= convert_bitfield(green, &var->green);
 405                 pseudo_val |= convert_bitfield(blue, &var->blue);
 406                 ret = 0;
 407                 break;
 408         }
 409
 410         /*
 411          * Now set our pseudo palette for the CFB16/24/32 drivers.
 412          */
 413         if (regno < 16)
 414                 ((u32 *)cfb->fb.pseudo_palette)[regno] = pseudo_val;
 415
 416         return ret;
 417 }
 418
 419 struct par_info {
 420         /*
 421          * Hardware
 422          */
 423         u_char  clock_mult;
 424         u_char  clock_div;
 425         u_char  extseqmisc;
 426         u_char  co_pixfmt;
 427         u_char  crtc_ofl;
 428         u_char  crtc[19];
 429         u_int   width;
 430         u_int   pitch;
 431         u_int   fetch;
 432
 433         /*
 434          * Other
 435          */
 436         u_char  ramdac;
 437 };
 438
 439 static const u_char crtc_idx[] = {
 440         0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
 441         0x08, 0x09,
 442         0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18
 443 };
 444
 445 static void cyber2000fb_write_ramdac_ctrl(struct cfb_info *cfb)
 446 {
 447         unsigned int i;
 448         unsigned int val = cfb->ramdac_ctrl | cfb->ramdac_powerdown;
 449
 450         cyber2000fb_writeb(0x56, 0x3ce, cfb);
 451         i = cyber2000fb_readb(0x3cf, cfb);
 452         cyber2000fb_writeb(i | 4, 0x3cf, cfb);
 453         cyber2000fb_writeb(val, 0x3c6, cfb);
 454         cyber2000fb_writeb(i, 0x3cf, cfb);
 455         /* prevent card lock-up observed on x86 with CyberPro 2000 */
 456         cyber2000fb_readb(0x3cf, cfb);
 457 }
 458
 459 static void cyber2000fb_set_timing(struct cfb_info *cfb, struct par_info *hw)
 460 {
 461         u_int i;
 462
 463         /*
 464          * Blank palette
 465          */
 466         for (i = 0; i < NR_PALETTE; i++) {
 467                 cyber2000fb_writeb(i, 0x3c8, cfb);
 468                 cyber2000fb_writeb(0, 0x3c9, cfb);
 469                 cyber2000fb_writeb(0, 0x3c9, cfb);
 470                 cyber2000fb_writeb(0, 0x3c9, cfb);
 471         }
 472
 473         cyber2000fb_writeb(0xef, 0x3c2, cfb);
 474         cyber2000_crtcw(0x11, 0x0b, cfb);
 475         cyber2000_attrw(0x11, 0x00, cfb);
 476
 477         cyber2000_seqw(0x00, 0x01, cfb);
 478         cyber2000_seqw(0x01, 0x01, cfb);
 479         cyber2000_seqw(0x02, 0x0f, cfb);
 480         cyber2000_seqw(0x03, 0x00, cfb);
 481         cyber2000_seqw(0x04, 0x0e, cfb);
 482         cyber2000_seqw(0x00, 0x03, cfb);
 483
 484         for (i = 0; i < sizeof(crtc_idx); i++)
 485                 cyber2000_crtcw(crtc_idx[i], hw->crtc[i], cfb);
 486
 487         for (i = 0x0a; i < 0x10; i++)
 488                 cyber2000_crtcw(i, 0, cfb);
 489
 490         cyber2000_grphw(EXT_CRT_VRTOFL, hw->crtc_ofl, cfb);
 491         cyber2000_grphw(0x00, 0x00, cfb);
 492         cyber2000_grphw(0x01, 0x00, cfb);
 493         cyber2000_grphw(0x02, 0x00, cfb);
 494         cyber2000_grphw(0x03, 0x00, cfb);
 495         cyber2000_grphw(0x04, 0x00, cfb);
 496         cyber2000_grphw(0x05, 0x60, cfb);
 497         cyber2000_grphw(0x06, 0x05, cfb);
 498         cyber2000_grphw(0x07, 0x0f, cfb);
 499         cyber2000_grphw(0x08, 0xff, cfb);
 500
 501         /* Attribute controller registers */
 502         for (i = 0; i < 16; i++)
 503                 cyber2000_attrw(i, i, cfb);
 504
 505         cyber2000_attrw(0x10, 0x01, cfb);
 506         cyber2000_attrw(0x11, 0x00, cfb);
 507         cyber2000_attrw(0x12, 0x0f, cfb);
 508         cyber2000_attrw(0x13, 0x00, cfb);
 509         cyber2000_attrw(0x14, 0x00, cfb);
 510
 511         /* PLL registers */
 512         spin_lock(&cfb->reg_b0_lock);
 513         cyber2000_grphw(EXT_DCLK_MULT, hw->clock_mult, cfb);
 514         cyber2000_grphw(EXT_DCLK_DIV, hw->clock_div, cfb);
 515         cyber2000_grphw(EXT_MCLK_MULT, cfb->mclk_mult, cfb);
 516         cyber2000_grphw(EXT_MCLK_DIV, cfb->mclk_div, cfb);
 517         cyber2000_grphw(0x90, 0x01, cfb);
 518         cyber2000_grphw(0xb9, 0x80, cfb);
 519         cyber2000_grphw(0xb9, 0x00, cfb);
 520         spin_unlock(&cfb->reg_b0_lock);
 521
 522         cfb->ramdac_ctrl = hw->ramdac;
 523         cyber2000fb_write_ramdac_ctrl(cfb);
 524
 525         cyber2000fb_writeb(0x20, 0x3c0, cfb);
 526         cyber2000fb_writeb(0xff, 0x3c6, cfb);
 527
 528         cyber2000_grphw(0x14, hw->fetch, cfb);
 529         cyber2000_grphw(0x15, ((hw->fetch >> 8) & 0x03) |
 530                               ((hw->pitch >> 4) & 0x30), cfb);
 531         cyber2000_grphw(EXT_SEQ_MISC, hw->extseqmisc, cfb);
 532
 533         /*
 534          * Set up accelerator registers
 535          */
 536         cyber2000fb_writew(hw->width, CO_REG_SRC_WIDTH, cfb);
 537         cyber2000fb_writew(hw->width, CO_REG_DEST_WIDTH, cfb);
 538         cyber2000fb_writeb(hw->co_pixfmt, CO_REG_PIXFMT, cfb);
 539 }
 540
 541 static inline int
 542 cyber2000fb_update_start(struct cfb_info *cfb, struct fb_var_screeninfo *var)
 543 {
 544         u_int base = var->yoffset * var->xres_virtual + var->xoffset;
 545
 546         base *= var->bits_per_pixel;
 547
 548         /*
 549          * Convert to bytes and shift two extra bits because DAC
 550          * can only start on 4 byte aligned data.
 551          */
 552         base >>= 5;
 553
 554         if (base >= 1 << 20)
 555                 return -EINVAL;
 556
 557         cyber2000_grphw(0x10, base >> 16 | 0x10, cfb);
 558         cyber2000_crtcw(0x0c, base >> 8, cfb);
 559         cyber2000_crtcw(0x0d, base, cfb);
 560
 561         return 0;
 562 }
 563
 564 static int
 565 cyber2000fb_decode_crtc(struct par_info *hw, struct cfb_info *cfb,
 566                         struct fb_var_screeninfo *var)
 567 {
 568         u_int Htotal, Hblankend, Hsyncend;
 569         u_int Vtotal, Vdispend, Vblankstart, Vblankend, Vsyncstart, Vsyncend;
 570 #define ENCODE_BIT(v, b1, m, b2) ((((v) >> (b1)) & (m)) << (b2))
 571
 572         hw->crtc[13] = hw->pitch;
 573         hw->crtc[17] = 0xe3;
 574         hw->crtc[14] = 0;
 575         hw->crtc[8]  = 0;
 576
 577         Htotal     = var->xres + var->right_margin +
 578                      var->hsync_len + var->left_margin;
 579
 580         if (Htotal > 2080)
 581                 return -EINVAL;
 582
 583         hw->crtc[0] = (Htotal >> 3) - 5;
 584         hw->crtc[1] = (var->xres >> 3) - 1;
 585         hw->crtc[2] = var->xres >> 3;
 586         hw->crtc[4] = (var->xres + var->right_margin) >> 3;
 587
 588         Hblankend   = (Htotal - 4 * 8) >> 3;
 589
 590         hw->crtc[3] = ENCODE_BIT(Hblankend,  0, 0x1f,  0) |
 591                       ENCODE_BIT(1,          0, 0x01,  7);
 592
 593         Hsyncend    = (var->xres + var->right_margin + var->hsync_len) >> 3;
 594
 595         hw->crtc[5] = ENCODE_BIT(Hsyncend,   0, 0x1f,  0) |
 596                       ENCODE_BIT(Hblankend,  5, 0x01,  7);
 597
 598         Vdispend    = var->yres - 1;
 599         Vsyncstart  = var->yres + var->lower_margin;
 600         Vsyncend    = var->yres + var->lower_margin + var->vsync_len;
 601         Vtotal      = var->yres + var->lower_margin + var->vsync_len +
 602                       var->upper_margin - 2;
 603
 604         if (Vtotal > 2047)
 605                 return -EINVAL;
 606
 607         Vblankstart = var->yres + 6;
 608         Vblankend   = Vtotal - 10;
 609
 610         hw->crtc[6]  = Vtotal;
 611         hw->crtc[7]  = ENCODE_BIT(Vtotal,     8, 0x01,  0) |
 612                         ENCODE_BIT(Vdispend,   8, 0x01,  1) |
 613                         ENCODE_BIT(Vsyncstart, 8, 0x01,  2) |
 614                         ENCODE_BIT(Vblankstart, 8, 0x01,  3) |
 615                         ENCODE_BIT(1,          0, 0x01,  4) |
 616                         ENCODE_BIT(Vtotal,     9, 0x01,  5) |
 617                         ENCODE_BIT(Vdispend,   9, 0x01,  6) |
 618                         ENCODE_BIT(Vsyncstart, 9, 0x01,  7);
 619         hw->crtc[9]  = ENCODE_BIT(0,          0, 0x1f,  0) |
 620                         ENCODE_BIT(Vblankstart, 9, 0x01,  5) |
 621                         ENCODE_BIT(1,          0, 0x01,  6);
 622         hw->crtc[10] = Vsyncstart;
 623         hw->crtc[11] = ENCODE_BIT(Vsyncend,   0, 0x0f,  0) |
 624                        ENCODE_BIT(1,          0, 0x01,  7);
 625         hw->crtc[12] = Vdispend;
 626         hw->crtc[15] = Vblankstart;
 627         hw->crtc[16] = Vblankend;
 628         hw->crtc[18] = 0xff;
 629
 630         /*
 631          * overflow - graphics reg 0x11
 632          * 0=VTOTAL:10 1=VDEND:10 2=VRSTART:10 3=VBSTART:10
 633          * 4=LINECOMP:10 5-IVIDEO 6=FIXCNT
 634          */
 635         hw->crtc_ofl =
 636                 ENCODE_BIT(Vtotal, 10, 0x01, 0) |
 637                 ENCODE_BIT(Vdispend, 10, 0x01, 1) |
 638                 ENCODE_BIT(Vsyncstart, 10, 0x01, 2) |
 639                 ENCODE_BIT(Vblankstart, 10, 0x01, 3) |
 640                 EXT_CRT_VRTOFL_LINECOMP10;
 641
 642         /* woody: set the interlaced bit... */
 643         /* FIXME: what about doublescan? */
 644         if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED)
 645                 hw->crtc_ofl |= EXT_CRT_VRTOFL_INTERLACE;
 646
 647         return 0;
 648 }
 649
 650 /*
 651  * The following was discovered by a good monitor, bit twiddling, theorising
 652  * and but mostly luck.  Strangely, it looks like everyone elses' PLL!
 653  *
 654  * Clock registers:
 655  *   fclock = fpll / div2
 656  *   fpll   = fref * mult / div1
 657  * where:
 658  *   fref = 14.318MHz (69842ps)
 659  *   mult = reg0xb0.7:0
 660  *   div1 = (reg0xb1.5:0 + 1)
 661  *   div2 =  2^(reg0xb1.7:6)
 662  *   fpll should be between 115 and 260 MHz
 663  *  (8696ps and 3846ps)
 664  */
 665 static int
 666 cyber2000fb_decode_clock(struct par_info *hw, struct cfb_info *cfb,
 667                          struct fb_var_screeninfo *var)
 668 {
 669         u_long pll_ps = var->pixclock;
 670         const u_long ref_ps = cfb->ref_ps;
 671         u_int div2, t_div1, best_div1, best_mult;
 672         int best_diff;
 673         int vco;
 674
 675         /*
 676          * Step 1:
 677          *   find div2 such that 115MHz < fpll < 260MHz
 678          *   and 0 <= div2 < 4
 679          */
 680         for (div2 = 0; div2 < 4; div2++) {
 681                 u_long new_pll;
 682
 683                 new_pll = pll_ps / cfb->divisors[div2];
 684                 if (8696 > new_pll && new_pll > 3846) {
 685                         pll_ps = new_pll;
 686                         break;
 687                 }
 688         }
 689
 690         if (div2 == 4)
 691                 return -EINVAL;
 692
 693         /*
 694          * Step 2:
 695          *  Given pll_ps and ref_ps, find:
 696          *    pll_ps * 0.995 < pll_ps_calc < pll_ps * 1.005
 697          *  where { 1 < best_div1 < 32, 1 < best_mult < 256 }
 698          *    pll_ps_calc = best_div1 / (ref_ps * best_mult)
 699          */
 700         best_diff = 0x7fffffff;
 701         best_mult = 2;
 702         best_div1 = 32;
 703         for (t_div1 = 2; t_div1 < 32; t_div1 += 1) {
 704                 u_int rr, t_mult, t_pll_ps;
 705                 int diff;
 706
 707                 /*
 708                  * Find the multiplier for this divisor
 709                  */
 710                 rr = ref_ps * t_div1;
 711                 t_mult = (rr + pll_ps / 2) / pll_ps;
 712
 713                 /*
 714                  * Is the multiplier within the correct range?
 715                  */
 716                 if (t_mult > 256 || t_mult < 2)
 717                         continue;
 718
 719                 /*
 720                  * Calculate the actual clock period from this multiplier
 721                  * and divisor, and estimate the error.
 722                  */
 723                 t_pll_ps = (rr + t_mult / 2) / t_mult;
 724                 diff = pll_ps - t_pll_ps;
 725                 if (diff < 0)
 726                         diff = -diff;
 727
 728                 if (diff < best_diff) {
 729                         best_diff = diff;
 730                         best_mult = t_mult;
 731                         best_div1 = t_div1;
 732                 }
 733
 734                 /*
 735                  * If we hit an exact value, there is no point in continuing.
 736                  */
 737                 if (diff == 0)
 738                         break;
 739         }
 740
 741         /*
 742          * Step 3:
 743          *  combine values
 744          */
 745         hw->clock_mult = best_mult - 1;
 746         hw->clock_div  = div2 << 6 | (best_div1 - 1);
 747
 748         vco = ref_ps * best_div1 / best_mult;
 749         if ((ref_ps == 40690) && (vco < 5556))
 750                 /* Set VFSEL when VCO > 180MHz (5.556 ps). */
 751                 hw->clock_div |= EXT_DCLK_DIV_VFSEL;
 752
 753         return 0;
 754 }
 755
 756 /*
 757  *    Set the User Defined Part of the Display
 758  */
 759 static int
 760 cyber2000fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 761 {
 762         struct cfb_info *cfb = (struct cfb_info *)info;
 763         struct par_info hw;
 764         unsigned int mem;
 765         int err;
 766
 767         var->transp.msb_right   = 0;
 768         var->red.msb_right      = 0;
 769         var->green.msb_right    = 0;
 770         var->blue.msb_right     = 0;
 771         var->transp.offset      = 0;
 772         var->transp.length      = 0;
 773
 774         switch (var->bits_per_pixel) {
 775         case 8: /* PSEUDOCOLOUR, 256 */
 776                 var->red.offset         = 0;
 777                 var->red.length         = 8;
 778                 var->green.offset       = 0;
 779                 var->green.length       = 8;
 780                 var->blue.offset        = 0;
 781                 var->blue.length        = 8;
 782                 break;
 783
 784         case 16:/* DIRECTCOLOUR, 64k or 32k */
 785                 switch (var->green.length) {
 786                 case 6: /* RGB565, 64k */
 787                         var->red.offset         = 11;
 788                         var->red.length         = 5;
 789                         var->green.offset       = 5;
 790                         var->green.length       = 6;
 791                         var->blue.offset        = 0;
 792                         var->blue.length        = 5;
 793                         break;
 794
 795                 default:
 796                 case 5: /* RGB555, 32k */
 797                         var->red.offset         = 10;
 798                         var->red.length         = 5;
 799                         var->green.offset       = 5;
 800                         var->green.length       = 5;
 801                         var->blue.offset        = 0;
 802                         var->blue.length        = 5;
 803                         break;
 804
 805                 case 4: /* RGB444, 4k + transparency? */
 806                         var->transp.offset      = 12;
 807                         var->transp.length      = 4;
 808                         var->red.offset         = 8;
 809                         var->red.length         = 4;
 810                         var->green.offset       = 4;
 811                         var->green.length       = 4;
 812                         var->blue.offset        = 0;
 813                         var->blue.length        = 4;
 814                         break;
 815                 }
 816                 break;
 817
 818         case 24:/* TRUECOLOUR, 16m */
 819                 var->red.offset         = 16;
 820                 var->red.length         = 8;
 821                 var->green.offset       = 8;
 822                 var->green.length       = 8;
 823                 var->blue.offset        = 0;
 824                 var->blue.length        = 8;
 825                 break;
 826
 827         case 32:/* TRUECOLOUR, 16m */
 828                 var->transp.offset      = 24;
 829                 var->transp.length      = 8;
 830                 var->red.offset         = 16;
 831                 var->red.length         = 8;
 832                 var->green.offset       = 8;
 833                 var->green.length       = 8;
 834                 var->blue.offset        = 0;
 835                 var->blue.length        = 8;
 836                 break;
 837
 838         default:
 839                 return -EINVAL;
 840         }
 841
 842         mem = var->xres_virtual * var->yres_virtual * (var->bits_per_pixel / 8);
 843         if (mem > cfb->fb.fix.smem_len)
 844                 var->yres_virtual = cfb->fb.fix.smem_len * 8 /
 845                                     (var->bits_per_pixel * var->xres_virtual);
 846
 847         if (var->yres > var->yres_virtual)
 848                 var->yres = var->yres_virtual;
 849         if (var->xres > var->xres_virtual)
 850                 var->xres = var->xres_virtual;
 851
 852         err = cyber2000fb_decode_clock(&hw, cfb, var);
 853         if (err)
 854                 return err;
 855
 856         err = cyber2000fb_decode_crtc(&hw, cfb, var);
 857         if (err)
 858                 return err;
 859
 860         return 0;
 861 }
 862
 863 static int cyber2000fb_set_par(struct fb_info *info)
 864 {
 865         struct cfb_info *cfb = (struct cfb_info *)info;
 866         struct fb_var_screeninfo *var = &cfb->fb.var;
 867         struct par_info hw;
 868         unsigned int mem;
 869
 870         hw.width = var->xres_virtual;
 871         hw.ramdac = RAMDAC_VREFEN | RAMDAC_DAC8BIT;
 872
 873         switch (var->bits_per_pixel) {
 874         case 8:
 875                 hw.co_pixfmt            = CO_PIXFMT_8BPP;
 876                 hw.pitch                = hw.width >> 3;
 877                 hw.extseqmisc           = EXT_SEQ_MISC_8;
 878                 break;
 879
 880         case 16:
 881                 hw.co_pixfmt            = CO_PIXFMT_16BPP;
 882                 hw.pitch                = hw.width >> 2;
 883
 884                 switch (var->green.length) {
 885                 case 6: /* RGB565, 64k */
 886                         hw.extseqmisc   = EXT_SEQ_MISC_16_RGB565;
 887                         break;
 888                 case 5: /* RGB555, 32k */
 889                         hw.extseqmisc   = EXT_SEQ_MISC_16_RGB555;
 890                         break;
 891                 case 4: /* RGB444, 4k + transparency? */
 892                         hw.extseqmisc   = EXT_SEQ_MISC_16_RGB444;
 893                         break;
 894                 default:
 895                         BUG();
 896                 }
 897                 break;
 898
 899         case 24:/* TRUECOLOUR, 16m */
 900                 hw.co_pixfmt            = CO_PIXFMT_24BPP;
 901                 hw.width                *= 3;
 902                 hw.pitch                = hw.width >> 3;
 903                 hw.ramdac               |= (RAMDAC_BYPASS | RAMDAC_RAMPWRDN);
 904                 hw.extseqmisc           = EXT_SEQ_MISC_24_RGB888;
 905                 break;
 906
 907         case 32:/* TRUECOLOUR, 16m */
 908                 hw.co_pixfmt            = CO_PIXFMT_32BPP;
 909                 hw.pitch                = hw.width >> 1;
 910                 hw.ramdac               |= (RAMDAC_BYPASS | RAMDAC_RAMPWRDN);
 911                 hw.extseqmisc           = EXT_SEQ_MISC_32;
 912                 break;
 913
 914         default:
 915                 BUG();
 916         }
 917
 918         /*
 919          * Sigh, this is absolutely disgusting, but caused by
 920          * the way the fbcon developers want to separate out
 921          * the "checking" and the "setting" of the video mode.
 922          *
 923          * If the mode is not suitable for the hardware here,
 924          * we can't prevent it being set by returning an error.
 925          *
 926          * In theory, since NetWinders contain just one VGA card,
 927          * we should never end up hitting this problem.
 928          */
 929         BUG_ON(cyber2000fb_decode_clock(&hw, cfb, var) != 0);
 930         BUG_ON(cyber2000fb_decode_crtc(&hw, cfb, var) != 0);
 931
 932         hw.width -= 1;
 933         hw.fetch = hw.pitch;
 934         if (!(cfb->mem_ctl2 & MEM_CTL2_64BIT))
 935                 hw.fetch <<= 1;
 936         hw.fetch += 1;
 937
 938         cfb->fb.fix.line_length = var->xres_virtual * var->bits_per_pixel / 8;
 939
 940         /*
 941          * Same here - if the size of the video mode exceeds the
 942          * available RAM, we can't prevent this mode being set.
 943          *
 944          * In theory, since NetWinders contain just one VGA card,
 945          * we should never end up hitting this problem.
 946          */
 947         mem = cfb->fb.fix.line_length * var->yres_virtual;
 948         BUG_ON(mem > cfb->fb.fix.smem_len);
 949
 950         /*
 951          * 8bpp displays are always pseudo colour.  16bpp and above
 952          * are direct colour or true colour, depending on whether
 953          * the RAMDAC palettes are bypassed.  (Direct colour has
 954          * palettes, true colour does not.)
 955          */
 956         if (var->bits_per_pixel == 8)
 957                 cfb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
 958         else if (hw.ramdac & RAMDAC_BYPASS)
 959                 cfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
 960         else
 961                 cfb->fb.fix.visual = FB_VISUAL_DIRECTCOLOR;
 962
 963         cyber2000fb_set_timing(cfb, &hw);
 964         cyber2000fb_update_start(cfb, var);
 965
 966         return 0;
 967 }
 968
 969 /*
 970  *    Pan or Wrap the Display
 971  */
 972 static int
 973 cyber2000fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
 974 {
 975         struct cfb_info *cfb = (struct cfb_info *)info;
 976
 977         if (cyber2000fb_update_start(cfb, var))
 978                 return -EINVAL;
 979
 980         cfb->fb.var.xoffset = var->xoffset;
 981         cfb->fb.var.yoffset = var->yoffset;
 982
 983         if (var->vmode & FB_VMODE_YWRAP) {
 984                 cfb->fb.var.vmode |= FB_VMODE_YWRAP;
 985         } else {
 986                 cfb->fb.var.vmode &= ~FB_VMODE_YWRAP;
 987         }
 988
 989         return 0;
 990 }
 991
 992 /*
 993  *    (Un)Blank the display.
 994  *
 995  *  Blank the screen if blank_mode != 0, else unblank. If
 996  *  blank == NULL then the caller blanks by setting the CLUT
 997  *  (Color Look Up Table) to all black. Return 0 if blanking
 998  *  succeeded, != 0 if un-/blanking failed due to e.g. a
 999  *  video mode which doesn't support it. Implements VESA
1000  *  suspend and powerdown modes on hardware that supports
1001  *  disabling hsync/vsync:
1002  *    blank_mode == 2: suspend vsync
1003  *    blank_mode == 3: suspend hsync
1004  *    blank_mode == 4: powerdown
1005  *
1006  *  wms...Enable VESA DMPS compatible powerdown mode
1007  *  run "setterm -powersave powerdown" to take advantage
1008  */
1009 static int cyber2000fb_blank(int blank, struct fb_info *info)
1010 {
1011         struct cfb_info *cfb = (struct cfb_info *)info;
1012         unsigned int sync = 0;
1013         int i;
1014
1015         switch (blank) {
1016         case FB_BLANK_POWERDOWN:        /* powerdown - both sync lines down */
1017                 sync = EXT_SYNC_CTL_VS_0 | EXT_SYNC_CTL_HS_0;
1018                 break;
1019         case FB_BLANK_HSYNC_SUSPEND:    /* hsync off */
1020                 sync = EXT_SYNC_CTL_VS_NORMAL | EXT_SYNC_CTL_HS_0;
1021                 break;
1022         case FB_BLANK_VSYNC_SUSPEND:    /* vsync off */
1023                 sync = EXT_SYNC_CTL_VS_0 | EXT_SYNC_CTL_HS_NORMAL;
1024                 break;
1025         case FB_BLANK_NORMAL:           /* soft blank */
1026         default:                        /* unblank */
1027                 break;
1028         }
1029
1030         cyber2000_grphw(EXT_SYNC_CTL, sync, cfb);
1031
1032         if (blank <= 1) {
1033                 /* turn on ramdacs */
1034                 cfb->ramdac_powerdown &= ~(RAMDAC_DACPWRDN | RAMDAC_BYPASS |
1035                                            RAMDAC_RAMPWRDN);
1036                 cyber2000fb_write_ramdac_ctrl(cfb);
1037         }
1038
1039         /*
1040          * Soft blank/unblank the display.
1041          */
1042         if (blank) {    /* soft blank */
1043                 for (i = 0; i < NR_PALETTE; i++) {
1044                         cyber2000fb_writeb(i, 0x3c8, cfb);
1045                         cyber2000fb_writeb(0, 0x3c9, cfb);
1046                         cyber2000fb_writeb(0, 0x3c9, cfb);
1047                         cyber2000fb_writeb(0, 0x3c9, cfb);
1048                 }
1049         } else {        /* unblank */
1050                 for (i = 0; i < NR_PALETTE; i++) {
1051                         cyber2000fb_writeb(i, 0x3c8, cfb);
1052                         cyber2000fb_writeb(cfb->palette[i].red, 0x3c9, cfb);
1053                         cyber2000fb_writeb(cfb->palette[i].green, 0x3c9, cfb);
1054                         cyber2000fb_writeb(cfb->palette[i].blue, 0x3c9, cfb);
1055                 }
1056         }
1057
1058         if (blank >= 2) {
1059                 /* turn off ramdacs */
1060                 cfb->ramdac_powerdown |= RAMDAC_DACPWRDN | RAMDAC_BYPASS |
1061                                          RAMDAC_RAMPWRDN;
1062                 cyber2000fb_write_ramdac_ctrl(cfb);
1063         }
1064
1065         return 0;
1066 }
1067
1068 static struct fb_ops cyber2000fb_ops = {
1069         .owner          = THIS_MODULE,
1070         .fb_check_var   = cyber2000fb_check_var,
1071         .fb_set_par     = cyber2000fb_set_par,
1072         .fb_setcolreg   = cyber2000fb_setcolreg,
1073         .fb_blank       = cyber2000fb_blank,
1074         .fb_pan_display = cyber2000fb_pan_display,
1075         .fb_fillrect    = cyber2000fb_fillrect,
1076         .fb_copyarea    = cyber2000fb_copyarea,
1077         .fb_imageblit   = cyber2000fb_imageblit,
1078         .fb_sync        = cyber2000fb_sync,
1079 };
1080
1081 /*
1082  * This is the only "static" reference to the internal data structures
1083  * of this driver.  It is here solely at the moment to support the other
1084  * CyberPro modules external to this driver.
1085  */
1086 static struct cfb_info *int_cfb_info;
1087
1088 /*
1089  * Enable access to the extended registers
1090  */
1091 void cyber2000fb_enable_extregs(struct cfb_info *cfb)
1092 {
1093         cfb->func_use_count += 1;
1094
1095         if (cfb->func_use_count == 1) {
1096                 int old;
1097
1098                 old = cyber2000_grphr(EXT_FUNC_CTL, cfb);
1099                 old |= EXT_FUNC_CTL_EXTREGENBL;
1100                 cyber2000_grphw(EXT_FUNC_CTL, old, cfb);
1101         }
1102 }
1103 EXPORT_SYMBOL(cyber2000fb_enable_extregs);
1104
1105 /*
1106  * Disable access to the extended registers
1107  */
1108 void cyber2000fb_disable_extregs(struct cfb_info *cfb)
1109 {
1110         if (cfb->func_use_count == 1) {
1111                 int old;
1112
1113                 old = cyber2000_grphr(EXT_FUNC_CTL, cfb);
1114                 old &= ~EXT_FUNC_CTL_EXTREGENBL;
1115                 cyber2000_grphw(EXT_FUNC_CTL, old, cfb);
1116         }
1117
1118         if (cfb->func_use_count == 0)
1119                 printk(KERN_ERR "disable_extregs: count = 0\n");
1120         else
1121                 cfb->func_use_count -= 1;
1122 }
1123 EXPORT_SYMBOL(cyber2000fb_disable_extregs);
1124
1125 /*
1126  * Attach a capture/tv driver to the core CyberX0X0 driver.
1127  */
1128 int cyber2000fb_attach(struct cyberpro_info *info, int idx)
1129 {
1130         if (int_cfb_info != NULL) {
1131                 info->dev             = int_cfb_info->fb.device;
1132 #ifdef CONFIG_FB_CYBER2000_I2C
1133                 info->i2c             = &int_cfb_info->i2c_adapter;
1134 #else
1135                 info->i2c             = NULL;
1136 #endif
1137                 info->regs            = int_cfb_info->regs;
1138                 info->irq             = int_cfb_info->irq;
1139                 info->fb              = int_cfb_info->fb.screen_base;
1140                 info->fb_size         = int_cfb_info->fb.fix.smem_len;
1141                 info->info            = int_cfb_info;
1142
1143                 strlcpy(info->dev_name, int_cfb_info->fb.fix.id,
1144                         sizeof(info->dev_name));
1145         }
1146
1147         return int_cfb_info != NULL;
1148 }
1149 EXPORT_SYMBOL(cyber2000fb_attach);
1150
1151 /*
1152  * Detach a capture/tv driver from the core CyberX0X0 driver.
1153  */
1154 void cyber2000fb_detach(int idx)
1155 {
1156 }
1157 EXPORT_SYMBOL(cyber2000fb_detach);
1158
1159 #ifdef CONFIG_FB_CYBER2000_DDC
1160
1161 #define DDC_REG         0xb0
1162 #define DDC_SCL_OUT     (1 << 0)
1163 #define DDC_SDA_OUT     (1 << 4)
1164 #define DDC_SCL_IN      (1 << 2)
1165 #define DDC_SDA_IN      (1 << 6)
1166
1167 static void cyber2000fb_enable_ddc(struct cfb_info *cfb)
1168 {
1169         spin_lock(&cfb->reg_b0_lock);
1170         cyber2000fb_writew(0x1bf, 0x3ce, cfb);
1171 }
1172
1173 static void cyber2000fb_disable_ddc(struct cfb_info *cfb)
1174 {
1175         cyber2000fb_writew(0x0bf, 0x3ce, cfb);
1176         spin_unlock(&cfb->reg_b0_lock);
1177 }
1178
1179
1180 static void cyber2000fb_ddc_setscl(void *data, int val)
1181 {
1182         struct cfb_info *cfb = data;
1183         unsigned char reg;
1184
1185         cyber2000fb_enable_ddc(cfb);
1186         reg = cyber2000_grphr(DDC_REG, cfb);
1187         if (!val)       /* bit is inverted */
1188                 reg |= DDC_SCL_OUT;
1189         else
1190                 reg &= ~DDC_SCL_OUT;
1191         cyber2000_grphw(DDC_REG, reg, cfb);
1192         cyber2000fb_disable_ddc(cfb);
1193 }
1194
1195 static void cyber2000fb_ddc_setsda(void *data, int val)
1196 {
1197         struct cfb_info *cfb = data;
1198         unsigned char reg;
1199
1200         cyber2000fb_enable_ddc(cfb);
1201         reg = cyber2000_grphr(DDC_REG, cfb);
1202         if (!val)       /* bit is inverted */
1203                 reg |= DDC_SDA_OUT;
1204         else
1205                 reg &= ~DDC_SDA_OUT;
1206         cyber2000_grphw(DDC_REG, reg, cfb);
1207         cyber2000fb_disable_ddc(cfb);
1208 }
1209
1210 static int cyber2000fb_ddc_getscl(void *data)
1211 {
1212         struct cfb_info *cfb = data;
1213         int retval;
1214
1215         cyber2000fb_enable_ddc(cfb);
1216         retval = !!(cyber2000_grphr(DDC_REG, cfb) & DDC_SCL_IN);
1217         cyber2000fb_disable_ddc(cfb);
1218
1219         return retval;
1220 }
1221
1222 static int cyber2000fb_ddc_getsda(void *data)
1223 {
1224         struct cfb_info *cfb = data;
1225         int retval;
1226
1227         cyber2000fb_enable_ddc(cfb);
1228         retval = !!(cyber2000_grphr(DDC_REG, cfb) & DDC_SDA_IN);
1229         cyber2000fb_disable_ddc(cfb);
1230
1231         return retval;
1232 }
1233
1234 static int __devinit cyber2000fb_setup_ddc_bus(struct cfb_info *cfb)
1235 {
1236         strlcpy(cfb->ddc_adapter.name, cfb->fb.fix.id,
1237                 sizeof(cfb->ddc_adapter.name));
1238         cfb->ddc_adapter.owner          = THIS_MODULE;
1239         cfb->ddc_adapter.class          = I2C_CLASS_DDC;
1240         cfb->ddc_adapter.algo_data      = &cfb->ddc_algo;
1241         cfb->ddc_adapter.dev.parent     = cfb->fb.device;
1242         cfb->ddc_algo.setsda            = cyber2000fb_ddc_setsda;
1243         cfb->ddc_algo.setscl            = cyber2000fb_ddc_setscl;
1244         cfb->ddc_algo.getsda            = cyber2000fb_ddc_getsda;
1245         cfb->ddc_algo.getscl            = cyber2000fb_ddc_getscl;
1246         cfb->ddc_algo.udelay            = 10;
1247         cfb->ddc_algo.timeout           = 20;
1248         cfb->ddc_algo.data              = cfb;
1249
1250         i2c_set_adapdata(&cfb->ddc_adapter, cfb);
1251
1252         return i2c_bit_add_bus(&cfb->ddc_adapter);
1253 }
1254 #endif /* CONFIG_FB_CYBER2000_DDC */
1255
1256 #ifdef CONFIG_FB_CYBER2000_I2C
1257 static void cyber2000fb_i2c_setsda(void *data, int state)
1258 {
1259         struct cfb_info *cfb = data;
1260         unsigned int latch2;
1261
1262         spin_lock(&cfb->reg_b0_lock);
1263         latch2 = cyber2000_grphr(EXT_LATCH2, cfb);
1264         latch2 &= EXT_LATCH2_I2C_CLKEN;
1265         if (state)
1266                 latch2 |= EXT_LATCH2_I2C_DATEN;
1267         cyber2000_grphw(EXT_LATCH2, latch2, cfb);
1268         spin_unlock(&cfb->reg_b0_lock);
1269 }
1270
1271 static void cyber2000fb_i2c_setscl(void *data, int state)
1272 {
1273         struct cfb_info *cfb = data;
1274         unsigned int latch2;
1275
1276         spin_lock(&cfb->reg_b0_lock);
1277         latch2 = cyber2000_grphr(EXT_LATCH2, cfb);
1278         latch2 &= EXT_LATCH2_I2C_DATEN;
1279         if (state)
1280                 latch2 |= EXT_LATCH2_I2C_CLKEN;
1281         cyber2000_grphw(EXT_LATCH2, latch2, cfb);
1282         spin_unlock(&cfb->reg_b0_lock);
1283 }
1284
1285 static int cyber2000fb_i2c_getsda(void *data)
1286 {
1287         struct cfb_info *cfb = data;
1288         int ret;
1289
1290         spin_lock(&cfb->reg_b0_lock);
1291         ret = !!(cyber2000_grphr(EXT_LATCH2, cfb) & EXT_LATCH2_I2C_DAT);
1292         spin_unlock(&cfb->reg_b0_lock);
1293
1294         return ret;
1295 }
1296
1297 static int cyber2000fb_i2c_getscl(void *data)
1298 {
1299         struct cfb_info *cfb = data;
1300         int ret;
1301
1302         spin_lock(&cfb->reg_b0_lock);
1303         ret = !!(cyber2000_grphr(EXT_LATCH2, cfb) & EXT_LATCH2_I2C_CLK);
1304         spin_unlock(&cfb->reg_b0_lock);
1305
1306         return ret;
1307 }
1308
1309 static int __devinit cyber2000fb_i2c_register(struct cfb_info *cfb)
1310 {
1311         strlcpy(cfb->i2c_adapter.name, cfb->fb.fix.id,
1312                 sizeof(cfb->i2c_adapter.name));
1313         cfb->i2c_adapter.owner = THIS_MODULE;
1314         cfb->i2c_adapter.algo_data = &cfb->i2c_algo;
1315         cfb->i2c_adapter.dev.parent = cfb->fb.device;
1316         cfb->i2c_algo.setsda = cyber2000fb_i2c_setsda;
1317         cfb->i2c_algo.setscl = cyber2000fb_i2c_setscl;
1318         cfb->i2c_algo.getsda = cyber2000fb_i2c_getsda;
1319         cfb->i2c_algo.getscl = cyber2000fb_i2c_getscl;
1320         cfb->i2c_algo.udelay = 5;
1321         cfb->i2c_algo.timeout = msecs_to_jiffies(100);
1322         cfb->i2c_algo.data = cfb;
1323
1324         return i2c_bit_add_bus(&cfb->i2c_adapter);
1325 }
1326
1327 static void cyber2000fb_i2c_unregister(struct cfb_info *cfb)
1328 {
1329         i2c_del_adapter(&cfb->i2c_adapter);
1330 }
1331 #else
1332 #define cyber2000fb_i2c_register(cfb)   (0)
1333 #define cyber2000fb_i2c_unregister(cfb) do { } while (0)
1334 #endif
1335
1336 /*
1337  * These parameters give
1338  * 640x480, hsync 31.5kHz, vsync 60Hz
1339  */
1340 static struct fb_videomode __devinitdata cyber2000fb_default_mode = {
1341         .refresh        = 60,
1342         .xres           = 640,
1343         .yres           = 480,
1344         .pixclock       = 39722,
1345         .left_margin    = 56,
1346         .right_margin   = 16,
1347         .upper_margin   = 34,
1348         .lower_margin   = 9,
1349         .hsync_len      = 88,
1350         .vsync_len      = 2,
1351         .sync           = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
1352         .vmode          = FB_VMODE_NONINTERLACED
1353 };
1354
1355 static char igs_regs[] = {
1356         EXT_CRT_IRQ,            0,
1357         EXT_CRT_TEST,           0,
1358         EXT_SYNC_CTL,           0,
1359         EXT_SEG_WRITE_PTR,      0,
1360         EXT_SEG_READ_PTR,       0,
1361         EXT_BIU_MISC,           EXT_BIU_MISC_LIN_ENABLE |
1362                                 EXT_BIU_MISC_COP_ENABLE |
1363                                 EXT_BIU_MISC_COP_BFC,
1364         EXT_FUNC_CTL,           0,
1365         CURS_H_START,           0,
1366         CURS_H_START + 1,       0,
1367         CURS_H_PRESET,          0,
1368         CURS_V_START,           0,
1369         CURS_V_START + 1,       0,
1370         CURS_V_PRESET,          0,
1371         CURS_CTL,               0,
1372         EXT_ATTRIB_CTL,         EXT_ATTRIB_CTL_EXT,
1373         EXT_OVERSCAN_RED,       0,
1374         EXT_OVERSCAN_GREEN,     0,
1375         EXT_OVERSCAN_BLUE,      0,
1376
1377         /* some of these are questionable when we have a BIOS */
1378         EXT_MEM_CTL0,           EXT_MEM_CTL0_7CLK |
1379                                 EXT_MEM_CTL0_RAS_1 |
1380                                 EXT_MEM_CTL0_MULTCAS,
1381         EXT_HIDDEN_CTL1,        0x30,
1382         EXT_FIFO_CTL,           0x0b,
1383         EXT_FIFO_CTL + 1,       0x17,
1384         0x76,                   0x00,
1385         EXT_HIDDEN_CTL4,        0xc8
1386 };
1387
1388 /*
1389  * Initialise the CyberPro hardware.  On the CyberPro5XXXX,
1390  * ensure that we're using the correct PLL (5XXX's may be
1391  * programmed to use an additional set of PLLs.)
1392  */
1393 static void cyberpro_init_hw(struct cfb_info *cfb)
1394 {
1395         int i;
1396
1397         for (i = 0; i < sizeof(igs_regs); i += 2)
1398                 cyber2000_grphw(igs_regs[i], igs_regs[i + 1], cfb);
1399
1400         if (cfb->id == ID_CYBERPRO_5000) {
1401                 unsigned char val;
1402                 cyber2000fb_writeb(0xba, 0x3ce, cfb);
1403                 val = cyber2000fb_readb(0x3cf, cfb) & 0x80;
1404                 cyber2000fb_writeb(val, 0x3cf, cfb);
1405         }
1406 }
1407
1408 static struct cfb_info __devinit *cyberpro_alloc_fb_info(unsigned int id,
1409                                                          char *name)
1410 {
1411         struct cfb_info *cfb;
1412
1413         cfb = kzalloc(sizeof(struct cfb_info), GFP_KERNEL);
1414         if (!cfb)
1415                 return NULL;
1416
1417
1418         cfb->id                 = id;
1419
1420         if (id == ID_CYBERPRO_5000)
1421                 cfb->ref_ps     = 40690; /* 24.576 MHz */
1422         else
1423                 cfb->ref_ps     = 69842; /* 14.31818 MHz (69841?) */
1424
1425         cfb->divisors[0]        = 1;
1426         cfb->divisors[1]        = 2;
1427         cfb->divisors[2]        = 4;
1428
1429         if (id == ID_CYBERPRO_2000)
1430                 cfb->divisors[3] = 8;
1431         else
1432                 cfb->divisors[3] = 6;
1433
1434         strcpy(cfb->fb.fix.id, name);
1435
1436         cfb->fb.fix.type        = FB_TYPE_PACKED_PIXELS;
1437         cfb->fb.fix.type_aux    = 0;
1438         cfb->fb.fix.xpanstep    = 0;
1439         cfb->fb.fix.ypanstep    = 1;
1440         cfb->fb.fix.ywrapstep   = 0;
1441
1442         switch (id) {
1443         case ID_IGA_1682:
1444                 cfb->fb.fix.accel = 0;
1445                 break;
1446
1447         case ID_CYBERPRO_2000:
1448                 cfb->fb.fix.accel = FB_ACCEL_IGS_CYBER2000;
1449                 break;
1450
1451         case ID_CYBERPRO_2010:
1452                 cfb->fb.fix.accel = FB_ACCEL_IGS_CYBER2010;
1453                 break;
1454
1455         case ID_CYBERPRO_5000:
1456                 cfb->fb.fix.accel = FB_ACCEL_IGS_CYBER5000;
1457                 break;
1458         }
1459
1460         cfb->fb.var.nonstd      = 0;
1461         cfb->fb.var.activate    = FB_ACTIVATE_NOW;
1462         cfb->fb.var.height      = -1;
1463         cfb->fb.var.width       = -1;
1464         cfb->fb.var.accel_flags = FB_ACCELF_TEXT;
1465
1466         cfb->fb.fbops           = &cyber2000fb_ops;
1467         cfb->fb.flags           = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
1468         cfb->fb.pseudo_palette  = cfb->pseudo_palette;
1469
1470         spin_lock_init(&cfb->reg_b0_lock);
1471
1472         fb_alloc_cmap(&cfb->fb.cmap, NR_PALETTE, 0);
1473
1474         return cfb;
1475 }
1476
1477 static void cyberpro_free_fb_info(struct cfb_info *cfb)
1478 {
1479         if (cfb) {
1480                 /*
1481                  * Free the colourmap
1482                  */
1483                 fb_alloc_cmap(&cfb->fb.cmap, 0, 0);
1484
1485                 kfree(cfb);
1486         }
1487 }
1488
1489 /*
1490  * Parse Cyber2000fb options.  Usage:
1491  *  video=cyber2000:font:fontname
1492  */
1493 #ifndef MODULE
1494 static int cyber2000fb_setup(char *options)
1495 {
1496         char *opt;
1497
1498         if (!options || !*options)
1499                 return 0;
1500
1501         while ((opt = strsep(&options, ",")) != NULL) {
1502                 if (!*opt)
1503                         continue;
1504
1505                 if (strncmp(opt, "font:", 5) == 0) {
1506                         static char default_font_storage[40];
1507
1508                         strlcpy(default_font_storage, opt + 5,
1509                                 sizeof(default_font_storage));
1510                         default_font = default_font_storage;
1511                         continue;
1512                 }
1513
1514                 printk(KERN_ERR "CyberPro20x0: unknown parameter: %s\n", opt);
1515         }
1516         return 0;
1517 }
1518 #endif  /*  MODULE  */
1519
1520 /*
1521  * The CyberPro chips can be placed on many different bus types.
1522  * This probe function is common to all bus types.  The bus-specific
1523  * probe function is expected to have:
1524  *  - enabled access to the linear memory region
1525  *  - memory mapped access to the registers
1526  *  - initialised mem_ctl1 and mem_ctl2 appropriately.
1527  */
1528 static int __devinit cyberpro_common_probe(struct cfb_info *cfb)
1529 {
1530         u_long smem_size;
1531         u_int h_sync, v_sync;
1532         int err;
1533
1534         cyberpro_init_hw(cfb);
1535
1536         /*
1537          * Get the video RAM size and width from the VGA register.
1538          * This should have been already initialised by the BIOS,
1539          * but if it's garbage, claim default 1MB VRAM (woody)
1540          */
1541         cfb->mem_ctl1 = cyber2000_grphr(EXT_MEM_CTL1, cfb);
1542         cfb->mem_ctl2 = cyber2000_grphr(EXT_MEM_CTL2, cfb);
1543
1544         /*
1545          * Determine the size of the memory.
1546          */
1547         switch (cfb->mem_ctl2 & MEM_CTL2_SIZE_MASK) {
1548         case MEM_CTL2_SIZE_4MB:
1549                 smem_size = 0x00400000;
1550                 break;
1551         case MEM_CTL2_SIZE_2MB:
1552                 smem_size = 0x00200000;
1553                 break;
1554         case MEM_CTL2_SIZE_1MB:
1555                 smem_size = 0x00100000;
1556                 break;
1557         default:
1558                 smem_size = 0x00100000;
1559                 break;
1560         }
1561
1562         cfb->fb.fix.smem_len   = smem_size;
1563         cfb->fb.fix.mmio_len   = MMIO_SIZE;
1564         cfb->fb.screen_base    = cfb->region;
1565
1566 #ifdef CONFIG_FB_CYBER2000_DDC
1567         if (cyber2000fb_setup_ddc_bus(cfb) == 0)
1568                 cfb->ddc_registered = true;
1569 #endif
1570
1571         err = -EINVAL;
1572         if (!fb_find_mode(&cfb->fb.var, &cfb->fb, NULL, NULL, 0,
1573                           &cyber2000fb_default_mode, 8)) {
1574                 printk(KERN_ERR "%s: no valid mode found\n", cfb->fb.fix.id);
1575                 goto failed;
1576         }
1577
1578         cfb->fb.var.yres_virtual = cfb->fb.fix.smem_len * 8 /
1579                         (cfb->fb.var.bits_per_pixel * cfb->fb.var.xres_virtual);
1580
1581         if (cfb->fb.var.yres_virtual < cfb->fb.var.yres)
1582                 cfb->fb.var.yres_virtual = cfb->fb.var.yres;
1583
1584 /*      fb_set_var(&cfb->fb.var, -1, &cfb->fb); */
1585
1586         /*
1587          * Calculate the hsync and vsync frequencies.  Note that
1588          * we split the 1e12 constant up so that we can preserve
1589          * the precision and fit the results into 32-bit registers.
1590          *  (1953125000 * 512 = 1e12)
1591          */
1592         h_sync = 1953125000 / cfb->fb.var.pixclock;
1593         h_sync = h_sync * 512 / (cfb->fb.var.xres + cfb->fb.var.left_margin +
1594                  cfb->fb.var.right_margin + cfb->fb.var.hsync_len);
1595         v_sync = h_sync / (cfb->fb.var.yres + cfb->fb.var.upper_margin +
1596                  cfb->fb.var.lower_margin + cfb->fb.var.vsync_len);
1597
1598         printk(KERN_INFO "%s: %dKiB VRAM, using %dx%d, %d.%03dkHz, %dHz\n",
1599                 cfb->fb.fix.id, cfb->fb.fix.smem_len >> 10,
1600                 cfb->fb.var.xres, cfb->fb.var.yres,
1601                 h_sync / 1000, h_sync % 1000, v_sync);
1602
1603         err = cyber2000fb_i2c_register(cfb);
1604         if (err)
1605                 goto failed;
1606
1607         err = register_framebuffer(&cfb->fb);
1608         if (err)
1609                 cyber2000fb_i2c_unregister(cfb);
1610
1611 failed:
1612 #ifdef CONFIG_FB_CYBER2000_DDC
1613         if (err && cfb->ddc_registered)
1614                 i2c_del_adapter(&cfb->ddc_adapter);
1615 #endif
1616         return err;
1617 }
1618
1619 static void __devexit cyberpro_common_remove(struct cfb_info *cfb)
1620 {
1621         unregister_framebuffer(&cfb->fb);
1622 #ifdef CONFIG_FB_CYBER2000_DDC
1623         if (cfb->ddc_registered)
1624                 i2c_del_adapter(&cfb->ddc_adapter);
1625 #endif
1626         cyber2000fb_i2c_unregister(cfb);
1627 }
1628
1629 static void cyberpro_common_resume(struct cfb_info *cfb)
1630 {
1631         cyberpro_init_hw(cfb);
1632
1633         /*
1634          * Reprogram the MEM_CTL1 and MEM_CTL2 registers
1635          */
1636         cyber2000_grphw(EXT_MEM_CTL1, cfb->mem_ctl1, cfb);
1637         cyber2000_grphw(EXT_MEM_CTL2, cfb->mem_ctl2, cfb);
1638
1639         /*
1640          * Restore the old video mode and the palette.
1641          * We also need to tell fbcon to redraw the console.
1642          */
1643         cyber2000fb_set_par(&cfb->fb);
1644 }
1645
1646 #ifdef CONFIG_ARCH_SHARK
1647
1648 #include <mach/framebuffer.h>
1649
1650 static int __devinit cyberpro_vl_probe(void)
1651 {
1652         struct cfb_info *cfb;
1653         int err = -ENOMEM;
1654
1655         if (!request_mem_region(FB_START, FB_SIZE, "CyberPro2010"))
1656                 return err;
1657
1658         cfb = cyberpro_alloc_fb_info(ID_CYBERPRO_2010, "CyberPro2010");
1659         if (!cfb)
1660                 goto failed_release;
1661
1662         cfb->irq = -1;
1663         cfb->region = ioremap(FB_START, FB_SIZE);
1664         if (!cfb->region)
1665                 goto failed_ioremap;
1666
1667         cfb->regs = cfb->region + MMIO_OFFSET;
1668         cfb->fb.device = NULL;
1669         cfb->fb.fix.mmio_start = FB_START + MMIO_OFFSET;
1670         cfb->fb.fix.smem_start = FB_START;
1671
1672         /*
1673          * Bring up the hardware.  This is expected to enable access
1674          * to the linear memory region, and allow access to the memory
1675          * mapped registers.  Also, mem_ctl1 and mem_ctl2 must be
1676          * initialised.
1677          */
1678         cyber2000fb_writeb(0x18, 0x46e8, cfb);
1679         cyber2000fb_writeb(0x01, 0x102, cfb);
1680         cyber2000fb_writeb(0x08, 0x46e8, cfb);
1681         cyber2000fb_writeb(EXT_BIU_MISC, 0x3ce, cfb);
1682         cyber2000fb_writeb(EXT_BIU_MISC_LIN_ENABLE, 0x3cf, cfb);
1683
1684         cfb->mclk_mult = 0xdb;
1685         cfb->mclk_div  = 0x54;
1686
1687         err = cyberpro_common_probe(cfb);
1688         if (err)
1689                 goto failed;
1690
1691         if (int_cfb_info == NULL)
1692                 int_cfb_info = cfb;
1693
1694         return 0;
1695
1696 failed:
1697         iounmap(cfb->region);
1698 failed_ioremap:
1699         cyberpro_free_fb_info(cfb);
1700 failed_release:
1701         release_mem_region(FB_START, FB_SIZE);
1702
1703         return err;
1704 }
1705 #endif /* CONFIG_ARCH_SHARK */
1706
1707 /*
1708  * PCI specific support.
1709  */
1710 #ifdef CONFIG_PCI
1711 /*
1712  * We need to wake up the CyberPro, and make sure its in linear memory
1713  * mode.  Unfortunately, this is specific to the platform and card that
1714  * we are running on.
1715  *
1716  * On x86 and ARM, should we be initialising the CyberPro first via the
1717  * IO registers, and then the MMIO registers to catch all cases?  Can we
1718  * end up in the situation where the chip is in MMIO mode, but not awake
1719  * on an x86 system?
1720  */
1721 static int cyberpro_pci_enable_mmio(struct cfb_info *cfb)
1722 {
1723         unsigned char val;
1724
1725 #if defined(__sparc_v9__)
1726 #error "You lose, consult DaveM."
1727 #elif defined(__sparc__)
1728         /*
1729          * SPARC does not have an "outb" instruction, so we generate
1730          * I/O cycles storing into a reserved memory space at
1731          * physical address 0x3000000
1732          */
1733         unsigned char __iomem *iop;
1734
1735         iop = ioremap(0x3000000, 0x5000);
1736         if (iop == NULL) {
1737                 printk(KERN_ERR "iga5000: cannot map I/O\n");
1738                 return -ENOMEM;
1739         }
1740
1741         writeb(0x18, iop + 0x46e8);
1742         writeb(0x01, iop + 0x102);
1743         writeb(0x08, iop + 0x46e8);
1744         writeb(EXT_BIU_MISC, iop + 0x3ce);
1745         writeb(EXT_BIU_MISC_LIN_ENABLE, iop + 0x3cf);
1746
1747         iounmap(iop);
1748 #else
1749         /*
1750          * Most other machine types are "normal", so
1751          * we use the standard IO-based wakeup.
1752          */
1753         outb(0x18, 0x46e8);
1754         outb(0x01, 0x102);
1755         outb(0x08, 0x46e8);
1756         outb(EXT_BIU_MISC, 0x3ce);
1757         outb(EXT_BIU_MISC_LIN_ENABLE, 0x3cf);
1758 #endif
1759
1760         /*
1761          * Allow the CyberPro to accept PCI burst accesses
1762          */
1763         if (cfb->id == ID_CYBERPRO_2010) {
1764                 printk(KERN_INFO "%s: NOT enabling PCI bursts\n",
1765                        cfb->fb.fix.id);
1766         } else {
1767                 val = cyber2000_grphr(EXT_BUS_CTL, cfb);
1768                 if (!(val & EXT_BUS_CTL_PCIBURST_WRITE)) {
1769                         printk(KERN_INFO "%s: enabling PCI bursts\n",
1770                                 cfb->fb.fix.id);
1771
1772                         val |= EXT_BUS_CTL_PCIBURST_WRITE;
1773
1774                         if (cfb->id == ID_CYBERPRO_5000)
1775                                 val |= EXT_BUS_CTL_PCIBURST_READ;
1776
1777                         cyber2000_grphw(EXT_BUS_CTL, val, cfb);
1778                 }
1779         }
1780
1781         return 0;
1782 }
1783
1784 static int __devinit
1785 cyberpro_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
1786 {
1787         struct cfb_info *cfb;
1788         char name[16];
1789         int err;
1790
1791         sprintf(name, "CyberPro%4X", id->device);
1792
1793         err = pci_enable_device(dev);
1794         if (err)
1795                 return err;
1796
1797         err = -ENOMEM;
1798         cfb = cyberpro_alloc_fb_info(id->driver_data, name);
1799         if (!cfb)
1800                 goto failed_release;
1801
1802         err = pci_request_regions(dev, cfb->fb.fix.id);
1803         if (err)
1804                 goto failed_regions;
1805
1806         cfb->irq = dev->irq;
1807         cfb->region = pci_ioremap_bar(dev, 0);
1808         if (!cfb->region)
1809                 goto failed_ioremap;
1810
1811         cfb->regs = cfb->region + MMIO_OFFSET;
1812         cfb->fb.device = &dev->dev;
1813         cfb->fb.fix.mmio_start = pci_resource_start(dev, 0) + MMIO_OFFSET;
1814         cfb->fb.fix.smem_start = pci_resource_start(dev, 0);
1815
1816         /*
1817          * Bring up the hardware.  This is expected to enable access
1818          * to the linear memory region, and allow access to the memory
1819          * mapped registers.  Also, mem_ctl1 and mem_ctl2 must be
1820          * initialised.
1821          */
1822         err = cyberpro_pci_enable_mmio(cfb);
1823         if (err)
1824                 goto failed;
1825
1826         /*
1827          * Use MCLK from BIOS. FIXME: what about hotplug?
1828          */
1829         cfb->mclk_mult = cyber2000_grphr(EXT_MCLK_MULT, cfb);
1830         cfb->mclk_div  = cyber2000_grphr(EXT_MCLK_DIV, cfb);
1831
1832 #ifdef __arm__
1833         /*
1834          * MCLK on the NetWinder and the Shark is fixed at 75MHz
1835          */
1836         if (machine_is_netwinder()) {
1837                 cfb->mclk_mult = 0xdb;
1838                 cfb->mclk_div  = 0x54;
1839         }
1840 #endif
1841
1842         err = cyberpro_common_probe(cfb);
1843         if (err)
1844                 goto failed;
1845
1846         /*
1847          * Our driver data
1848          */
1849         pci_set_drvdata(dev, cfb);
1850         if (int_cfb_info == NULL)
1851                 int_cfb_info = cfb;
1852
1853         return 0;
1854
1855 failed:
1856         iounmap(cfb->region);
1857 failed_ioremap:
1858         pci_release_regions(dev);
1859 failed_regions:
1860         cyberpro_free_fb_info(cfb);
1861 failed_release:
1862         return err;
1863 }
1864
1865 static void __devexit cyberpro_pci_remove(struct pci_dev *dev)
1866 {
1867         struct cfb_info *cfb = pci_get_drvdata(dev);
1868
1869         if (cfb) {
1870                 cyberpro_common_remove(cfb);
1871                 iounmap(cfb->region);
1872                 cyberpro_free_fb_info(cfb);
1873
1874                 /*
1875                  * Ensure that the driver data is no longer
1876                  * valid.
1877                  */
1878                 pci_set_drvdata(dev, NULL);
1879                 if (cfb == int_cfb_info)
1880                         int_cfb_info = NULL;
1881
1882                 pci_release_regions(dev);
1883         }
1884 }
1885
1886 static int cyberpro_pci_suspend(struct pci_dev *dev, pm_message_t state)
1887 {
1888         return 0;
1889 }
1890
1891 /*
1892  * Re-initialise the CyberPro hardware
1893  */
1894 static int cyberpro_pci_resume(struct pci_dev *dev)
1895 {
1896         struct cfb_info *cfb = pci_get_drvdata(dev);
1897
1898         if (cfb) {
1899                 cyberpro_pci_enable_mmio(cfb);
1900                 cyberpro_common_resume(cfb);
1901         }
1902
1903         return 0;
1904 }
1905
1906 static struct pci_device_id cyberpro_pci_table[] = {
1907 /*      Not yet
1908  *      { PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_1682,
1909  *              PCI_ANY_ID, PCI_ANY_ID, 0, 0, ID_IGA_1682 },
1910  */
1911         { PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_2000,
1912                 PCI_ANY_ID, PCI_ANY_ID, 0, 0, ID_CYBERPRO_2000 },
1913         { PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_2010,
1914                 PCI_ANY_ID, PCI_ANY_ID, 0, 0, ID_CYBERPRO_2010 },
1915         { PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_5000,
1916                 PCI_ANY_ID, PCI_ANY_ID, 0, 0, ID_CYBERPRO_5000 },
1917         { 0, }
1918 };
1919
1920 MODULE_DEVICE_TABLE(pci, cyberpro_pci_table);
1921
1922 static struct pci_driver cyberpro_driver = {
1923         .name           = "CyberPro",
1924         .probe          = cyberpro_pci_probe,
1925         .remove         = __devexit_p(cyberpro_pci_remove),
1926         .suspend        = cyberpro_pci_suspend,
1927         .resume         = cyberpro_pci_resume,
1928         .id_table       = cyberpro_pci_table
1929 };
1930 #endif
1931
1932 /*
1933  * I don't think we can use the "module_init" stuff here because
1934  * the fbcon stuff may not be initialised yet.  Hence the #ifdef
1935  * around module_init.
1936  *
1937  * Tony: "module_init" is now required
1938  */
1939 static int __init cyber2000fb_init(void)
1940 {
1941         int ret = -1, err;
1942
1943 #ifndef MODULE
1944         char *option = NULL;
1945
1946         if (fb_get_options("cyber2000fb", &option))
1947                 return -ENODEV;
1948         cyber2000fb_setup(option);
1949 #endif
1950
1951 #ifdef CONFIG_ARCH_SHARK
1952         err = cyberpro_vl_probe();
1953         if (!err)
1954                 ret = 0;
1955 #endif
1956 #ifdef CONFIG_PCI
1957         err = pci_register_driver(&cyberpro_driver);
1958         if (!err)
1959                 ret = 0;
1960 #endif
1961
1962         return ret ? err : 0;
1963 }
1964 module_init(cyber2000fb_init);
1965
1966 #ifndef CONFIG_ARCH_SHARK
1967 static void __exit cyberpro_exit(void)
1968 {
1969         pci_unregister_driver(&cyberpro_driver);
1970 }
1971 module_exit(cyberpro_exit);
1972 #endif
1973
1974 MODULE_AUTHOR("Russell King");
1975 MODULE_DESCRIPTION("CyberPro 2000, 2010 and 5000 framebuffer driver");
1976 MODULE_LICENSE("GPL");