drivers/video/atmel_lcdfb.c

   1 /*
   2  *  Driver for AT91/AT32 LCD Controller
   3  *
   4  *  Copyright (C) 2007 Atmel Corporation
   5  *
   6  * This file is subject to the terms and conditions of the GNU General Public
   7  * License.  See the file COPYING in the main directory of this archive for
   8  * more details.
   9  */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/platform_device.h>
  13 #include <linux/dma-mapping.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/clk.h>
  16 #include <linux/fb.h>
  17 #include <linux/init.h>
  18 #include <linux/delay.h>
  19 #include <linux/backlight.h>
  20
  21 #include <mach/board.h>
  22 #include <mach/cpu.h>
  23 #include <mach/gpio.h>
  24
  25 #include <video/atmel_lcdc.h>
  26
  27 #define lcdc_readl(sinfo, reg)          __raw_readl((sinfo)->mmio+(reg))
  28 #define lcdc_writel(sinfo, reg, val)    __raw_writel((val), (sinfo)->mmio+(reg))
  29
  30 /* configurable parameters */
  31 #define ATMEL_LCDC_CVAL_DEFAULT         0xc8
  32 #define ATMEL_LCDC_DMA_BURST_LEN        8       /* words */
  33 #define ATMEL_LCDC_FIFO_SIZE            512     /* words */
  34
  35 #if defined(CONFIG_ARCH_AT91)
  36 #define ATMEL_LCDFB_FBINFO_DEFAULT      (FBINFO_DEFAULT \
  37                                          | FBINFO_PARTIAL_PAN_OK \
  38                                          | FBINFO_HWACCEL_YPAN)
  39
  40 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
  41                                         struct fb_var_screeninfo *var)
  42 {
  43
  44 }
  45 #elif defined(CONFIG_AVR32)
  46 #define ATMEL_LCDFB_FBINFO_DEFAULT      (FBINFO_DEFAULT \
  47                                         | FBINFO_PARTIAL_PAN_OK \
  48                                         | FBINFO_HWACCEL_XPAN \
  49                                         | FBINFO_HWACCEL_YPAN)
  50
  51 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
  52                                      struct fb_var_screeninfo *var)
  53 {
  54         u32 dma2dcfg;
  55         u32 pixeloff;
  56
  57         pixeloff = (var->xoffset * var->bits_per_pixel) & 0x1f;
  58
  59         dma2dcfg = ((var->xres_virtual - var->xres) * var->bits_per_pixel) / 8;
  60         dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
  61         lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
  62
  63         /* Update configuration */
  64         lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
  65                     lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
  66                     | ATMEL_LCDC_DMAUPDT);
  67 }
  68 #endif
  69
  70 static const u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
  71                 | ATMEL_LCDC_POL_POSITIVE
  72                 | ATMEL_LCDC_ENA_PWMENABLE;
  73
  74 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
  75
  76 /* some bl->props field just changed */
  77 static int atmel_bl_update_status(struct backlight_device *bl)
  78 {
  79         struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
  80         int                     power = sinfo->bl_power;
  81         int                     brightness = bl->props.brightness;
  82
  83         /* REVISIT there may be a meaningful difference between
  84          * fb_blank and power ... there seem to be some cases
  85          * this doesn't handle correctly.
  86          */
  87         if (bl->props.fb_blank != sinfo->bl_power)
  88                 power = bl->props.fb_blank;
  89         else if (bl->props.power != sinfo->bl_power)
  90                 power = bl->props.power;
  91
  92         if (brightness < 0 && power == FB_BLANK_UNBLANK)
  93                 brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
  94         else if (power != FB_BLANK_UNBLANK)
  95                 brightness = 0;
  96
  97         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
  98         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
  99                         brightness ? contrast_ctr : 0);
 100
 101         bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
 102
 103         return 0;
 104 }
 105
 106 static int atmel_bl_get_brightness(struct backlight_device *bl)
 107 {
 108         struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
 109
 110         return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
 111 }
 112
 113 static struct backlight_ops atmel_lcdc_bl_ops = {
 114         .update_status = atmel_bl_update_status,
 115         .get_brightness = atmel_bl_get_brightness,
 116 };
 117
 118 static void init_backlight(struct atmel_lcdfb_info *sinfo)
 119 {
 120         struct backlight_properties props;
 121         struct backlight_device *bl;
 122
 123         sinfo->bl_power = FB_BLANK_UNBLANK;
 124
 125         if (sinfo->backlight)
 126                 return;
 127
 128         memset(&props, 0, sizeof(struct backlight_properties));
 129         props.max_brightness = 0xff;
 130         bl = backlight_device_register("backlight", &sinfo->pdev->dev, sinfo,
 131                                        &atmel_lcdc_bl_ops, &props);
 132         if (IS_ERR(bl)) {
 133                 dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
 134                                 PTR_ERR(bl));
 135                 return;
 136         }
 137         sinfo->backlight = bl;
 138
 139         bl->props.power = FB_BLANK_UNBLANK;
 140         bl->props.fb_blank = FB_BLANK_UNBLANK;
 141         bl->props.brightness = atmel_bl_get_brightness(bl);
 142 }
 143
 144 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
 145 {
 146         if (sinfo->backlight)
 147                 backlight_device_unregister(sinfo->backlight);
 148 }
 149
 150 #else
 151
 152 static void init_backlight(struct atmel_lcdfb_info *sinfo)
 153 {
 154         dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
 155 }
 156
 157 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
 158 {
 159 }
 160
 161 #endif
 162
 163 static void init_contrast(struct atmel_lcdfb_info *sinfo)
 164 {
 165         /* have some default contrast/backlight settings */
 166         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
 167         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
 168
 169         if (sinfo->lcdcon_is_backlight)
 170                 init_backlight(sinfo);
 171 }
 172
 173
 174 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
 175         .type           = FB_TYPE_PACKED_PIXELS,
 176         .visual         = FB_VISUAL_TRUECOLOR,
 177         .xpanstep       = 0,
 178         .ypanstep       = 1,
 179         .ywrapstep      = 0,
 180         .accel          = FB_ACCEL_NONE,
 181 };
 182
 183 static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
 184 {
 185         unsigned long value;
 186
 187         if (!(cpu_is_at91sam9261() || cpu_is_at91sam9g10()
 188                 || cpu_is_at32ap7000()))
 189                 return xres;
 190
 191         value = xres;
 192         if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
 193                 /* STN display */
 194                 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
 195                         value *= 3;
 196                 }
 197                 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
 198                    || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
 199                       && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
 200                         value = DIV_ROUND_UP(value, 4);
 201                 else
 202                         value = DIV_ROUND_UP(value, 8);
 203         }
 204
 205         return value;
 206 }
 207
 208 static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo)
 209 {
 210         /* Turn off the LCD controller and the DMA controller */
 211         lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
 212                         sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
 213
 214         /* Wait for the LCDC core to become idle */
 215         while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
 216                 msleep(10);
 217
 218         lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
 219 }
 220
 221 static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo)
 222 {
 223         atmel_lcdfb_stop_nowait(sinfo);
 224
 225         /* Wait for DMA engine to become idle... */
 226         while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
 227                 msleep(10);
 228 }
 229
 230 static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo)
 231 {
 232         lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
 233         lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
 234                 (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET)
 235                 | ATMEL_LCDC_PWR);
 236 }
 237
 238 static void atmel_lcdfb_update_dma(struct fb_info *info,
 239                                struct fb_var_screeninfo *var)
 240 {
 241         struct atmel_lcdfb_info *sinfo = info->par;
 242         struct fb_fix_screeninfo *fix = &info->fix;
 243         unsigned long dma_addr;
 244
 245         dma_addr = (fix->smem_start + var->yoffset * fix->line_length
 246                     + var->xoffset * var->bits_per_pixel / 8);
 247
 248         dma_addr &= ~3UL;
 249
 250         /* Set framebuffer DMA base address and pixel offset */
 251         lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
 252
 253         atmel_lcdfb_update_dma2d(sinfo, var);
 254 }
 255
 256 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
 257 {
 258         struct fb_info *info = sinfo->info;
 259
 260         dma_free_writecombine(info->device, info->fix.smem_len,
 261                                 info->screen_base, info->fix.smem_start);
 262 }
 263
 264 /**
 265  *      atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
 266  *      @sinfo: the frame buffer to allocate memory for
 267  *
 268  *      This function is called only from the atmel_lcdfb_probe()
 269  *      so no locking by fb_info->mm_lock around smem_len setting is needed.
 270  */
 271 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
 272 {
 273         struct fb_info *info = sinfo->info;
 274         struct fb_var_screeninfo *var = &info->var;
 275         unsigned int smem_len;
 276
 277         smem_len = (var->xres_virtual * var->yres_virtual
 278                     * ((var->bits_per_pixel + 7) / 8));
 279         info->fix.smem_len = max(smem_len, sinfo->smem_len);
 280
 281         info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
 282                                         (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
 283
 284         if (!info->screen_base) {
 285                 return -ENOMEM;
 286         }
 287
 288         memset(info->screen_base, 0, info->fix.smem_len);
 289
 290         return 0;
 291 }
 292
 293 static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var,
 294                                                      struct fb_info *info)
 295 {
 296         struct fb_videomode varfbmode;
 297         const struct fb_videomode *fbmode = NULL;
 298
 299         fb_var_to_videomode(&varfbmode, var);
 300         fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist);
 301         if (fbmode)
 302                 fb_videomode_to_var(var, fbmode);
 303         return fbmode;
 304 }
 305
 306
 307 /**
 308  *      atmel_lcdfb_check_var - Validates a var passed in.
 309  *      @var: frame buffer variable screen structure
 310  *      @info: frame buffer structure that represents a single frame buffer
 311  *
 312  *      Checks to see if the hardware supports the state requested by
 313  *      var passed in. This function does not alter the hardware
 314  *      state!!!  This means the data stored in struct fb_info and
 315  *      struct atmel_lcdfb_info do not change. This includes the var
 316  *      inside of struct fb_info.  Do NOT change these. This function
 317  *      can be called on its own if we intent to only test a mode and
 318  *      not actually set it. The stuff in modedb.c is a example of
 319  *      this. If the var passed in is slightly off by what the
 320  *      hardware can support then we alter the var PASSED in to what
 321  *      we can do. If the hardware doesn't support mode change a
 322  *      -EINVAL will be returned by the upper layers. You don't need
 323  *      to implement this function then. If you hardware doesn't
 324  *      support changing the resolution then this function is not
 325  *      needed. In this case the driver would just provide a var that
 326  *      represents the static state the screen is in.
 327  *
 328  *      Returns negative errno on error, or zero on success.
 329  */
 330 static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
 331                              struct fb_info *info)
 332 {
 333         struct device *dev = info->device;
 334         struct atmel_lcdfb_info *sinfo = info->par;
 335         unsigned long clk_value_khz;
 336
 337         clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
 338
 339         dev_dbg(dev, "%s:\n", __func__);
 340
 341         if (!(var->pixclock && var->bits_per_pixel)) {
 342                 /* choose a suitable mode if possible */
 343                 if (!atmel_lcdfb_choose_mode(var, info)) {
 344                         dev_err(dev, "needed value not specified\n");
 345                         return -EINVAL;
 346                 }
 347         }
 348
 349         dev_dbg(dev, "  resolution: %ux%u\n", var->xres, var->yres);
 350         dev_dbg(dev, "  pixclk:     %lu KHz\n", PICOS2KHZ(var->pixclock));
 351         dev_dbg(dev, "  bpp:        %u\n", var->bits_per_pixel);
 352         dev_dbg(dev, "  clk:        %lu KHz\n", clk_value_khz);
 353
 354         if (PICOS2KHZ(var->pixclock) > clk_value_khz) {
 355                 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
 356                 return -EINVAL;
 357         }
 358
 359         /* Do not allow to have real resoulution larger than virtual */
 360         if (var->xres > var->xres_virtual)
 361                 var->xres_virtual = var->xres;
 362
 363         if (var->yres > var->yres_virtual)
 364                 var->yres_virtual = var->yres;
 365
 366         /* Force same alignment for each line */
 367         var->xres = (var->xres + 3) & ~3UL;
 368         var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
 369
 370         var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
 371         var->transp.msb_right = 0;
 372         var->transp.offset = var->transp.length = 0;
 373         var->xoffset = var->yoffset = 0;
 374
 375         if (info->fix.smem_len) {
 376                 unsigned int smem_len = (var->xres_virtual * var->yres_virtual
 377                                          * ((var->bits_per_pixel + 7) / 8));
 378                 if (smem_len > info->fix.smem_len)
 379                         return -EINVAL;
 380         }
 381
 382         /* Saturate vertical and horizontal timings at maximum values */
 383         var->vsync_len = min_t(u32, var->vsync_len,
 384                         (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
 385         var->upper_margin = min_t(u32, var->upper_margin,
 386                         ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
 387         var->lower_margin = min_t(u32, var->lower_margin,
 388                         ATMEL_LCDC_VFP);
 389         var->right_margin = min_t(u32, var->right_margin,
 390                         (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
 391         var->hsync_len = min_t(u32, var->hsync_len,
 392                         (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
 393         var->left_margin = min_t(u32, var->left_margin,
 394                         ATMEL_LCDC_HBP + 1);
 395
 396         /* Some parameters can't be zero */
 397         var->vsync_len = max_t(u32, var->vsync_len, 1);
 398         var->right_margin = max_t(u32, var->right_margin, 1);
 399         var->hsync_len = max_t(u32, var->hsync_len, 1);
 400         var->left_margin = max_t(u32, var->left_margin, 1);
 401
 402         switch (var->bits_per_pixel) {
 403         case 1:
 404         case 2:
 405         case 4:
 406         case 8:
 407                 var->red.offset = var->green.offset = var->blue.offset = 0;
 408                 var->red.length = var->green.length = var->blue.length
 409                         = var->bits_per_pixel;
 410                 break;
 411         case 15:
 412         case 16:
 413                 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
 414                         /* RGB:565 mode */
 415                         var->red.offset = 11;
 416                         var->blue.offset = 0;
 417                         var->green.length = 6;
 418                 } else if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB555) {
 419                         var->red.offset = 10;
 420                         var->blue.offset = 0;
 421                         var->green.length = 5;
 422                 } else {
 423                         /* BGR:555 mode */
 424                         var->red.offset = 0;
 425                         var->blue.offset = 10;
 426                         var->green.length = 5;
 427                 }
 428                 var->green.offset = 5;
 429                 var->red.length = var->blue.length = 5;
 430                 break;
 431         case 32:
 432                 var->transp.offset = 24;
 433                 var->transp.length = 8;
 434                 /* fall through */
 435         case 24:
 436                 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
 437                         /* RGB:888 mode */
 438                         var->red.offset = 16;
 439                         var->blue.offset = 0;
 440                 } else {
 441                         /* BGR:888 mode */
 442                         var->red.offset = 0;
 443                         var->blue.offset = 16;
 444                 }
 445                 var->green.offset = 8;
 446                 var->red.length = var->green.length = var->blue.length = 8;
 447                 break;
 448         default:
 449                 dev_err(dev, "color depth %d not supported\n",
 450                                         var->bits_per_pixel);
 451                 return -EINVAL;
 452         }
 453
 454         return 0;
 455 }
 456
 457 /*
 458  * LCD reset sequence
 459  */
 460 static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)
 461 {
 462         might_sleep();
 463
 464         atmel_lcdfb_stop(sinfo);
 465         atmel_lcdfb_start(sinfo);
 466 }
 467
 468 /**
 469  *      atmel_lcdfb_set_par - Alters the hardware state.
 470  *      @info: frame buffer structure that represents a single frame buffer
 471  *
 472  *      Using the fb_var_screeninfo in fb_info we set the resolution
 473  *      of the this particular framebuffer. This function alters the
 474  *      par AND the fb_fix_screeninfo stored in fb_info. It doesn't
 475  *      not alter var in fb_info since we are using that data. This
 476  *      means we depend on the data in var inside fb_info to be
 477  *      supported by the hardware.  atmel_lcdfb_check_var is always called
 478  *      before atmel_lcdfb_set_par to ensure this.  Again if you can't
 479  *      change the resolution you don't need this function.
 480  *
 481  */
 482 static int atmel_lcdfb_set_par(struct fb_info *info)
 483 {
 484         struct atmel_lcdfb_info *sinfo = info->par;
 485         unsigned long hozval_linesz;
 486         unsigned long value;
 487         unsigned long clk_value_khz;
 488         unsigned long bits_per_line;
 489         unsigned long pix_factor = 2;
 490
 491         might_sleep();
 492
 493         dev_dbg(info->device, "%s:\n", __func__);
 494         dev_dbg(info->device, "  * resolution: %ux%u (%ux%u virtual)\n",
 495                  info->var.xres, info->var.yres,
 496                  info->var.xres_virtual, info->var.yres_virtual);
 497
 498         atmel_lcdfb_stop_nowait(sinfo);
 499
 500         if (info->var.bits_per_pixel == 1)
 501                 info->fix.visual = FB_VISUAL_MONO01;
 502         else if (info->var.bits_per_pixel <= 8)
 503                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
 504         else
 505                 info->fix.visual = FB_VISUAL_TRUECOLOR;
 506
 507         bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
 508         info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
 509
 510         /* Re-initialize the DMA engine... */
 511         dev_dbg(info->device, "  * update DMA engine\n");
 512         atmel_lcdfb_update_dma(info, &info->var);
 513
 514         /* ...set frame size and burst length = 8 words (?) */
 515         value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
 516         value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
 517         lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
 518
 519         /* Now, the LCDC core... */
 520
 521         /* Set pixel clock */
 522         if (cpu_is_at91sam9g45() && !cpu_is_at91sam9g45es())
 523                 pix_factor = 1;
 524
 525         clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
 526
 527         value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
 528
 529         if (value < pix_factor) {
 530                 dev_notice(info->device, "Bypassing pixel clock divider\n");
 531                 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
 532         } else {
 533                 value = (value / pix_factor) - 1;
 534                 dev_dbg(info->device, "  * programming CLKVAL = 0x%08lx\n",
 535                                 value);
 536                 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
 537                                 value << ATMEL_LCDC_CLKVAL_OFFSET);
 538                 info->var.pixclock =
 539                         KHZ2PICOS(clk_value_khz / (pix_factor * (value + 1)));
 540                 dev_dbg(info->device, "  updated pixclk:     %lu KHz\n",
 541                                         PICOS2KHZ(info->var.pixclock));
 542         }
 543
 544
 545         /* Initialize control register 2 */
 546         value = sinfo->default_lcdcon2;
 547
 548         if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
 549                 value |= ATMEL_LCDC_INVLINE_INVERTED;
 550         if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
 551                 value |= ATMEL_LCDC_INVFRAME_INVERTED;
 552
 553         switch (info->var.bits_per_pixel) {
 554                 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
 555                 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
 556                 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
 557                 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
 558                 case 15: /* fall through */
 559                 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
 560                 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
 561                 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
 562                 default: BUG(); break;
 563         }
 564         dev_dbg(info->device, "  * LCDCON2 = %08lx\n", value);
 565         lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
 566
 567         /* Vertical timing */
 568         value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
 569         value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
 570         value |= info->var.lower_margin;
 571         dev_dbg(info->device, "  * LCDTIM1 = %08lx\n", value);
 572         lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
 573
 574         /* Horizontal timing */
 575         value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
 576         value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
 577         value |= (info->var.left_margin - 1);
 578         dev_dbg(info->device, "  * LCDTIM2 = %08lx\n", value);
 579         lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
 580
 581         /* Horizontal value (aka line size) */
 582         hozval_linesz = compute_hozval(info->var.xres,
 583                                         lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2));
 584
 585         /* Display size */
 586         value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
 587         value |= info->var.yres - 1;
 588         dev_dbg(info->device, "  * LCDFRMCFG = %08lx\n", value);
 589         lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
 590
 591         /* FIFO Threshold: Use formula from data sheet */
 592         value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
 593         lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
 594
 595         /* Toggle LCD_MODE every frame */
 596         lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
 597
 598         /* Disable all interrupts */
 599         lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
 600         /* Enable FIFO & DMA errors */
 601         lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
 602
 603         /* ...wait for DMA engine to become idle... */
 604         while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
 605                 msleep(10);
 606
 607         atmel_lcdfb_start(sinfo);
 608
 609         dev_dbg(info->device, "  * DONE\n");
 610
 611         return 0;
 612 }
 613
 614 static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
 615 {
 616         chan &= 0xffff;
 617         chan >>= 16 - bf->length;
 618         return chan << bf->offset;
 619 }
 620
 621 /**
 622  *      atmel_lcdfb_setcolreg - Optional function. Sets a color register.
 623  *      @regno: Which register in the CLUT we are programming
 624  *      @red: The red value which can be up to 16 bits wide
 625  *      @green: The green value which can be up to 16 bits wide
 626  *      @blue:  The blue value which can be up to 16 bits wide.
 627  *      @transp: If supported the alpha value which can be up to 16 bits wide.
 628  *      @info: frame buffer info structure
 629  *
 630  *      Set a single color register. The values supplied have a 16 bit
 631  *      magnitude which needs to be scaled in this function for the hardware.
 632  *      Things to take into consideration are how many color registers, if
 633  *      any, are supported with the current color visual. With truecolor mode
 634  *      no color palettes are supported. Here a psuedo palette is created
 635  *      which we store the value in pseudo_palette in struct fb_info. For
 636  *      pseudocolor mode we have a limited color palette. To deal with this
 637  *      we can program what color is displayed for a particular pixel value.
 638  *      DirectColor is similar in that we can program each color field. If
 639  *      we have a static colormap we don't need to implement this function.
 640  *
 641  *      Returns negative errno on error, or zero on success. In an
 642  *      ideal world, this would have been the case, but as it turns
 643  *      out, the other drivers return 1 on failure, so that's what
 644  *      we're going to do.
 645  */
 646 static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
 647                              unsigned int green, unsigned int blue,
 648                              unsigned int transp, struct fb_info *info)
 649 {
 650         struct atmel_lcdfb_info *sinfo = info->par;
 651         unsigned int val;
 652         u32 *pal;
 653         int ret = 1;
 654
 655         if (info->var.grayscale)
 656                 red = green = blue = (19595 * red + 38470 * green
 657                                       + 7471 * blue) >> 16;
 658
 659         switch (info->fix.visual) {
 660         case FB_VISUAL_TRUECOLOR:
 661                 if (regno < 16) {
 662                         pal = info->pseudo_palette;
 663
 664                         val  = chan_to_field(red, &info->var.red);
 665                         val |= chan_to_field(green, &info->var.green);
 666                         val |= chan_to_field(blue, &info->var.blue);
 667
 668                         pal[regno] = val;
 669                         ret = 0;
 670                 }
 671                 break;
 672
 673         case FB_VISUAL_PSEUDOCOLOR:
 674                 if (regno < 256) {
 675                         val  = ((red   >> 11) & 0x001f);
 676                         val |= ((green >>  6) & 0x03e0);
 677                         val |= ((blue  >>  1) & 0x7c00);
 678
 679                         /*
 680                          * TODO: intensity bit. Maybe something like
 681                          *   ~(red[10] ^ green[10] ^ blue[10]) & 1
 682                          */
 683
 684                         lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
 685                         ret = 0;
 686                 }
 687                 break;
 688
 689         case FB_VISUAL_MONO01:
 690                 if (regno < 2) {
 691                         val = (regno == 0) ? 0x00 : 0x1F;
 692                         lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
 693                         ret = 0;
 694                 }
 695                 break;
 696
 697         }
 698
 699         return ret;
 700 }
 701
 702 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
 703                                struct fb_info *info)
 704 {
 705         dev_dbg(info->device, "%s\n", __func__);
 706
 707         atmel_lcdfb_update_dma(info, var);
 708
 709         return 0;
 710 }
 711
 712 static struct fb_ops atmel_lcdfb_ops = {
 713         .owner          = THIS_MODULE,
 714         .fb_check_var   = atmel_lcdfb_check_var,
 715         .fb_set_par     = atmel_lcdfb_set_par,
 716         .fb_setcolreg   = atmel_lcdfb_setcolreg,
 717         .fb_pan_display = atmel_lcdfb_pan_display,
 718         .fb_fillrect    = cfb_fillrect,
 719         .fb_copyarea    = cfb_copyarea,
 720         .fb_imageblit   = cfb_imageblit,
 721 };
 722
 723 static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
 724 {
 725         struct fb_info *info = dev_id;
 726         struct atmel_lcdfb_info *sinfo = info->par;
 727         u32 status;
 728
 729         status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
 730         if (status & ATMEL_LCDC_UFLWI) {
 731                 dev_warn(info->device, "FIFO underflow %#x\n", status);
 732                 /* reset DMA and FIFO to avoid screen shifting */
 733                 schedule_work(&sinfo->task);
 734         }
 735         lcdc_writel(sinfo, ATMEL_LCDC_ICR, status);
 736         return IRQ_HANDLED;
 737 }
 738
 739 /*
 740  * LCD controller task (to reset the LCD)
 741  */
 742 static void atmel_lcdfb_task(struct work_struct *work)
 743 {
 744         struct atmel_lcdfb_info *sinfo =
 745                 container_of(work, struct atmel_lcdfb_info, task);
 746
 747         atmel_lcdfb_reset(sinfo);
 748 }
 749
 750 static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
 751 {
 752         struct fb_info *info = sinfo->info;
 753         int ret = 0;
 754
 755         info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
 756
 757         dev_info(info->device,
 758                "%luKiB frame buffer at %08lx (mapped at %p)\n",
 759                (unsigned long)info->fix.smem_len / 1024,
 760                (unsigned long)info->fix.smem_start,
 761                info->screen_base);
 762
 763         /* Allocate colormap */
 764         ret = fb_alloc_cmap(&info->cmap, 256, 0);
 765         if (ret < 0)
 766                 dev_err(info->device, "Alloc color map failed\n");
 767
 768         return ret;
 769 }
 770
 771 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
 772 {
 773         if (sinfo->bus_clk)
 774                 clk_enable(sinfo->bus_clk);
 775         clk_enable(sinfo->lcdc_clk);
 776 }
 777
 778 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
 779 {
 780         if (sinfo->bus_clk)
 781                 clk_disable(sinfo->bus_clk);
 782         clk_disable(sinfo->lcdc_clk);
 783 }
 784
 785
 786 static int __init atmel_lcdfb_probe(struct platform_device *pdev)
 787 {
 788         struct device *dev = &pdev->dev;
 789         struct fb_info *info;
 790         struct atmel_lcdfb_info *sinfo;
 791         struct atmel_lcdfb_info *pdata_sinfo;
 792         struct fb_videomode fbmode;
 793         struct resource *regs = NULL;
 794         struct resource *map = NULL;
 795         int ret;
 796
 797         dev_dbg(dev, "%s BEGIN\n", __func__);
 798
 799         ret = -ENOMEM;
 800         info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
 801         if (!info) {
 802                 dev_err(dev, "cannot allocate memory\n");
 803                 goto out;
 804         }
 805
 806         sinfo = info->par;
 807
 808         if (dev->platform_data) {
 809                 pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
 810                 sinfo->default_bpp = pdata_sinfo->default_bpp;
 811                 sinfo->default_dmacon = pdata_sinfo->default_dmacon;
 812                 sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
 813                 sinfo->default_monspecs = pdata_sinfo->default_monspecs;
 814                 sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
 815                 sinfo->guard_time = pdata_sinfo->guard_time;
 816                 sinfo->smem_len = pdata_sinfo->smem_len;
 817                 sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
 818                 sinfo->lcd_wiring_mode = pdata_sinfo->lcd_wiring_mode;
 819         } else {
 820                 dev_err(dev, "cannot get default configuration\n");
 821                 goto free_info;
 822         }
 823         sinfo->info = info;
 824         sinfo->pdev = pdev;
 825
 826         strcpy(info->fix.id, sinfo->pdev->name);
 827         info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
 828         info->pseudo_palette = sinfo->pseudo_palette;
 829         info->fbops = &atmel_lcdfb_ops;
 830
 831         memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
 832         info->fix = atmel_lcdfb_fix;
 833
 834         /* Enable LCDC Clocks */
 835         if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()
 836          || cpu_is_at32ap7000()) {
 837                 sinfo->bus_clk = clk_get(dev, "hck1");
 838                 if (IS_ERR(sinfo->bus_clk)) {
 839                         ret = PTR_ERR(sinfo->bus_clk);
 840                         goto free_info;
 841                 }
 842         }
 843         sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
 844         if (IS_ERR(sinfo->lcdc_clk)) {
 845                 ret = PTR_ERR(sinfo->lcdc_clk);
 846                 goto put_bus_clk;
 847         }
 848         atmel_lcdfb_start_clock(sinfo);
 849
 850         ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
 851                         info->monspecs.modedb_len, info->monspecs.modedb,
 852                         sinfo->default_bpp);
 853         if (!ret) {
 854                 dev_err(dev, "no suitable video mode found\n");
 855                 goto stop_clk;
 856         }
 857
 858
 859         regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 860         if (!regs) {
 861                 dev_err(dev, "resources unusable\n");
 862                 ret = -ENXIO;
 863                 goto stop_clk;
 864         }
 865
 866         sinfo->irq_base = platform_get_irq(pdev, 0);
 867         if (sinfo->irq_base < 0) {
 868                 dev_err(dev, "unable to get irq\n");
 869                 ret = sinfo->irq_base;
 870                 goto stop_clk;
 871         }
 872
 873         /* Initialize video memory */
 874         map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
 875         if (map) {
 876                 /* use a pre-allocated memory buffer */
 877                 info->fix.smem_start = map->start;
 878                 info->fix.smem_len = map->end - map->start + 1;
 879                 if (!request_mem_region(info->fix.smem_start,
 880                                         info->fix.smem_len, pdev->name)) {
 881                         ret = -EBUSY;
 882                         goto stop_clk;
 883                 }
 884
 885                 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
 886                 if (!info->screen_base)
 887                         goto release_intmem;
 888
 889                 /*
 890                  * Don't clear the framebuffer -- someone may have set
 891                  * up a splash image.
 892                  */
 893         } else {
 894                 /* alocate memory buffer */
 895                 ret = atmel_lcdfb_alloc_video_memory(sinfo);
 896                 if (ret < 0) {
 897                         dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
 898                         goto stop_clk;
 899                 }
 900         }
 901
 902         /* LCDC registers */
 903         info->fix.mmio_start = regs->start;
 904         info->fix.mmio_len = regs->end - regs->start + 1;
 905
 906         if (!request_mem_region(info->fix.mmio_start,
 907                                 info->fix.mmio_len, pdev->name)) {
 908                 ret = -EBUSY;
 909                 goto free_fb;
 910         }
 911
 912         sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
 913         if (!sinfo->mmio) {
 914                 dev_err(dev, "cannot map LCDC registers\n");
 915                 goto release_mem;
 916         }
 917
 918         /* Initialize PWM for contrast or backlight ("off") */
 919         init_contrast(sinfo);
 920
 921         /* interrupt */
 922         ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
 923         if (ret) {
 924                 dev_err(dev, "request_irq failed: %d\n", ret);
 925                 goto unmap_mmio;
 926         }
 927
 928         /* Some operations on the LCDC might sleep and
 929          * require a preemptible task context */
 930         INIT_WORK(&sinfo->task, atmel_lcdfb_task);
 931
 932         ret = atmel_lcdfb_init_fbinfo(sinfo);
 933         if (ret < 0) {
 934                 dev_err(dev, "init fbinfo failed: %d\n", ret);
 935                 goto unregister_irqs;
 936         }
 937
 938         /*
 939          * This makes sure that our colour bitfield
 940          * descriptors are correctly initialised.
 941          */
 942         atmel_lcdfb_check_var(&info->var, info);
 943
 944         ret = fb_set_var(info, &info->var);
 945         if (ret) {
 946                 dev_warn(dev, "unable to set display parameters\n");
 947                 goto free_cmap;
 948         }
 949
 950         dev_set_drvdata(dev, info);
 951
 952         /*
 953          * Tell the world that we're ready to go
 954          */
 955         ret = register_framebuffer(info);
 956         if (ret < 0) {
 957                 dev_err(dev, "failed to register framebuffer device: %d\n", ret);
 958                 goto reset_drvdata;
 959         }
 960
 961         /* add selected videomode to modelist */
 962         fb_var_to_videomode(&fbmode, &info->var);
 963         fb_add_videomode(&fbmode, &info->modelist);
 964
 965         /* Power up the LCDC screen */
 966         if (sinfo->atmel_lcdfb_power_control)
 967                 sinfo->atmel_lcdfb_power_control(1);
 968
 969         dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %d\n",
 970                        info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
 971
 972         return 0;
 973
 974 reset_drvdata:
 975         dev_set_drvdata(dev, NULL);
 976 free_cmap:
 977         fb_dealloc_cmap(&info->cmap);
 978 unregister_irqs:
 979         cancel_work_sync(&sinfo->task);
 980         free_irq(sinfo->irq_base, info);
 981 unmap_mmio:
 982         exit_backlight(sinfo);
 983         iounmap(sinfo->mmio);
 984 release_mem:
 985         release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
 986 free_fb:
 987         if (map)
 988                 iounmap(info->screen_base);
 989         else
 990                 atmel_lcdfb_free_video_memory(sinfo);
 991
 992 release_intmem:
 993         if (map)
 994                 release_mem_region(info->fix.smem_start, info->fix.smem_len);
 995 stop_clk:
 996         atmel_lcdfb_stop_clock(sinfo);
 997         clk_put(sinfo->lcdc_clk);
 998 put_bus_clk:
 999         if (sinfo->bus_clk)
1000                 clk_put(sinfo->bus_clk);
1001 free_info:
1002         framebuffer_release(info);
1003 out:
1004         dev_dbg(dev, "%s FAILED\n", __func__);
1005         return ret;
1006 }
1007
1008 static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
1009 {
1010         struct device *dev = &pdev->dev;
1011         struct fb_info *info = dev_get_drvdata(dev);
1012         struct atmel_lcdfb_info *sinfo;
1013
1014         if (!info || !info->par)
1015                 return 0;
1016         sinfo = info->par;
1017
1018         cancel_work_sync(&sinfo->task);
1019         exit_backlight(sinfo);
1020         if (sinfo->atmel_lcdfb_power_control)
1021                 sinfo->atmel_lcdfb_power_control(0);
1022         unregister_framebuffer(info);
1023         atmel_lcdfb_stop_clock(sinfo);
1024         clk_put(sinfo->lcdc_clk);
1025         if (sinfo->bus_clk)
1026                 clk_put(sinfo->bus_clk);
1027         fb_dealloc_cmap(&info->cmap);
1028         free_irq(sinfo->irq_base, info);
1029         iounmap(sinfo->mmio);
1030         release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1031         if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
1032                 iounmap(info->screen_base);
1033                 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1034         } else {
1035                 atmel_lcdfb_free_video_memory(sinfo);
1036         }
1037
1038         dev_set_drvdata(dev, NULL);
1039         framebuffer_release(info);
1040
1041         return 0;
1042 }
1043
1044 #ifdef CONFIG_PM
1045
1046 static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
1047 {
1048         struct fb_info *info = platform_get_drvdata(pdev);
1049         struct atmel_lcdfb_info *sinfo = info->par;
1050
1051         /*
1052          * We don't want to handle interrupts while the clock is
1053          * stopped. It may take forever.
1054          */
1055         lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
1056
1057         sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
1058         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
1059         if (sinfo->atmel_lcdfb_power_control)
1060                 sinfo->atmel_lcdfb_power_control(0);
1061
1062         atmel_lcdfb_stop(sinfo);
1063         atmel_lcdfb_stop_clock(sinfo);
1064
1065         return 0;
1066 }
1067
1068 static int atmel_lcdfb_resume(struct platform_device *pdev)
1069 {
1070         struct fb_info *info = platform_get_drvdata(pdev);
1071         struct atmel_lcdfb_info *sinfo = info->par;
1072
1073         atmel_lcdfb_start_clock(sinfo);
1074         atmel_lcdfb_start(sinfo);
1075         if (sinfo->atmel_lcdfb_power_control)
1076                 sinfo->atmel_lcdfb_power_control(1);
1077         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
1078
1079         /* Enable FIFO & DMA errors */
1080         lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI
1081                         | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
1082
1083         return 0;
1084 }
1085
1086 #else
1087 #define atmel_lcdfb_suspend     NULL
1088 #define atmel_lcdfb_resume      NULL
1089 #endif
1090
1091 static struct platform_driver atmel_lcdfb_driver = {
1092         .remove         = __exit_p(atmel_lcdfb_remove),
1093         .suspend        = atmel_lcdfb_suspend,
1094         .resume         = atmel_lcdfb_resume,
1095
1096         .driver         = {
1097                 .name   = "atmel_lcdfb",
1098                 .owner  = THIS_MODULE,
1099         },
1100 };
1101
1102 static int __init atmel_lcdfb_init(void)
1103 {
1104         return platform_driver_probe(&atmel_lcdfb_driver, atmel_lcdfb_probe);
1105 }
1106
1107 static void __exit atmel_lcdfb_exit(void)
1108 {
1109         platform_driver_unregister(&atmel_lcdfb_driver);
1110 }
1111
1112 module_init(atmel_lcdfb_init);
1113 module_exit(atmel_lcdfb_exit);
1114
1115 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
1116 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
1117 MODULE_LICENSE("GPL");