phy: usb: sunxi: Introduce Allwinner A31 USB PHY support
[pandora-kernel.git] / drivers / usb / phy / phy-mv-u3d-usb.h
1 /*
2  * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
3  *
4  * This program is free software; you can redistribute it and/or modify it
5  * under the terms and conditions of the GNU General Public License,
6  * version 2, as published by the Free Software Foundation.
7  */
8
9 #ifndef __MV_U3D_PHY_H
10 #define __MV_U3D_PHY_H
11
12 #define USB3_POWER_PLL_CONTROL          0x1
13 #define USB3_KVCO_CALI_CONTROL          0x2
14 #define USB3_IMPEDANCE_CALI_CTRL        0x3
15 #define USB3_IMPEDANCE_TX_SSC           0x4
16 #define USB3_SQUELCH_FFE                0x6
17 #define USB3_GEN1_SET0                  0xD
18 #define USB3_GEN2_SET0                  0xF
19 #define USB3_GEN2_SET1                  0x10
20 #define USB3_DIGITAL_LOOPBACK_EN        0x23
21 #define USB3_PHY_ISOLATION_MODE         0x26
22 #define USB3_TXDETRX                    0x48
23 #define USB3_TX_EMPPH                   0x5E
24 #define USB3_RESET_CONTROL              0x90
25 #define USB3_PIPE_SM_CTRL               0x91
26
27 #define USB3_RESET_CONTROL_RESET_PIPE                   0x1
28 #define USB3_RESET_CONTROL_RESET_PHY                    0x2
29
30 #define USB3_POWER_PLL_CONTROL_REF_FREF_SEL_MASK        (0x1F << 0)
31 #define USB3_POWER_PLL_CONTROL_REF_FREF_SEL_SHIFT       0
32 #define USB3_PLL_25MHZ                                  0x2
33 #define USB3_PLL_26MHZ                                  0x5
34 #define USB3_POWER_PLL_CONTROL_PHY_MODE_MASK            (0x7 << 5)
35 #define USB3_POWER_PLL_CONTROL_PHY_MODE_SHIFT           5
36 #define USB3_POWER_PLL_CONTROL_PU_MASK                  (0xF << 12)
37 #define USB3_POWER_PLL_CONTROL_PU_SHIFT                 12
38 #define USB3_POWER_PLL_CONTROL_PU                       (0xF << 12)
39
40 #define USB3_KVCO_CALI_CONTROL_USE_MAX_PLL_RATE_MASK    (0x1 << 12)
41 #define USB3_KVCO_CALI_CONTROL_USE_MAX_PLL_RATE_SHIFT   12
42 #define USB3_KVCO_CALI_CONTROL_CAL_DONE_SHIFT           14
43 #define USB3_KVCO_CALI_CONTROL_CAL_START_SHIFT          15
44
45 #define USB3_SQUELCH_FFE_FFE_CAP_SEL_MASK               0xF
46 #define USB3_SQUELCH_FFE_FFE_CAP_SEL_SHIFT              0
47 #define USB3_SQUELCH_FFE_FFE_RES_SEL_MASK               (0x7 << 4)
48 #define USB3_SQUELCH_FFE_FFE_RES_SEL_SHIFT              4
49 #define USB3_SQUELCH_FFE_SQ_THRESH_IN_MASK              (0x1F << 8)
50 #define USB3_SQUELCH_FFE_SQ_THRESH_IN_SHIFT             8
51
52 #define USB3_GEN1_SET0_G1_TX_SLEW_CTRL_EN_MASK          (0x1 << 15)
53 #define USB3_GEN1_SET0_G1_TX_EMPH_EN_SHIFT              11
54
55 #define USB3_GEN2_SET0_G2_TX_AMP_MASK                   (0x1F << 1)
56 #define USB3_GEN2_SET0_G2_TX_AMP_SHIFT                  1
57 #define USB3_GEN2_SET0_G2_TX_AMP_ADJ_SHIFT              6
58 #define USB3_GEN2_SET0_G2_TX_EMPH_AMP_MASK              (0xF << 7)
59 #define USB3_GEN2_SET0_G2_TX_EMPH_AMP_SHIFT             7
60 #define USB3_GEN2_SET0_G2_TX_EMPH_EN_MASK               (0x1 << 11)
61 #define USB3_GEN2_SET0_G2_TX_EMPH_EN_SHIFT              11
62 #define USB3_GEN2_SET0_G2_TX_SLEW_CTRL_EN_MASK          (0x1 << 15)
63 #define USB3_GEN2_SET0_G2_TX_SLEW_CTRL_EN_SHIFT         15
64
65 #define USB3_GEN2_SET1_G2_RX_SELMUPI_MASK               (0x7 << 0)
66 #define USB3_GEN2_SET1_G2_RX_SELMUPI_SHIFT              0
67 #define USB3_GEN2_SET1_G2_RX_SELMUPF_MASK               (0x7 << 3)
68 #define USB3_GEN2_SET1_G2_RX_SELMUPF_SHIFT              3
69 #define USB3_GEN2_SET1_G2_RX_SELMUFI_MASK               (0x3 << 6)
70 #define USB3_GEN2_SET1_G2_RX_SELMUFI_SHIFT              6
71 #define USB3_GEN2_SET1_G2_RX_SELMUFF_MASK               (0x3 << 8)
72 #define USB3_GEN2_SET1_G2_RX_SELMUFF_SHIFT              8
73
74 #define USB3_DIGITAL_LOOPBACK_EN_SEL_BITS_MASK          (0x3 << 10)
75 #define USB3_DIGITAL_LOOPBACK_EN_SEL_BITS_SHIFT         10
76
77 #define USB3_IMPEDANCE_CALI_CTRL_IMP_CAL_THR_MASK       (0x7 << 12)
78 #define USB3_IMPEDANCE_CALI_CTRL_IMP_CAL_THR_SHIFT      12
79
80 #define USB3_IMPEDANCE_TX_SSC_SSC_AMP_MASK              (0x3F << 0)
81 #define USB3_IMPEDANCE_TX_SSC_SSC_AMP_SHIFT             0
82
83 #define USB3_PHY_ISOLATION_MODE_PHY_GEN_RX_MASK         0xF
84 #define USB3_PHY_ISOLATION_MODE_PHY_GEN_RX_SHIFT        0
85 #define USB3_PHY_ISOLATION_MODE_PHY_GEN_TX_MASK         (0xF << 4)
86 #define USB3_PHY_ISOLATION_MODE_PHY_GEN_TX_SHIFT        4
87 #define USB3_PHY_ISOLATION_MODE_TX_DRV_IDLE_MASK        (0x1 << 8)
88
89 #define USB3_TXDETRX_VTHSEL_MASK                        (0x3 << 4)
90 #define USB3_TXDETRX_VTHSEL_SHIFT                       4
91
92 #define USB3_TX_EMPPH_AMP_MASK                          (0xF << 0)
93 #define USB3_TX_EMPPH_AMP_SHIFT                         0
94 #define USB3_TX_EMPPH_EN_MASK                           (0x1 << 6)
95 #define USB3_TX_EMPPH_EN_SHIFT                          6
96 #define USB3_TX_EMPPH_AMP_FORCE_MASK                    (0x1 << 7)
97 #define USB3_TX_EMPPH_AMP_FORCE_SHIFT                   7
98 #define USB3_TX_EMPPH_PAR1_MASK                         (0x1F << 8)
99 #define USB3_TX_EMPPH_PAR1_SHIFT                        8
100 #define USB3_TX_EMPPH_PAR2_MASK                         (0x1 << 13)
101 #define USB3_TX_EMPPH_PAR2_SHIFT                        13
102
103 #define USB3_PIPE_SM_CTRL_PHY_INIT_DONE                 15
104
105 #endif /* __MV_U3D_PHY_H */