drivers/usb/otg/twl4030-usb.c

   1 /*
   2  * twl4030_usb - TWL4030 USB transceiver, talking to OMAP OTG controller
   3  *
   4  * Copyright (C) 2004-2007 Texas Instruments
   5  * Copyright (C) 2008 Nokia Corporation
   6  * Contact: Felipe Balbi <felipe.balbi@nokia.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  *
  22  * Current status:
  23  *      - HS USB ULPI mode works.
  24  *      - 3-pin mode support may be added in future.
  25  */
  26
  27 #include <linux/module.h>
  28 #include <linux/init.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/platform_device.h>
  31 #include <linux/spinlock.h>
  32 #include <linux/workqueue.h>
  33 #include <linux/io.h>
  34 #include <linux/delay.h>
  35 #include <linux/usb/otg.h>
  36 #include <linux/usb/ulpi.h>
  37 #include <linux/i2c/twl.h>
  38 #include <linux/regulator/consumer.h>
  39 #include <linux/err.h>
  40 #include <linux/notifier.h>
  41 #include <linux/slab.h>
  42
  43 /* Register defines */
  44
  45 #define MCPC_CTRL                       0x30
  46 #define MCPC_CTRL_RTSOL                 (1 << 7)
  47 #define MCPC_CTRL_EXTSWR                (1 << 6)
  48 #define MCPC_CTRL_EXTSWC                (1 << 5)
  49 #define MCPC_CTRL_VOICESW               (1 << 4)
  50 #define MCPC_CTRL_OUT64K                (1 << 3)
  51 #define MCPC_CTRL_RTSCTSSW              (1 << 2)
  52 #define MCPC_CTRL_HS_UART               (1 << 0)
  53
  54 #define MCPC_IO_CTRL                    0x33
  55 #define MCPC_IO_CTRL_MICBIASEN          (1 << 5)
  56 #define MCPC_IO_CTRL_CTS_NPU            (1 << 4)
  57 #define MCPC_IO_CTRL_RXD_PU             (1 << 3)
  58 #define MCPC_IO_CTRL_TXDTYP             (1 << 2)
  59 #define MCPC_IO_CTRL_CTSTYP             (1 << 1)
  60 #define MCPC_IO_CTRL_RTSTYP             (1 << 0)
  61
  62 #define MCPC_CTRL2                      0x36
  63 #define MCPC_CTRL2_MCPC_CK_EN           (1 << 0)
  64
  65 #define OTHER_FUNC_CTRL                 0x80
  66 #define OTHER_FUNC_CTRL_BDIS_ACON_EN    (1 << 4)
  67 #define OTHER_FUNC_CTRL_FIVEWIRE_MODE   (1 << 2)
  68
  69 #define OTHER_IFC_CTRL                  0x83
  70 #define OTHER_IFC_CTRL_OE_INT_EN        (1 << 6)
  71 #define OTHER_IFC_CTRL_CEA2011_MODE     (1 << 5)
  72 #define OTHER_IFC_CTRL_FSLSSERIALMODE_4PIN      (1 << 4)
  73 #define OTHER_IFC_CTRL_HIZ_ULPI_60MHZ_OUT       (1 << 3)
  74 #define OTHER_IFC_CTRL_HIZ_ULPI         (1 << 2)
  75 #define OTHER_IFC_CTRL_ALT_INT_REROUTE  (1 << 0)
  76
  77 #define OTHER_INT_EN_RISE               0x86
  78 #define OTHER_INT_EN_FALL               0x89
  79 #define OTHER_INT_STS                   0x8C
  80 #define OTHER_INT_LATCH                 0x8D
  81 #define OTHER_INT_VB_SESS_VLD           (1 << 7)
  82 #define OTHER_INT_DM_HI                 (1 << 6) /* not valid for "latch" reg */
  83 #define OTHER_INT_DP_HI                 (1 << 5) /* not valid for "latch" reg */
  84 #define OTHER_INT_BDIS_ACON             (1 << 3) /* not valid for "fall" regs */
  85 #define OTHER_INT_MANU                  (1 << 1)
  86 #define OTHER_INT_ABNORMAL_STRESS       (1 << 0)
  87
  88 #define ID_STATUS                       0x96
  89 #define ID_RES_FLOAT                    (1 << 4)
  90 #define ID_RES_440K                     (1 << 3)
  91 #define ID_RES_200K                     (1 << 2)
  92 #define ID_RES_102K                     (1 << 1)
  93 #define ID_RES_GND                      (1 << 0)
  94
  95 #define POWER_CTRL                      0xAC
  96 #define POWER_CTRL_OTG_ENAB             (1 << 5)
  97
  98 #define OTHER_IFC_CTRL2                 0xAF
  99 #define OTHER_IFC_CTRL2_ULPI_STP_LOW    (1 << 4)
 100 #define OTHER_IFC_CTRL2_ULPI_TXEN_POL   (1 << 3)
 101 #define OTHER_IFC_CTRL2_ULPI_4PIN_2430  (1 << 2)
 102 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_MASK     (3 << 0) /* bits 0 and 1 */
 103 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT1N    (0 << 0)
 104 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT2N    (1 << 0)
 105
 106 #define REG_CTRL_EN                     0xB2
 107 #define REG_CTRL_ERROR                  0xB5
 108 #define ULPI_I2C_CONFLICT_INTEN         (1 << 0)
 109
 110 #define OTHER_FUNC_CTRL2                0xB8
 111 #define OTHER_FUNC_CTRL2_VBAT_TIMER_EN  (1 << 0)
 112
 113 /* following registers do not have separate _clr and _set registers */
 114 #define VBUS_DEBOUNCE                   0xC0
 115 #define ID_DEBOUNCE                     0xC1
 116 #define VBAT_TIMER                      0xD3
 117 #define PHY_PWR_CTRL                    0xFD
 118 #define PHY_PWR_PHYPWD                  (1 << 0)
 119 #define PHY_CLK_CTRL                    0xFE
 120 #define PHY_CLK_CTRL_CLOCKGATING_EN     (1 << 2)
 121 #define PHY_CLK_CTRL_CLK32K_EN          (1 << 1)
 122 #define REQ_PHY_DPLL_CLK                (1 << 0)
 123 #define PHY_CLK_CTRL_STS                0xFF
 124 #define PHY_DPLL_CLK                    (1 << 0)
 125
 126 /* In module TWL4030_MODULE_PM_MASTER */
 127 #define STS_HW_CONDITIONS               0x0F
 128
 129 /* In module TWL4030_MODULE_PM_RECEIVER */
 130 #define VUSB_DEDICATED1                 0x7D
 131 #define VUSB_DEDICATED2                 0x7E
 132 #define VUSB1V5_DEV_GRP                 0x71
 133 #define VUSB1V5_TYPE                    0x72
 134 #define VUSB1V5_REMAP                   0x73
 135 #define VUSB1V8_DEV_GRP                 0x74
 136 #define VUSB1V8_TYPE                    0x75
 137 #define VUSB1V8_REMAP                   0x76
 138 #define VUSB3V1_DEV_GRP                 0x77
 139 #define VUSB3V1_TYPE                    0x78
 140 #define VUSB3V1_REMAP                   0x79
 141
 142 /* In module TWL4030_MODULE_INTBR */
 143 #define PMBR1                           0x0D
 144 #define GPIO_USB_4PIN_ULPI_2430C        (3 << 0)
 145
 146 struct twl4030_usb {
 147         struct otg_transceiver  otg;
 148         struct device           *dev;
 149
 150         /* TWL4030 internal USB regulator supplies */
 151         struct regulator        *usb1v5;
 152         struct regulator        *usb1v8;
 153         struct regulator        *usb3v1;
 154
 155         /* for vbus reporting with irqs disabled */
 156         spinlock_t              lock;
 157
 158         /* pin configuration */
 159         enum twl4030_usb_mode   usb_mode;
 160
 161         int                     irq;
 162         u8                      linkstat;
 163         bool                    vbus_supplied;
 164         u8                      asleep;
 165         bool                    irq_enabled;
 166 };
 167
 168 /* internal define on top of container_of */
 169 #define xceiv_to_twl(x)         container_of((x), struct twl4030_usb, otg)
 170
 171 /*-------------------------------------------------------------------------*/
 172
 173 static int twl4030_i2c_write_u8_verify(struct twl4030_usb *twl,
 174                 u8 module, u8 data, u8 address)
 175 {
 176         u8 check;
 177
 178         if ((twl_i2c_write_u8(module, data, address) >= 0) &&
 179             (twl_i2c_read_u8(module, &check, address) >= 0) &&
 180                                                 (check == data))
 181                 return 0;
 182         dev_dbg(twl->dev, "Write%d[%d,0x%x] wrote %02x but read %02x\n",
 183                         1, module, address, check, data);
 184
 185         /* Failed once: Try again */
 186         if ((twl_i2c_write_u8(module, data, address) >= 0) &&
 187             (twl_i2c_read_u8(module, &check, address) >= 0) &&
 188                                                 (check == data))
 189                 return 0;
 190         dev_dbg(twl->dev, "Write%d[%d,0x%x] wrote %02x but read %02x\n",
 191                         2, module, address, check, data);
 192
 193         /* Failed again: Return error */
 194         return -EBUSY;
 195 }
 196
 197 #define twl4030_usb_write_verify(twl, address, data)    \
 198         twl4030_i2c_write_u8_verify(twl, TWL4030_MODULE_USB, (data), (address))
 199
 200 static inline int twl4030_usb_write(struct twl4030_usb *twl,
 201                 u8 address, u8 data)
 202 {
 203         int ret = 0;
 204
 205         ret = twl_i2c_write_u8(TWL4030_MODULE_USB, data, address);
 206         if (ret < 0)
 207                 dev_dbg(twl->dev,
 208                         "TWL4030:USB:Write[0x%x] Error %d\n", address, ret);
 209         return ret;
 210 }
 211
 212 static inline int twl4030_readb(struct twl4030_usb *twl, u8 module, u8 address)
 213 {
 214         u8 data;
 215         int ret = 0;
 216
 217         ret = twl_i2c_read_u8(module, &data, address);
 218         if (ret >= 0)
 219                 ret = data;
 220         else
 221                 dev_dbg(twl->dev,
 222                         "TWL4030:readb[0x%x,0x%x] Error %d\n",
 223                                         module, address, ret);
 224
 225         return ret;
 226 }
 227
 228 static inline int twl4030_usb_read(struct twl4030_usb *twl, u8 address)
 229 {
 230         return twl4030_readb(twl, TWL4030_MODULE_USB, address);
 231 }
 232
 233 /*-------------------------------------------------------------------------*/
 234
 235 static inline int
 236 twl4030_usb_set_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
 237 {
 238         return twl4030_usb_write(twl, ULPI_SET(reg), bits);
 239 }
 240
 241 static inline int
 242 twl4030_usb_clear_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
 243 {
 244         return twl4030_usb_write(twl, ULPI_CLR(reg), bits);
 245 }
 246
 247 /*-------------------------------------------------------------------------*/
 248
 249 static bool twl4030_is_driving_vbus(struct twl4030_usb *twl)
 250 {
 251         int ret;
 252
 253         ret = twl4030_usb_read(twl, PHY_CLK_CTRL_STS);
 254         if (ret < 0 || !(ret & PHY_DPLL_CLK))
 255                 /*
 256                  * if clocks are off, registers are not updated,
 257                  * but we can assume we don't drive VBUS in this case
 258                  */
 259                 return false;
 260
 261         ret = twl4030_usb_read(twl, ULPI_OTG_CTRL);
 262         if (ret < 0)
 263                 return false;
 264
 265         return (ret & (ULPI_OTG_DRVVBUS | ULPI_OTG_CHRGVBUS)) ? true : false;
 266 }
 267
 268 static enum usb_xceiv_events twl4030_usb_linkstat(struct twl4030_usb *twl)
 269 {
 270         int     status;
 271         int     linkstat = USB_EVENT_NONE;
 272         bool    driving_vbus = false;
 273
 274         twl->vbus_supplied = false;
 275
 276         /*
 277          * For ID/VBUS sensing, see manual section 15.4.8 ...
 278          * except when using only battery backup power, two
 279          * comparators produce VBUS_PRES and ID_PRES signals,
 280          * which don't match docs elsewhere.  But ... BIT(7)
 281          * and BIT(2) of STS_HW_CONDITIONS, respectively, do
 282          * seem to match up.  If either is true the USB_PRES
 283          * signal is active, the OTG module is activated, and
 284          * its interrupt may be raised (may wake the system).
 285          */
 286         status = twl4030_readb(twl, TWL4030_MODULE_PM_MASTER,
 287                         STS_HW_CONDITIONS);
 288         if (status < 0)
 289                 dev_err(twl->dev, "USB link status err %d\n", status);
 290         else if (status & (BIT(7) | BIT(2))) {
 291                 if (status & BIT(7)) {
 292                         driving_vbus = twl4030_is_driving_vbus(twl);
 293                         if (driving_vbus)
 294                                 status &= ~BIT(7);
 295                 }
 296
 297                 if (status & BIT(2))
 298                         linkstat = USB_EVENT_ID;
 299                 else if (status & BIT(7)) {
 300                         linkstat = USB_EVENT_VBUS;
 301                         twl->vbus_supplied = true;
 302                 }
 303         }
 304
 305         dev_dbg(twl->dev, "HW_CONDITIONS 0x%02x; link %d, driving_vbus %d\n",
 306                         status, linkstat, driving_vbus);
 307
 308         if (twl->otg.last_event == linkstat)
 309                 return linkstat;
 310
 311         twl->otg.last_event = linkstat;
 312
 313         /* REVISIT this assumes host and peripheral controllers
 314          * are registered, and that both are active...
 315          */
 316
 317         spin_lock_irq(&twl->lock);
 318         twl->linkstat = linkstat;
 319         if (linkstat == USB_EVENT_ID) {
 320                 twl->otg.default_a = true;
 321                 twl->otg.state = OTG_STATE_A_IDLE;
 322         } else {
 323                 twl->otg.default_a = false;
 324                 twl->otg.state = OTG_STATE_B_IDLE;
 325         }
 326         spin_unlock_irq(&twl->lock);
 327
 328         return linkstat;
 329 }
 330
 331 static void twl4030_usb_set_mode(struct twl4030_usb *twl, int mode)
 332 {
 333         twl->usb_mode = mode;
 334
 335         switch (mode) {
 336         case T2_USB_MODE_ULPI:
 337                 twl4030_usb_clear_bits(twl, ULPI_IFC_CTRL,
 338                                         ULPI_IFC_CTRL_CARKITMODE);
 339                 twl4030_usb_set_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
 340                 twl4030_usb_clear_bits(twl, ULPI_FUNC_CTRL,
 341                                         ULPI_FUNC_CTRL_XCVRSEL_MASK |
 342                                         ULPI_FUNC_CTRL_OPMODE_MASK);
 343                 break;
 344         case -1:
 345                 /* FIXME: power on defaults */
 346                 break;
 347         default:
 348                 dev_err(twl->dev, "unsupported T2 transceiver mode %d\n",
 349                                 mode);
 350                 break;
 351         };
 352 }
 353
 354 static void twl4030_i2c_access(struct twl4030_usb *twl, int on)
 355 {
 356         unsigned long timeout;
 357         int val = twl4030_usb_read(twl, PHY_CLK_CTRL);
 358
 359         if (val >= 0) {
 360                 if (on) {
 361                         /* enable DPLL to access PHY registers over I2C */
 362                         val |= REQ_PHY_DPLL_CLK;
 363                         WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
 364                                                 (u8)val) < 0);
 365
 366                         timeout = jiffies + HZ;
 367                         while (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
 368                                                         PHY_DPLL_CLK)
 369                                 && time_before(jiffies, timeout))
 370                                         udelay(10);
 371                         if (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
 372                                                         PHY_DPLL_CLK))
 373                                 dev_err(twl->dev, "Timeout setting T2 HSUSB "
 374                                                 "PHY DPLL clock\n");
 375                 } else {
 376                         /* let ULPI control the DPLL clock */
 377                         val &= ~REQ_PHY_DPLL_CLK;
 378                         WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
 379                                                 (u8)val) < 0);
 380                 }
 381         }
 382 }
 383
 384 static void __twl4030_phy_power(struct twl4030_usb *twl, int on)
 385 {
 386         u8 pwr = twl4030_usb_read(twl, PHY_PWR_CTRL);
 387
 388         if (on)
 389                 pwr &= ~PHY_PWR_PHYPWD;
 390         else
 391                 pwr |= PHY_PWR_PHYPWD;
 392
 393         WARN_ON(twl4030_usb_write_verify(twl, PHY_PWR_CTRL, pwr) < 0);
 394 }
 395
 396 static void twl4030_phy_power(struct twl4030_usb *twl, int on)
 397 {
 398         if (on) {
 399                 regulator_enable(twl->usb3v1);
 400                 regulator_enable(twl->usb1v8);
 401                 /*
 402                  * Disabling usb3v1 regulator (= writing 0 to VUSB3V1_DEV_GRP
 403                  * in twl4030) resets the VUSB_DEDICATED2 register. This reset
 404                  * enables VUSB3V1_SLEEP bit that remaps usb3v1 ACTIVE state to
 405                  * SLEEP. We work around this by clearing the bit after usv3v1
 406                  * is re-activated. This ensures that VUSB3V1 is really active.
 407                  */
 408                 twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0,
 409                                                         VUSB_DEDICATED2);
 410                 regulator_enable(twl->usb1v5);
 411                 __twl4030_phy_power(twl, 1);
 412                 twl4030_usb_write(twl, PHY_CLK_CTRL,
 413                                   twl4030_usb_read(twl, PHY_CLK_CTRL) |
 414                                         (PHY_CLK_CTRL_CLOCKGATING_EN |
 415                                                 PHY_CLK_CTRL_CLK32K_EN));
 416         } else {
 417                 __twl4030_phy_power(twl, 0);
 418                 regulator_disable(twl->usb1v5);
 419                 regulator_disable(twl->usb1v8);
 420                 regulator_disable(twl->usb3v1);
 421         }
 422 }
 423
 424 static void twl4030_phy_suspend(struct twl4030_usb *twl, int controller_off)
 425 {
 426         if (twl->asleep)
 427                 return;
 428
 429         twl4030_phy_power(twl, 0);
 430         twl->asleep = 1;
 431         dev_dbg(twl->dev, "%s\n", __func__);
 432 }
 433
 434 static void __twl4030_phy_resume(struct twl4030_usb *twl)
 435 {
 436         twl4030_phy_power(twl, 1);
 437         twl4030_i2c_access(twl, 1);
 438         twl4030_usb_set_mode(twl, twl->usb_mode);
 439         if (twl->usb_mode == T2_USB_MODE_ULPI)
 440                 twl4030_i2c_access(twl, 0);
 441 }
 442
 443 static void twl4030_phy_resume(struct twl4030_usb *twl)
 444 {
 445         if (!twl->asleep)
 446                 return;
 447         __twl4030_phy_resume(twl);
 448         twl->asleep = 0;
 449         dev_dbg(twl->dev, "%s\n", __func__);
 450 }
 451
 452 static int twl4030_usb_ldo_init(struct twl4030_usb *twl)
 453 {
 454         /* Enable writing to power configuration registers */
 455         twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER,
 456                         TWL4030_PM_MASTER_KEY_CFG1,
 457                         TWL4030_PM_MASTER_PROTECT_KEY);
 458
 459         twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER,
 460                         TWL4030_PM_MASTER_KEY_CFG2,
 461                         TWL4030_PM_MASTER_PROTECT_KEY);
 462
 463         /* Keep VUSB3V1 LDO in sleep state until VBUS/ID change detected*/
 464         /*twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);*/
 465
 466         /* input to VUSB3V1 LDO is from VBAT, not VBUS */
 467         twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x14, VUSB_DEDICATED1);
 468
 469         /* Initialize 3.1V regulator */
 470         twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB3V1_DEV_GRP);
 471
 472         twl->usb3v1 = regulator_get(twl->dev, "usb3v1");
 473         if (IS_ERR(twl->usb3v1))
 474                 return -ENODEV;
 475
 476         twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB3V1_TYPE);
 477
 478         /* Initialize 1.5V regulator */
 479         twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V5_DEV_GRP);
 480
 481         twl->usb1v5 = regulator_get(twl->dev, "usb1v5");
 482         if (IS_ERR(twl->usb1v5))
 483                 goto fail1;
 484
 485         twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V5_TYPE);
 486
 487         /* Initialize 1.8V regulator */
 488         twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V8_DEV_GRP);
 489
 490         twl->usb1v8 = regulator_get(twl->dev, "usb1v8");
 491         if (IS_ERR(twl->usb1v8))
 492                 goto fail2;
 493
 494         twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V8_TYPE);
 495
 496         /* disable access to power configuration registers */
 497         twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0,
 498                         TWL4030_PM_MASTER_PROTECT_KEY);
 499
 500         return 0;
 501
 502 fail2:
 503         regulator_put(twl->usb1v5);
 504         twl->usb1v5 = NULL;
 505 fail1:
 506         regulator_put(twl->usb3v1);
 507         twl->usb3v1 = NULL;
 508         return -ENODEV;
 509 }
 510
 511 static ssize_t twl4030_usb_vbus_show(struct device *dev,
 512                 struct device_attribute *attr, char *buf)
 513 {
 514         struct twl4030_usb *twl = dev_get_drvdata(dev);
 515         unsigned long flags;
 516         int ret = -EINVAL;
 517
 518         spin_lock_irqsave(&twl->lock, flags);
 519         ret = sprintf(buf, "%s\n",
 520                         twl->vbus_supplied ? "on" : "off");
 521         spin_unlock_irqrestore(&twl->lock, flags);
 522
 523         return ret;
 524 }
 525 static DEVICE_ATTR(vbus, 0444, twl4030_usb_vbus_show, NULL);
 526
 527 static ssize_t twl4030_usb_id_show(struct device *dev,
 528                 struct device_attribute *attr, char *buf)
 529 {
 530         int ret;
 531         int n = 0;
 532         struct twl4030_usb *twl = dev_get_drvdata(dev);
 533         twl4030_i2c_access(twl, 1);
 534         ret = twl4030_usb_read(twl, ULPI_OTG_CTRL);
 535         if ((ret < 0) || (!(ret & ULPI_OTG_ID_PULLUP))) {
 536                 /*
 537                  * enable ID pullup so that the id pin state can be measured,
 538                  * seems to be disabled sometimes for some reasons
 539                  */
 540                 dev_dbg(dev, "ULPI_OTG_ID_PULLUP not set (%x)\n", ret);
 541                 twl4030_usb_set_bits(twl, ULPI_OTG_CTRL, ULPI_OTG_ID_PULLUP);
 542                 mdelay(100);
 543         }
 544         ret = twl4030_usb_read(twl, ID_STATUS);
 545         twl4030_i2c_access(twl, 0);
 546         if (ret < 0)
 547                 return ret;
 548         if (ret & ID_RES_FLOAT)
 549                 n = scnprintf(buf, PAGE_SIZE, "%s\n", "floating");
 550         else if (ret & ID_RES_440K)
 551                 n = scnprintf(buf, PAGE_SIZE, "%s\n", "440k");
 552         else if (ret & ID_RES_200K)
 553                 n = scnprintf(buf, PAGE_SIZE, "%s\n", "200k");
 554         else if (ret & ID_RES_102K)
 555                 n = scnprintf(buf, PAGE_SIZE, "%s\n", "102k");
 556         else if (ret & ID_RES_GND)
 557                 n = scnprintf(buf, PAGE_SIZE, "%s\n", "GND");
 558         else
 559                 n = scnprintf(buf, PAGE_SIZE, "unknown: id=0x%x\n", ret);
 560         return n;
 561 }
 562 static DEVICE_ATTR(id, 0444, twl4030_usb_id_show, NULL);
 563
 564 static irqreturn_t twl4030_usb_irq(int irq, void *_twl)
 565 {
 566         struct twl4030_usb *twl = _twl;
 567         int status_old = twl->otg.last_event;
 568         int status;
 569
 570         status = twl4030_usb_linkstat(twl);
 571         if (status >= 0) {
 572                 /* FIXME add a set_power() method so that B-devices can
 573                  * configure the charger appropriately.  It's not always
 574                  * correct to consume VBUS power, and how much current to
 575                  * consume is a function of the USB configuration chosen
 576                  * by the host.
 577                  *
 578                  * REVISIT usb_gadget_vbus_connect(...) as needed, ditto
 579                  * its disconnect() sibling, when changing to/from the
 580                  * USB_LINK_VBUS state.  musb_hdrc won't care until it
 581                  * starts to handle softconnect right.
 582                  */
 583                 if (status != status_old)
 584                         atomic_notifier_call_chain(&twl->otg.notifier, status,
 585                                 twl->otg.gadget);
 586         }
 587         sysfs_notify(&twl->dev->kobj, NULL, "vbus");
 588
 589         return IRQ_HANDLED;
 590 }
 591
 592 static void twl4030_usb_phy_init(struct twl4030_usb *twl)
 593 {
 594         int status;
 595
 596         /*
 597          * Start in sleep state, we'll get otg.set_suspend(false) call
 598          * and power up when musb runtime_pm enable kicks in.
 599          */
 600         __twl4030_phy_power(twl, 0);
 601         twl->asleep = 1;
 602
 603         status = twl4030_usb_linkstat(twl);
 604         if (status >= 0 && status != USB_EVENT_NONE)
 605                 atomic_notifier_call_chain(&twl->otg.notifier, status,
 606                         twl->otg.gadget);
 607
 608         sysfs_notify(&twl->dev->kobj, NULL, "vbus");
 609 }
 610
 611 static int twl4030_set_suspend(struct otg_transceiver *x, int suspend)
 612 {
 613         struct twl4030_usb *twl = xceiv_to_twl(x);
 614
 615         if (suspend)
 616                 twl4030_phy_suspend(twl, 1);
 617         else
 618                 twl4030_phy_resume(twl);
 619
 620         return 0;
 621 }
 622
 623 static int twl4030_set_peripheral(struct otg_transceiver *x,
 624                 struct usb_gadget *gadget)
 625 {
 626         struct twl4030_usb *twl;
 627
 628         if (!x)
 629                 return -ENODEV;
 630
 631         twl = xceiv_to_twl(x);
 632         twl->otg.gadget = gadget;
 633         if (!gadget)
 634                 twl->otg.state = OTG_STATE_UNDEFINED;
 635
 636         return 0;
 637 }
 638
 639 static int twl4030_set_host(struct otg_transceiver *x, struct usb_bus *host)
 640 {
 641         struct twl4030_usb *twl;
 642
 643         if (!x)
 644                 return -ENODEV;
 645
 646         twl = xceiv_to_twl(x);
 647         twl->otg.host = host;
 648         if (!host)
 649                 twl->otg.state = OTG_STATE_UNDEFINED;
 650
 651         return 0;
 652 }
 653
 654 static int __devinit twl4030_usb_probe(struct platform_device *pdev)
 655 {
 656         struct twl4030_usb_data *pdata = pdev->dev.platform_data;
 657         struct twl4030_usb      *twl;
 658         int                     status, err;
 659
 660         if (!pdata) {
 661                 dev_dbg(&pdev->dev, "platform_data not available\n");
 662                 return -EINVAL;
 663         }
 664
 665         twl = kzalloc(sizeof *twl, GFP_KERNEL);
 666         if (!twl)
 667                 return -ENOMEM;
 668
 669         twl->dev                = &pdev->dev;
 670         twl->irq                = platform_get_irq(pdev, 0);
 671         twl->otg.dev            = twl->dev;
 672         twl->otg.label          = "twl4030";
 673         twl->otg.set_host       = twl4030_set_host;
 674         twl->otg.set_peripheral = twl4030_set_peripheral;
 675         twl->otg.set_suspend    = twl4030_set_suspend;
 676         twl->usb_mode           = pdata->usb_mode;
 677         twl->vbus_supplied      = false;
 678         twl->asleep = 1;
 679
 680         /* init spinlock for workqueue */
 681         spin_lock_init(&twl->lock);
 682
 683         err = twl4030_usb_ldo_init(twl);
 684         if (err) {
 685                 dev_err(&pdev->dev, "ldo init failed\n");
 686                 kfree(twl);
 687                 return err;
 688         }
 689         otg_set_transceiver(&twl->otg);
 690
 691         platform_set_drvdata(pdev, twl);
 692         if (device_create_file(&pdev->dev, &dev_attr_vbus))
 693                 dev_warn(&pdev->dev, "could not create sysfs file\n");
 694         if (device_create_file(&pdev->dev, &dev_attr_id))
 695                 dev_warn(&pdev->dev, "could not create sysfs file\n");
 696
 697         ATOMIC_INIT_NOTIFIER_HEAD(&twl->otg.notifier);
 698
 699         /* Our job is to use irqs and status from the power module
 700          * to keep the transceiver disabled when nothing's connected.
 701          *
 702          * FIXME we actually shouldn't start enabling it until the
 703          * USB controller drivers have said they're ready, by calling
 704          * set_host() and/or set_peripheral() ... OTG_capable boards
 705          * need both handles, otherwise just one suffices.
 706          */
 707         twl->irq_enabled = true;
 708         status = request_threaded_irq(twl->irq, NULL, twl4030_usb_irq,
 709                         IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
 710                         "twl4030_usb", twl);
 711         if (status < 0) {
 712                 dev_dbg(&pdev->dev, "can't get IRQ %d, err %d\n",
 713                         twl->irq, status);
 714                 kfree(twl);
 715                 return status;
 716         }
 717
 718         twl4030_usb_phy_init(twl);
 719
 720         dev_info(&pdev->dev, "Initialized TWL4030 USB module\n");
 721         return 0;
 722 }
 723
 724 static int __exit twl4030_usb_remove(struct platform_device *pdev)
 725 {
 726         struct twl4030_usb *twl = platform_get_drvdata(pdev);
 727         int val;
 728
 729         free_irq(twl->irq, twl);
 730         device_remove_file(twl->dev, &dev_attr_id);
 731         device_remove_file(twl->dev, &dev_attr_vbus);
 732
 733         /* set transceiver mode to power on defaults */
 734         twl4030_usb_set_mode(twl, -1);
 735
 736         /* autogate 60MHz ULPI clock,
 737          * clear dpll clock request for i2c access,
 738          * disable 32KHz
 739          */
 740         val = twl4030_usb_read(twl, PHY_CLK_CTRL);
 741         if (val >= 0) {
 742                 val |= PHY_CLK_CTRL_CLOCKGATING_EN;
 743                 val &= ~(PHY_CLK_CTRL_CLK32K_EN | REQ_PHY_DPLL_CLK);
 744                 twl4030_usb_write(twl, PHY_CLK_CTRL, (u8)val);
 745         }
 746
 747         /* disable complete OTG block */
 748         twl4030_usb_clear_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
 749
 750         if (!twl->asleep)
 751                 twl4030_phy_power(twl, 0);
 752         regulator_put(twl->usb1v5);
 753         regulator_put(twl->usb1v8);
 754         regulator_put(twl->usb3v1);
 755
 756         kfree(twl);
 757
 758         return 0;
 759 }
 760
 761 static struct platform_driver twl4030_usb_driver = {
 762         .probe          = twl4030_usb_probe,
 763         .remove         = __exit_p(twl4030_usb_remove),
 764         .driver         = {
 765                 .name   = "twl4030_usb",
 766                 .owner  = THIS_MODULE,
 767         },
 768 };
 769
 770 static int __init twl4030_usb_init(void)
 771 {
 772         return platform_driver_register(&twl4030_usb_driver);
 773 }
 774 subsys_initcall(twl4030_usb_init);
 775
 776 static void __exit twl4030_usb_exit(void)
 777 {
 778         platform_driver_unregister(&twl4030_usb_driver);
 779 }
 780 module_exit(twl4030_usb_exit);
 781
 782 MODULE_ALIAS("platform:twl4030_usb");
 783 MODULE_AUTHOR("Texas Instruments, Inc, Nokia Corporation");
 784 MODULE_DESCRIPTION("TWL4030 USB transceiver driver");
 785 MODULE_LICENSE("GPL");