2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
32 #define DRIVER_AUTHOR "Sarah Sharp"
33 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
35 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
36 static int link_quirk;
37 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
38 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
40 /* TODO: copied from ehci-hcd.c - can this be refactored? */
42 * handshake - spin reading hc until handshake completes or fails
43 * @ptr: address of hc register to be read
44 * @mask: bits to look at in result of read
45 * @done: value of those bits when handshake succeeds
46 * @usec: timeout in microseconds
48 * Returns negative errno, or zero on success
50 * Success happens when the "mask" bits have the specified value (hardware
51 * handshake done). There are two failure modes: "usec" have passed (major
52 * hardware flakeout), or the register reads as all-ones (hardware removed).
54 static int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
55 u32 mask, u32 done, int usec)
60 result = xhci_readl(xhci, ptr);
61 if (result == ~(u32)0) /* card removed */
73 * Disable interrupts and begin the xHCI halting process.
75 void xhci_quiesce(struct xhci_hcd *xhci)
82 halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
86 cmd = xhci_readl(xhci, &xhci->op_regs->command);
88 xhci_writel(xhci, cmd, &xhci->op_regs->command);
92 * Force HC into halt state.
94 * Disable any IRQs and clear the run/stop bit.
95 * HC will complete any current and actively pipelined transactions, and
96 * should halt within 16 ms of the run/stop bit being cleared.
97 * Read HC Halted bit in the status register to see when the HC is finished.
99 int xhci_halt(struct xhci_hcd *xhci)
102 xhci_dbg(xhci, "// Halt the HC\n");
105 ret = handshake(xhci, &xhci->op_regs->status,
106 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
108 xhci->xhc_state |= XHCI_STATE_HALTED;
113 * Set the run bit and wait for the host to be running.
115 static int xhci_start(struct xhci_hcd *xhci)
120 temp = xhci_readl(xhci, &xhci->op_regs->command);
122 xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
124 xhci_writel(xhci, temp, &xhci->op_regs->command);
127 * Wait for the HCHalted Status bit to be 0 to indicate the host is
130 ret = handshake(xhci, &xhci->op_regs->status,
131 STS_HALT, 0, XHCI_MAX_HALT_USEC);
132 if (ret == -ETIMEDOUT)
133 xhci_err(xhci, "Host took too long to start, "
134 "waited %u microseconds.\n",
137 xhci->xhc_state &= ~XHCI_STATE_HALTED;
144 * This resets pipelines, timers, counters, state machines, etc.
145 * Transactions will be terminated immediately, and operational registers
146 * will be set to their defaults.
148 int xhci_reset(struct xhci_hcd *xhci)
154 state = xhci_readl(xhci, &xhci->op_regs->status);
155 if ((state & STS_HALT) == 0) {
156 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
160 xhci_dbg(xhci, "// Reset the HC\n");
161 command = xhci_readl(xhci, &xhci->op_regs->command);
162 command |= CMD_RESET;
163 xhci_writel(xhci, command, &xhci->op_regs->command);
165 ret = handshake(xhci, &xhci->op_regs->command,
166 CMD_RESET, 0, 250 * 1000);
170 xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n");
172 * xHCI cannot write to any doorbells or operational registers other
173 * than status until the "Controller Not Ready" flag is cleared.
175 return handshake(xhci, &xhci->op_regs->status, STS_CNR, 0, 250 * 1000);
180 * free all IRQs request
182 static void xhci_free_irq(struct xhci_hcd *xhci)
185 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
187 /* return if using legacy interrupt */
188 if (xhci_to_hcd(xhci)->irq >= 0)
191 if (xhci->msix_entries) {
192 for (i = 0; i < xhci->msix_count; i++)
193 if (xhci->msix_entries[i].vector)
194 free_irq(xhci->msix_entries[i].vector,
196 } else if (pdev->irq >= 0)
197 free_irq(pdev->irq, xhci_to_hcd(xhci));
205 static int xhci_setup_msi(struct xhci_hcd *xhci)
208 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
210 ret = pci_enable_msi(pdev);
212 xhci_err(xhci, "failed to allocate MSI entry\n");
216 ret = request_irq(pdev->irq, (irq_handler_t)xhci_msi_irq,
217 0, "xhci_hcd", xhci_to_hcd(xhci));
219 xhci_err(xhci, "disable MSI interrupt\n");
220 pci_disable_msi(pdev);
229 static int xhci_setup_msix(struct xhci_hcd *xhci)
232 struct usb_hcd *hcd = xhci_to_hcd(xhci);
233 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
236 * calculate number of msi-x vectors supported.
237 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
238 * with max number of interrupters based on the xhci HCSPARAMS1.
239 * - num_online_cpus: maximum msi-x vectors per CPUs core.
240 * Add additional 1 vector to ensure always available interrupt.
242 xhci->msix_count = min(num_online_cpus() + 1,
243 HCS_MAX_INTRS(xhci->hcs_params1));
246 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
248 if (!xhci->msix_entries) {
249 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
253 for (i = 0; i < xhci->msix_count; i++) {
254 xhci->msix_entries[i].entry = i;
255 xhci->msix_entries[i].vector = 0;
258 ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
260 xhci_err(xhci, "Failed to enable MSI-X\n");
264 for (i = 0; i < xhci->msix_count; i++) {
265 ret = request_irq(xhci->msix_entries[i].vector,
266 (irq_handler_t)xhci_msi_irq,
267 0, "xhci_hcd", xhci_to_hcd(xhci));
272 hcd->msix_enabled = 1;
276 xhci_err(xhci, "disable MSI-X interrupt\n");
278 pci_disable_msix(pdev);
280 kfree(xhci->msix_entries);
281 xhci->msix_entries = NULL;
285 /* Free any IRQs and disable MSI-X */
286 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
288 struct usb_hcd *hcd = xhci_to_hcd(xhci);
289 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
293 if (xhci->msix_entries) {
294 pci_disable_msix(pdev);
295 kfree(xhci->msix_entries);
296 xhci->msix_entries = NULL;
298 pci_disable_msi(pdev);
301 hcd->msix_enabled = 0;
306 * Initialize memory for HCD and xHC (one-time init).
308 * Program the PAGESIZE register, initialize the device context array, create
309 * device contexts (?), set up a command ring segment (or two?), create event
310 * ring (one for now).
312 int xhci_init(struct usb_hcd *hcd)
314 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
317 xhci_dbg(xhci, "xhci_init\n");
318 spin_lock_init(&xhci->lock);
320 xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n");
321 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
323 xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n");
325 retval = xhci_mem_init(xhci, GFP_KERNEL);
326 xhci_dbg(xhci, "Finished xhci_init\n");
331 /*-------------------------------------------------------------------------*/
334 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
335 static void xhci_event_ring_work(unsigned long arg)
340 struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
343 xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
345 spin_lock_irqsave(&xhci->lock, flags);
346 temp = xhci_readl(xhci, &xhci->op_regs->status);
347 xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
348 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
349 (xhci->xhc_state & XHCI_STATE_HALTED)) {
350 xhci_dbg(xhci, "HW died, polling stopped.\n");
351 spin_unlock_irqrestore(&xhci->lock, flags);
355 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
356 xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
357 xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
358 xhci->error_bitmask = 0;
359 xhci_dbg(xhci, "Event ring:\n");
360 xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
361 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
362 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
363 temp_64 &= ~ERST_PTR_MASK;
364 xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
365 xhci_dbg(xhci, "Command ring:\n");
366 xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
367 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
368 xhci_dbg_cmd_ptrs(xhci);
369 for (i = 0; i < MAX_HC_SLOTS; ++i) {
372 for (j = 0; j < 31; ++j) {
373 xhci_dbg_ep_rings(xhci, i, j, &xhci->devs[i]->eps[j]);
376 spin_unlock_irqrestore(&xhci->lock, flags);
379 mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
381 xhci_dbg(xhci, "Quit polling the event ring.\n");
385 static int xhci_run_finished(struct xhci_hcd *xhci)
387 if (xhci_start(xhci)) {
391 xhci->shared_hcd->state = HC_STATE_RUNNING;
393 if (xhci->quirks & XHCI_NEC_HOST)
394 xhci_ring_cmd_db(xhci);
396 xhci_dbg(xhci, "Finished xhci_run for USB3 roothub\n");
401 * Start the HC after it was halted.
403 * This function is called by the USB core when the HC driver is added.
404 * Its opposite is xhci_stop().
406 * xhci_init() must be called once before this function can be called.
407 * Reset the HC, enable device slot contexts, program DCBAAP, and
408 * set command ring pointer and event ring pointer.
410 * Setup MSI-X vectors and enable interrupts.
412 int xhci_run(struct usb_hcd *hcd)
417 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
418 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
420 /* Start the xHCI host controller running only after the USB 2.0 roothub
424 hcd->uses_new_polling = 1;
425 if (!usb_hcd_is_primary_hcd(hcd))
426 return xhci_run_finished(xhci);
428 xhci_dbg(xhci, "xhci_run\n");
429 /* unregister the legacy interrupt */
431 free_irq(hcd->irq, hcd);
434 /* Some Fresco Logic host controllers advertise MSI, but fail to
435 * generate interrupts. Don't even try to enable MSI.
437 if (xhci->quirks & XHCI_BROKEN_MSI)
440 ret = xhci_setup_msix(xhci);
442 /* fall back to msi*/
443 ret = xhci_setup_msi(xhci);
447 /* fall back to legacy interrupt*/
448 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
449 hcd->irq_descr, hcd);
451 xhci_err(xhci, "request interrupt %d failed\n",
455 hcd->irq = pdev->irq;
458 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
459 init_timer(&xhci->event_ring_timer);
460 xhci->event_ring_timer.data = (unsigned long) xhci;
461 xhci->event_ring_timer.function = xhci_event_ring_work;
462 /* Poll the event ring */
463 xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
465 xhci_dbg(xhci, "Setting event ring polling timer\n");
466 add_timer(&xhci->event_ring_timer);
469 xhci_dbg(xhci, "Command ring memory map follows:\n");
470 xhci_debug_ring(xhci, xhci->cmd_ring);
471 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
472 xhci_dbg_cmd_ptrs(xhci);
474 xhci_dbg(xhci, "ERST memory map follows:\n");
475 xhci_dbg_erst(xhci, &xhci->erst);
476 xhci_dbg(xhci, "Event ring:\n");
477 xhci_debug_ring(xhci, xhci->event_ring);
478 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
479 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
480 temp_64 &= ~ERST_PTR_MASK;
481 xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
483 xhci_dbg(xhci, "// Set the interrupt modulation register\n");
484 temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
485 temp &= ~ER_IRQ_INTERVAL_MASK;
487 xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
489 /* Set the HCD state before we enable the irqs */
490 temp = xhci_readl(xhci, &xhci->op_regs->command);
492 xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
494 xhci_writel(xhci, temp, &xhci->op_regs->command);
496 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
497 xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
498 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
499 xhci_writel(xhci, ER_IRQ_ENABLE(temp),
500 &xhci->ir_set->irq_pending);
501 xhci_print_ir_set(xhci, 0);
503 if (xhci->quirks & XHCI_NEC_HOST)
504 xhci_queue_vendor_command(xhci, 0, 0, 0,
505 TRB_TYPE(TRB_NEC_GET_FW));
507 xhci_dbg(xhci, "Finished xhci_run for USB2 roothub\n");
511 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
513 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
515 spin_lock_irq(&xhci->lock);
518 /* The shared_hcd is going to be deallocated shortly (the USB core only
519 * calls this function when allocation fails in usb_add_hcd(), or
520 * usb_remove_hcd() is called). So we need to unset xHCI's pointer.
522 xhci->shared_hcd = NULL;
523 spin_unlock_irq(&xhci->lock);
529 * This function is called by the USB core when the HC driver is removed.
530 * Its opposite is xhci_run().
532 * Disable device contexts, disable IRQs, and quiesce the HC.
533 * Reset the HC, finish any completed transactions, and cleanup memory.
535 void xhci_stop(struct usb_hcd *hcd)
538 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
540 if (!usb_hcd_is_primary_hcd(hcd)) {
541 xhci_only_stop_hcd(xhci->shared_hcd);
545 spin_lock_irq(&xhci->lock);
546 /* Make sure the xHC is halted for a USB3 roothub
547 * (xhci_stop() could be called as part of failed init).
551 spin_unlock_irq(&xhci->lock);
553 xhci_cleanup_msix(xhci);
555 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
556 /* Tell the event ring poll function not to reschedule */
558 del_timer_sync(&xhci->event_ring_timer);
561 if (xhci->quirks & XHCI_AMD_PLL_FIX)
564 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
565 temp = xhci_readl(xhci, &xhci->op_regs->status);
566 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
567 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
568 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
569 &xhci->ir_set->irq_pending);
570 xhci_print_ir_set(xhci, 0);
572 xhci_dbg(xhci, "cleaning up memory\n");
573 xhci_mem_cleanup(xhci);
574 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
575 xhci_readl(xhci, &xhci->op_regs->status));
579 * Shutdown HC (not bus-specific)
581 * This is called when the machine is rebooting or halting. We assume that the
582 * machine will be powered off, and the HC's internal state will be reset.
583 * Don't bother to free memory.
585 * This will only ever be called with the main usb_hcd (the USB3 roothub).
587 void xhci_shutdown(struct usb_hcd *hcd)
589 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
591 spin_lock_irq(&xhci->lock);
593 spin_unlock_irq(&xhci->lock);
595 xhci_cleanup_msix(xhci);
597 xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
598 xhci_readl(xhci, &xhci->op_regs->status));
602 static void xhci_save_registers(struct xhci_hcd *xhci)
604 xhci->s3.command = xhci_readl(xhci, &xhci->op_regs->command);
605 xhci->s3.dev_nt = xhci_readl(xhci, &xhci->op_regs->dev_notification);
606 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
607 xhci->s3.config_reg = xhci_readl(xhci, &xhci->op_regs->config_reg);
608 xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
609 xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control);
610 xhci->s3.erst_size = xhci_readl(xhci, &xhci->ir_set->erst_size);
611 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
612 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
615 static void xhci_restore_registers(struct xhci_hcd *xhci)
617 xhci_writel(xhci, xhci->s3.command, &xhci->op_regs->command);
618 xhci_writel(xhci, xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
619 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
620 xhci_writel(xhci, xhci->s3.config_reg, &xhci->op_regs->config_reg);
621 xhci_writel(xhci, xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
622 xhci_writel(xhci, xhci->s3.irq_control, &xhci->ir_set->irq_control);
623 xhci_writel(xhci, xhci->s3.erst_size, &xhci->ir_set->erst_size);
624 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
627 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
631 /* step 2: initialize command ring buffer */
632 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
633 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
634 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
635 xhci->cmd_ring->dequeue) &
636 (u64) ~CMD_RING_RSVD_BITS) |
637 xhci->cmd_ring->cycle_state;
638 xhci_dbg(xhci, "// Setting command ring address to 0x%llx\n",
639 (long unsigned long) val_64);
640 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
644 * The whole command ring must be cleared to zero when we suspend the host.
646 * The host doesn't save the command ring pointer in the suspend well, so we
647 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
648 * aligned, because of the reserved bits in the command ring dequeue pointer
649 * register. Therefore, we can't just set the dequeue pointer back in the
650 * middle of the ring (TRBs are 16-byte aligned).
652 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
654 struct xhci_ring *ring;
655 struct xhci_segment *seg;
657 ring = xhci->cmd_ring;
660 memset(seg->trbs, 0, SEGMENT_SIZE);
662 } while (seg != ring->deq_seg);
664 /* Reset the software enqueue and dequeue pointers */
665 ring->deq_seg = ring->first_seg;
666 ring->dequeue = ring->first_seg->trbs;
667 ring->enq_seg = ring->deq_seg;
668 ring->enqueue = ring->dequeue;
671 * Ring is now zeroed, so the HW should look for change of ownership
672 * when the cycle bit is set to 1.
674 ring->cycle_state = 1;
677 * Reset the hardware dequeue pointer.
678 * Yes, this will need to be re-written after resume, but we're paranoid
679 * and want to make sure the hardware doesn't access bogus memory
680 * because, say, the BIOS or an SMI started the host without changing
681 * the command ring pointers.
683 xhci_set_cmd_ring_deq(xhci);
687 * Stop HC (not bus-specific)
689 * This is called when the machine transition into S3/S4 mode.
692 int xhci_suspend(struct xhci_hcd *xhci)
695 struct usb_hcd *hcd = xhci_to_hcd(xhci);
699 spin_lock_irq(&xhci->lock);
700 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
701 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
702 /* step 1: stop endpoint */
703 /* skipped assuming that port suspend has done */
705 /* step 2: clear Run/Stop bit */
706 command = xhci_readl(xhci, &xhci->op_regs->command);
708 xhci_writel(xhci, command, &xhci->op_regs->command);
709 if (handshake(xhci, &xhci->op_regs->status,
710 STS_HALT, STS_HALT, 100*100)) {
711 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
712 spin_unlock_irq(&xhci->lock);
715 xhci_clear_command_ring(xhci);
717 /* step 3: save registers */
718 xhci_save_registers(xhci);
720 /* step 4: set CSS flag */
721 command = xhci_readl(xhci, &xhci->op_regs->command);
723 xhci_writel(xhci, command, &xhci->op_regs->command);
724 if (handshake(xhci, &xhci->op_regs->status, STS_SAVE, 0, 10*100)) {
725 xhci_warn(xhci, "WARN: xHC CMD_CSS timeout\n");
726 spin_unlock_irq(&xhci->lock);
729 spin_unlock_irq(&xhci->lock);
731 /* step 5: remove core well power */
732 /* synchronize irq when using MSI-X */
733 if (xhci->msix_entries) {
734 for (i = 0; i < xhci->msix_count; i++)
735 synchronize_irq(xhci->msix_entries[i].vector);
742 * start xHC (not bus-specific)
744 * This is called when the machine transition from S3/S4 mode.
747 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
749 u32 command, temp = 0;
750 struct usb_hcd *hcd = xhci_to_hcd(xhci);
751 struct usb_hcd *secondary_hcd;
754 /* Wait a bit if either of the roothubs need to settle from the
755 * transition into bus suspend.
757 if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
759 xhci->bus_state[1].next_statechange))
762 spin_lock_irq(&xhci->lock);
763 if (xhci->quirks & XHCI_RESET_ON_RESUME)
767 /* step 1: restore register */
768 xhci_restore_registers(xhci);
769 /* step 2: initialize command ring buffer */
770 xhci_set_cmd_ring_deq(xhci);
771 /* step 3: restore state and start state*/
772 /* step 3: set CRS flag */
773 command = xhci_readl(xhci, &xhci->op_regs->command);
775 xhci_writel(xhci, command, &xhci->op_regs->command);
776 if (handshake(xhci, &xhci->op_regs->status,
777 STS_RESTORE, 0, 10*100)) {
778 xhci_dbg(xhci, "WARN: xHC CMD_CSS timeout\n");
779 spin_unlock_irq(&xhci->lock);
782 temp = xhci_readl(xhci, &xhci->op_regs->status);
785 /* If restore operation fails, re-initialize the HC during resume */
786 if ((temp & STS_SRE) || hibernated) {
787 /* Let the USB core know _both_ roothubs lost power. */
788 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
789 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
791 xhci_dbg(xhci, "Stop HCD\n");
794 spin_unlock_irq(&xhci->lock);
795 xhci_cleanup_msix(xhci);
797 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
798 /* Tell the event ring poll function not to reschedule */
800 del_timer_sync(&xhci->event_ring_timer);
803 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
804 temp = xhci_readl(xhci, &xhci->op_regs->status);
805 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
806 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
807 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
808 &xhci->ir_set->irq_pending);
809 xhci_print_ir_set(xhci, 0);
811 xhci_dbg(xhci, "cleaning up memory\n");
812 xhci_mem_cleanup(xhci);
813 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
814 xhci_readl(xhci, &xhci->op_regs->status));
816 /* USB core calls the PCI reinit and start functions twice:
817 * first with the primary HCD, and then with the secondary HCD.
818 * If we don't do the same, the host will never be started.
820 if (!usb_hcd_is_primary_hcd(hcd))
823 secondary_hcd = xhci->shared_hcd;
825 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
826 retval = xhci_init(hcd->primary_hcd);
829 xhci_dbg(xhci, "Start the primary HCD\n");
830 retval = xhci_run(hcd->primary_hcd);
834 xhci_dbg(xhci, "Start the secondary HCD\n");
835 retval = xhci_run(secondary_hcd);
837 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
838 set_bit(HCD_FLAG_HW_ACCESSIBLE,
839 &xhci->shared_hcd->flags);
842 hcd->state = HC_STATE_SUSPENDED;
843 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
847 /* step 4: set Run/Stop bit */
848 command = xhci_readl(xhci, &xhci->op_regs->command);
850 xhci_writel(xhci, command, &xhci->op_regs->command);
851 handshake(xhci, &xhci->op_regs->status, STS_HALT,
854 /* step 5: walk topology and initialize portsc,
855 * portpmsc and portli
857 /* this is done in bus_resume */
859 /* step 6: restart each of the previously
860 * Running endpoints by ringing their doorbells
863 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
864 set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
866 spin_unlock_irq(&xhci->lock);
869 #endif /* CONFIG_PM */
871 /*-------------------------------------------------------------------------*/
874 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
875 * HCDs. Find the index for an endpoint given its descriptor. Use the return
876 * value to right shift 1 for the bitmask.
878 * Index = (epnum * 2) + direction - 1,
879 * where direction = 0 for OUT, 1 for IN.
880 * For control endpoints, the IN index is used (OUT index is unused), so
881 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
883 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
886 if (usb_endpoint_xfer_control(desc))
887 index = (unsigned int) (usb_endpoint_num(desc)*2);
889 index = (unsigned int) (usb_endpoint_num(desc)*2) +
890 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
894 /* Find the flag for this endpoint (for use in the control context). Use the
895 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
898 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
900 return 1 << (xhci_get_endpoint_index(desc) + 1);
903 /* Find the flag for this endpoint (for use in the control context). Use the
904 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
907 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
909 return 1 << (ep_index + 1);
912 /* Compute the last valid endpoint context index. Basically, this is the
913 * endpoint index plus one. For slot contexts with more than valid endpoint,
914 * we find the most significant bit set in the added contexts flags.
915 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
916 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
918 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
920 return fls(added_ctxs) - 1;
923 /* Returns 1 if the arguments are OK;
924 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
926 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
927 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
929 struct xhci_hcd *xhci;
930 struct xhci_virt_device *virt_dev;
932 if (!hcd || (check_ep && !ep) || !udev) {
933 printk(KERN_DEBUG "xHCI %s called with invalid args\n",
938 printk(KERN_DEBUG "xHCI %s called for root hub\n",
943 xhci = hcd_to_xhci(hcd);
944 if (xhci->xhc_state & XHCI_STATE_HALTED)
947 if (check_virt_dev) {
948 if (!udev->slot_id || !xhci->devs
949 || !xhci->devs[udev->slot_id]) {
950 printk(KERN_DEBUG "xHCI %s called with unaddressed "
955 virt_dev = xhci->devs[udev->slot_id];
956 if (virt_dev->udev != udev) {
957 printk(KERN_DEBUG "xHCI %s called with udev and "
958 "virt_dev does not match\n", func);
966 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
967 struct usb_device *udev, struct xhci_command *command,
968 bool ctx_change, bool must_succeed);
971 * Full speed devices may have a max packet size greater than 8 bytes, but the
972 * USB core doesn't know that until it reads the first 8 bytes of the
973 * descriptor. If the usb_device's max packet size changes after that point,
974 * we need to issue an evaluate context command and wait on it.
976 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
977 unsigned int ep_index, struct urb *urb)
979 struct xhci_container_ctx *in_ctx;
980 struct xhci_container_ctx *out_ctx;
981 struct xhci_input_control_ctx *ctrl_ctx;
982 struct xhci_ep_ctx *ep_ctx;
984 int hw_max_packet_size;
987 out_ctx = xhci->devs[slot_id]->out_ctx;
988 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
989 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
990 max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
991 if (hw_max_packet_size != max_packet_size) {
992 xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n");
993 xhci_dbg(xhci, "Max packet size in usb_device = %d\n",
995 xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n",
997 xhci_dbg(xhci, "Issuing evaluate context command.\n");
999 /* Set up the modified control endpoint 0 */
1000 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1001 xhci->devs[slot_id]->out_ctx, ep_index);
1002 in_ctx = xhci->devs[slot_id]->in_ctx;
1003 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1004 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1005 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1007 /* Set up the input context flags for the command */
1008 /* FIXME: This won't work if a non-default control endpoint
1009 * changes max packet sizes.
1011 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1012 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1013 ctrl_ctx->drop_flags = 0;
1015 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1016 xhci_dbg_ctx(xhci, in_ctx, ep_index);
1017 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1018 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1020 ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
1023 /* Clean up the input context for later use by bandwidth
1026 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1032 * non-error returns are a promise to giveback() the urb later
1033 * we drop ownership so next owner (or urb unlink) can get it
1035 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1037 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1038 unsigned long flags;
1040 unsigned int slot_id, ep_index;
1041 struct urb_priv *urb_priv;
1044 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1045 true, true, __func__) <= 0)
1048 slot_id = urb->dev->slot_id;
1049 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1051 if (!HCD_HW_ACCESSIBLE(hcd)) {
1052 if (!in_interrupt())
1053 xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1058 if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1059 size = urb->number_of_packets;
1063 urb_priv = kzalloc(sizeof(struct urb_priv) +
1064 size * sizeof(struct xhci_td *), mem_flags);
1068 for (i = 0; i < size; i++) {
1069 urb_priv->td[i] = kzalloc(sizeof(struct xhci_td), mem_flags);
1070 if (!urb_priv->td[i]) {
1071 urb_priv->length = i;
1072 xhci_urb_free_priv(xhci, urb_priv);
1077 urb_priv->length = size;
1078 urb_priv->td_cnt = 0;
1079 urb->hcpriv = urb_priv;
1081 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1082 /* Check to see if the max packet size for the default control
1083 * endpoint changed during FS device enumeration
1085 if (urb->dev->speed == USB_SPEED_FULL) {
1086 ret = xhci_check_maxpacket(xhci, slot_id,
1089 xhci_urb_free_priv(xhci, urb_priv);
1095 /* We have a spinlock and interrupts disabled, so we must pass
1096 * atomic context to this function, which may allocate memory.
1098 spin_lock_irqsave(&xhci->lock, flags);
1099 if (xhci->xhc_state & XHCI_STATE_DYING)
1101 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1105 spin_unlock_irqrestore(&xhci->lock, flags);
1106 } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1107 spin_lock_irqsave(&xhci->lock, flags);
1108 if (xhci->xhc_state & XHCI_STATE_DYING)
1110 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1111 EP_GETTING_STREAMS) {
1112 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1113 "is transitioning to using streams.\n");
1115 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1116 EP_GETTING_NO_STREAMS) {
1117 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1118 "is transitioning to "
1119 "not having streams.\n");
1122 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1127 spin_unlock_irqrestore(&xhci->lock, flags);
1128 } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1129 spin_lock_irqsave(&xhci->lock, flags);
1130 if (xhci->xhc_state & XHCI_STATE_DYING)
1132 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1136 spin_unlock_irqrestore(&xhci->lock, flags);
1138 spin_lock_irqsave(&xhci->lock, flags);
1139 if (xhci->xhc_state & XHCI_STATE_DYING)
1141 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1145 spin_unlock_irqrestore(&xhci->lock, flags);
1150 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1151 "non-responsive xHCI host.\n",
1152 urb->ep->desc.bEndpointAddress, urb);
1155 xhci_urb_free_priv(xhci, urb_priv);
1157 spin_unlock_irqrestore(&xhci->lock, flags);
1161 /* Get the right ring for the given URB.
1162 * If the endpoint supports streams, boundary check the URB's stream ID.
1163 * If the endpoint doesn't support streams, return the singular endpoint ring.
1165 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1168 unsigned int slot_id;
1169 unsigned int ep_index;
1170 unsigned int stream_id;
1171 struct xhci_virt_ep *ep;
1173 slot_id = urb->dev->slot_id;
1174 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1175 stream_id = urb->stream_id;
1176 ep = &xhci->devs[slot_id]->eps[ep_index];
1177 /* Common case: no streams */
1178 if (!(ep->ep_state & EP_HAS_STREAMS))
1181 if (stream_id == 0) {
1183 "WARN: Slot ID %u, ep index %u has streams, "
1184 "but URB has no stream ID.\n",
1189 if (stream_id < ep->stream_info->num_streams)
1190 return ep->stream_info->stream_rings[stream_id];
1193 "WARN: Slot ID %u, ep index %u has "
1194 "stream IDs 1 to %u allocated, "
1195 "but stream ID %u is requested.\n",
1197 ep->stream_info->num_streams - 1,
1203 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1204 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1205 * should pick up where it left off in the TD, unless a Set Transfer Ring
1206 * Dequeue Pointer is issued.
1208 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1209 * the ring. Since the ring is a contiguous structure, they can't be physically
1210 * removed. Instead, there are two options:
1212 * 1) If the HC is in the middle of processing the URB to be canceled, we
1213 * simply move the ring's dequeue pointer past those TRBs using the Set
1214 * Transfer Ring Dequeue Pointer command. This will be the common case,
1215 * when drivers timeout on the last submitted URB and attempt to cancel.
1217 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1218 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1219 * HC will need to invalidate the any TRBs it has cached after the stop
1220 * endpoint command, as noted in the xHCI 0.95 errata.
1222 * 3) The TD may have completed by the time the Stop Endpoint Command
1223 * completes, so software needs to handle that case too.
1225 * This function should protect against the TD enqueueing code ringing the
1226 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1227 * It also needs to account for multiple cancellations on happening at the same
1228 * time for the same endpoint.
1230 * Note that this function can be called in any context, or so says
1231 * usb_hcd_unlink_urb()
1233 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1235 unsigned long flags;
1238 struct xhci_hcd *xhci;
1239 struct urb_priv *urb_priv;
1241 unsigned int ep_index;
1242 struct xhci_ring *ep_ring;
1243 struct xhci_virt_ep *ep;
1245 xhci = hcd_to_xhci(hcd);
1246 spin_lock_irqsave(&xhci->lock, flags);
1247 /* Make sure the URB hasn't completed or been unlinked already */
1248 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1249 if (ret || !urb->hcpriv)
1251 temp = xhci_readl(xhci, &xhci->op_regs->status);
1252 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1253 xhci_dbg(xhci, "HW died, freeing TD.\n");
1254 urb_priv = urb->hcpriv;
1255 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1256 td = urb_priv->td[i];
1257 if (!list_empty(&td->td_list))
1258 list_del_init(&td->td_list);
1259 if (!list_empty(&td->cancelled_td_list))
1260 list_del_init(&td->cancelled_td_list);
1263 usb_hcd_unlink_urb_from_ep(hcd, urb);
1264 spin_unlock_irqrestore(&xhci->lock, flags);
1265 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1266 xhci_urb_free_priv(xhci, urb_priv);
1269 if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1270 (xhci->xhc_state & XHCI_STATE_HALTED)) {
1271 xhci_dbg(xhci, "Ep 0x%x: URB %p to be canceled on "
1272 "non-responsive xHCI host.\n",
1273 urb->ep->desc.bEndpointAddress, urb);
1274 /* Let the stop endpoint command watchdog timer (which set this
1275 * state) finish cleaning up the endpoint TD lists. We must
1276 * have caught it in the middle of dropping a lock and giving
1282 xhci_dbg(xhci, "Cancel URB %p\n", urb);
1283 xhci_dbg(xhci, "Event ring:\n");
1284 xhci_debug_ring(xhci, xhci->event_ring);
1285 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1286 ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1287 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1293 xhci_dbg(xhci, "Endpoint ring:\n");
1294 xhci_debug_ring(xhci, ep_ring);
1296 urb_priv = urb->hcpriv;
1298 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1299 td = urb_priv->td[i];
1300 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1303 /* Queue a stop endpoint command, but only if this is
1304 * the first cancellation to be handled.
1306 if (!(ep->ep_state & EP_HALT_PENDING)) {
1307 ep->ep_state |= EP_HALT_PENDING;
1308 ep->stop_cmds_pending++;
1309 ep->stop_cmd_timer.expires = jiffies +
1310 XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1311 add_timer(&ep->stop_cmd_timer);
1312 xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0);
1313 xhci_ring_cmd_db(xhci);
1316 spin_unlock_irqrestore(&xhci->lock, flags);
1320 /* Drop an endpoint from a new bandwidth configuration for this device.
1321 * Only one call to this function is allowed per endpoint before
1322 * check_bandwidth() or reset_bandwidth() must be called.
1323 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1324 * add the endpoint to the schedule with possibly new parameters denoted by a
1325 * different endpoint descriptor in usb_host_endpoint.
1326 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1329 * The USB core will not allow URBs to be queued to an endpoint that is being
1330 * disabled, so there's no need for mutual exclusion to protect
1331 * the xhci->devs[slot_id] structure.
1333 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1334 struct usb_host_endpoint *ep)
1336 struct xhci_hcd *xhci;
1337 struct xhci_container_ctx *in_ctx, *out_ctx;
1338 struct xhci_input_control_ctx *ctrl_ctx;
1339 struct xhci_slot_ctx *slot_ctx;
1340 unsigned int last_ctx;
1341 unsigned int ep_index;
1342 struct xhci_ep_ctx *ep_ctx;
1344 u32 new_add_flags, new_drop_flags, new_slot_info;
1347 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1350 xhci = hcd_to_xhci(hcd);
1351 if (xhci->xhc_state & XHCI_STATE_DYING)
1354 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1355 drop_flag = xhci_get_endpoint_flag(&ep->desc);
1356 if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1357 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1358 __func__, drop_flag);
1362 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1363 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1364 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1365 ep_index = xhci_get_endpoint_index(&ep->desc);
1366 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1367 /* If the HC already knows the endpoint is disabled,
1368 * or the HCD has noted it is disabled, ignore this request
1370 if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1371 cpu_to_le32(EP_STATE_DISABLED)) ||
1372 le32_to_cpu(ctrl_ctx->drop_flags) &
1373 xhci_get_endpoint_flag(&ep->desc)) {
1374 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1379 ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1380 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1382 ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1383 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1385 last_ctx = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags));
1386 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1387 /* Update the last valid endpoint context, if we deleted the last one */
1388 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) >
1389 LAST_CTX(last_ctx)) {
1390 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1391 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1393 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1395 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1397 xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1398 (unsigned int) ep->desc.bEndpointAddress,
1400 (unsigned int) new_drop_flags,
1401 (unsigned int) new_add_flags,
1402 (unsigned int) new_slot_info);
1406 /* Add an endpoint to a new possible bandwidth configuration for this device.
1407 * Only one call to this function is allowed per endpoint before
1408 * check_bandwidth() or reset_bandwidth() must be called.
1409 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1410 * add the endpoint to the schedule with possibly new parameters denoted by a
1411 * different endpoint descriptor in usb_host_endpoint.
1412 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1415 * The USB core will not allow URBs to be queued to an endpoint until the
1416 * configuration or alt setting is installed in the device, so there's no need
1417 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1419 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1420 struct usb_host_endpoint *ep)
1422 struct xhci_hcd *xhci;
1423 struct xhci_container_ctx *in_ctx, *out_ctx;
1424 unsigned int ep_index;
1425 struct xhci_ep_ctx *ep_ctx;
1426 struct xhci_slot_ctx *slot_ctx;
1427 struct xhci_input_control_ctx *ctrl_ctx;
1429 unsigned int last_ctx;
1430 u32 new_add_flags, new_drop_flags, new_slot_info;
1431 struct xhci_virt_device *virt_dev;
1434 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1436 /* So we won't queue a reset ep command for a root hub */
1440 xhci = hcd_to_xhci(hcd);
1441 if (xhci->xhc_state & XHCI_STATE_DYING)
1444 added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1445 last_ctx = xhci_last_valid_endpoint(added_ctxs);
1446 if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1447 /* FIXME when we have to issue an evaluate endpoint command to
1448 * deal with ep0 max packet size changing once we get the
1451 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1452 __func__, added_ctxs);
1456 virt_dev = xhci->devs[udev->slot_id];
1457 in_ctx = virt_dev->in_ctx;
1458 out_ctx = virt_dev->out_ctx;
1459 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1460 ep_index = xhci_get_endpoint_index(&ep->desc);
1461 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1463 /* If this endpoint is already in use, and the upper layers are trying
1464 * to add it again without dropping it, reject the addition.
1466 if (virt_dev->eps[ep_index].ring &&
1467 !(le32_to_cpu(ctrl_ctx->drop_flags) &
1468 xhci_get_endpoint_flag(&ep->desc))) {
1469 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1470 "without dropping it.\n",
1471 (unsigned int) ep->desc.bEndpointAddress);
1475 /* If the HCD has already noted the endpoint is enabled,
1476 * ignore this request.
1478 if (le32_to_cpu(ctrl_ctx->add_flags) &
1479 xhci_get_endpoint_flag(&ep->desc)) {
1480 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1486 * Configuration and alternate setting changes must be done in
1487 * process context, not interrupt context (or so documenation
1488 * for usb_set_interface() and usb_set_configuration() claim).
1490 if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1491 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1492 __func__, ep->desc.bEndpointAddress);
1496 ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1497 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1499 /* If xhci_endpoint_disable() was called for this endpoint, but the
1500 * xHC hasn't been notified yet through the check_bandwidth() call,
1501 * this re-adds a new state for the endpoint from the new endpoint
1502 * descriptors. We must drop and re-add this endpoint, so we leave the
1505 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1507 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1508 /* Update the last valid endpoint context, if we just added one past */
1509 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) <
1510 LAST_CTX(last_ctx)) {
1511 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1512 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1514 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1516 /* Store the usb_device pointer for later use */
1519 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1520 (unsigned int) ep->desc.bEndpointAddress,
1522 (unsigned int) new_drop_flags,
1523 (unsigned int) new_add_flags,
1524 (unsigned int) new_slot_info);
1528 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1530 struct xhci_input_control_ctx *ctrl_ctx;
1531 struct xhci_ep_ctx *ep_ctx;
1532 struct xhci_slot_ctx *slot_ctx;
1535 /* When a device's add flag and drop flag are zero, any subsequent
1536 * configure endpoint command will leave that endpoint's state
1537 * untouched. Make sure we don't leave any old state in the input
1538 * endpoint contexts.
1540 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1541 ctrl_ctx->drop_flags = 0;
1542 ctrl_ctx->add_flags = 0;
1543 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1544 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1545 /* Endpoint 0 is always valid */
1546 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1547 for (i = 1; i < 31; ++i) {
1548 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1549 ep_ctx->ep_info = 0;
1550 ep_ctx->ep_info2 = 0;
1552 ep_ctx->tx_info = 0;
1556 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1557 struct usb_device *udev, u32 *cmd_status)
1561 switch (*cmd_status) {
1563 dev_warn(&udev->dev, "Not enough host controller resources "
1564 "for new device state.\n");
1566 /* FIXME: can we allocate more resources for the HC? */
1569 dev_warn(&udev->dev, "Not enough bandwidth "
1570 "for new device state.\n");
1572 /* FIXME: can we go back to the old state? */
1575 /* the HCD set up something wrong */
1576 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1578 "and endpoint is not disabled.\n");
1582 dev_warn(&udev->dev, "ERROR: Incompatible device for endpoint "
1583 "configure command.\n");
1587 dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
1591 xhci_err(xhci, "ERROR: unexpected command completion "
1592 "code 0x%x.\n", *cmd_status);
1599 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1600 struct usb_device *udev, u32 *cmd_status)
1603 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1605 switch (*cmd_status) {
1607 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1608 "context command.\n");
1612 dev_warn(&udev->dev, "WARN: slot not enabled for"
1613 "evaluate context command.\n");
1614 case COMP_CTX_STATE:
1615 dev_warn(&udev->dev, "WARN: invalid context state for "
1616 "evaluate context command.\n");
1617 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1621 dev_warn(&udev->dev, "ERROR: Incompatible device for evaluate "
1622 "context command.\n");
1626 /* Max Exit Latency too large error */
1627 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1631 dev_dbg(&udev->dev, "Successful evaluate context command\n");
1635 xhci_err(xhci, "ERROR: unexpected command completion "
1636 "code 0x%x.\n", *cmd_status);
1643 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1644 struct xhci_container_ctx *in_ctx)
1646 struct xhci_input_control_ctx *ctrl_ctx;
1647 u32 valid_add_flags;
1648 u32 valid_drop_flags;
1650 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1651 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1652 * (bit 1). The default control endpoint is added during the Address
1653 * Device command and is never removed until the slot is disabled.
1655 valid_add_flags = ctrl_ctx->add_flags >> 2;
1656 valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1658 /* Use hweight32 to count the number of ones in the add flags, or
1659 * number of endpoints added. Don't count endpoints that are changed
1660 * (both added and dropped).
1662 return hweight32(valid_add_flags) -
1663 hweight32(valid_add_flags & valid_drop_flags);
1666 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1667 struct xhci_container_ctx *in_ctx)
1669 struct xhci_input_control_ctx *ctrl_ctx;
1670 u32 valid_add_flags;
1671 u32 valid_drop_flags;
1673 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1674 valid_add_flags = ctrl_ctx->add_flags >> 2;
1675 valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1677 return hweight32(valid_drop_flags) -
1678 hweight32(valid_add_flags & valid_drop_flags);
1682 * We need to reserve the new number of endpoints before the configure endpoint
1683 * command completes. We can't subtract the dropped endpoints from the number
1684 * of active endpoints until the command completes because we can oversubscribe
1685 * the host in this case:
1687 * - the first configure endpoint command drops more endpoints than it adds
1688 * - a second configure endpoint command that adds more endpoints is queued
1689 * - the first configure endpoint command fails, so the config is unchanged
1690 * - the second command may succeed, even though there isn't enough resources
1692 * Must be called with xhci->lock held.
1694 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1695 struct xhci_container_ctx *in_ctx)
1699 added_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1700 if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1701 xhci_dbg(xhci, "Not enough ep ctxs: "
1702 "%u active, need to add %u, limit is %u.\n",
1703 xhci->num_active_eps, added_eps,
1704 xhci->limit_active_eps);
1707 xhci->num_active_eps += added_eps;
1708 xhci_dbg(xhci, "Adding %u ep ctxs, %u now active.\n", added_eps,
1709 xhci->num_active_eps);
1714 * The configure endpoint was failed by the xHC for some other reason, so we
1715 * need to revert the resources that failed configuration would have used.
1717 * Must be called with xhci->lock held.
1719 static void xhci_free_host_resources(struct xhci_hcd *xhci,
1720 struct xhci_container_ctx *in_ctx)
1724 num_failed_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1725 xhci->num_active_eps -= num_failed_eps;
1726 xhci_dbg(xhci, "Removing %u failed ep ctxs, %u now active.\n",
1728 xhci->num_active_eps);
1732 * Now that the command has completed, clean up the active endpoint count by
1733 * subtracting out the endpoints that were dropped (but not changed).
1735 * Must be called with xhci->lock held.
1737 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
1738 struct xhci_container_ctx *in_ctx)
1740 u32 num_dropped_eps;
1742 num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, in_ctx);
1743 xhci->num_active_eps -= num_dropped_eps;
1744 if (num_dropped_eps)
1745 xhci_dbg(xhci, "Removing %u dropped ep ctxs, %u now active.\n",
1747 xhci->num_active_eps);
1750 unsigned int xhci_get_block_size(struct usb_device *udev)
1752 switch (udev->speed) {
1754 case USB_SPEED_FULL:
1756 case USB_SPEED_HIGH:
1758 case USB_SPEED_SUPER:
1760 case USB_SPEED_UNKNOWN:
1761 case USB_SPEED_WIRELESS:
1763 /* Should never happen */
1768 unsigned int xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
1770 if (interval_bw->overhead[LS_OVERHEAD_TYPE])
1772 if (interval_bw->overhead[FS_OVERHEAD_TYPE])
1777 /* If we are changing a LS/FS device under a HS hub,
1778 * make sure (if we are activating a new TT) that the HS bus has enough
1779 * bandwidth for this new TT.
1781 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
1782 struct xhci_virt_device *virt_dev,
1785 struct xhci_interval_bw_table *bw_table;
1786 struct xhci_tt_bw_info *tt_info;
1788 /* Find the bandwidth table for the root port this TT is attached to. */
1789 bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
1790 tt_info = virt_dev->tt_info;
1791 /* If this TT already had active endpoints, the bandwidth for this TT
1792 * has already been added. Removing all periodic endpoints (and thus
1793 * making the TT enactive) will only decrease the bandwidth used.
1797 if (old_active_eps == 0 && tt_info->active_eps != 0) {
1798 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
1802 /* Not sure why we would have no new active endpoints...
1804 * Maybe because of an Evaluate Context change for a hub update or a
1805 * control endpoint 0 max packet size change?
1806 * FIXME: skip the bandwidth calculation in that case.
1812 * This algorithm is a very conservative estimate of the worst-case scheduling
1813 * scenario for any one interval. The hardware dynamically schedules the
1814 * packets, so we can't tell which microframe could be the limiting factor in
1815 * the bandwidth scheduling. This only takes into account periodic endpoints.
1817 * Obviously, we can't solve an NP complete problem to find the minimum worst
1818 * case scenario. Instead, we come up with an estimate that is no less than
1819 * the worst case bandwidth used for any one microframe, but may be an
1822 * We walk the requirements for each endpoint by interval, starting with the
1823 * smallest interval, and place packets in the schedule where there is only one
1824 * possible way to schedule packets for that interval. In order to simplify
1825 * this algorithm, we record the largest max packet size for each interval, and
1826 * assume all packets will be that size.
1828 * For interval 0, we obviously must schedule all packets for each interval.
1829 * The bandwidth for interval 0 is just the amount of data to be transmitted
1830 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
1831 * the number of packets).
1833 * For interval 1, we have two possible microframes to schedule those packets
1834 * in. For this algorithm, if we can schedule the same number of packets for
1835 * each possible scheduling opportunity (each microframe), we will do so. The
1836 * remaining number of packets will be saved to be transmitted in the gaps in
1837 * the next interval's scheduling sequence.
1839 * As we move those remaining packets to be scheduled with interval 2 packets,
1840 * we have to double the number of remaining packets to transmit. This is
1841 * because the intervals are actually powers of 2, and we would be transmitting
1842 * the previous interval's packets twice in this interval. We also have to be
1843 * sure that when we look at the largest max packet size for this interval, we
1844 * also look at the largest max packet size for the remaining packets and take
1845 * the greater of the two.
1847 * The algorithm continues to evenly distribute packets in each scheduling
1848 * opportunity, and push the remaining packets out, until we get to the last
1849 * interval. Then those packets and their associated overhead are just added
1850 * to the bandwidth used.
1852 static int xhci_check_bw_table(struct xhci_hcd *xhci,
1853 struct xhci_virt_device *virt_dev,
1856 unsigned int bw_reserved;
1857 unsigned int max_bandwidth;
1858 unsigned int bw_used;
1859 unsigned int block_size;
1860 struct xhci_interval_bw_table *bw_table;
1861 unsigned int packet_size = 0;
1862 unsigned int overhead = 0;
1863 unsigned int packets_transmitted = 0;
1864 unsigned int packets_remaining = 0;
1867 if (virt_dev->udev->speed == USB_SPEED_HIGH) {
1868 max_bandwidth = HS_BW_LIMIT;
1869 /* Convert percent of bus BW reserved to blocks reserved */
1870 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
1872 max_bandwidth = FS_BW_LIMIT;
1873 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
1876 bw_table = virt_dev->bw_table;
1877 /* We need to translate the max packet size and max ESIT payloads into
1878 * the units the hardware uses.
1880 block_size = xhci_get_block_size(virt_dev->udev);
1882 /* If we are manipulating a LS/FS device under a HS hub, double check
1883 * that the HS bus has enough bandwidth if we are activing a new TT.
1885 if (virt_dev->tt_info) {
1886 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
1887 virt_dev->real_port);
1888 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
1889 xhci_warn(xhci, "Not enough bandwidth on HS bus for "
1890 "newly activated TT.\n");
1893 xhci_dbg(xhci, "Recalculating BW for TT slot %u port %u\n",
1894 virt_dev->tt_info->slot_id,
1895 virt_dev->tt_info->ttport);
1897 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
1898 virt_dev->real_port);
1901 /* Add in how much bandwidth will be used for interval zero, or the
1902 * rounded max ESIT payload + number of packets * largest overhead.
1904 bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
1905 bw_table->interval_bw[0].num_packets *
1906 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
1908 for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
1909 unsigned int bw_added;
1910 unsigned int largest_mps;
1911 unsigned int interval_overhead;
1914 * How many packets could we transmit in this interval?
1915 * If packets didn't fit in the previous interval, we will need
1916 * to transmit that many packets twice within this interval.
1918 packets_remaining = 2 * packets_remaining +
1919 bw_table->interval_bw[i].num_packets;
1921 /* Find the largest max packet size of this or the previous
1924 if (list_empty(&bw_table->interval_bw[i].endpoints))
1927 struct xhci_virt_ep *virt_ep;
1928 struct list_head *ep_entry;
1930 ep_entry = bw_table->interval_bw[i].endpoints.next;
1931 virt_ep = list_entry(ep_entry,
1932 struct xhci_virt_ep, bw_endpoint_list);
1933 /* Convert to blocks, rounding up */
1934 largest_mps = DIV_ROUND_UP(
1935 virt_ep->bw_info.max_packet_size,
1938 if (largest_mps > packet_size)
1939 packet_size = largest_mps;
1941 /* Use the larger overhead of this or the previous interval. */
1942 interval_overhead = xhci_get_largest_overhead(
1943 &bw_table->interval_bw[i]);
1944 if (interval_overhead > overhead)
1945 overhead = interval_overhead;
1947 /* How many packets can we evenly distribute across
1948 * (1 << (i + 1)) possible scheduling opportunities?
1950 packets_transmitted = packets_remaining >> (i + 1);
1952 /* Add in the bandwidth used for those scheduled packets */
1953 bw_added = packets_transmitted * (overhead + packet_size);
1955 /* How many packets do we have remaining to transmit? */
1956 packets_remaining = packets_remaining % (1 << (i + 1));
1958 /* What largest max packet size should those packets have? */
1959 /* If we've transmitted all packets, don't carry over the
1960 * largest packet size.
1962 if (packets_remaining == 0) {
1965 } else if (packets_transmitted > 0) {
1966 /* Otherwise if we do have remaining packets, and we've
1967 * scheduled some packets in this interval, take the
1968 * largest max packet size from endpoints with this
1971 packet_size = largest_mps;
1972 overhead = interval_overhead;
1974 /* Otherwise carry over packet_size and overhead from the last
1975 * time we had a remainder.
1977 bw_used += bw_added;
1978 if (bw_used > max_bandwidth) {
1979 xhci_warn(xhci, "Not enough bandwidth. "
1980 "Proposed: %u, Max: %u\n",
1981 bw_used, max_bandwidth);
1986 * Ok, we know we have some packets left over after even-handedly
1987 * scheduling interval 15. We don't know which microframes they will
1988 * fit into, so we over-schedule and say they will be scheduled every
1991 if (packets_remaining > 0)
1992 bw_used += overhead + packet_size;
1994 if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
1995 unsigned int port_index = virt_dev->real_port - 1;
1997 /* OK, we're manipulating a HS device attached to a
1998 * root port bandwidth domain. Include the number of active TTs
1999 * in the bandwidth used.
2001 bw_used += TT_HS_OVERHEAD *
2002 xhci->rh_bw[port_index].num_active_tts;
2005 xhci_dbg(xhci, "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2006 "Available: %u " "percent\n",
2007 bw_used, max_bandwidth, bw_reserved,
2008 (max_bandwidth - bw_used - bw_reserved) * 100 /
2011 bw_used += bw_reserved;
2012 if (bw_used > max_bandwidth) {
2013 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2014 bw_used, max_bandwidth);
2018 bw_table->bw_used = bw_used;
2022 static bool xhci_is_async_ep(unsigned int ep_type)
2024 return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2025 ep_type != ISOC_IN_EP &&
2026 ep_type != INT_IN_EP);
2029 void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2030 struct xhci_bw_info *ep_bw,
2031 struct xhci_interval_bw_table *bw_table,
2032 struct usb_device *udev,
2033 struct xhci_virt_ep *virt_ep,
2034 struct xhci_tt_bw_info *tt_info)
2036 struct xhci_interval_bw *interval_bw;
2037 int normalized_interval;
2039 if (xhci_is_async_ep(ep_bw->type) ||
2040 list_empty(&virt_ep->bw_endpoint_list))
2043 /* For LS/FS devices, we need to translate the interval expressed in
2044 * microframes to frames.
2046 if (udev->speed == USB_SPEED_HIGH)
2047 normalized_interval = ep_bw->ep_interval;
2049 normalized_interval = ep_bw->ep_interval - 3;
2051 if (normalized_interval == 0)
2052 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2053 interval_bw = &bw_table->interval_bw[normalized_interval];
2054 interval_bw->num_packets -= ep_bw->num_packets;
2055 switch (udev->speed) {
2057 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2059 case USB_SPEED_FULL:
2060 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2062 case USB_SPEED_HIGH:
2063 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2065 case USB_SPEED_SUPER:
2066 case USB_SPEED_UNKNOWN:
2067 case USB_SPEED_WIRELESS:
2068 /* Should never happen because only LS/FS/HS endpoints will get
2069 * added to the endpoint list.
2074 tt_info->active_eps -= 1;
2075 list_del_init(&virt_ep->bw_endpoint_list);
2078 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2079 struct xhci_bw_info *ep_bw,
2080 struct xhci_interval_bw_table *bw_table,
2081 struct usb_device *udev,
2082 struct xhci_virt_ep *virt_ep,
2083 struct xhci_tt_bw_info *tt_info)
2085 struct xhci_interval_bw *interval_bw;
2086 struct xhci_virt_ep *smaller_ep;
2087 int normalized_interval;
2089 if (xhci_is_async_ep(ep_bw->type))
2092 /* For LS/FS devices, we need to translate the interval expressed in
2093 * microframes to frames.
2095 if (udev->speed == USB_SPEED_HIGH)
2096 normalized_interval = ep_bw->ep_interval;
2098 normalized_interval = ep_bw->ep_interval - 3;
2100 if (normalized_interval == 0)
2101 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2102 interval_bw = &bw_table->interval_bw[normalized_interval];
2103 interval_bw->num_packets += ep_bw->num_packets;
2104 switch (udev->speed) {
2106 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2108 case USB_SPEED_FULL:
2109 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2111 case USB_SPEED_HIGH:
2112 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2114 case USB_SPEED_SUPER:
2115 case USB_SPEED_UNKNOWN:
2116 case USB_SPEED_WIRELESS:
2117 /* Should never happen because only LS/FS/HS endpoints will get
2118 * added to the endpoint list.
2124 tt_info->active_eps += 1;
2125 /* Insert the endpoint into the list, largest max packet size first. */
2126 list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2128 if (ep_bw->max_packet_size >=
2129 smaller_ep->bw_info.max_packet_size) {
2130 /* Add the new ep before the smaller endpoint */
2131 list_add_tail(&virt_ep->bw_endpoint_list,
2132 &smaller_ep->bw_endpoint_list);
2136 /* Add the new endpoint at the end of the list. */
2137 list_add_tail(&virt_ep->bw_endpoint_list,
2138 &interval_bw->endpoints);
2141 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2142 struct xhci_virt_device *virt_dev,
2145 struct xhci_root_port_bw_info *rh_bw_info;
2146 if (!virt_dev->tt_info)
2149 rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2150 if (old_active_eps == 0 &&
2151 virt_dev->tt_info->active_eps != 0) {
2152 rh_bw_info->num_active_tts += 1;
2153 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2154 } else if (old_active_eps != 0 &&
2155 virt_dev->tt_info->active_eps == 0) {
2156 rh_bw_info->num_active_tts -= 1;
2157 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2161 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2162 struct xhci_virt_device *virt_dev,
2163 struct xhci_container_ctx *in_ctx)
2165 struct xhci_bw_info ep_bw_info[31];
2167 struct xhci_input_control_ctx *ctrl_ctx;
2168 int old_active_eps = 0;
2170 if (virt_dev->udev->speed == USB_SPEED_SUPER)
2173 if (virt_dev->tt_info)
2174 old_active_eps = virt_dev->tt_info->active_eps;
2176 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2178 for (i = 0; i < 31; i++) {
2179 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2182 /* Make a copy of the BW info in case we need to revert this */
2183 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2184 sizeof(ep_bw_info[i]));
2185 /* Drop the endpoint from the interval table if the endpoint is
2186 * being dropped or changed.
2188 if (EP_IS_DROPPED(ctrl_ctx, i))
2189 xhci_drop_ep_from_interval_table(xhci,
2190 &virt_dev->eps[i].bw_info,
2196 /* Overwrite the information stored in the endpoints' bw_info */
2197 xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2198 for (i = 0; i < 31; i++) {
2199 /* Add any changed or added endpoints to the interval table */
2200 if (EP_IS_ADDED(ctrl_ctx, i))
2201 xhci_add_ep_to_interval_table(xhci,
2202 &virt_dev->eps[i].bw_info,
2209 if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2210 /* Ok, this fits in the bandwidth we have.
2211 * Update the number of active TTs.
2213 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2217 /* We don't have enough bandwidth for this, revert the stored info. */
2218 for (i = 0; i < 31; i++) {
2219 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2222 /* Drop the new copies of any added or changed endpoints from
2223 * the interval table.
2225 if (EP_IS_ADDED(ctrl_ctx, i)) {
2226 xhci_drop_ep_from_interval_table(xhci,
2227 &virt_dev->eps[i].bw_info,
2233 /* Revert the endpoint back to its old information */
2234 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2235 sizeof(ep_bw_info[i]));
2236 /* Add any changed or dropped endpoints back into the table */
2237 if (EP_IS_DROPPED(ctrl_ctx, i))
2238 xhci_add_ep_to_interval_table(xhci,
2239 &virt_dev->eps[i].bw_info,
2249 /* Issue a configure endpoint command or evaluate context command
2250 * and wait for it to finish.
2252 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2253 struct usb_device *udev,
2254 struct xhci_command *command,
2255 bool ctx_change, bool must_succeed)
2259 unsigned long flags;
2260 struct xhci_container_ctx *in_ctx;
2261 struct completion *cmd_completion;
2263 struct xhci_virt_device *virt_dev;
2265 spin_lock_irqsave(&xhci->lock, flags);
2266 virt_dev = xhci->devs[udev->slot_id];
2269 in_ctx = command->in_ctx;
2271 in_ctx = virt_dev->in_ctx;
2273 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2274 xhci_reserve_host_resources(xhci, in_ctx)) {
2275 spin_unlock_irqrestore(&xhci->lock, flags);
2276 xhci_warn(xhci, "Not enough host resources, "
2277 "active endpoint contexts = %u\n",
2278 xhci->num_active_eps);
2281 if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2282 xhci_reserve_bandwidth(xhci, virt_dev, in_ctx)) {
2283 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2284 xhci_free_host_resources(xhci, in_ctx);
2285 spin_unlock_irqrestore(&xhci->lock, flags);
2286 xhci_warn(xhci, "Not enough bandwidth\n");
2291 cmd_completion = command->completion;
2292 cmd_status = &command->status;
2293 command->command_trb = xhci->cmd_ring->enqueue;
2295 /* Enqueue pointer can be left pointing to the link TRB,
2296 * we must handle that
2298 if (TRB_TYPE_LINK_LE32(command->command_trb->link.control))
2299 command->command_trb =
2300 xhci->cmd_ring->enq_seg->next->trbs;
2302 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
2304 cmd_completion = &virt_dev->cmd_completion;
2305 cmd_status = &virt_dev->cmd_status;
2307 init_completion(cmd_completion);
2310 ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
2311 udev->slot_id, must_succeed);
2313 ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
2317 list_del(&command->cmd_list);
2318 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2319 xhci_free_host_resources(xhci, in_ctx);
2320 spin_unlock_irqrestore(&xhci->lock, flags);
2321 xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
2324 xhci_ring_cmd_db(xhci);
2325 spin_unlock_irqrestore(&xhci->lock, flags);
2327 /* Wait for the configure endpoint command to complete */
2328 timeleft = wait_for_completion_interruptible_timeout(
2330 USB_CTRL_SET_TIMEOUT);
2331 if (timeleft <= 0) {
2332 xhci_warn(xhci, "%s while waiting for %s command\n",
2333 timeleft == 0 ? "Timeout" : "Signal",
2335 "configure endpoint" :
2336 "evaluate context");
2337 /* FIXME cancel the configure endpoint command */
2342 ret = xhci_configure_endpoint_result(xhci, udev, cmd_status);
2344 ret = xhci_evaluate_context_result(xhci, udev, cmd_status);
2346 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2347 spin_lock_irqsave(&xhci->lock, flags);
2348 /* If the command failed, remove the reserved resources.
2349 * Otherwise, clean up the estimate to include dropped eps.
2352 xhci_free_host_resources(xhci, in_ctx);
2354 xhci_finish_resource_reservation(xhci, in_ctx);
2355 spin_unlock_irqrestore(&xhci->lock, flags);
2360 /* Called after one or more calls to xhci_add_endpoint() or
2361 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2362 * to call xhci_reset_bandwidth().
2364 * Since we are in the middle of changing either configuration or
2365 * installing a new alt setting, the USB core won't allow URBs to be
2366 * enqueued for any endpoint on the old config or interface. Nothing
2367 * else should be touching the xhci->devs[slot_id] structure, so we
2368 * don't need to take the xhci->lock for manipulating that.
2370 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2374 struct xhci_hcd *xhci;
2375 struct xhci_virt_device *virt_dev;
2376 struct xhci_input_control_ctx *ctrl_ctx;
2377 struct xhci_slot_ctx *slot_ctx;
2379 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2382 xhci = hcd_to_xhci(hcd);
2383 if (xhci->xhc_state & XHCI_STATE_DYING)
2386 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2387 virt_dev = xhci->devs[udev->slot_id];
2389 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2390 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2391 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2392 ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2393 ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2395 /* Don't issue the command if there's no endpoints to update. */
2396 if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2397 ctrl_ctx->drop_flags == 0)
2400 xhci_dbg(xhci, "New Input Control Context:\n");
2401 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2402 xhci_dbg_ctx(xhci, virt_dev->in_ctx,
2403 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2405 ret = xhci_configure_endpoint(xhci, udev, NULL,
2408 /* Callee should call reset_bandwidth() */
2412 xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
2413 xhci_dbg_ctx(xhci, virt_dev->out_ctx,
2414 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2416 /* Free any rings that were dropped, but not changed. */
2417 for (i = 1; i < 31; ++i) {
2418 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2419 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1))))
2420 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2422 xhci_zero_in_ctx(xhci, virt_dev);
2424 * Install any rings for completely new endpoints or changed endpoints,
2425 * and free or cache any old rings from changed endpoints.
2427 for (i = 1; i < 31; ++i) {
2428 if (!virt_dev->eps[i].new_ring)
2430 /* Only cache or free the old ring if it exists.
2431 * It may not if this is the first add of an endpoint.
2433 if (virt_dev->eps[i].ring) {
2434 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2436 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2437 virt_dev->eps[i].new_ring = NULL;
2443 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2445 struct xhci_hcd *xhci;
2446 struct xhci_virt_device *virt_dev;
2449 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2452 xhci = hcd_to_xhci(hcd);
2454 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2455 virt_dev = xhci->devs[udev->slot_id];
2456 /* Free any rings allocated for added endpoints */
2457 for (i = 0; i < 31; ++i) {
2458 if (virt_dev->eps[i].new_ring) {
2459 xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2460 virt_dev->eps[i].new_ring = NULL;
2463 xhci_zero_in_ctx(xhci, virt_dev);
2466 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2467 struct xhci_container_ctx *in_ctx,
2468 struct xhci_container_ctx *out_ctx,
2469 u32 add_flags, u32 drop_flags)
2471 struct xhci_input_control_ctx *ctrl_ctx;
2472 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2473 ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2474 ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2475 xhci_slot_copy(xhci, in_ctx, out_ctx);
2476 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2478 xhci_dbg(xhci, "Input Context:\n");
2479 xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
2482 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2483 unsigned int slot_id, unsigned int ep_index,
2484 struct xhci_dequeue_state *deq_state)
2486 struct xhci_container_ctx *in_ctx;
2487 struct xhci_ep_ctx *ep_ctx;
2491 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2492 xhci->devs[slot_id]->out_ctx, ep_index);
2493 in_ctx = xhci->devs[slot_id]->in_ctx;
2494 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2495 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2496 deq_state->new_deq_ptr);
2498 xhci_warn(xhci, "WARN Cannot submit config ep after "
2499 "reset ep command\n");
2500 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2501 deq_state->new_deq_seg,
2502 deq_state->new_deq_ptr);
2505 ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2507 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2508 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2509 xhci->devs[slot_id]->out_ctx, added_ctxs, added_ctxs);
2512 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2513 struct usb_device *udev, unsigned int ep_index)
2515 struct xhci_dequeue_state deq_state;
2516 struct xhci_virt_ep *ep;
2518 xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
2519 ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2520 /* We need to move the HW's dequeue pointer past this TD,
2521 * or it will attempt to resend it on the next doorbell ring.
2523 xhci_find_new_dequeue_state(xhci, udev->slot_id,
2524 ep_index, ep->stopped_stream, ep->stopped_td,
2527 /* HW with the reset endpoint quirk will use the saved dequeue state to
2528 * issue a configure endpoint command later.
2530 if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2531 xhci_dbg(xhci, "Queueing new dequeue state\n");
2532 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2533 ep_index, ep->stopped_stream, &deq_state);
2535 /* Better hope no one uses the input context between now and the
2536 * reset endpoint completion!
2537 * XXX: No idea how this hardware will react when stream rings
2540 xhci_dbg(xhci, "Setting up input context for "
2541 "configure endpoint command\n");
2542 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2543 ep_index, &deq_state);
2547 /* Deal with stalled endpoints. The core should have sent the control message
2548 * to clear the halt condition. However, we need to make the xHCI hardware
2549 * reset its sequence number, since a device will expect a sequence number of
2550 * zero after the halt condition is cleared.
2551 * Context: in_interrupt
2553 void xhci_endpoint_reset(struct usb_hcd *hcd,
2554 struct usb_host_endpoint *ep)
2556 struct xhci_hcd *xhci;
2557 struct usb_device *udev;
2558 unsigned int ep_index;
2559 unsigned long flags;
2561 struct xhci_virt_ep *virt_ep;
2563 xhci = hcd_to_xhci(hcd);
2564 udev = (struct usb_device *) ep->hcpriv;
2565 /* Called with a root hub endpoint (or an endpoint that wasn't added
2566 * with xhci_add_endpoint()
2570 ep_index = xhci_get_endpoint_index(&ep->desc);
2571 virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2572 if (!virt_ep->stopped_td) {
2573 xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n",
2574 ep->desc.bEndpointAddress);
2577 if (usb_endpoint_xfer_control(&ep->desc)) {
2578 xhci_dbg(xhci, "Control endpoint stall already handled.\n");
2582 xhci_dbg(xhci, "Queueing reset endpoint command\n");
2583 spin_lock_irqsave(&xhci->lock, flags);
2584 ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
2586 * Can't change the ring dequeue pointer until it's transitioned to the
2587 * stopped state, which is only upon a successful reset endpoint
2588 * command. Better hope that last command worked!
2591 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
2592 kfree(virt_ep->stopped_td);
2593 xhci_ring_cmd_db(xhci);
2595 virt_ep->stopped_td = NULL;
2596 virt_ep->stopped_trb = NULL;
2597 virt_ep->stopped_stream = 0;
2598 spin_unlock_irqrestore(&xhci->lock, flags);
2601 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
2604 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2605 struct usb_device *udev, struct usb_host_endpoint *ep,
2606 unsigned int slot_id)
2609 unsigned int ep_index;
2610 unsigned int ep_state;
2614 ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2617 if (ep->ss_ep_comp.bmAttributes == 0) {
2618 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2619 " descriptor for ep 0x%x does not support streams\n",
2620 ep->desc.bEndpointAddress);
2624 ep_index = xhci_get_endpoint_index(&ep->desc);
2625 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2626 if (ep_state & EP_HAS_STREAMS ||
2627 ep_state & EP_GETTING_STREAMS) {
2628 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2629 "already has streams set up.\n",
2630 ep->desc.bEndpointAddress);
2631 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
2632 "dynamic stream context array reallocation.\n");
2635 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
2636 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
2637 "endpoint 0x%x; URBs are pending.\n",
2638 ep->desc.bEndpointAddress);
2644 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
2645 unsigned int *num_streams, unsigned int *num_stream_ctxs)
2647 unsigned int max_streams;
2649 /* The stream context array size must be a power of two */
2650 *num_stream_ctxs = roundup_pow_of_two(*num_streams);
2652 * Find out how many primary stream array entries the host controller
2653 * supports. Later we may use secondary stream arrays (similar to 2nd
2654 * level page entries), but that's an optional feature for xHCI host
2655 * controllers. xHCs must support at least 4 stream IDs.
2657 max_streams = HCC_MAX_PSA(xhci->hcc_params);
2658 if (*num_stream_ctxs > max_streams) {
2659 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
2661 *num_stream_ctxs = max_streams;
2662 *num_streams = max_streams;
2666 /* Returns an error code if one of the endpoint already has streams.
2667 * This does not change any data structures, it only checks and gathers
2670 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
2671 struct usb_device *udev,
2672 struct usb_host_endpoint **eps, unsigned int num_eps,
2673 unsigned int *num_streams, u32 *changed_ep_bitmask)
2675 unsigned int max_streams;
2676 unsigned int endpoint_flag;
2680 for (i = 0; i < num_eps; i++) {
2681 ret = xhci_check_streams_endpoint(xhci, udev,
2682 eps[i], udev->slot_id);
2686 max_streams = USB_SS_MAX_STREAMS(
2687 eps[i]->ss_ep_comp.bmAttributes);
2688 if (max_streams < (*num_streams - 1)) {
2689 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
2690 eps[i]->desc.bEndpointAddress,
2692 *num_streams = max_streams+1;
2695 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
2696 if (*changed_ep_bitmask & endpoint_flag)
2698 *changed_ep_bitmask |= endpoint_flag;
2703 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
2704 struct usb_device *udev,
2705 struct usb_host_endpoint **eps, unsigned int num_eps)
2707 u32 changed_ep_bitmask = 0;
2708 unsigned int slot_id;
2709 unsigned int ep_index;
2710 unsigned int ep_state;
2713 slot_id = udev->slot_id;
2714 if (!xhci->devs[slot_id])
2717 for (i = 0; i < num_eps; i++) {
2718 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2719 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2720 /* Are streams already being freed for the endpoint? */
2721 if (ep_state & EP_GETTING_NO_STREAMS) {
2722 xhci_warn(xhci, "WARN Can't disable streams for "
2724 "streams are being disabled already.",
2725 eps[i]->desc.bEndpointAddress);
2728 /* Are there actually any streams to free? */
2729 if (!(ep_state & EP_HAS_STREAMS) &&
2730 !(ep_state & EP_GETTING_STREAMS)) {
2731 xhci_warn(xhci, "WARN Can't disable streams for "
2733 "streams are already disabled!",
2734 eps[i]->desc.bEndpointAddress);
2735 xhci_warn(xhci, "WARN xhci_free_streams() called "
2736 "with non-streams endpoint\n");
2739 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
2741 return changed_ep_bitmask;
2745 * The USB device drivers use this function (though the HCD interface in USB
2746 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
2747 * coordinate mass storage command queueing across multiple endpoints (basically
2748 * a stream ID == a task ID).
2750 * Setting up streams involves allocating the same size stream context array
2751 * for each endpoint and issuing a configure endpoint command for all endpoints.
2753 * Don't allow the call to succeed if one endpoint only supports one stream
2754 * (which means it doesn't support streams at all).
2756 * Drivers may get less stream IDs than they asked for, if the host controller
2757 * hardware or endpoints claim they can't support the number of requested
2760 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
2761 struct usb_host_endpoint **eps, unsigned int num_eps,
2762 unsigned int num_streams, gfp_t mem_flags)
2765 struct xhci_hcd *xhci;
2766 struct xhci_virt_device *vdev;
2767 struct xhci_command *config_cmd;
2768 unsigned int ep_index;
2769 unsigned int num_stream_ctxs;
2770 unsigned long flags;
2771 u32 changed_ep_bitmask = 0;
2776 /* Add one to the number of streams requested to account for
2777 * stream 0 that is reserved for xHCI usage.
2780 xhci = hcd_to_xhci(hcd);
2781 xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
2784 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
2786 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
2790 /* Check to make sure all endpoints are not already configured for
2791 * streams. While we're at it, find the maximum number of streams that
2792 * all the endpoints will support and check for duplicate endpoints.
2794 spin_lock_irqsave(&xhci->lock, flags);
2795 ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
2796 num_eps, &num_streams, &changed_ep_bitmask);
2798 xhci_free_command(xhci, config_cmd);
2799 spin_unlock_irqrestore(&xhci->lock, flags);
2802 if (num_streams <= 1) {
2803 xhci_warn(xhci, "WARN: endpoints can't handle "
2804 "more than one stream.\n");
2805 xhci_free_command(xhci, config_cmd);
2806 spin_unlock_irqrestore(&xhci->lock, flags);
2809 vdev = xhci->devs[udev->slot_id];
2810 /* Mark each endpoint as being in transition, so
2811 * xhci_urb_enqueue() will reject all URBs.
2813 for (i = 0; i < num_eps; i++) {
2814 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2815 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
2817 spin_unlock_irqrestore(&xhci->lock, flags);
2819 /* Setup internal data structures and allocate HW data structures for
2820 * streams (but don't install the HW structures in the input context
2821 * until we're sure all memory allocation succeeded).
2823 xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
2824 xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
2825 num_stream_ctxs, num_streams);
2827 for (i = 0; i < num_eps; i++) {
2828 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2829 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
2831 num_streams, mem_flags);
2832 if (!vdev->eps[ep_index].stream_info)
2834 /* Set maxPstreams in endpoint context and update deq ptr to
2835 * point to stream context array. FIXME
2839 /* Set up the input context for a configure endpoint command. */
2840 for (i = 0; i < num_eps; i++) {
2841 struct xhci_ep_ctx *ep_ctx;
2843 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2844 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
2846 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
2847 vdev->out_ctx, ep_index);
2848 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
2849 vdev->eps[ep_index].stream_info);
2851 /* Tell the HW to drop its old copy of the endpoint context info
2852 * and add the updated copy from the input context.
2854 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
2855 vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
2857 /* Issue and wait for the configure endpoint command */
2858 ret = xhci_configure_endpoint(xhci, udev, config_cmd,
2861 /* xHC rejected the configure endpoint command for some reason, so we
2862 * leave the old ring intact and free our internal streams data
2868 spin_lock_irqsave(&xhci->lock, flags);
2869 for (i = 0; i < num_eps; i++) {
2870 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2871 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
2872 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
2873 udev->slot_id, ep_index);
2874 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
2876 xhci_free_command(xhci, config_cmd);
2877 spin_unlock_irqrestore(&xhci->lock, flags);
2879 /* Subtract 1 for stream 0, which drivers can't use */
2880 return num_streams - 1;
2883 /* If it didn't work, free the streams! */
2884 for (i = 0; i < num_eps; i++) {
2885 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2886 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
2887 vdev->eps[ep_index].stream_info = NULL;
2888 /* FIXME Unset maxPstreams in endpoint context and
2889 * update deq ptr to point to normal string ring.
2891 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
2892 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
2893 xhci_endpoint_zero(xhci, vdev, eps[i]);
2895 xhci_free_command(xhci, config_cmd);
2899 /* Transition the endpoint from using streams to being a "normal" endpoint
2902 * Modify the endpoint context state, submit a configure endpoint command,
2903 * and free all endpoint rings for streams if that completes successfully.
2905 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
2906 struct usb_host_endpoint **eps, unsigned int num_eps,
2910 struct xhci_hcd *xhci;
2911 struct xhci_virt_device *vdev;
2912 struct xhci_command *command;
2913 unsigned int ep_index;
2914 unsigned long flags;
2915 u32 changed_ep_bitmask;
2917 xhci = hcd_to_xhci(hcd);
2918 vdev = xhci->devs[udev->slot_id];
2920 /* Set up a configure endpoint command to remove the streams rings */
2921 spin_lock_irqsave(&xhci->lock, flags);
2922 changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
2923 udev, eps, num_eps);
2924 if (changed_ep_bitmask == 0) {
2925 spin_unlock_irqrestore(&xhci->lock, flags);
2929 /* Use the xhci_command structure from the first endpoint. We may have
2930 * allocated too many, but the driver may call xhci_free_streams() for
2931 * each endpoint it grouped into one call to xhci_alloc_streams().
2933 ep_index = xhci_get_endpoint_index(&eps[0]->desc);
2934 command = vdev->eps[ep_index].stream_info->free_streams_command;
2935 for (i = 0; i < num_eps; i++) {
2936 struct xhci_ep_ctx *ep_ctx;
2938 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2939 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
2940 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
2941 EP_GETTING_NO_STREAMS;
2943 xhci_endpoint_copy(xhci, command->in_ctx,
2944 vdev->out_ctx, ep_index);
2945 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
2946 &vdev->eps[ep_index]);
2948 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
2949 vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
2950 spin_unlock_irqrestore(&xhci->lock, flags);
2952 /* Issue and wait for the configure endpoint command,
2953 * which must succeed.
2955 ret = xhci_configure_endpoint(xhci, udev, command,
2958 /* xHC rejected the configure endpoint command for some reason, so we
2959 * leave the streams rings intact.
2964 spin_lock_irqsave(&xhci->lock, flags);
2965 for (i = 0; i < num_eps; i++) {
2966 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2967 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
2968 vdev->eps[ep_index].stream_info = NULL;
2969 /* FIXME Unset maxPstreams in endpoint context and
2970 * update deq ptr to point to normal string ring.
2972 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
2973 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
2975 spin_unlock_irqrestore(&xhci->lock, flags);
2981 * Deletes endpoint resources for endpoints that were active before a Reset
2982 * Device command, or a Disable Slot command. The Reset Device command leaves
2983 * the control endpoint intact, whereas the Disable Slot command deletes it.
2985 * Must be called with xhci->lock held.
2987 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
2988 struct xhci_virt_device *virt_dev, bool drop_control_ep)
2991 unsigned int num_dropped_eps = 0;
2992 unsigned int drop_flags = 0;
2994 for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
2995 if (virt_dev->eps[i].ring) {
2996 drop_flags |= 1 << i;
3000 xhci->num_active_eps -= num_dropped_eps;
3001 if (num_dropped_eps)
3002 xhci_dbg(xhci, "Dropped %u ep ctxs, flags = 0x%x, "
3004 num_dropped_eps, drop_flags,
3005 xhci->num_active_eps);
3009 * This submits a Reset Device Command, which will set the device state to 0,
3010 * set the device address to 0, and disable all the endpoints except the default
3011 * control endpoint. The USB core should come back and call
3012 * xhci_address_device(), and then re-set up the configuration. If this is
3013 * called because of a usb_reset_and_verify_device(), then the old alternate
3014 * settings will be re-installed through the normal bandwidth allocation
3017 * Wait for the Reset Device command to finish. Remove all structures
3018 * associated with the endpoints that were disabled. Clear the input device
3019 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
3021 * If the virt_dev to be reset does not exist or does not match the udev,
3022 * it means the device is lost, possibly due to the xHC restore error and
3023 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3024 * re-allocate the device.
3026 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
3029 unsigned long flags;
3030 struct xhci_hcd *xhci;
3031 unsigned int slot_id;
3032 struct xhci_virt_device *virt_dev;
3033 struct xhci_command *reset_device_cmd;
3035 int last_freed_endpoint;
3036 struct xhci_slot_ctx *slot_ctx;
3037 int old_active_eps = 0;
3039 ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
3042 xhci = hcd_to_xhci(hcd);
3043 slot_id = udev->slot_id;
3044 virt_dev = xhci->devs[slot_id];
3046 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3047 "not exist. Re-allocate the device\n", slot_id);
3048 ret = xhci_alloc_dev(hcd, udev);
3055 if (virt_dev->udev != udev) {
3056 /* If the virt_dev and the udev does not match, this virt_dev
3057 * may belong to another udev.
3058 * Re-allocate the device.
3060 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3061 "not match the udev. Re-allocate the device\n",
3063 ret = xhci_alloc_dev(hcd, udev);
3070 /* If device is not setup, there is no point in resetting it */
3071 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3072 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3073 SLOT_STATE_DISABLED)
3076 xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
3077 /* Allocate the command structure that holds the struct completion.
3078 * Assume we're in process context, since the normal device reset
3079 * process has to wait for the device anyway. Storage devices are
3080 * reset as part of error handling, so use GFP_NOIO instead of
3083 reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
3084 if (!reset_device_cmd) {
3085 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
3089 /* Attempt to submit the Reset Device command to the command ring */
3090 spin_lock_irqsave(&xhci->lock, flags);
3091 reset_device_cmd->command_trb = xhci->cmd_ring->enqueue;
3093 /* Enqueue pointer can be left pointing to the link TRB,
3094 * we must handle that
3096 if (TRB_TYPE_LINK_LE32(reset_device_cmd->command_trb->link.control))
3097 reset_device_cmd->command_trb =
3098 xhci->cmd_ring->enq_seg->next->trbs;
3100 list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list);
3101 ret = xhci_queue_reset_device(xhci, slot_id);
3103 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3104 list_del(&reset_device_cmd->cmd_list);
3105 spin_unlock_irqrestore(&xhci->lock, flags);
3106 goto command_cleanup;
3108 xhci_ring_cmd_db(xhci);
3109 spin_unlock_irqrestore(&xhci->lock, flags);
3111 /* Wait for the Reset Device command to finish */
3112 timeleft = wait_for_completion_interruptible_timeout(
3113 reset_device_cmd->completion,
3114 USB_CTRL_SET_TIMEOUT);
3115 if (timeleft <= 0) {
3116 xhci_warn(xhci, "%s while waiting for reset device command\n",
3117 timeleft == 0 ? "Timeout" : "Signal");
3118 spin_lock_irqsave(&xhci->lock, flags);
3119 /* The timeout might have raced with the event ring handler, so
3120 * only delete from the list if the item isn't poisoned.
3122 if (reset_device_cmd->cmd_list.next != LIST_POISON1)
3123 list_del(&reset_device_cmd->cmd_list);
3124 spin_unlock_irqrestore(&xhci->lock, flags);
3126 goto command_cleanup;
3129 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3130 * unless we tried to reset a slot ID that wasn't enabled,
3131 * or the device wasn't in the addressed or configured state.
3133 ret = reset_device_cmd->status;
3135 case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
3136 case COMP_CTX_STATE: /* 0.96 completion code for same thing */
3137 xhci_info(xhci, "Can't reset device (slot ID %u) in %s state\n",
3139 xhci_get_slot_state(xhci, virt_dev->out_ctx));
3140 xhci_info(xhci, "Not freeing device rings.\n");
3141 /* Don't treat this as an error. May change my mind later. */
3143 goto command_cleanup;
3145 xhci_dbg(xhci, "Successful reset device command.\n");
3148 if (xhci_is_vendor_info_code(xhci, ret))
3150 xhci_warn(xhci, "Unknown completion code %u for "
3151 "reset device command.\n", ret);
3153 goto command_cleanup;
3156 /* Free up host controller endpoint resources */
3157 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3158 spin_lock_irqsave(&xhci->lock, flags);
3159 /* Don't delete the default control endpoint resources */
3160 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
3161 spin_unlock_irqrestore(&xhci->lock, flags);
3164 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3165 last_freed_endpoint = 1;
3166 for (i = 1; i < 31; ++i) {
3167 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3169 if (ep->ep_state & EP_HAS_STREAMS) {
3170 xhci_free_stream_info(xhci, ep->stream_info);
3171 ep->stream_info = NULL;
3172 ep->ep_state &= ~EP_HAS_STREAMS;
3176 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
3177 last_freed_endpoint = i;
3179 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
3180 xhci_drop_ep_from_interval_table(xhci,
3181 &virt_dev->eps[i].bw_info,
3186 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
3188 /* If necessary, update the number of active TTs on this root port */
3189 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3191 xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
3192 xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
3196 xhci_free_command(xhci, reset_device_cmd);
3201 * At this point, the struct usb_device is about to go away, the device has
3202 * disconnected, and all traffic has been stopped and the endpoints have been
3203 * disabled. Free any HC data structures associated with that device.
3205 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3207 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3208 struct xhci_virt_device *virt_dev;
3209 unsigned long flags;
3213 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3214 /* If the host is halted due to driver unload, we still need to free the
3217 if (ret <= 0 && ret != -ENODEV)
3220 virt_dev = xhci->devs[udev->slot_id];
3222 /* Stop any wayward timer functions (which may grab the lock) */
3223 for (i = 0; i < 31; ++i) {
3224 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
3225 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3228 spin_lock_irqsave(&xhci->lock, flags);
3229 /* Don't disable the slot if the host controller is dead. */
3230 state = xhci_readl(xhci, &xhci->op_regs->status);
3231 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3232 (xhci->xhc_state & XHCI_STATE_HALTED)) {
3233 xhci_free_virt_device(xhci, udev->slot_id);
3234 spin_unlock_irqrestore(&xhci->lock, flags);
3238 if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
3239 spin_unlock_irqrestore(&xhci->lock, flags);
3240 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3243 xhci_ring_cmd_db(xhci);
3244 spin_unlock_irqrestore(&xhci->lock, flags);
3246 * Event command completion handler will free any data structures
3247 * associated with the slot. XXX Can free sleep?
3252 * Checks if we have enough host controller resources for the default control
3255 * Must be called with xhci->lock held.
3257 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
3259 if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
3260 xhci_dbg(xhci, "Not enough ep ctxs: "
3261 "%u active, need to add 1, limit is %u.\n",
3262 xhci->num_active_eps, xhci->limit_active_eps);
3265 xhci->num_active_eps += 1;
3266 xhci_dbg(xhci, "Adding 1 ep ctx, %u now active.\n",
3267 xhci->num_active_eps);
3273 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3274 * timed out, or allocating memory failed. Returns 1 on success.
3276 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3278 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3279 unsigned long flags;
3283 spin_lock_irqsave(&xhci->lock, flags);
3284 ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
3286 spin_unlock_irqrestore(&xhci->lock, flags);
3287 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3290 xhci_ring_cmd_db(xhci);
3291 spin_unlock_irqrestore(&xhci->lock, flags);
3293 /* XXX: how much time for xHC slot assignment? */
3294 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3295 USB_CTRL_SET_TIMEOUT);
3296 if (timeleft <= 0) {
3297 xhci_warn(xhci, "%s while waiting for a slot\n",
3298 timeleft == 0 ? "Timeout" : "Signal");
3299 /* FIXME cancel the enable slot request */
3303 if (!xhci->slot_id) {
3304 xhci_err(xhci, "Error while assigning device slot ID\n");
3308 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3309 spin_lock_irqsave(&xhci->lock, flags);
3310 ret = xhci_reserve_host_control_ep_resources(xhci);
3312 spin_unlock_irqrestore(&xhci->lock, flags);
3313 xhci_warn(xhci, "Not enough host resources, "
3314 "active endpoint contexts = %u\n",
3315 xhci->num_active_eps);
3318 spin_unlock_irqrestore(&xhci->lock, flags);
3320 /* Use GFP_NOIO, since this function can be called from
3321 * xhci_discover_or_reset_device(), which may be called as part of
3322 * mass storage driver error handling.
3324 if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_NOIO)) {
3325 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
3328 udev->slot_id = xhci->slot_id;
3329 /* Is this a LS or FS device under a HS hub? */
3330 /* Hub or peripherial? */
3334 /* Disable slot, if we can do it without mem alloc */
3335 spin_lock_irqsave(&xhci->lock, flags);
3336 if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
3337 xhci_ring_cmd_db(xhci);
3338 spin_unlock_irqrestore(&xhci->lock, flags);
3343 * Issue an Address Device command (which will issue a SetAddress request to
3345 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
3346 * we should only issue and wait on one address command at the same time.
3348 * We add one to the device address issued by the hardware because the USB core
3349 * uses address 1 for the root hubs (even though they're not really devices).
3351 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
3353 unsigned long flags;
3355 struct xhci_virt_device *virt_dev;
3357 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3358 struct xhci_slot_ctx *slot_ctx;
3359 struct xhci_input_control_ctx *ctrl_ctx;
3362 if (!udev->slot_id) {
3363 xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
3367 virt_dev = xhci->devs[udev->slot_id];
3369 if (WARN_ON(!virt_dev)) {
3371 * In plug/unplug torture test with an NEC controller,
3372 * a zero-dereference was observed once due to virt_dev = 0.
3373 * Print useful debug rather than crash if it is observed again!
3375 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
3380 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3382 * If this is the first Set Address since device plug-in or
3383 * virt_device realloaction after a resume with an xHCI power loss,
3384 * then set up the slot context.
3386 if (!slot_ctx->dev_info)
3387 xhci_setup_addressable_virt_dev(xhci, udev);
3388 /* Otherwise, update the control endpoint ring enqueue pointer. */
3390 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
3391 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3392 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3394 spin_lock_irqsave(&xhci->lock, flags);
3395 ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
3398 spin_unlock_irqrestore(&xhci->lock, flags);
3399 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3402 xhci_ring_cmd_db(xhci);
3403 spin_unlock_irqrestore(&xhci->lock, flags);
3405 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3406 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3407 USB_CTRL_SET_TIMEOUT);
3408 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3409 * the SetAddress() "recovery interval" required by USB and aborting the
3410 * command on a timeout.
3412 if (timeleft <= 0) {
3413 xhci_warn(xhci, "%s while waiting for a slot\n",
3414 timeleft == 0 ? "Timeout" : "Signal");
3415 /* FIXME cancel the address device command */
3419 switch (virt_dev->cmd_status) {
3420 case COMP_CTX_STATE:
3422 xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
3427 dev_warn(&udev->dev, "Device not responding to set address.\n");
3431 dev_warn(&udev->dev, "ERROR: Incompatible device for address "
3432 "device command.\n");
3436 xhci_dbg(xhci, "Successful Address Device command\n");
3439 xhci_err(xhci, "ERROR: unexpected command completion "
3440 "code 0x%x.\n", virt_dev->cmd_status);
3441 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3442 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3449 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
3450 xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64);
3451 xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n",
3453 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
3454 (unsigned long long)
3455 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
3456 xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
3457 (unsigned long long)virt_dev->out_ctx->dma);
3458 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3459 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3460 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3461 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3463 * USB core uses address 1 for the roothubs, so we add one to the
3464 * address given back to us by the HC.
3466 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3467 /* Use kernel assigned address for devices; store xHC assigned
3468 * address locally. */
3469 virt_dev->address = (le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK)
3471 /* Zero the input context control for later use */
3472 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
3473 ctrl_ctx->add_flags = 0;
3474 ctrl_ctx->drop_flags = 0;
3476 xhci_dbg(xhci, "Internal device address = %d\n", virt_dev->address);
3481 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
3482 * internal data structures for the device.
3484 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
3485 struct usb_tt *tt, gfp_t mem_flags)
3487 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3488 struct xhci_virt_device *vdev;
3489 struct xhci_command *config_cmd;
3490 struct xhci_input_control_ctx *ctrl_ctx;
3491 struct xhci_slot_ctx *slot_ctx;
3492 unsigned long flags;
3493 unsigned think_time;
3496 /* Ignore root hubs */
3500 vdev = xhci->devs[hdev->slot_id];
3502 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
3505 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
3507 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
3511 spin_lock_irqsave(&xhci->lock, flags);
3512 if (hdev->speed == USB_SPEED_HIGH &&
3513 xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
3514 xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
3515 xhci_free_command(xhci, config_cmd);
3516 spin_unlock_irqrestore(&xhci->lock, flags);
3520 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
3521 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
3522 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
3523 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
3524 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
3526 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
3527 if (xhci->hci_version > 0x95) {
3528 xhci_dbg(xhci, "xHCI version %x needs hub "
3529 "TT think time and number of ports\n",
3530 (unsigned int) xhci->hci_version);
3531 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
3532 /* Set TT think time - convert from ns to FS bit times.
3533 * 0 = 8 FS bit times, 1 = 16 FS bit times,
3534 * 2 = 24 FS bit times, 3 = 32 FS bit times.
3536 * xHCI 1.0: this field shall be 0 if the device is not a
3539 think_time = tt->think_time;
3540 if (think_time != 0)
3541 think_time = (think_time / 666) - 1;
3542 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
3543 slot_ctx->tt_info |=
3544 cpu_to_le32(TT_THINK_TIME(think_time));
3546 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
3547 "TT think time or number of ports\n",
3548 (unsigned int) xhci->hci_version);
3550 slot_ctx->dev_state = 0;
3551 spin_unlock_irqrestore(&xhci->lock, flags);
3553 xhci_dbg(xhci, "Set up %s for hub device.\n",
3554 (xhci->hci_version > 0x95) ?
3555 "configure endpoint" : "evaluate context");
3556 xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
3557 xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
3559 /* Issue and wait for the configure endpoint or
3560 * evaluate context command.
3562 if (xhci->hci_version > 0x95)
3563 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
3566 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
3569 xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
3570 xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
3572 xhci_free_command(xhci, config_cmd);
3576 int xhci_get_frame(struct usb_hcd *hcd)
3578 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3579 /* EHCI mods by the periodic size. Why? */
3580 return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
3583 MODULE_DESCRIPTION(DRIVER_DESC);
3584 MODULE_AUTHOR(DRIVER_AUTHOR);
3585 MODULE_LICENSE("GPL");
3587 static int __init xhci_hcd_init(void)
3592 retval = xhci_register_pci();
3595 printk(KERN_DEBUG "Problem registering PCI driver.");
3600 * Check the compiler generated sizes of structures that must be laid
3601 * out in specific ways for hardware access.
3603 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
3604 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
3605 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
3606 /* xhci_device_control has eight fields, and also
3607 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
3609 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
3610 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
3611 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
3612 BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
3613 BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
3614 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
3615 BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
3616 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
3619 module_init(xhci_hcd_init);
3621 static void __exit xhci_hcd_cleanup(void)
3624 xhci_unregister_pci();
3627 module_exit(xhci_hcd_cleanup);