2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <asm/unaligned.h>
27 static void xhci_hub_descriptor(struct xhci_hcd *xhci,
28 struct usb_hub_descriptor *desc)
33 ports = HCS_MAX_PORTS(xhci->hcs_params1);
35 /* USB 3.0 hubs have a different descriptor, but we fake this for now */
36 desc->bDescriptorType = 0x29;
37 desc->bPwrOn2PwrGood = 10; /* xhci section 5.4.9 says 20ms max */
38 desc->bHubContrCurrent = 0;
40 desc->bNbrPorts = ports;
41 temp = 1 + (ports / 8);
42 desc->bDescLength = 7 + 2 * temp;
44 /* Why does core/hcd.h define bitmap? It's just confusing. */
45 memset(&desc->DeviceRemovable[0], 0, temp);
46 memset(&desc->DeviceRemovable[temp], 0xff, temp);
48 /* Ugh, these should be #defines, FIXME */
49 /* Using table 11-13 in USB 2.0 spec. */
51 /* Bits 1:0 - support port power switching, or power always on */
52 if (HCC_PPC(xhci->hcc_params))
56 /* Bit 2 - root hubs are not part of a compound device */
57 /* Bits 4:3 - individual port over current protection */
59 /* Bits 6:5 - no TTs in root ports */
60 /* Bit 7 - no port indicators */
61 desc->wHubCharacteristics = (__force __u16) cpu_to_le16(temp);
64 static unsigned int xhci_port_speed(unsigned int port_status)
66 if (DEV_LOWSPEED(port_status))
67 return USB_PORT_STAT_LOW_SPEED;
68 if (DEV_HIGHSPEED(port_status))
69 return USB_PORT_STAT_HIGH_SPEED;
70 if (DEV_SUPERSPEED(port_status))
71 return USB_PORT_STAT_SUPER_SPEED;
73 * FIXME: Yes, we should check for full speed, but the core uses that as
74 * a default in portspeed() in usb/core/hub.c (which is the only place
75 * USB_PORT_STAT_*_SPEED is used).
81 * These bits are Read Only (RO) and should be saved and written to the
82 * registers: 0, 3, 10:13, 30
83 * connect status, over-current status, port speed, and device removable.
84 * connect status and port speed are also sticky - meaning they're in
85 * the AUX well and they aren't changed by a hot, warm, or cold reset.
87 #define XHCI_PORT_RO ((1<<0) | (1<<3) | (0xf<<10) | (1<<30))
89 * These bits are RW; writing a 0 clears the bit, writing a 1 sets the bit:
90 * bits 5:8, 9, 14:15, 25:27
91 * link state, port power, port indicator state, "wake on" enable state
93 #define XHCI_PORT_RWS ((0xf<<5) | (1<<9) | (0x3<<14) | (0x7<<25))
95 * These bits are RW; writing a 1 sets the bit, writing a 0 has no effect:
98 #define XHCI_PORT_RW1S ((1<<4))
100 * These bits are RW; writing a 1 clears the bit, writing a 0 has no effect:
101 * bits 1, 17, 18, 19, 20, 21, 22, 23
102 * port enable/disable, and
103 * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
104 * over-current, reset, link state, and L1 change
106 #define XHCI_PORT_RW1CS ((1<<1) | (0x7f<<17))
108 * Bit 16 is RW, and writing a '1' to it causes the link state control to be
111 #define XHCI_PORT_RW ((1<<16))
113 * These bits are Reserved Zero (RsvdZ) and zero should be written to them:
116 #define XHCI_PORT_RZ ((1<<2) | (1<<24) | (0xf<<28))
119 * Given a port state, this function returns a value that would result in the
120 * port being in the same state, if the value was written to the port status
122 * Save Read Only (RO) bits and save read/write bits where
123 * writing a 0 clears the bit and writing a 1 sets the bit (RWS).
124 * For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
126 u32 xhci_port_state_to_neutral(u32 state)
128 /* Save read-only status and port state */
129 return (state & XHCI_PORT_RO) | (state & XHCI_PORT_RWS);
133 * find slot id based on port number.
135 int xhci_find_slot_id_by_port(struct xhci_hcd *xhci, u16 port)
141 for (i = 0; i < MAX_HC_SLOTS; i++) {
144 if (xhci->devs[i]->port == port) {
155 * It issues stop endpoint command for EP 0 to 30. And wait the last command
157 * suspend will set to 1, if suspend bit need to set in command.
159 static int xhci_stop_device(struct xhci_hcd *xhci, int slot_id, int suspend)
161 struct xhci_virt_device *virt_dev;
162 struct xhci_command *cmd;
169 virt_dev = xhci->devs[slot_id];
170 cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
172 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
176 spin_lock_irqsave(&xhci->lock, flags);
177 for (i = LAST_EP_INDEX; i > 0; i--) {
178 if (virt_dev->eps[i].ring && virt_dev->eps[i].ring->dequeue)
179 xhci_queue_stop_endpoint(xhci, slot_id, i, suspend);
181 cmd->command_trb = xhci->cmd_ring->enqueue;
182 list_add_tail(&cmd->cmd_list, &virt_dev->cmd_list);
183 xhci_queue_stop_endpoint(xhci, slot_id, 0, suspend);
184 xhci_ring_cmd_db(xhci);
185 spin_unlock_irqrestore(&xhci->lock, flags);
187 /* Wait for last stop endpoint command to finish */
188 timeleft = wait_for_completion_interruptible_timeout(
190 USB_CTRL_SET_TIMEOUT);
192 xhci_warn(xhci, "%s while waiting for stop endpoint command\n",
193 timeleft == 0 ? "Timeout" : "Signal");
194 spin_lock_irqsave(&xhci->lock, flags);
195 /* The timeout might have raced with the event ring handler, so
196 * only delete from the list if the item isn't poisoned.
198 if (cmd->cmd_list.next != LIST_POISON1)
199 list_del(&cmd->cmd_list);
200 spin_unlock_irqrestore(&xhci->lock, flags);
202 goto command_cleanup;
206 xhci_free_command(xhci, cmd);
211 * Ring device, it rings the all doorbells unconditionally.
213 void xhci_ring_device(struct xhci_hcd *xhci, int slot_id)
217 for (i = 0; i < LAST_EP_INDEX + 1; i++)
218 if (xhci->devs[slot_id]->eps[i].ring &&
219 xhci->devs[slot_id]->eps[i].ring->dequeue)
220 xhci_ring_ep_doorbell(xhci, slot_id, i, 0);
225 static void xhci_disable_port(struct xhci_hcd *xhci, u16 wIndex,
226 u32 __iomem *addr, u32 port_status)
228 /* Write 1 to disable the port */
229 xhci_writel(xhci, port_status | PORT_PE, addr);
230 port_status = xhci_readl(xhci, addr);
231 xhci_dbg(xhci, "disable port, actual port %d status = 0x%x\n",
232 wIndex, port_status);
235 static void xhci_clear_port_change_bit(struct xhci_hcd *xhci, u16 wValue,
236 u16 wIndex, u32 __iomem *addr, u32 port_status)
238 char *port_change_bit;
242 case USB_PORT_FEAT_C_RESET:
244 port_change_bit = "reset";
246 case USB_PORT_FEAT_C_CONNECTION:
248 port_change_bit = "connect";
250 case USB_PORT_FEAT_C_OVER_CURRENT:
252 port_change_bit = "over-current";
254 case USB_PORT_FEAT_C_ENABLE:
256 port_change_bit = "enable/disable";
258 case USB_PORT_FEAT_C_SUSPEND:
260 port_change_bit = "suspend/resume";
263 /* Should never happen */
266 /* Change bits are all write 1 to clear */
267 xhci_writel(xhci, port_status | status, addr);
268 port_status = xhci_readl(xhci, addr);
269 xhci_dbg(xhci, "clear port %s change, actual port %d status = 0x%x\n",
270 port_change_bit, wIndex, port_status);
273 int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
274 u16 wIndex, char *buf, u16 wLength)
276 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
279 u32 temp, temp1, status;
284 ports = HCS_MAX_PORTS(xhci->hcs_params1);
286 spin_lock_irqsave(&xhci->lock, flags);
289 /* No power source, over-current reported per port */
292 case GetHubDescriptor:
293 xhci_hub_descriptor(xhci, (struct usb_hub_descriptor *) buf);
296 if (!wIndex || wIndex > ports)
300 addr = &xhci->op_regs->port_status_base + NUM_PORT_REGS*(wIndex & 0xff);
301 temp = xhci_readl(xhci, addr);
302 xhci_dbg(xhci, "get port status, actual port %d status = 0x%x\n", wIndex, temp);
304 /* wPortChange bits */
306 status |= USB_PORT_STAT_C_CONNECTION << 16;
308 status |= USB_PORT_STAT_C_ENABLE << 16;
309 if ((temp & PORT_OCC))
310 status |= USB_PORT_STAT_C_OVERCURRENT << 16;
312 * FIXME ignoring reset and USB 2.1/3.0 specific
315 if ((temp & PORT_PLS_MASK) == XDEV_U3
316 && (temp & PORT_POWER))
317 status |= 1 << USB_PORT_FEAT_SUSPEND;
318 if ((temp & PORT_PLS_MASK) == XDEV_RESUME) {
319 if ((temp & PORT_RESET) || !(temp & PORT_PE))
321 if (!DEV_SUPERSPEED(temp) && time_after_eq(jiffies,
322 xhci->resume_done[wIndex])) {
323 xhci_dbg(xhci, "Resume USB2 port %d\n",
325 xhci->resume_done[wIndex] = 0;
326 temp1 = xhci_port_state_to_neutral(temp);
327 temp1 &= ~PORT_PLS_MASK;
328 temp1 |= PORT_LINK_STROBE | XDEV_U0;
329 xhci_writel(xhci, temp1, addr);
331 xhci_dbg(xhci, "set port %d resume\n",
333 slot_id = xhci_find_slot_id_by_port(xhci,
336 xhci_dbg(xhci, "slot_id is zero\n");
339 xhci_ring_device(xhci, slot_id);
340 xhci->port_c_suspend[wIndex >> 5] |=
342 xhci->suspended_ports[wIndex >> 5] &=
343 ~(1 << (wIndex & 31));
346 if ((temp & PORT_PLS_MASK) == XDEV_U0
347 && (temp & PORT_POWER)
348 && (xhci->suspended_ports[wIndex >> 5] &
349 (1 << (wIndex & 31)))) {
350 xhci->suspended_ports[wIndex >> 5] &=
351 ~(1 << (wIndex & 31));
352 xhci->port_c_suspend[wIndex >> 5] |=
355 if (temp & PORT_CONNECT) {
356 status |= USB_PORT_STAT_CONNECTION;
357 status |= xhci_port_speed(temp);
360 status |= USB_PORT_STAT_ENABLE;
362 status |= USB_PORT_STAT_OVERCURRENT;
363 if (temp & PORT_RESET)
364 status |= USB_PORT_STAT_RESET;
365 if (temp & PORT_POWER)
366 status |= USB_PORT_STAT_POWER;
367 if (xhci->port_c_suspend[wIndex >> 5] & (1 << (wIndex & 31)))
368 status |= 1 << USB_PORT_FEAT_C_SUSPEND;
369 xhci_dbg(xhci, "Get port status returned 0x%x\n", status);
370 put_unaligned(cpu_to_le32(status), (__le32 *) buf);
374 if (!wIndex || wIndex > ports)
377 addr = &xhci->op_regs->port_status_base + NUM_PORT_REGS*(wIndex & 0xff);
378 temp = xhci_readl(xhci, addr);
379 temp = xhci_port_state_to_neutral(temp);
381 case USB_PORT_FEAT_SUSPEND:
382 temp = xhci_readl(xhci, addr);
383 /* In spec software should not attempt to suspend
384 * a port unless the port reports that it is in the
385 * enabled (PED = ‘1’,PLS < ‘3’) state.
387 if ((temp & PORT_PE) == 0 || (temp & PORT_RESET)
388 || (temp & PORT_PLS_MASK) >= XDEV_U3) {
389 xhci_warn(xhci, "USB core suspending device "
390 "not in U0/U1/U2.\n");
394 slot_id = xhci_find_slot_id_by_port(xhci, wIndex + 1);
396 xhci_warn(xhci, "slot_id is zero\n");
399 /* unlock to execute stop endpoint commands */
400 spin_unlock_irqrestore(&xhci->lock, flags);
401 xhci_stop_device(xhci, slot_id, 1);
402 spin_lock_irqsave(&xhci->lock, flags);
404 temp = xhci_port_state_to_neutral(temp);
405 temp &= ~PORT_PLS_MASK;
406 temp |= PORT_LINK_STROBE | XDEV_U3;
407 xhci_writel(xhci, temp, addr);
409 spin_unlock_irqrestore(&xhci->lock, flags);
410 msleep(10); /* wait device to enter */
411 spin_lock_irqsave(&xhci->lock, flags);
413 temp = xhci_readl(xhci, addr);
414 xhci->suspended_ports[wIndex >> 5] |=
415 1 << (wIndex & (31));
417 case USB_PORT_FEAT_POWER:
419 * Turn on ports, even if there isn't per-port switching.
420 * HC will report connect events even before this is set.
421 * However, khubd will ignore the roothub events until
422 * the roothub is registered.
424 xhci_writel(xhci, temp | PORT_POWER, addr);
426 temp = xhci_readl(xhci, addr);
427 xhci_dbg(xhci, "set port power, actual port %d status = 0x%x\n", wIndex, temp);
429 case USB_PORT_FEAT_RESET:
430 temp = (temp | PORT_RESET);
431 xhci_writel(xhci, temp, addr);
433 temp = xhci_readl(xhci, addr);
434 xhci_dbg(xhci, "set port reset, actual port %d status = 0x%x\n", wIndex, temp);
439 temp = xhci_readl(xhci, addr); /* unblock any posted writes */
441 case ClearPortFeature:
442 if (!wIndex || wIndex > ports)
445 addr = &xhci->op_regs->port_status_base +
446 NUM_PORT_REGS*(wIndex & 0xff);
447 temp = xhci_readl(xhci, addr);
448 temp = xhci_port_state_to_neutral(temp);
450 case USB_PORT_FEAT_SUSPEND:
451 temp = xhci_readl(xhci, addr);
452 xhci_dbg(xhci, "clear USB_PORT_FEAT_SUSPEND\n");
453 xhci_dbg(xhci, "PORTSC %04x\n", temp);
454 if (temp & PORT_RESET)
456 if (temp & XDEV_U3) {
457 if ((temp & PORT_PE) == 0)
459 if (DEV_SUPERSPEED(temp)) {
460 temp = xhci_port_state_to_neutral(temp);
461 temp &= ~PORT_PLS_MASK;
462 temp |= PORT_LINK_STROBE | XDEV_U0;
463 xhci_writel(xhci, temp, addr);
464 xhci_readl(xhci, addr);
466 temp = xhci_port_state_to_neutral(temp);
467 temp &= ~PORT_PLS_MASK;
468 temp |= PORT_LINK_STROBE | XDEV_RESUME;
469 xhci_writel(xhci, temp, addr);
471 spin_unlock_irqrestore(&xhci->lock,
474 spin_lock_irqsave(&xhci->lock, flags);
476 temp = xhci_readl(xhci, addr);
477 temp = xhci_port_state_to_neutral(temp);
478 temp &= ~PORT_PLS_MASK;
479 temp |= PORT_LINK_STROBE | XDEV_U0;
480 xhci_writel(xhci, temp, addr);
482 xhci->port_c_suspend[wIndex >> 5] |=
486 slot_id = xhci_find_slot_id_by_port(xhci, wIndex + 1);
488 xhci_dbg(xhci, "slot_id is zero\n");
491 xhci_ring_device(xhci, slot_id);
493 case USB_PORT_FEAT_C_SUSPEND:
494 xhci->port_c_suspend[wIndex >> 5] &=
495 ~(1 << (wIndex & 31));
496 case USB_PORT_FEAT_C_RESET:
497 case USB_PORT_FEAT_C_CONNECTION:
498 case USB_PORT_FEAT_C_OVER_CURRENT:
499 case USB_PORT_FEAT_C_ENABLE:
500 xhci_clear_port_change_bit(xhci, wValue, wIndex,
503 case USB_PORT_FEAT_ENABLE:
504 xhci_disable_port(xhci, wIndex, addr, temp);
512 /* "stall" on error */
515 spin_unlock_irqrestore(&xhci->lock, flags);
520 * Returns 0 if the status hasn't changed, or the number of bytes in buf.
521 * Ports are 0-indexed from the HCD point of view,
522 * and 1-indexed from the USB core pointer of view.
524 * Note that the status change bits will be cleared as soon as a port status
525 * change event is generated, so we use the saved status from that event.
527 int xhci_hub_status_data(struct usb_hcd *hcd, char *buf)
533 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
537 ports = HCS_MAX_PORTS(xhci->hcs_params1);
539 /* Initial status is no changes */
540 retval = (ports + 8) / 8;
541 memset(buf, 0, retval);
544 mask = PORT_CSC | PORT_PEC | PORT_OCC;
546 spin_lock_irqsave(&xhci->lock, flags);
547 /* For each port, did anything change? If so, set that bit in buf. */
548 for (i = 0; i < ports; i++) {
549 addr = &xhci->op_regs->port_status_base +
551 temp = xhci_readl(xhci, addr);
552 if ((temp & mask) != 0 ||
553 (xhci->port_c_suspend[i >> 5] & 1 << (i & 31)) ||
554 (xhci->resume_done[i] && time_after_eq(
555 jiffies, xhci->resume_done[i]))) {
556 buf[(i + 1) / 8] |= 1 << (i + 1) % 8;
560 spin_unlock_irqrestore(&xhci->lock, flags);
561 return status ? retval : 0;