2 * Universal Host Controller Interface driver for USB.
4 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
6 * (C) Copyright 1999 Linus Torvalds
7 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
8 * (C) Copyright 1999 Randy Dunlap
9 * (C) Copyright 1999 Georg Acher, acher@in.tum.de
10 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
11 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
12 * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
13 * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
14 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
15 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
16 * (C) Copyright 2004-2006 Alan Stern, stern@rowland.harvard.edu
21 * Technically, updating td->status here is a race, but it's not really a
22 * problem. The worst that can happen is that we set the IOC bit again
23 * generating a spurious interrupt. We could fix this by creating another
24 * QH and leaving the IOC bit always set, but then we would have to play
25 * games with the FSBR code to make sure we get the correct order in all
26 * the cases. I don't think it's worth the effort
28 static void uhci_set_next_interrupt(struct uhci_hcd *uhci)
31 mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
32 uhci->term_td->status |= cpu_to_le32(TD_CTRL_IOC);
35 static inline void uhci_clear_next_interrupt(struct uhci_hcd *uhci)
37 uhci->term_td->status &= ~cpu_to_le32(TD_CTRL_IOC);
42 * Full-Speed Bandwidth Reclamation (FSBR).
43 * We turn on FSBR whenever a queue that wants it is advancing,
44 * and leave it on for a short time thereafter.
46 static void uhci_fsbr_on(struct uhci_hcd *uhci)
49 uhci->skel_term_qh->link = cpu_to_le32(
50 uhci->skel_fs_control_qh->dma_handle) | UHCI_PTR_QH;
53 static void uhci_fsbr_off(struct uhci_hcd *uhci)
56 uhci->skel_term_qh->link = UHCI_PTR_TERM;
59 static void uhci_add_fsbr(struct uhci_hcd *uhci, struct urb *urb)
61 struct urb_priv *urbp = urb->hcpriv;
63 if (!(urb->transfer_flags & URB_NO_FSBR))
67 static void uhci_urbp_wants_fsbr(struct uhci_hcd *uhci, struct urb_priv *urbp)
70 uhci->fsbr_is_wanted = 1;
71 if (!uhci->fsbr_is_on)
73 else if (uhci->fsbr_expiring) {
74 uhci->fsbr_expiring = 0;
75 del_timer(&uhci->fsbr_timer);
80 static void uhci_fsbr_timeout(unsigned long _uhci)
82 struct uhci_hcd *uhci = (struct uhci_hcd *) _uhci;
85 spin_lock_irqsave(&uhci->lock, flags);
86 if (uhci->fsbr_expiring) {
87 uhci->fsbr_expiring = 0;
90 spin_unlock_irqrestore(&uhci->lock, flags);
94 static struct uhci_td *uhci_alloc_td(struct uhci_hcd *uhci)
96 dma_addr_t dma_handle;
99 td = dma_pool_alloc(uhci->td_pool, GFP_ATOMIC, &dma_handle);
103 td->dma_handle = dma_handle;
106 INIT_LIST_HEAD(&td->list);
107 INIT_LIST_HEAD(&td->fl_list);
112 static void uhci_free_td(struct uhci_hcd *uhci, struct uhci_td *td)
114 if (!list_empty(&td->list))
115 dev_warn(uhci_dev(uhci), "td %p still in list!\n", td);
116 if (!list_empty(&td->fl_list))
117 dev_warn(uhci_dev(uhci), "td %p still in fl_list!\n", td);
119 dma_pool_free(uhci->td_pool, td, td->dma_handle);
122 static inline void uhci_fill_td(struct uhci_td *td, u32 status,
123 u32 token, u32 buffer)
125 td->status = cpu_to_le32(status);
126 td->token = cpu_to_le32(token);
127 td->buffer = cpu_to_le32(buffer);
130 static void uhci_add_td_to_urbp(struct uhci_td *td, struct urb_priv *urbp)
132 list_add_tail(&td->list, &urbp->td_list);
135 static void uhci_remove_td_from_urbp(struct uhci_td *td)
137 list_del_init(&td->list);
141 * We insert Isochronous URBs directly into the frame list at the beginning
143 static inline void uhci_insert_td_in_frame_list(struct uhci_hcd *uhci,
144 struct uhci_td *td, unsigned framenum)
146 framenum &= (UHCI_NUMFRAMES - 1);
148 td->frame = framenum;
150 /* Is there a TD already mapped there? */
151 if (uhci->frame_cpu[framenum]) {
152 struct uhci_td *ftd, *ltd;
154 ftd = uhci->frame_cpu[framenum];
155 ltd = list_entry(ftd->fl_list.prev, struct uhci_td, fl_list);
157 list_add_tail(&td->fl_list, &ftd->fl_list);
159 td->link = ltd->link;
161 ltd->link = cpu_to_le32(td->dma_handle);
163 td->link = uhci->frame[framenum];
165 uhci->frame[framenum] = cpu_to_le32(td->dma_handle);
166 uhci->frame_cpu[framenum] = td;
170 static inline void uhci_remove_td_from_frame_list(struct uhci_hcd *uhci,
173 /* If it's not inserted, don't remove it */
174 if (td->frame == -1) {
175 WARN_ON(!list_empty(&td->fl_list));
179 if (uhci->frame_cpu[td->frame] == td) {
180 if (list_empty(&td->fl_list)) {
181 uhci->frame[td->frame] = td->link;
182 uhci->frame_cpu[td->frame] = NULL;
186 ntd = list_entry(td->fl_list.next, struct uhci_td, fl_list);
187 uhci->frame[td->frame] = cpu_to_le32(ntd->dma_handle);
188 uhci->frame_cpu[td->frame] = ntd;
193 ptd = list_entry(td->fl_list.prev, struct uhci_td, fl_list);
194 ptd->link = td->link;
197 list_del_init(&td->fl_list);
201 static inline void uhci_remove_tds_from_frame(struct uhci_hcd *uhci,
202 unsigned int framenum)
204 struct uhci_td *ftd, *ltd;
206 framenum &= (UHCI_NUMFRAMES - 1);
208 ftd = uhci->frame_cpu[framenum];
210 ltd = list_entry(ftd->fl_list.prev, struct uhci_td, fl_list);
211 uhci->frame[framenum] = ltd->link;
212 uhci->frame_cpu[framenum] = NULL;
214 while (!list_empty(&ftd->fl_list))
215 list_del_init(ftd->fl_list.prev);
220 * Remove all the TDs for an Isochronous URB from the frame list
222 static void uhci_unlink_isochronous_tds(struct uhci_hcd *uhci, struct urb *urb)
224 struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv;
227 list_for_each_entry(td, &urbp->td_list, list)
228 uhci_remove_td_from_frame_list(uhci, td);
231 static struct uhci_qh *uhci_alloc_qh(struct uhci_hcd *uhci,
232 struct usb_device *udev, struct usb_host_endpoint *hep)
234 dma_addr_t dma_handle;
237 qh = dma_pool_alloc(uhci->qh_pool, GFP_ATOMIC, &dma_handle);
241 memset(qh, 0, sizeof(*qh));
242 qh->dma_handle = dma_handle;
244 qh->element = UHCI_PTR_TERM;
245 qh->link = UHCI_PTR_TERM;
247 INIT_LIST_HEAD(&qh->queue);
248 INIT_LIST_HEAD(&qh->node);
250 if (udev) { /* Normal QH */
251 qh->type = hep->desc.bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
252 if (qh->type != USB_ENDPOINT_XFER_ISOC) {
253 qh->dummy_td = uhci_alloc_td(uhci);
255 dma_pool_free(uhci->qh_pool, qh, dma_handle);
259 qh->state = QH_STATE_IDLE;
264 if (qh->type == USB_ENDPOINT_XFER_INT ||
265 qh->type == USB_ENDPOINT_XFER_ISOC)
266 qh->load = usb_calc_bus_time(udev->speed,
267 usb_endpoint_dir_in(&hep->desc),
268 qh->type == USB_ENDPOINT_XFER_ISOC,
269 le16_to_cpu(hep->desc.wMaxPacketSize))
272 } else { /* Skeleton QH */
273 qh->state = QH_STATE_ACTIVE;
279 static void uhci_free_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
281 WARN_ON(qh->state != QH_STATE_IDLE && qh->udev);
282 if (!list_empty(&qh->queue))
283 dev_warn(uhci_dev(uhci), "qh %p list not empty!\n", qh);
287 qh->hep->hcpriv = NULL;
289 uhci_free_td(uhci, qh->dummy_td);
291 dma_pool_free(uhci->qh_pool, qh, qh->dma_handle);
295 * When a queue is stopped and a dequeued URB is given back, adjust
296 * the previous TD link (if the URB isn't first on the queue) or
297 * save its toggle value (if it is first and is currently executing).
299 * Returns 0 if the URB should not yet be given back, 1 otherwise.
301 static int uhci_cleanup_queue(struct uhci_hcd *uhci, struct uhci_qh *qh,
304 struct urb_priv *urbp = urb->hcpriv;
308 /* Isochronous pipes don't use toggles and their TD link pointers
309 * get adjusted during uhci_urb_dequeue(). But since their queues
310 * cannot truly be stopped, we have to watch out for dequeues
311 * occurring after the nominal unlink frame. */
312 if (qh->type == USB_ENDPOINT_XFER_ISOC) {
313 ret = (uhci->frame_number + uhci->is_stopped !=
318 /* If the URB isn't first on its queue, adjust the link pointer
319 * of the last TD in the previous URB. The toggle doesn't need
320 * to be saved since this URB can't be executing yet. */
321 if (qh->queue.next != &urbp->node) {
322 struct urb_priv *purbp;
325 purbp = list_entry(urbp->node.prev, struct urb_priv, node);
326 WARN_ON(list_empty(&purbp->td_list));
327 ptd = list_entry(purbp->td_list.prev, struct uhci_td,
329 td = list_entry(urbp->td_list.prev, struct uhci_td,
331 ptd->link = td->link;
335 /* If the QH element pointer is UHCI_PTR_TERM then then currently
336 * executing URB has already been unlinked, so this one isn't it. */
337 if (qh_element(qh) == UHCI_PTR_TERM)
339 qh->element = UHCI_PTR_TERM;
341 /* Control pipes don't have to worry about toggles */
342 if (qh->type == USB_ENDPOINT_XFER_CONTROL)
345 /* Save the next toggle value */
346 WARN_ON(list_empty(&urbp->td_list));
347 td = list_entry(urbp->td_list.next, struct uhci_td, list);
349 qh->initial_toggle = uhci_toggle(td_token(td));
356 * Fix up the data toggles for URBs in a queue, when one of them
357 * terminates early (short transfer, error, or dequeued).
359 static void uhci_fixup_toggles(struct uhci_qh *qh, int skip_first)
361 struct urb_priv *urbp = NULL;
363 unsigned int toggle = qh->initial_toggle;
366 /* Fixups for a short transfer start with the second URB in the
367 * queue (the short URB is the first). */
369 urbp = list_entry(qh->queue.next, struct urb_priv, node);
371 /* When starting with the first URB, if the QH element pointer is
372 * still valid then we know the URB's toggles are okay. */
373 else if (qh_element(qh) != UHCI_PTR_TERM)
376 /* Fix up the toggle for the URBs in the queue. Normally this
377 * loop won't run more than once: When an error or short transfer
378 * occurs, the queue usually gets emptied. */
379 urbp = list_prepare_entry(urbp, &qh->queue, node);
380 list_for_each_entry_continue(urbp, &qh->queue, node) {
382 /* If the first TD has the right toggle value, we don't
383 * need to change any toggles in this URB */
384 td = list_entry(urbp->td_list.next, struct uhci_td, list);
385 if (toggle > 1 || uhci_toggle(td_token(td)) == toggle) {
386 td = list_entry(urbp->td_list.prev, struct uhci_td,
388 toggle = uhci_toggle(td_token(td)) ^ 1;
390 /* Otherwise all the toggles in the URB have to be switched */
392 list_for_each_entry(td, &urbp->td_list, list) {
393 td->token ^= __constant_cpu_to_le32(
401 pipe = list_entry(qh->queue.next, struct urb_priv, node)->urb->pipe;
402 usb_settoggle(qh->udev, usb_pipeendpoint(pipe),
403 usb_pipeout(pipe), toggle);
408 * Put a QH on the schedule in both hardware and software
410 static void uhci_activate_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
414 WARN_ON(list_empty(&qh->queue));
416 /* Set the element pointer if it isn't set already.
417 * This isn't needed for Isochronous queues, but it doesn't hurt. */
418 if (qh_element(qh) == UHCI_PTR_TERM) {
419 struct urb_priv *urbp = list_entry(qh->queue.next,
420 struct urb_priv, node);
421 struct uhci_td *td = list_entry(urbp->td_list.next,
422 struct uhci_td, list);
424 qh->element = cpu_to_le32(td->dma_handle);
427 /* Treat the queue as if it has just advanced */
428 qh->wait_expired = 0;
429 qh->advance_jiffies = jiffies;
431 if (qh->state == QH_STATE_ACTIVE)
433 qh->state = QH_STATE_ACTIVE;
435 /* Move the QH from its old list to the end of the appropriate
437 if (qh == uhci->next_qh)
438 uhci->next_qh = list_entry(qh->node.next, struct uhci_qh,
440 list_move_tail(&qh->node, &qh->skel->node);
442 /* Link it into the schedule */
443 pqh = list_entry(qh->node.prev, struct uhci_qh, node);
444 qh->link = pqh->link;
446 pqh->link = UHCI_PTR_QH | cpu_to_le32(qh->dma_handle);
450 * Take a QH off the hardware schedule
452 static void uhci_unlink_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
456 if (qh->state == QH_STATE_UNLINKING)
458 WARN_ON(qh->state != QH_STATE_ACTIVE || !qh->udev);
459 qh->state = QH_STATE_UNLINKING;
461 /* Unlink the QH from the schedule and record when we did it */
462 pqh = list_entry(qh->node.prev, struct uhci_qh, node);
463 pqh->link = qh->link;
466 uhci_get_current_frame_number(uhci);
467 qh->unlink_frame = uhci->frame_number;
469 /* Force an interrupt so we know when the QH is fully unlinked */
470 if (list_empty(&uhci->skel_unlink_qh->node))
471 uhci_set_next_interrupt(uhci);
473 /* Move the QH from its old list to the end of the unlinking list */
474 if (qh == uhci->next_qh)
475 uhci->next_qh = list_entry(qh->node.next, struct uhci_qh,
477 list_move_tail(&qh->node, &uhci->skel_unlink_qh->node);
481 * When we and the controller are through with a QH, it becomes IDLE.
482 * This happens when a QH has been off the schedule (on the unlinking
483 * list) for more than one frame, or when an error occurs while adding
484 * the first URB onto a new QH.
486 static void uhci_make_qh_idle(struct uhci_hcd *uhci, struct uhci_qh *qh)
488 WARN_ON(qh->state == QH_STATE_ACTIVE);
490 if (qh == uhci->next_qh)
491 uhci->next_qh = list_entry(qh->node.next, struct uhci_qh,
493 list_move(&qh->node, &uhci->idle_qh_list);
494 qh->state = QH_STATE_IDLE;
496 /* Now that the QH is idle, its post_td isn't being used */
498 uhci_free_td(uhci, qh->post_td);
502 /* If anyone is waiting for a QH to become idle, wake them up */
503 if (uhci->num_waiting)
504 wake_up_all(&uhci->waitqh);
508 * Find the highest existing bandwidth load for a given phase and period.
510 static int uhci_highest_load(struct uhci_hcd *uhci, int phase, int period)
512 int highest_load = uhci->load[phase];
514 for (phase += period; phase < MAX_PHASE; phase += period)
515 highest_load = max_t(int, highest_load, uhci->load[phase]);
520 * Set qh->phase to the optimal phase for a periodic transfer and
521 * check whether the bandwidth requirement is acceptable.
523 static int uhci_check_bandwidth(struct uhci_hcd *uhci, struct uhci_qh *qh)
527 /* Find the optimal phase (unless it is already set) and get
530 minimax_load = uhci_highest_load(uhci, qh->phase, qh->period);
533 int max_phase = min_t(int, MAX_PHASE, qh->period);
536 minimax_load = uhci_highest_load(uhci, qh->phase, qh->period);
537 for (phase = 1; phase < max_phase; ++phase) {
538 load = uhci_highest_load(uhci, phase, qh->period);
539 if (load < minimax_load) {
546 /* Maximum allowable periodic bandwidth is 90%, or 900 us per frame */
547 if (minimax_load + qh->load > 900) {
548 dev_dbg(uhci_dev(uhci), "bandwidth allocation failed: "
549 "period %d, phase %d, %d + %d us\n",
550 qh->period, qh->phase, minimax_load, qh->load);
557 * Reserve a periodic QH's bandwidth in the schedule
559 static void uhci_reserve_bandwidth(struct uhci_hcd *uhci, struct uhci_qh *qh)
565 for (i = qh->phase; i < MAX_PHASE; i += qh->period) {
566 uhci->load[i] += load;
567 uhci->total_load += load;
569 uhci_to_hcd(uhci)->self.bandwidth_allocated =
570 uhci->total_load / MAX_PHASE;
572 case USB_ENDPOINT_XFER_INT:
573 ++uhci_to_hcd(uhci)->self.bandwidth_int_reqs;
576 case USB_ENDPOINT_XFER_ISOC:
577 ++uhci_to_hcd(uhci)->self.bandwidth_isoc_reqs;
581 qh->bandwidth_reserved = 1;
582 dev_dbg(uhci_dev(uhci),
583 "%s dev %d ep%02x-%s, period %d, phase %d, %d us\n",
584 "reserve", qh->udev->devnum,
585 qh->hep->desc.bEndpointAddress, p,
586 qh->period, qh->phase, load);
590 * Release a periodic QH's bandwidth reservation
592 static void uhci_release_bandwidth(struct uhci_hcd *uhci, struct uhci_qh *qh)
598 for (i = qh->phase; i < MAX_PHASE; i += qh->period) {
599 uhci->load[i] -= load;
600 uhci->total_load -= load;
602 uhci_to_hcd(uhci)->self.bandwidth_allocated =
603 uhci->total_load / MAX_PHASE;
605 case USB_ENDPOINT_XFER_INT:
606 --uhci_to_hcd(uhci)->self.bandwidth_int_reqs;
609 case USB_ENDPOINT_XFER_ISOC:
610 --uhci_to_hcd(uhci)->self.bandwidth_isoc_reqs;
614 qh->bandwidth_reserved = 0;
615 dev_dbg(uhci_dev(uhci),
616 "%s dev %d ep%02x-%s, period %d, phase %d, %d us\n",
617 "release", qh->udev->devnum,
618 qh->hep->desc.bEndpointAddress, p,
619 qh->period, qh->phase, load);
622 static inline struct urb_priv *uhci_alloc_urb_priv(struct uhci_hcd *uhci,
625 struct urb_priv *urbp;
627 urbp = kmem_cache_alloc(uhci_up_cachep, GFP_ATOMIC);
631 memset((void *)urbp, 0, sizeof(*urbp));
636 INIT_LIST_HEAD(&urbp->node);
637 INIT_LIST_HEAD(&urbp->td_list);
642 static void uhci_free_urb_priv(struct uhci_hcd *uhci,
643 struct urb_priv *urbp)
645 struct uhci_td *td, *tmp;
647 if (!list_empty(&urbp->node))
648 dev_warn(uhci_dev(uhci), "urb %p still on QH's list!\n",
651 list_for_each_entry_safe(td, tmp, &urbp->td_list, list) {
652 uhci_remove_td_from_urbp(td);
653 uhci_free_td(uhci, td);
656 urbp->urb->hcpriv = NULL;
657 kmem_cache_free(uhci_up_cachep, urbp);
661 * Map status to standard result codes
663 * <status> is (td_status(td) & 0xF60000), a.k.a.
664 * uhci_status_bits(td_status(td)).
665 * Note: <status> does not include the TD_CTRL_NAK bit.
666 * <dir_out> is True for output TDs and False for input TDs.
668 static int uhci_map_status(int status, int dir_out)
672 if (status & TD_CTRL_BITSTUFF) /* Bitstuff error */
674 if (status & TD_CTRL_CRCTIMEO) { /* CRC/Timeout */
680 if (status & TD_CTRL_BABBLE) /* Babble */
682 if (status & TD_CTRL_DBUFERR) /* Buffer error */
684 if (status & TD_CTRL_STALLED) /* Stalled */
692 static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb,
696 unsigned long destination, status;
697 int maxsze = le16_to_cpu(qh->hep->desc.wMaxPacketSize);
698 int len = urb->transfer_buffer_length;
699 dma_addr_t data = urb->transfer_dma;
701 struct urb_priv *urbp = urb->hcpriv;
703 /* The "pipe" thing contains the destination in bits 8--18 */
704 destination = (urb->pipe & PIPE_DEVEP_MASK) | USB_PID_SETUP;
706 /* 3 errors, dummy TD remains inactive */
707 status = uhci_maxerr(3);
708 if (urb->dev->speed == USB_SPEED_LOW)
709 status |= TD_CTRL_LS;
712 * Build the TD for the control request setup packet
715 uhci_add_td_to_urbp(td, urbp);
716 uhci_fill_td(td, status, destination | uhci_explen(8),
719 status |= TD_CTRL_ACTIVE;
722 * If direction is "send", change the packet ID from SETUP (0x2D)
723 * to OUT (0xE1). Else change it from SETUP to IN (0x69) and
724 * set Short Packet Detect (SPD) for all data packets.
726 if (usb_pipeout(urb->pipe))
727 destination ^= (USB_PID_SETUP ^ USB_PID_OUT);
729 destination ^= (USB_PID_SETUP ^ USB_PID_IN);
730 status |= TD_CTRL_SPD;
737 int pktsze = min(len, maxsze);
739 td = uhci_alloc_td(uhci);
742 *plink = cpu_to_le32(td->dma_handle);
744 /* Alternate Data0/1 (start with Data1) */
745 destination ^= TD_TOKEN_TOGGLE;
747 uhci_add_td_to_urbp(td, urbp);
748 uhci_fill_td(td, status, destination | uhci_explen(pktsze),
757 * Build the final TD for control status
759 td = uhci_alloc_td(uhci);
762 *plink = cpu_to_le32(td->dma_handle);
765 * It's IN if the pipe is an output pipe or we're not expecting
768 destination &= ~TD_TOKEN_PID_MASK;
769 if (usb_pipeout(urb->pipe) || !urb->transfer_buffer_length)
770 destination |= USB_PID_IN;
772 destination |= USB_PID_OUT;
774 destination |= TD_TOKEN_TOGGLE; /* End in Data1 */
776 status &= ~TD_CTRL_SPD;
778 uhci_add_td_to_urbp(td, urbp);
779 uhci_fill_td(td, status | TD_CTRL_IOC,
780 destination | uhci_explen(0), 0);
784 * Build the new dummy TD and activate the old one
786 td = uhci_alloc_td(uhci);
789 *plink = cpu_to_le32(td->dma_handle);
791 uhci_fill_td(td, 0, USB_PID_OUT | uhci_explen(0), 0);
793 qh->dummy_td->status |= __constant_cpu_to_le32(TD_CTRL_ACTIVE);
796 /* Low-speed transfers get a different queue, and won't hog the bus.
797 * Also, some devices enumerate better without FSBR; the easiest way
798 * to do that is to put URBs on the low-speed queue while the device
799 * isn't in the CONFIGURED state. */
800 if (urb->dev->speed == USB_SPEED_LOW ||
801 urb->dev->state != USB_STATE_CONFIGURED)
802 qh->skel = uhci->skel_ls_control_qh;
804 qh->skel = uhci->skel_fs_control_qh;
805 uhci_add_fsbr(uhci, urb);
808 urb->actual_length = -8; /* Account for the SETUP packet */
812 /* Remove the dummy TD from the td_list so it doesn't get freed */
813 uhci_remove_td_from_urbp(qh->dummy_td);
818 * Common submit for bulk and interrupt
820 static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb,
824 unsigned long destination, status;
825 int maxsze = le16_to_cpu(qh->hep->desc.wMaxPacketSize);
826 int len = urb->transfer_buffer_length;
827 dma_addr_t data = urb->transfer_dma;
829 struct urb_priv *urbp = urb->hcpriv;
835 /* The "pipe" thing contains the destination in bits 8--18 */
836 destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe);
837 toggle = usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe),
838 usb_pipeout(urb->pipe));
840 /* 3 errors, dummy TD remains inactive */
841 status = uhci_maxerr(3);
842 if (urb->dev->speed == USB_SPEED_LOW)
843 status |= TD_CTRL_LS;
844 if (usb_pipein(urb->pipe))
845 status |= TD_CTRL_SPD;
852 do { /* Allow zero length packets */
855 if (len <= pktsze) { /* The last packet */
857 if (!(urb->transfer_flags & URB_SHORT_NOT_OK))
858 status &= ~TD_CTRL_SPD;
862 td = uhci_alloc_td(uhci);
865 *plink = cpu_to_le32(td->dma_handle);
867 uhci_add_td_to_urbp(td, urbp);
868 uhci_fill_td(td, status,
869 destination | uhci_explen(pktsze) |
870 (toggle << TD_TOKEN_TOGGLE_SHIFT),
873 status |= TD_CTRL_ACTIVE;
881 * URB_ZERO_PACKET means adding a 0-length packet, if direction
882 * is OUT and the transfer_length was an exact multiple of maxsze,
883 * hence (len = transfer_length - N * maxsze) == 0
884 * however, if transfer_length == 0, the zero packet was already
887 if ((urb->transfer_flags & URB_ZERO_PACKET) &&
888 usb_pipeout(urb->pipe) && len == 0 &&
889 urb->transfer_buffer_length > 0) {
890 td = uhci_alloc_td(uhci);
893 *plink = cpu_to_le32(td->dma_handle);
895 uhci_add_td_to_urbp(td, urbp);
896 uhci_fill_td(td, status,
897 destination | uhci_explen(0) |
898 (toggle << TD_TOKEN_TOGGLE_SHIFT),
905 /* Set the interrupt-on-completion flag on the last packet.
906 * A more-or-less typical 4 KB URB (= size of one memory page)
907 * will require about 3 ms to transfer; that's a little on the
908 * fast side but not enough to justify delaying an interrupt
909 * more than 2 or 3 URBs, so we will ignore the URB_NO_INTERRUPT
911 td->status |= __constant_cpu_to_le32(TD_CTRL_IOC);
914 * Build the new dummy TD and activate the old one
916 td = uhci_alloc_td(uhci);
919 *plink = cpu_to_le32(td->dma_handle);
921 uhci_fill_td(td, 0, USB_PID_OUT | uhci_explen(0), 0);
923 qh->dummy_td->status |= __constant_cpu_to_le32(TD_CTRL_ACTIVE);
926 usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
927 usb_pipeout(urb->pipe), toggle);
931 /* Remove the dummy TD from the td_list so it doesn't get freed */
932 uhci_remove_td_from_urbp(qh->dummy_td);
936 static inline int uhci_submit_bulk(struct uhci_hcd *uhci, struct urb *urb,
941 /* Can't have low-speed bulk transfers */
942 if (urb->dev->speed == USB_SPEED_LOW)
945 qh->skel = uhci->skel_bulk_qh;
946 ret = uhci_submit_common(uhci, urb, qh);
948 uhci_add_fsbr(uhci, urb);
952 static int uhci_submit_interrupt(struct uhci_hcd *uhci, struct urb *urb,
957 /* USB 1.1 interrupt transfers only involve one packet per interval.
958 * Drivers can submit URBs of any length, but longer ones will need
959 * multiple intervals to complete.
962 if (!qh->bandwidth_reserved) {
965 /* Figure out which power-of-two queue to use */
966 for (exponent = 7; exponent >= 0; --exponent) {
967 if ((1 << exponent) <= urb->interval)
972 qh->period = 1 << exponent;
973 qh->skel = uhci->skelqh[UHCI_SKEL_INDEX(exponent)];
975 /* For now, interrupt phase is fixed by the layout
976 * of the QH lists. */
977 qh->phase = (qh->period / 2) & (MAX_PHASE - 1);
978 ret = uhci_check_bandwidth(uhci, qh);
981 } else if (qh->period > urb->interval)
982 return -EINVAL; /* Can't decrease the period */
984 ret = uhci_submit_common(uhci, urb, qh);
986 urb->interval = qh->period;
987 if (!qh->bandwidth_reserved)
988 uhci_reserve_bandwidth(uhci, qh);
994 * Fix up the data structures following a short transfer
996 static int uhci_fixup_short_transfer(struct uhci_hcd *uhci,
997 struct uhci_qh *qh, struct urb_priv *urbp)
1000 struct list_head *tmp;
1003 td = list_entry(urbp->td_list.prev, struct uhci_td, list);
1004 if (qh->type == USB_ENDPOINT_XFER_CONTROL) {
1006 /* When a control transfer is short, we have to restart
1007 * the queue at the status stage transaction, which is
1009 WARN_ON(list_empty(&urbp->td_list));
1010 qh->element = cpu_to_le32(td->dma_handle);
1011 tmp = td->list.prev;
1016 /* When a bulk/interrupt transfer is short, we have to
1017 * fix up the toggles of the following URBs on the queue
1018 * before restarting the queue at the next URB. */
1019 qh->initial_toggle = uhci_toggle(td_token(qh->post_td)) ^ 1;
1020 uhci_fixup_toggles(qh, 1);
1022 if (list_empty(&urbp->td_list))
1024 qh->element = td->link;
1025 tmp = urbp->td_list.prev;
1029 /* Remove all the TDs we skipped over, from tmp back to the start */
1030 while (tmp != &urbp->td_list) {
1031 td = list_entry(tmp, struct uhci_td, list);
1034 uhci_remove_td_from_urbp(td);
1035 uhci_free_td(uhci, td);
1041 * Common result for control, bulk, and interrupt
1043 static int uhci_result_common(struct uhci_hcd *uhci, struct urb *urb)
1045 struct urb_priv *urbp = urb->hcpriv;
1046 struct uhci_qh *qh = urbp->qh;
1047 struct uhci_td *td, *tmp;
1051 list_for_each_entry_safe(td, tmp, &urbp->td_list, list) {
1052 unsigned int ctrlstat;
1055 ctrlstat = td_status(td);
1056 status = uhci_status_bits(ctrlstat);
1057 if (status & TD_CTRL_ACTIVE)
1058 return -EINPROGRESS;
1060 len = uhci_actual_length(ctrlstat);
1061 urb->actual_length += len;
1064 ret = uhci_map_status(status,
1065 uhci_packetout(td_token(td)));
1066 if ((debug == 1 && ret != -EPIPE) || debug > 1) {
1067 /* Some debugging code */
1068 dev_dbg(&urb->dev->dev,
1069 "%s: failed with status %x\n",
1070 __FUNCTION__, status);
1072 if (debug > 1 && errbuf) {
1073 /* Print the chain for debugging */
1074 uhci_show_qh(urbp->qh, errbuf,
1080 } else if (len < uhci_expected_length(td_token(td))) {
1082 /* We received a short packet */
1083 if (urb->transfer_flags & URB_SHORT_NOT_OK)
1086 /* Fixup needed only if this isn't the URB's last TD */
1087 else if (&td->list != urbp->td_list.prev)
1091 uhci_remove_td_from_urbp(td);
1093 uhci_free_td(uhci, qh->post_td);
1103 /* In case a control transfer gets an error
1104 * during the setup stage */
1105 urb->actual_length = max(urb->actual_length, 0);
1107 /* Note that the queue has stopped and save
1108 * the next toggle value */
1109 qh->element = UHCI_PTR_TERM;
1111 qh->needs_fixup = (qh->type != USB_ENDPOINT_XFER_CONTROL);
1112 qh->initial_toggle = uhci_toggle(td_token(td)) ^
1113 (ret == -EREMOTEIO);
1115 } else /* Short packet received */
1116 ret = uhci_fixup_short_transfer(uhci, qh, urbp);
1121 * Isochronous transfers
1123 static int uhci_submit_isochronous(struct uhci_hcd *uhci, struct urb *urb,
1126 struct uhci_td *td = NULL; /* Since urb->number_of_packets > 0 */
1128 unsigned long destination, status;
1129 struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv;
1131 /* Values must not be too big (could overflow below) */
1132 if (urb->interval >= UHCI_NUMFRAMES ||
1133 urb->number_of_packets >= UHCI_NUMFRAMES)
1136 /* Check the period and figure out the starting frame number */
1137 if (!qh->bandwidth_reserved) {
1138 qh->period = urb->interval;
1139 if (urb->transfer_flags & URB_ISO_ASAP) {
1140 qh->phase = -1; /* Find the best phase */
1141 i = uhci_check_bandwidth(uhci, qh);
1145 /* Allow a little time to allocate the TDs */
1146 uhci_get_current_frame_number(uhci);
1147 frame = uhci->frame_number + 10;
1149 /* Move forward to the first frame having the
1151 urb->start_frame = frame + ((qh->phase - frame) &
1154 i = urb->start_frame - uhci->last_iso_frame;
1155 if (i <= 0 || i >= UHCI_NUMFRAMES)
1157 qh->phase = urb->start_frame & (qh->period - 1);
1158 i = uhci_check_bandwidth(uhci, qh);
1163 } else if (qh->period != urb->interval) {
1164 return -EINVAL; /* Can't change the period */
1166 } else { /* Pick up where the last URB leaves off */
1167 if (list_empty(&qh->queue)) {
1168 frame = qh->iso_frame;
1172 lurb = list_entry(qh->queue.prev,
1173 struct urb_priv, node)->urb;
1174 frame = lurb->start_frame +
1175 lurb->number_of_packets *
1178 if (urb->transfer_flags & URB_ISO_ASAP)
1179 urb->start_frame = frame;
1180 else if (urb->start_frame != frame)
1184 /* Make sure we won't have to go too far into the future */
1185 if (uhci_frame_before_eq(uhci->last_iso_frame + UHCI_NUMFRAMES,
1186 urb->start_frame + urb->number_of_packets *
1190 status = TD_CTRL_ACTIVE | TD_CTRL_IOS;
1191 destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe);
1193 for (i = 0; i < urb->number_of_packets; i++) {
1194 td = uhci_alloc_td(uhci);
1198 uhci_add_td_to_urbp(td, urbp);
1199 uhci_fill_td(td, status, destination |
1200 uhci_explen(urb->iso_frame_desc[i].length),
1202 urb->iso_frame_desc[i].offset);
1205 /* Set the interrupt-on-completion flag on the last packet. */
1206 td->status |= __constant_cpu_to_le32(TD_CTRL_IOC);
1208 /* Add the TDs to the frame list */
1209 frame = urb->start_frame;
1210 list_for_each_entry(td, &urbp->td_list, list) {
1211 uhci_insert_td_in_frame_list(uhci, td, frame);
1212 frame += qh->period;
1215 if (list_empty(&qh->queue)) {
1216 qh->iso_packet_desc = &urb->iso_frame_desc[0];
1217 qh->iso_frame = urb->start_frame;
1221 qh->skel = uhci->skel_iso_qh;
1222 if (!qh->bandwidth_reserved)
1223 uhci_reserve_bandwidth(uhci, qh);
1227 static int uhci_result_isochronous(struct uhci_hcd *uhci, struct urb *urb)
1229 struct uhci_td *td, *tmp;
1230 struct urb_priv *urbp = urb->hcpriv;
1231 struct uhci_qh *qh = urbp->qh;
1233 list_for_each_entry_safe(td, tmp, &urbp->td_list, list) {
1234 unsigned int ctrlstat;
1238 if (uhci_frame_before_eq(uhci->cur_iso_frame, qh->iso_frame))
1239 return -EINPROGRESS;
1241 uhci_remove_tds_from_frame(uhci, qh->iso_frame);
1243 ctrlstat = td_status(td);
1244 if (ctrlstat & TD_CTRL_ACTIVE) {
1245 status = -EXDEV; /* TD was added too late? */
1247 status = uhci_map_status(uhci_status_bits(ctrlstat),
1248 usb_pipeout(urb->pipe));
1249 actlength = uhci_actual_length(ctrlstat);
1251 urb->actual_length += actlength;
1252 qh->iso_packet_desc->actual_length = actlength;
1253 qh->iso_packet_desc->status = status;
1258 qh->iso_status = status;
1261 uhci_remove_td_from_urbp(td);
1262 uhci_free_td(uhci, td);
1263 qh->iso_frame += qh->period;
1264 ++qh->iso_packet_desc;
1266 return qh->iso_status;
1269 static int uhci_urb_enqueue(struct usb_hcd *hcd,
1270 struct usb_host_endpoint *hep,
1271 struct urb *urb, gfp_t mem_flags)
1274 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
1275 unsigned long flags;
1276 struct urb_priv *urbp;
1279 spin_lock_irqsave(&uhci->lock, flags);
1282 if (ret != -EINPROGRESS) /* URB already unlinked! */
1286 urbp = uhci_alloc_urb_priv(uhci, urb);
1291 qh = (struct uhci_qh *) hep->hcpriv;
1293 qh = uhci_alloc_qh(uhci, urb->dev, hep);
1300 case USB_ENDPOINT_XFER_CONTROL:
1301 ret = uhci_submit_control(uhci, urb, qh);
1303 case USB_ENDPOINT_XFER_BULK:
1304 ret = uhci_submit_bulk(uhci, urb, qh);
1306 case USB_ENDPOINT_XFER_INT:
1307 ret = uhci_submit_interrupt(uhci, urb, qh);
1309 case USB_ENDPOINT_XFER_ISOC:
1310 urb->error_count = 0;
1311 ret = uhci_submit_isochronous(uhci, urb, qh);
1315 goto err_submit_failed;
1317 /* Add this URB to the QH */
1319 list_add_tail(&urbp->node, &qh->queue);
1321 /* If the new URB is the first and only one on this QH then either
1322 * the QH is new and idle or else it's unlinked and waiting to
1323 * become idle, so we can activate it right away. But only if the
1324 * queue isn't stopped. */
1325 if (qh->queue.next == &urbp->node && !qh->is_stopped) {
1326 uhci_activate_qh(uhci, qh);
1327 uhci_urbp_wants_fsbr(uhci, urbp);
1332 if (qh->state == QH_STATE_IDLE)
1333 uhci_make_qh_idle(uhci, qh); /* Reclaim unused QH */
1336 uhci_free_urb_priv(uhci, urbp);
1339 spin_unlock_irqrestore(&uhci->lock, flags);
1343 static int uhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb)
1345 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
1346 unsigned long flags;
1347 struct urb_priv *urbp;
1350 spin_lock_irqsave(&uhci->lock, flags);
1352 if (!urbp) /* URB was never linked! */
1356 /* Remove Isochronous TDs from the frame list ASAP */
1357 if (qh->type == USB_ENDPOINT_XFER_ISOC) {
1358 uhci_unlink_isochronous_tds(uhci, urb);
1361 /* If the URB has already started, update the QH unlink time */
1362 uhci_get_current_frame_number(uhci);
1363 if (uhci_frame_before_eq(urb->start_frame, uhci->frame_number))
1364 qh->unlink_frame = uhci->frame_number;
1367 uhci_unlink_qh(uhci, qh);
1370 spin_unlock_irqrestore(&uhci->lock, flags);
1375 * Finish unlinking an URB and give it back
1377 static void uhci_giveback_urb(struct uhci_hcd *uhci, struct uhci_qh *qh,
1379 __releases(uhci->lock)
1380 __acquires(uhci->lock)
1382 struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv;
1384 /* When giving back the first URB in an Isochronous queue,
1385 * reinitialize the QH's iso-related members for the next URB. */
1386 if (qh->type == USB_ENDPOINT_XFER_ISOC &&
1387 urbp->node.prev == &qh->queue &&
1388 urbp->node.next != &qh->queue) {
1389 struct urb *nurb = list_entry(urbp->node.next,
1390 struct urb_priv, node)->urb;
1392 qh->iso_packet_desc = &nurb->iso_frame_desc[0];
1393 qh->iso_frame = nurb->start_frame;
1397 /* Take the URB off the QH's queue. If the queue is now empty,
1398 * this is a perfect time for a toggle fixup. */
1399 list_del_init(&urbp->node);
1400 if (list_empty(&qh->queue) && qh->needs_fixup) {
1401 usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
1402 usb_pipeout(urb->pipe), qh->initial_toggle);
1403 qh->needs_fixup = 0;
1406 uhci_free_urb_priv(uhci, urbp);
1408 spin_unlock(&uhci->lock);
1409 usb_hcd_giveback_urb(uhci_to_hcd(uhci), urb);
1410 spin_lock(&uhci->lock);
1412 /* If the queue is now empty, we can unlink the QH and give up its
1413 * reserved bandwidth. */
1414 if (list_empty(&qh->queue)) {
1415 uhci_unlink_qh(uhci, qh);
1416 if (qh->bandwidth_reserved)
1417 uhci_release_bandwidth(uhci, qh);
1422 * Scan the URBs in a QH's queue
1424 #define QH_FINISHED_UNLINKING(qh) \
1425 (qh->state == QH_STATE_UNLINKING && \
1426 uhci->frame_number + uhci->is_stopped != qh->unlink_frame)
1428 static void uhci_scan_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
1430 struct urb_priv *urbp;
1434 while (!list_empty(&qh->queue)) {
1435 urbp = list_entry(qh->queue.next, struct urb_priv, node);
1438 if (qh->type == USB_ENDPOINT_XFER_ISOC)
1439 status = uhci_result_isochronous(uhci, urb);
1441 status = uhci_result_common(uhci, urb);
1442 if (status == -EINPROGRESS)
1445 spin_lock(&urb->lock);
1446 if (urb->status == -EINPROGRESS) /* Not dequeued */
1447 urb->status = status;
1449 status = ECONNRESET; /* Not -ECONNRESET */
1450 spin_unlock(&urb->lock);
1452 /* Dequeued but completed URBs can't be given back unless
1453 * the QH is stopped or has finished unlinking. */
1454 if (status == ECONNRESET) {
1455 if (QH_FINISHED_UNLINKING(qh))
1457 else if (!qh->is_stopped)
1461 uhci_giveback_urb(uhci, qh, urb);
1462 if (status < 0 && qh->type != USB_ENDPOINT_XFER_ISOC)
1466 /* If the QH is neither stopped nor finished unlinking (normal case),
1467 * our work here is done. */
1468 if (QH_FINISHED_UNLINKING(qh))
1470 else if (!qh->is_stopped)
1473 /* Otherwise give back each of the dequeued URBs */
1475 list_for_each_entry(urbp, &qh->queue, node) {
1477 if (urb->status != -EINPROGRESS) {
1479 /* Fix up the TD links and save the toggles for
1480 * non-Isochronous queues. For Isochronous queues,
1481 * test for too-recent dequeues. */
1482 if (!uhci_cleanup_queue(uhci, qh, urb)) {
1486 uhci_giveback_urb(uhci, qh, urb);
1492 /* There are no more dequeued URBs. If there are still URBs on the
1493 * queue, the QH can now be re-activated. */
1494 if (!list_empty(&qh->queue)) {
1495 if (qh->needs_fixup)
1496 uhci_fixup_toggles(qh, 0);
1498 /* If the first URB on the queue wants FSBR but its time
1499 * limit has expired, set the next TD to interrupt on
1500 * completion before reactivating the QH. */
1501 urbp = list_entry(qh->queue.next, struct urb_priv, node);
1502 if (urbp->fsbr && qh->wait_expired) {
1503 struct uhci_td *td = list_entry(urbp->td_list.next,
1504 struct uhci_td, list);
1506 td->status |= __cpu_to_le32(TD_CTRL_IOC);
1509 uhci_activate_qh(uhci, qh);
1512 /* The queue is empty. The QH can become idle if it is fully
1514 else if (QH_FINISHED_UNLINKING(qh))
1515 uhci_make_qh_idle(uhci, qh);
1519 * Check for queues that have made some forward progress.
1520 * Returns 0 if the queue is not Isochronous, is ACTIVE, and
1521 * has not advanced since last examined; 1 otherwise.
1523 * Early Intel controllers have a bug which causes qh->element sometimes
1524 * not to advance when a TD completes successfully. The queue remains
1525 * stuck on the inactive completed TD. We detect such cases and advance
1526 * the element pointer by hand.
1528 static int uhci_advance_check(struct uhci_hcd *uhci, struct uhci_qh *qh)
1530 struct urb_priv *urbp = NULL;
1535 if (qh->type == USB_ENDPOINT_XFER_ISOC)
1538 /* Treat an UNLINKING queue as though it hasn't advanced.
1539 * This is okay because reactivation will treat it as though
1540 * it has advanced, and if it is going to become IDLE then
1541 * this doesn't matter anyway. Furthermore it's possible
1542 * for an UNLINKING queue not to have any URBs at all, or
1543 * for its first URB not to have any TDs (if it was dequeued
1544 * just as it completed). So it's not easy in any case to
1545 * test whether such queues have advanced. */
1546 if (qh->state != QH_STATE_ACTIVE) {
1551 urbp = list_entry(qh->queue.next, struct urb_priv, node);
1552 td = list_entry(urbp->td_list.next, struct uhci_td, list);
1553 status = td_status(td);
1554 if (!(status & TD_CTRL_ACTIVE)) {
1556 /* We're okay, the queue has advanced */
1557 qh->wait_expired = 0;
1558 qh->advance_jiffies = jiffies;
1564 /* The queue hasn't advanced; check for timeout */
1565 if (qh->wait_expired)
1568 if (time_after(jiffies, qh->advance_jiffies + QH_WAIT_TIMEOUT)) {
1570 /* Detect the Intel bug and work around it */
1571 if (qh->post_td && qh_element(qh) ==
1572 cpu_to_le32(qh->post_td->dma_handle)) {
1573 qh->element = qh->post_td->link;
1574 qh->advance_jiffies = jiffies;
1579 qh->wait_expired = 1;
1581 /* If the current URB wants FSBR, unlink it temporarily
1582 * so that we can safely set the next TD to interrupt on
1583 * completion. That way we'll know as soon as the queue
1584 * starts moving again. */
1585 if (urbp && urbp->fsbr && !(status & TD_CTRL_IOC))
1586 uhci_unlink_qh(uhci, qh);
1589 /* Unmoving but not-yet-expired queues keep FSBR alive */
1591 uhci_urbp_wants_fsbr(uhci, urbp);
1599 * Process events in the schedule, but only in one thread at a time
1601 static void uhci_scan_schedule(struct uhci_hcd *uhci)
1606 /* Don't allow re-entrant calls */
1607 if (uhci->scan_in_progress) {
1608 uhci->need_rescan = 1;
1611 uhci->scan_in_progress = 1;
1613 uhci->need_rescan = 0;
1614 uhci->fsbr_is_wanted = 0;
1616 uhci_clear_next_interrupt(uhci);
1617 uhci_get_current_frame_number(uhci);
1618 uhci->cur_iso_frame = uhci->frame_number;
1620 /* Go through all the QH queues and process the URBs in each one */
1621 for (i = 0; i < UHCI_NUM_SKELQH - 1; ++i) {
1622 uhci->next_qh = list_entry(uhci->skelqh[i]->node.next,
1623 struct uhci_qh, node);
1624 while ((qh = uhci->next_qh) != uhci->skelqh[i]) {
1625 uhci->next_qh = list_entry(qh->node.next,
1626 struct uhci_qh, node);
1628 if (uhci_advance_check(uhci, qh)) {
1629 uhci_scan_qh(uhci, qh);
1630 if (qh->state == QH_STATE_ACTIVE) {
1631 uhci_urbp_wants_fsbr(uhci,
1632 list_entry(qh->queue.next, struct urb_priv, node));
1638 uhci->last_iso_frame = uhci->cur_iso_frame;
1639 if (uhci->need_rescan)
1641 uhci->scan_in_progress = 0;
1643 if (uhci->fsbr_is_on && !uhci->fsbr_is_wanted &&
1644 !uhci->fsbr_expiring) {
1645 uhci->fsbr_expiring = 1;
1646 mod_timer(&uhci->fsbr_timer, jiffies + FSBR_OFF_DELAY);
1649 if (list_empty(&uhci->skel_unlink_qh->node))
1650 uhci_clear_next_interrupt(uhci);
1652 uhci_set_next_interrupt(uhci);