2 * Universal Host Controller Interface driver for USB.
4 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
6 * (C) Copyright 1999 Linus Torvalds
7 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
8 * (C) Copyright 1999 Randy Dunlap
9 * (C) Copyright 1999 Georg Acher, acher@in.tum.de
10 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
11 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
12 * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
13 * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
14 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
15 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
16 * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu
18 * Intel documents this fairly well, and as far as I know there
19 * are no royalties or anything like that, but even so there are
20 * people who decided that they want to do the same thing in a
21 * completely different way.
25 #include <linux/module.h>
26 #include <linux/pci.h>
27 #include <linux/kernel.h>
28 #include <linux/init.h>
29 #include <linux/delay.h>
30 #include <linux/ioport.h>
31 #include <linux/slab.h>
32 #include <linux/errno.h>
33 #include <linux/unistd.h>
34 #include <linux/interrupt.h>
35 #include <linux/spinlock.h>
36 #include <linux/debugfs.h>
38 #include <linux/dmapool.h>
39 #include <linux/dma-mapping.h>
40 #include <linux/usb.h>
41 #include <linux/usb/hcd.h>
42 #include <linux/bitops.h>
43 #include <linux/dmi.h>
45 #include <asm/uaccess.h>
48 #include <asm/system.h>
51 #include "pci-quirks.h"
56 #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \
57 Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \
59 #define DRIVER_DESC "USB Universal Host Controller Interface driver"
61 /* for flakey hardware, ignore overcurrent indicators */
63 module_param(ignore_oc, bool, S_IRUGO);
64 MODULE_PARM_DESC(ignore_oc, "ignore hardware overcurrent indications");
67 * debug = 0, no debugging messages
68 * debug = 1, dump failed URBs except for stalls
69 * debug = 2, dump all failed URBs (including stalls)
70 * show all queues in /sys/kernel/debug/uhci/[pci_addr]
71 * debug = 3, show all TDs in URBs when dumping
74 #define DEBUG_CONFIGURED 1
76 module_param(debug, int, S_IRUGO | S_IWUSR);
77 MODULE_PARM_DESC(debug, "Debug level");
80 #define DEBUG_CONFIGURED 0
85 #define ERRBUF_LEN (32 * 1024)
87 static struct kmem_cache *uhci_up_cachep; /* urb_priv */
89 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state);
90 static void wakeup_rh(struct uhci_hcd *uhci);
91 static void uhci_get_current_frame_number(struct uhci_hcd *uhci);
94 * Calculate the link pointer DMA value for the first Skeleton QH in a frame.
96 static __le32 uhci_frame_skel_link(struct uhci_hcd *uhci, int frame)
101 * The interrupt queues will be interleaved as evenly as possible.
102 * There's not much to be done about period-1 interrupts; they have
103 * to occur in every frame. But we can schedule period-2 interrupts
104 * in odd-numbered frames, period-4 interrupts in frames congruent
105 * to 2 (mod 4), and so on. This way each frame only has two
106 * interrupt QHs, which will help spread out bandwidth utilization.
108 * ffs (Find First bit Set) does exactly what we need:
109 * 1,3,5,... => ffs = 0 => use period-2 QH = skelqh[8],
110 * 2,6,10,... => ffs = 1 => use period-4 QH = skelqh[7], etc.
111 * ffs >= 7 => not on any high-period queue, so use
112 * period-1 QH = skelqh[9].
113 * Add in UHCI_NUMFRAMES to insure at least one bit is set.
115 skelnum = 8 - (int) __ffs(frame | UHCI_NUMFRAMES);
118 return LINK_TO_QH(uhci->skelqh[skelnum]);
121 #include "uhci-debug.c"
123 #include "uhci-hub.c"
126 * Finish up a host controller reset and update the recorded state.
128 static void finish_reset(struct uhci_hcd *uhci)
132 /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect
133 * bits in the port status and control registers.
134 * We have to clear them by hand.
136 for (port = 0; port < uhci->rh_numports; ++port)
137 outw(0, uhci->io_addr + USBPORTSC1 + (port * 2));
139 uhci->port_c_suspend = uhci->resuming_ports = 0;
140 uhci->rh_state = UHCI_RH_RESET;
141 uhci->is_stopped = UHCI_IS_STOPPED;
142 clear_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags);
146 * Make sure the controller is completely inactive, unable to
147 * generate interrupts or do DMA.
149 static void uhci_pci_reset_hc(struct uhci_hcd *uhci)
151 uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr);
155 * Last rites for a defunct/nonfunctional controller
156 * or one we don't want to use any more.
158 static void uhci_hc_died(struct uhci_hcd *uhci)
160 uhci_get_current_frame_number(uhci);
161 uhci->reset_hc(uhci);
165 /* The current frame may already be partway finished */
166 ++uhci->frame_number;
170 * Initialize a controller that was newly discovered or has just been
171 * resumed. In either case we can't be sure of its previous state.
173 * Returns: 1 if the controller was reset, 0 otherwise.
175 static int uhci_pci_check_and_reset_hc(struct uhci_hcd *uhci)
177 return uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)),
182 * Initialize a controller that was newly discovered or has lost power
183 * or otherwise been reset while it was suspended. In none of these cases
184 * can we be sure of its previous state.
186 static void check_and_reset_hc(struct uhci_hcd *uhci)
188 if (uhci->check_and_reset_hc(uhci))
192 static void uhci_pci_configure_hc(struct uhci_hcd *uhci)
194 struct pci_dev *pdev = to_pci_dev(uhci_dev(uhci));
197 pci_write_config_word(pdev, USBLEGSUP, USBLEGSUP_DEFAULT);
199 /* Disable platform-specific non-PME# wakeup */
200 if (pdev->vendor == PCI_VENDOR_ID_INTEL)
201 pci_write_config_byte(pdev, USBRES_INTEL, 0);
205 * Store the basic register settings needed by the controller.
207 static void configure_hc(struct uhci_hcd *uhci)
209 /* Set the frame length to the default: 1 ms exactly */
210 outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF);
212 /* Store the frame list base address */
213 outl(uhci->frame_dma_handle, uhci->io_addr + USBFLBASEADD);
215 /* Set the current frame number */
216 outw(uhci->frame_number & UHCI_MAX_SOF_NUMBER,
217 uhci->io_addr + USBFRNUM);
219 /* perform any arch/bus specific configuration */
220 if (uhci->configure_hc)
221 uhci->configure_hc(uhci);
224 static int uhci_pci_resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
228 switch (to_pci_dev(uhci_dev(uhci))->vendor) {
232 case PCI_VENDOR_ID_GENESYS:
233 /* Genesys Logic's GL880S controllers don't generate
234 * resume-detect interrupts.
238 case PCI_VENDOR_ID_INTEL:
239 /* Some of Intel's USB controllers have a bug that causes
240 * resume-detect interrupts if any port has an over-current
241 * condition. To make matters worse, some motherboards
242 * hardwire unused USB ports' over-current inputs active!
243 * To prevent problems, we will not enable resume-detect
244 * interrupts if any ports are OC.
246 for (port = 0; port < uhci->rh_numports; ++port) {
247 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
256 static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
258 /* If we have to ignore overcurrent events then almost by definition
259 * we can't depend on resume-detect interrupts. */
263 return uhci->resume_detect_interrupts_are_broken ?
264 uhci->resume_detect_interrupts_are_broken(uhci) : 0;
267 static int uhci_pci_global_suspend_mode_is_broken(struct uhci_hcd *uhci)
270 const char *sys_info;
271 static const char bad_Asus_board[] = "A7V8X";
273 /* One of Asus's motherboards has a bug which causes it to
274 * wake up immediately from suspend-to-RAM if any of the ports
275 * are connected. In such cases we will not set EGSM.
277 sys_info = dmi_get_system_info(DMI_BOARD_NAME);
278 if (sys_info && !strcmp(sys_info, bad_Asus_board)) {
279 for (port = 0; port < uhci->rh_numports; ++port) {
280 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
289 static int global_suspend_mode_is_broken(struct uhci_hcd *uhci)
291 return uhci->global_suspend_mode_is_broken ?
292 uhci->global_suspend_mode_is_broken(uhci) : 0;
295 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state)
296 __releases(uhci->lock)
297 __acquires(uhci->lock)
300 int int_enable, egsm_enable, wakeup_enable;
301 struct usb_device *rhdev = uhci_to_hcd(uhci)->self.root_hub;
303 auto_stop = (new_state == UHCI_RH_AUTO_STOPPED);
304 dev_dbg(&rhdev->dev, "%s%s\n", __func__,
305 (auto_stop ? " (auto-stop)" : ""));
307 /* Start off by assuming Resume-Detect interrupts and EGSM work
308 * and that remote wakeups should be enabled.
310 egsm_enable = USBCMD_EGSM;
312 int_enable = USBINTR_RESUME;
315 /* In auto-stop mode wakeups must always be detected, but
316 * Resume-Detect interrupts may be prohibited. (In the absence
317 * of CONFIG_PM, they are always disallowed.)
320 if (!device_may_wakeup(&rhdev->dev))
323 /* In bus-suspend mode wakeups may be disabled, but if they are
324 * allowed then so are Resume-Detect interrupts.
328 if (!rhdev->do_remote_wakeup)
333 /* EGSM causes the root hub to echo a 'K' signal (resume) out any
334 * port which requests a remote wakeup. According to the USB spec,
335 * every hub is supposed to do this. But if we are ignoring
336 * remote-wakeup requests anyway then there's no point to it.
337 * We also shouldn't enable EGSM if it's broken.
339 if (!wakeup_enable || global_suspend_mode_is_broken(uhci))
342 /* If we're ignoring wakeup events then there's no reason to
343 * enable Resume-Detect interrupts. We also shouldn't enable
344 * them if they are broken or disallowed.
346 * This logic may lead us to enabling RD but not EGSM. The UHCI
347 * spec foolishly says that RD works only when EGSM is on, but
348 * there's no harm in enabling it anyway -- perhaps some chips
351 if (!wakeup_enable || resume_detect_interrupts_are_broken(uhci) ||
353 uhci->RD_enable = int_enable = 0;
355 outw(int_enable, uhci->io_addr + USBINTR);
356 outw(egsm_enable | USBCMD_CF, uhci->io_addr + USBCMD);
360 /* If we're auto-stopping then no devices have been attached
361 * for a while, so there shouldn't be any active URBs and the
362 * controller should stop after a few microseconds. Otherwise
363 * we will give the controller one frame to stop.
365 if (!auto_stop && !(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) {
366 uhci->rh_state = UHCI_RH_SUSPENDING;
367 spin_unlock_irq(&uhci->lock);
369 spin_lock_irq(&uhci->lock);
373 if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH))
374 dev_warn(uhci_dev(uhci), "Controller not stopped yet!\n");
376 uhci_get_current_frame_number(uhci);
378 uhci->rh_state = new_state;
379 uhci->is_stopped = UHCI_IS_STOPPED;
381 /* If interrupts don't work and remote wakeup is enabled then
382 * the suspended root hub needs to be polled.
384 if (!int_enable && wakeup_enable)
385 set_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags);
387 clear_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags);
389 uhci_scan_schedule(uhci);
393 static void start_rh(struct uhci_hcd *uhci)
395 uhci->is_stopped = 0;
397 /* Mark it configured and running with a 64-byte max packet.
398 * All interrupts are enabled, even though RESUME won't do anything.
400 outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD);
401 outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP,
402 uhci->io_addr + USBINTR);
404 uhci->rh_state = UHCI_RH_RUNNING;
405 set_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags);
408 static void wakeup_rh(struct uhci_hcd *uhci)
409 __releases(uhci->lock)
410 __acquires(uhci->lock)
412 dev_dbg(&uhci_to_hcd(uhci)->self.root_hub->dev,
414 uhci->rh_state == UHCI_RH_AUTO_STOPPED ?
415 " (auto-start)" : "");
417 /* If we are auto-stopped then no devices are attached so there's
418 * no need for wakeup signals. Otherwise we send Global Resume
421 if (uhci->rh_state == UHCI_RH_SUSPENDED) {
424 /* Keep EGSM on if it was set before */
425 egsm = inw(uhci->io_addr + USBCMD) & USBCMD_EGSM;
426 uhci->rh_state = UHCI_RH_RESUMING;
427 outw(USBCMD_FGR | USBCMD_CF | egsm, uhci->io_addr + USBCMD);
428 spin_unlock_irq(&uhci->lock);
430 spin_lock_irq(&uhci->lock);
434 /* End Global Resume and wait for EOP to be sent */
435 outw(USBCMD_CF, uhci->io_addr + USBCMD);
438 if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR)
439 dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n");
444 /* Restart root hub polling */
445 mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
448 static irqreturn_t uhci_irq(struct usb_hcd *hcd)
450 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
451 unsigned short status;
454 * Read the interrupt status, and write it back to clear the
455 * interrupt cause. Contrary to the UHCI specification, the
456 * "HC Halted" status bit is persistent: it is RO, not R/WC.
458 status = inw(uhci->io_addr + USBSTS);
459 if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */
461 outw(status, uhci->io_addr + USBSTS); /* Clear it */
463 if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) {
464 if (status & USBSTS_HSE)
465 dev_err(uhci_dev(uhci), "host system error, "
467 if (status & USBSTS_HCPE)
468 dev_err(uhci_dev(uhci), "host controller process "
469 "error, something bad happened!\n");
470 if (status & USBSTS_HCH) {
471 spin_lock(&uhci->lock);
472 if (uhci->rh_state >= UHCI_RH_RUNNING) {
473 dev_err(uhci_dev(uhci),
474 "host controller halted, "
476 if (debug > 1 && errbuf) {
477 /* Print the schedule for debugging */
478 uhci_sprint_schedule(uhci,
485 /* Force a callback in case there are
487 mod_timer(&hcd->rh_timer, jiffies);
489 spin_unlock(&uhci->lock);
493 if (status & USBSTS_RD)
494 usb_hcd_poll_rh_status(hcd);
496 spin_lock(&uhci->lock);
497 uhci_scan_schedule(uhci);
498 spin_unlock(&uhci->lock);
505 * Store the current frame number in uhci->frame_number if the controller
506 * is running. Expand from 11 bits (of which we use only 10) to a
507 * full-sized integer.
509 * Like many other parts of the driver, this code relies on being polled
510 * more than once per second as long as the controller is running.
512 static void uhci_get_current_frame_number(struct uhci_hcd *uhci)
514 if (!uhci->is_stopped) {
517 delta = (inw(uhci->io_addr + USBFRNUM) - uhci->frame_number) &
518 (UHCI_NUMFRAMES - 1);
519 uhci->frame_number += delta;
524 * De-allocate all resources
526 static void release_uhci(struct uhci_hcd *uhci)
530 if (DEBUG_CONFIGURED) {
531 spin_lock_irq(&uhci->lock);
532 uhci->is_initialized = 0;
533 spin_unlock_irq(&uhci->lock);
535 debugfs_remove(uhci->dentry);
538 for (i = 0; i < UHCI_NUM_SKELQH; i++)
539 uhci_free_qh(uhci, uhci->skelqh[i]);
541 uhci_free_td(uhci, uhci->term_td);
543 dma_pool_destroy(uhci->qh_pool);
545 dma_pool_destroy(uhci->td_pool);
547 kfree(uhci->frame_cpu);
549 dma_free_coherent(uhci_dev(uhci),
550 UHCI_NUMFRAMES * sizeof(*uhci->frame),
551 uhci->frame, uhci->frame_dma_handle);
554 static int uhci_init(struct usb_hcd *hcd)
556 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
557 unsigned io_size = (unsigned) hcd->rsrc_len;
560 uhci->io_addr = (unsigned long) hcd->rsrc_start;
562 /* The UHCI spec says devices must have 2 ports, and goes on to say
563 * they may have more but gives no way to determine how many there
564 * are. However according to the UHCI spec, Bit 7 of the port
565 * status and control register is always set to 1. So we try to
566 * use this to our advantage. Another common failure mode when
567 * a nonexistent register is addressed is to return all ones, so
568 * we test for that also.
570 for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) {
571 unsigned int portstatus;
573 portstatus = inw(uhci->io_addr + USBPORTSC1 + (port * 2));
574 if (!(portstatus & 0x0080) || portstatus == 0xffff)
578 dev_info(uhci_dev(uhci), "detected %d ports\n", port);
580 /* Anything greater than 7 is weird so we'll ignore it. */
581 if (port > UHCI_RH_MAXCHILD) {
582 dev_info(uhci_dev(uhci), "port count misdetected? "
583 "forcing to 2 ports\n");
586 uhci->rh_numports = port;
588 /* Intel controllers report the OverCurrent bit active on.
589 * VIA controllers report it active off, so we'll adjust the
590 * bit value. (It's not standardized in the UHCI spec.)
592 if (to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_VIA)
595 /* HP's server management chip requires a longer port reset delay. */
596 if (to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_HP)
597 uhci->wait_for_hp = 1;
599 /* Set up pointers to PCI-specific functions */
600 uhci->reset_hc = uhci_pci_reset_hc;
601 uhci->check_and_reset_hc = uhci_pci_check_and_reset_hc;
602 uhci->configure_hc = uhci_pci_configure_hc;
603 uhci->resume_detect_interrupts_are_broken =
604 uhci_pci_resume_detect_interrupts_are_broken;
605 uhci->global_suspend_mode_is_broken =
606 uhci_pci_global_suspend_mode_is_broken;
609 /* Kick BIOS off this hardware and reset if the controller
610 * isn't already safely quiescent.
612 check_and_reset_hc(uhci);
616 /* Make sure the controller is quiescent and that we're not using it
617 * any more. This is mainly for the benefit of programs which, like kexec,
618 * expect the hardware to be idle: not doing DMA or generating IRQs.
620 * This routine may be called in a damaged or failing kernel. Hence we
621 * do not acquire the spinlock before shutting down the controller.
623 static void uhci_shutdown(struct pci_dev *pdev)
625 struct usb_hcd *hcd = pci_get_drvdata(pdev);
627 uhci_hc_died(hcd_to_uhci(hcd));
631 * Allocate a frame list, and then setup the skeleton
633 * The hardware doesn't really know any difference
634 * in the queues, but the order does matter for the
635 * protocols higher up. The order in which the queues
636 * are encountered by the hardware is:
638 * - All isochronous events are handled before any
639 * of the queues. We don't do that here, because
640 * we'll create the actual TD entries on demand.
641 * - The first queue is the high-period interrupt queue.
642 * - The second queue is the period-1 interrupt and async
643 * (low-speed control, full-speed control, then bulk) queue.
644 * - The third queue is the terminating bandwidth reclamation queue,
645 * which contains no members, loops back to itself, and is present
646 * only when FSBR is on and there are no full-speed control or bulk QHs.
648 static int uhci_start(struct usb_hcd *hcd)
650 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
653 struct dentry __maybe_unused *dentry;
655 hcd->uses_new_polling = 1;
657 spin_lock_init(&uhci->lock);
658 setup_timer(&uhci->fsbr_timer, uhci_fsbr_timeout,
659 (unsigned long) uhci);
660 INIT_LIST_HEAD(&uhci->idle_qh_list);
661 init_waitqueue_head(&uhci->waitqh);
663 #ifdef UHCI_DEBUG_OPS
664 dentry = debugfs_create_file(hcd->self.bus_name,
665 S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root,
666 uhci, &uhci_debug_operations);
668 dev_err(uhci_dev(uhci), "couldn't create uhci debugfs entry\n");
671 uhci->dentry = dentry;
674 uhci->frame = dma_alloc_coherent(uhci_dev(uhci),
675 UHCI_NUMFRAMES * sizeof(*uhci->frame),
676 &uhci->frame_dma_handle, 0);
678 dev_err(uhci_dev(uhci), "unable to allocate "
679 "consistent memory for frame list\n");
680 goto err_alloc_frame;
682 memset(uhci->frame, 0, UHCI_NUMFRAMES * sizeof(*uhci->frame));
684 uhci->frame_cpu = kcalloc(UHCI_NUMFRAMES, sizeof(*uhci->frame_cpu),
686 if (!uhci->frame_cpu) {
687 dev_err(uhci_dev(uhci), "unable to allocate "
688 "memory for frame pointers\n");
689 goto err_alloc_frame_cpu;
692 uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci),
693 sizeof(struct uhci_td), 16, 0);
694 if (!uhci->td_pool) {
695 dev_err(uhci_dev(uhci), "unable to create td dma_pool\n");
696 goto err_create_td_pool;
699 uhci->qh_pool = dma_pool_create("uhci_qh", uhci_dev(uhci),
700 sizeof(struct uhci_qh), 16, 0);
701 if (!uhci->qh_pool) {
702 dev_err(uhci_dev(uhci), "unable to create qh dma_pool\n");
703 goto err_create_qh_pool;
706 uhci->term_td = uhci_alloc_td(uhci);
707 if (!uhci->term_td) {
708 dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n");
709 goto err_alloc_term_td;
712 for (i = 0; i < UHCI_NUM_SKELQH; i++) {
713 uhci->skelqh[i] = uhci_alloc_qh(uhci, NULL, NULL);
714 if (!uhci->skelqh[i]) {
715 dev_err(uhci_dev(uhci), "unable to allocate QH\n");
716 goto err_alloc_skelqh;
721 * 8 Interrupt queues; link all higher int queues to int1 = async
723 for (i = SKEL_ISO + 1; i < SKEL_ASYNC; ++i)
724 uhci->skelqh[i]->link = LINK_TO_QH(uhci->skel_async_qh);
725 uhci->skel_async_qh->link = UHCI_PTR_TERM;
726 uhci->skel_term_qh->link = LINK_TO_QH(uhci->skel_term_qh);
728 /* This dummy TD is to work around a bug in Intel PIIX controllers */
729 uhci_fill_td(uhci->term_td, 0, uhci_explen(0) |
730 (0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0);
731 uhci->term_td->link = UHCI_PTR_TERM;
732 uhci->skel_async_qh->element = uhci->skel_term_qh->element =
733 LINK_TO_TD(uhci->term_td);
736 * Fill the frame list: make all entries point to the proper
739 for (i = 0; i < UHCI_NUMFRAMES; i++) {
741 /* Only place we don't use the frame list routines */
742 uhci->frame[i] = uhci_frame_skel_link(uhci, i);
746 * Some architectures require a full mb() to enforce completion of
747 * the memory writes above before the I/O transfers in configure_hc().
752 uhci->is_initialized = 1;
753 spin_lock_irq(&uhci->lock);
755 spin_unlock_irq(&uhci->lock);
762 for (i = 0; i < UHCI_NUM_SKELQH; i++) {
764 uhci_free_qh(uhci, uhci->skelqh[i]);
767 uhci_free_td(uhci, uhci->term_td);
770 dma_pool_destroy(uhci->qh_pool);
773 dma_pool_destroy(uhci->td_pool);
776 kfree(uhci->frame_cpu);
779 dma_free_coherent(uhci_dev(uhci),
780 UHCI_NUMFRAMES * sizeof(*uhci->frame),
781 uhci->frame, uhci->frame_dma_handle);
784 debugfs_remove(uhci->dentry);
789 static void uhci_stop(struct usb_hcd *hcd)
791 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
793 spin_lock_irq(&uhci->lock);
794 if (HCD_HW_ACCESSIBLE(hcd) && !uhci->dead)
796 uhci_scan_schedule(uhci);
797 spin_unlock_irq(&uhci->lock);
798 synchronize_irq(hcd->irq);
800 del_timer_sync(&uhci->fsbr_timer);
805 static int uhci_rh_suspend(struct usb_hcd *hcd)
807 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
810 spin_lock_irq(&uhci->lock);
811 if (!HCD_HW_ACCESSIBLE(hcd))
814 ; /* Dead controllers tell no tales */
816 /* Once the controller is stopped, port resumes that are already
817 * in progress won't complete. Hence if remote wakeup is enabled
818 * for the root hub and any ports are in the middle of a resume or
819 * remote wakeup, we must fail the suspend.
821 else if (hcd->self.root_hub->do_remote_wakeup &&
822 uhci->resuming_ports) {
823 dev_dbg(uhci_dev(uhci), "suspend failed because a port "
827 suspend_rh(uhci, UHCI_RH_SUSPENDED);
828 spin_unlock_irq(&uhci->lock);
832 static int uhci_rh_resume(struct usb_hcd *hcd)
834 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
837 spin_lock_irq(&uhci->lock);
838 if (!HCD_HW_ACCESSIBLE(hcd))
840 else if (!uhci->dead)
842 spin_unlock_irq(&uhci->lock);
846 static int uhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
848 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
849 struct pci_dev *pdev = to_pci_dev(uhci_dev(uhci));
852 dev_dbg(uhci_dev(uhci), "%s\n", __func__);
854 spin_lock_irq(&uhci->lock);
855 if (!HCD_HW_ACCESSIBLE(hcd) || uhci->dead)
856 goto done_okay; /* Already suspended or dead */
858 if (uhci->rh_state > UHCI_RH_SUSPENDED) {
859 dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n");
864 /* All PCI host controllers are required to disable IRQ generation
865 * at the source, so we must turn off PIRQ.
867 pci_write_config_word(pdev, USBLEGSUP, 0);
868 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
870 /* Enable platform-specific non-PME# wakeup */
872 if (pdev->vendor == PCI_VENDOR_ID_INTEL)
873 pci_write_config_byte(pdev, USBRES_INTEL,
874 USBPORT1EN | USBPORT2EN);
878 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
880 spin_unlock_irq(&uhci->lock);
884 static int uhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
886 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
888 dev_dbg(uhci_dev(uhci), "%s\n", __func__);
890 /* Since we aren't in D3 any more, it's safe to set this flag
891 * even if the controller was dead.
893 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
895 spin_lock_irq(&uhci->lock);
897 /* Make sure resume from hibernation re-enumerates everything */
899 uhci->reset_hc(uhci);
903 /* The firmware may have changed the controller settings during
904 * a system wakeup. Check it and reconfigure to avoid problems.
907 check_and_reset_hc(uhci);
911 /* Tell the core if the controller had to be reset */
912 if (uhci->rh_state == UHCI_RH_RESET)
913 usb_root_hub_lost_power(hcd->self.root_hub);
915 spin_unlock_irq(&uhci->lock);
917 /* If interrupts don't work and remote wakeup is enabled then
918 * the suspended root hub needs to be polled.
920 if (!uhci->RD_enable && hcd->self.root_hub->do_remote_wakeup)
921 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
923 /* Does the root hub have a port wakeup pending? */
924 usb_hcd_poll_rh_status(hcd);
929 /* Wait until a particular device/endpoint's QH is idle, and free it */
930 static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd,
931 struct usb_host_endpoint *hep)
933 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
936 spin_lock_irq(&uhci->lock);
937 qh = (struct uhci_qh *) hep->hcpriv;
941 while (qh->state != QH_STATE_IDLE) {
943 spin_unlock_irq(&uhci->lock);
944 wait_event_interruptible(uhci->waitqh,
945 qh->state == QH_STATE_IDLE);
946 spin_lock_irq(&uhci->lock);
950 uhci_free_qh(uhci, qh);
952 spin_unlock_irq(&uhci->lock);
955 static int uhci_hcd_get_frame_number(struct usb_hcd *hcd)
957 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
958 unsigned frame_number;
961 /* Minimize latency by avoiding the spinlock */
962 frame_number = uhci->frame_number;
964 delta = (inw(uhci->io_addr + USBFRNUM) - frame_number) &
965 (UHCI_NUMFRAMES - 1);
966 return frame_number + delta;
969 static const char hcd_name[] = "uhci_hcd";
971 static const struct hc_driver uhci_driver = {
972 .description = hcd_name,
973 .product_desc = "UHCI Host Controller",
974 .hcd_priv_size = sizeof(struct uhci_hcd),
976 /* Generic hardware linkage */
980 /* Basic lifecycle operations */
984 .pci_suspend = uhci_pci_suspend,
985 .pci_resume = uhci_pci_resume,
986 .bus_suspend = uhci_rh_suspend,
987 .bus_resume = uhci_rh_resume,
991 .urb_enqueue = uhci_urb_enqueue,
992 .urb_dequeue = uhci_urb_dequeue,
994 .endpoint_disable = uhci_hcd_endpoint_disable,
995 .get_frame_number = uhci_hcd_get_frame_number,
997 .hub_status_data = uhci_hub_status_data,
998 .hub_control = uhci_hub_control,
1001 static DEFINE_PCI_DEVICE_TABLE(uhci_pci_ids) = { {
1002 /* handle any USB UHCI controller */
1003 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI, ~0),
1004 .driver_data = (unsigned long) &uhci_driver,
1005 }, { /* end: all zeroes */ }
1008 MODULE_DEVICE_TABLE(pci, uhci_pci_ids);
1010 static struct pci_driver uhci_pci_driver = {
1011 .name = (char *)hcd_name,
1012 .id_table = uhci_pci_ids,
1014 .probe = usb_hcd_pci_probe,
1015 .remove = usb_hcd_pci_remove,
1016 .shutdown = uhci_shutdown,
1018 #ifdef CONFIG_PM_SLEEP
1020 .pm = &usb_hcd_pci_pm_ops
1025 static int __init uhci_hcd_init(void)
1027 int retval = -ENOMEM;
1032 printk(KERN_INFO "uhci_hcd: " DRIVER_DESC "%s\n",
1033 ignore_oc ? ", overcurrent ignored" : "");
1034 set_bit(USB_UHCI_LOADED, &usb_hcds_loaded);
1036 if (DEBUG_CONFIGURED) {
1037 errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL);
1040 uhci_debugfs_root = debugfs_create_dir("uhci", usb_debug_root);
1041 if (!uhci_debugfs_root)
1045 uhci_up_cachep = kmem_cache_create("uhci_urb_priv",
1046 sizeof(struct urb_priv), 0, 0, NULL);
1047 if (!uhci_up_cachep)
1050 retval = pci_register_driver(&uhci_pci_driver);
1057 kmem_cache_destroy(uhci_up_cachep);
1060 debugfs_remove(uhci_debugfs_root);
1067 clear_bit(USB_UHCI_LOADED, &usb_hcds_loaded);
1071 static void __exit uhci_hcd_cleanup(void)
1073 pci_unregister_driver(&uhci_pci_driver);
1074 kmem_cache_destroy(uhci_up_cachep);
1075 debugfs_remove(uhci_debugfs_root);
1077 clear_bit(USB_UHCI_LOADED, &usb_hcds_loaded);
1080 module_init(uhci_hcd_init);
1081 module_exit(uhci_hcd_cleanup);
1083 MODULE_AUTHOR(DRIVER_AUTHOR);
1084 MODULE_DESCRIPTION(DRIVER_DESC);
1085 MODULE_LICENSE("GPL");