2 * OHCI HCD (Host Controller Driver) for USB.
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
7 * [ Initialisation is based on Linus' ]
8 * [ uhci code and gregs ohci fragments ]
9 * [ (C) Copyright 1999 Linus Torvalds ]
10 * [ (C) Copyright 1999 Gregory P. Smith]
13 * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
14 * interfaces (though some non-x86 Intel chips use it). It supports
15 * smarter hardware than UHCI. A download link for the spec available
16 * through the http://www.usb.org website.
20 * 2004/03/24 LH7A404 support (Durgesh Pattamatta & Marc Singer)
21 * 2004/02/04 use generic dma_* functions instead of pci_* (dsaxena@plexity.net)
22 * 2003/02/24 show registers in sysfs (Kevin Brosius)
24 * 2002/09/03 get rid of ed hashtables, rework periodic scheduling and
25 * bandwidth accounting; if debugging, show schedules in driverfs
26 * 2002/07/19 fixes to management of ED and schedule state.
27 * 2002/06/09 SA-1111 support (Christopher Hoover)
28 * 2002/06/01 remember frame when HC won't see EDs any more; use that info
29 * to fix urb unlink races caused by interrupt latency assumptions;
30 * minor ED field and function naming updates
31 * 2002/01/18 package as a patch for 2.5.3; this should match the
32 * 2.4.17 kernel modulo some bugs being fixed.
34 * 2001/10/18 merge pmac cleanup (Benjamin Herrenschmidt) and bugfixes
35 * from post-2.4.5 patches.
36 * 2001/09/20 URB_ZERO_PACKET support; hcca_dma portability, OPTi warning
37 * 2001/09/07 match PCI PM changes, errnos from Linus' tree
38 * 2001/05/05 fork 2.4.5 version into "hcd" framework, cleanup, simplify;
39 * pbook pci quirks gone (please fix pbook pci sw!) (db)
41 * 2001/04/08 Identify version on module load (gb)
42 * 2001/03/24 td/ed hashing to remove bus_to_virt (Steve Longerbeam);
44 * 2001/03/21 td and dev/ed allocation uses new pci_pool API (db)
45 * 2001/03/07 hcca allocation uses pci_alloc_consistent (Steve Longerbeam)
47 * 2000/09/26 fixed races in removing the private portion of the urb
48 * 2000/09/07 disable bulk and control lists when unlinking the last
49 * endpoint descriptor in order to avoid unrecoverable errors on
50 * the Lucent chips. (rwc@sgi)
51 * 2000/08/29 use bandwidth claiming hooks (thanks Randy!), fix some
52 * urb unlink probs, indentation fixes
53 * 2000/08/11 various oops fixes mostly affecting iso and cleanup from
55 * 2000/06/28 use PCI hotplug framework, for better power management
56 * and for Cardbus support (David Brownell)
57 * 2000/earlier: fixes for NEC/Lucent chips; suspend/resume handling
58 * when the controller loses power; handle UE; cleanup; ...
60 * v5.2 1999/12/07 URB 3rd preview,
61 * v5.1 1999/11/30 URB 2nd preview, cpia, (usb-scsi)
62 * v5.0 1999/11/22 URB Technical preview, Paul Mackerras powerbook susp/resume
63 * i386: HUB, Keyboard, Mouse, Printer
65 * v4.3 1999/10/27 multiple HCs, bulk_request
66 * v4.2 1999/09/05 ISO API alpha, new dev alloc, neg Error-codes
67 * v4.1 1999/08/27 Randy Dunlap's - ISO API first impl.
70 * v2.1 1999/05/09 code clean up
72 * v1.0 1999/04/27 initial release
74 * This file is licenced under the GPL.
77 #include <linux/module.h>
78 #include <linux/moduleparam.h>
79 #include <linux/pci.h>
80 #include <linux/kernel.h>
81 #include <linux/delay.h>
82 #include <linux/ioport.h>
83 #include <linux/sched.h>
84 #include <linux/slab.h>
85 #include <linux/smp_lock.h>
86 #include <linux/errno.h>
87 #include <linux/init.h>
88 #include <linux/timer.h>
89 #include <linux/list.h>
90 #include <linux/usb.h>
91 #include <linux/usb_otg.h>
92 #include <linux/dma-mapping.h>
93 #include <linux/dmapool.h>
94 #include <linux/reboot.h>
98 #include <asm/system.h>
99 #include <asm/unaligned.h>
100 #include <asm/byteorder.h>
102 #include "../core/hcd.h"
104 #define DRIVER_VERSION "2005 April 22"
105 #define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
106 #define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
108 /*-------------------------------------------------------------------------*/
110 #undef OHCI_VERBOSE_DEBUG /* not always helpful */
112 /* For initializing controller (mask in an HCFS mode too) */
113 #define OHCI_CONTROL_INIT OHCI_CTRL_CBSR
114 #define OHCI_INTR_INIT \
115 (OHCI_INTR_MIE | OHCI_INTR_UE | OHCI_INTR_RD | OHCI_INTR_WDH)
118 /* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
122 #ifdef CONFIG_ARCH_OMAP
123 /* OMAP doesn't support IR (no SMM; not needed) */
127 /*-------------------------------------------------------------------------*/
129 static const char hcd_name [] = "ohci_hcd";
133 static void ohci_dump (struct ohci_hcd *ohci, int verbose);
134 static int ohci_init (struct ohci_hcd *ohci);
135 static void ohci_stop (struct usb_hcd *hcd);
136 static int ohci_reboot (struct notifier_block *, unsigned long , void *);
138 #include "ohci-hub.c"
139 #include "ohci-dbg.c"
140 #include "ohci-mem.c"
145 * On architectures with edge-triggered interrupts we must never return
148 #if defined(CONFIG_SA1111) /* ... or other edge-triggered systems */
149 #define IRQ_NOTMINE IRQ_HANDLED
151 #define IRQ_NOTMINE IRQ_NONE
155 /* Some boards misreport power switching/overcurrent */
156 static int distrust_firmware = 1;
157 module_param (distrust_firmware, bool, 0);
158 MODULE_PARM_DESC (distrust_firmware,
159 "true to distrust firmware power/overcurrent setup");
161 /* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */
162 static int no_handshake = 0;
163 module_param (no_handshake, bool, 0);
164 MODULE_PARM_DESC (no_handshake, "true (not default) disables BIOS handshake");
166 /*-------------------------------------------------------------------------*/
169 * queue up an urb for anything except the root hub
171 static int ohci_urb_enqueue (
173 struct usb_host_endpoint *ep,
177 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
179 urb_priv_t *urb_priv;
180 unsigned int pipe = urb->pipe;
185 #ifdef OHCI_VERBOSE_DEBUG
186 urb_print (urb, "SUB", usb_pipein (pipe));
189 /* every endpoint has a ed, locate and maybe (re)initialize it */
190 if (! (ed = ed_get (ohci, ep, urb->dev, pipe, urb->interval)))
193 /* for the private part of the URB we need the number of TDs (size) */
196 /* td_submit_urb() doesn't yet handle these */
197 if (urb->transfer_buffer_length > 4096)
200 /* 1 TD for setup, 1 for ACK, plus ... */
203 // case PIPE_INTERRUPT:
206 /* one TD for every 4096 Bytes (can be upto 8K) */
207 size += urb->transfer_buffer_length / 4096;
208 /* ... and for any remaining bytes ... */
209 if ((urb->transfer_buffer_length % 4096) != 0)
211 /* ... and maybe a zero length packet to wrap it up */
214 else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
215 && (urb->transfer_buffer_length
216 % usb_maxpacket (urb->dev, pipe,
217 usb_pipeout (pipe))) == 0)
220 case PIPE_ISOCHRONOUS: /* number of packets from URB */
221 size = urb->number_of_packets;
225 /* allocate the private part of the URB */
226 urb_priv = kmalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
230 memset (urb_priv, 0, sizeof (urb_priv_t) + size * sizeof (struct td *));
231 INIT_LIST_HEAD (&urb_priv->pending);
232 urb_priv->length = size;
235 /* allocate the TDs (deferring hash chain updates) */
236 for (i = 0; i < size; i++) {
237 urb_priv->td [i] = td_alloc (ohci, mem_flags);
238 if (!urb_priv->td [i]) {
239 urb_priv->length = i;
240 urb_free_priv (ohci, urb_priv);
245 spin_lock_irqsave (&ohci->lock, flags);
247 /* don't submit to a dead HC */
248 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
252 if (!HC_IS_RUNNING(hcd->state)) {
257 /* in case of unlink-during-submit */
258 spin_lock (&urb->lock);
259 if (urb->status != -EINPROGRESS) {
260 spin_unlock (&urb->lock);
261 urb->hcpriv = urb_priv;
262 finish_urb (ohci, urb, NULL);
267 /* schedule the ed if needed */
268 if (ed->state == ED_IDLE) {
269 retval = ed_schedule (ohci, ed);
272 if (ed->type == PIPE_ISOCHRONOUS) {
273 u16 frame = ohci_frame_no(ohci);
275 /* delay a few frames before the first TD */
276 frame += max_t (u16, 8, ed->interval);
277 frame &= ~(ed->interval - 1);
279 urb->start_frame = frame;
281 /* yes, only URB_ISO_ASAP is supported, and
282 * urb->start_frame is never used as input.
285 } else if (ed->type == PIPE_ISOCHRONOUS)
286 urb->start_frame = ed->last_iso + ed->interval;
288 /* fill the TDs and link them to the ed; and
289 * enable that part of the schedule, if needed
290 * and update count of queued periodic urbs
292 urb->hcpriv = urb_priv;
293 td_submit_urb (ohci, urb);
296 spin_unlock (&urb->lock);
299 urb_free_priv (ohci, urb_priv);
300 spin_unlock_irqrestore (&ohci->lock, flags);
305 * decouple the URB from the HC queues (TDs, urb_priv); it's
306 * already marked using urb->status. reporting is always done
307 * asynchronously, and we might be dealing with an urb that's
308 * partially transferred, or an ED with other urbs being unlinked.
310 static int ohci_urb_dequeue (struct usb_hcd *hcd, struct urb *urb)
312 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
315 #ifdef OHCI_VERBOSE_DEBUG
316 urb_print (urb, "UNLINK", 1);
319 spin_lock_irqsave (&ohci->lock, flags);
320 if (HC_IS_RUNNING(hcd->state)) {
321 urb_priv_t *urb_priv;
323 /* Unless an IRQ completed the unlink while it was being
324 * handed to us, flag it for unlink and giveback, and force
325 * some upcoming INTR_SF to call finish_unlinks()
327 urb_priv = urb->hcpriv;
329 if (urb_priv->ed->state == ED_OPER)
330 start_ed_unlink (ohci, urb_priv->ed);
334 * with HC dead, we won't respect hc queue pointers
335 * any more ... just clean up every urb's memory.
338 finish_urb (ohci, urb, NULL);
340 spin_unlock_irqrestore (&ohci->lock, flags);
344 /*-------------------------------------------------------------------------*/
346 /* frees config/altsetting state for endpoints,
347 * including ED memory, dummy TD, and bulk/intr data toggle
351 ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
353 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
355 struct ed *ed = ep->hcpriv;
356 unsigned limit = 1000;
358 /* ASSERT: any requests/urbs are being unlinked */
359 /* ASSERT: nobody can be submitting urbs for this any more */
365 spin_lock_irqsave (&ohci->lock, flags);
367 if (!HC_IS_RUNNING (hcd->state)) {
370 finish_unlinks (ohci, 0, NULL);
374 case ED_UNLINK: /* wait for hw to finish? */
375 /* major IRQ delivery trouble loses INTR_SF too... */
377 ohci_warn (ohci, "IRQ INTR_SF lossage\n");
380 spin_unlock_irqrestore (&ohci->lock, flags);
381 schedule_timeout_uninterruptible(1);
383 case ED_IDLE: /* fully unlinked */
384 if (list_empty (&ed->td_list)) {
385 td_free (ohci, ed->dummy);
389 /* else FALL THROUGH */
391 /* caller was supposed to have unlinked any requests;
392 * that's not our job. can't recover; must leak ed.
394 ohci_err (ohci, "leak ed %p (#%02x) state %d%s\n",
395 ed, ep->desc.bEndpointAddress, ed->state,
396 list_empty (&ed->td_list) ? "" : " (has tds)");
397 td_free (ohci, ed->dummy);
401 spin_unlock_irqrestore (&ohci->lock, flags);
405 static int ohci_get_frame (struct usb_hcd *hcd)
407 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
409 return ohci_frame_no(ohci);
412 static void ohci_usb_reset (struct ohci_hcd *ohci)
414 ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
415 ohci->hc_control &= OHCI_CTRL_RWC;
416 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
419 /* reboot notifier forcibly disables IRQs and DMA, helping kexec and
420 * other cases where the next software may expect clean state from the
421 * "firmware". this is bus-neutral, unlike shutdown() methods.
424 ohci_reboot (struct notifier_block *block, unsigned long code, void *null)
426 struct ohci_hcd *ohci;
428 ohci = container_of (block, struct ohci_hcd, reboot_notifier);
429 ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
430 ohci_usb_reset (ohci);
431 /* flush the writes */
432 (void) ohci_readl (ohci, &ohci->regs->control);
436 /*-------------------------------------------------------------------------*
438 *-------------------------------------------------------------------------*/
440 /* init memory, and kick BIOS/SMM off */
442 static int ohci_init (struct ohci_hcd *ohci)
445 struct usb_hcd *hcd = ohci_to_hcd(ohci);
448 ohci->regs = hcd->regs;
449 ohci->next_statechange = jiffies;
451 /* REVISIT this BIOS handshake is now moved into PCI "quirks", and
452 * was never needed for most non-PCI systems ... remove the code?
456 /* SMM owns the HC? not for long! */
457 if (!no_handshake && ohci_readl (ohci,
458 &ohci->regs->control) & OHCI_CTRL_IR) {
461 ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
463 /* this timeout is arbitrary. we make it long, so systems
464 * depending on usb keyboards may be usable even if the
465 * BIOS/SMM code seems pretty broken.
467 temp = 500; /* arbitrary: five seconds */
469 ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable);
470 ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus);
471 while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) {
474 ohci_err (ohci, "USB HC takeover failed!"
475 " (BIOS/SMM bug)\n");
479 ohci_usb_reset (ohci);
483 /* Disable HC interrupts */
484 ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
486 /* flush the writes, and save key bits like RWC */
487 if (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_RWC)
488 ohci->hc_control |= OHCI_CTRL_RWC;
490 /* Read the number of ports unless overridden */
491 if (ohci->num_ports == 0)
492 ohci->num_ports = roothub_a(ohci) & RH_A_NDP;
497 ohci->hcca = dma_alloc_coherent (hcd->self.controller,
498 sizeof *ohci->hcca, &ohci->hcca_dma, 0);
502 if ((ret = ohci_mem_init (ohci)) < 0)
505 register_reboot_notifier (&ohci->reboot_notifier);
506 create_debug_files (ohci);
512 /*-------------------------------------------------------------------------*/
514 /* Start an OHCI controller, set the BUS operational
515 * resets USB and controller
518 static int ohci_run (struct ohci_hcd *ohci)
521 int first = ohci->fminterval == 0;
522 struct usb_hcd *hcd = ohci_to_hcd(ohci);
526 /* boot firmware should have set this up (5.1.1.3.1) */
529 temp = ohci_readl (ohci, &ohci->regs->fminterval);
530 ohci->fminterval = temp & 0x3fff;
531 if (ohci->fminterval != FI)
532 ohci_dbg (ohci, "fminterval delta %d\n",
533 ohci->fminterval - FI);
534 ohci->fminterval |= FSMP (ohci->fminterval) << 16;
535 /* also: power/overcurrent flags in roothub.a */
538 /* Reset USB nearly "by the book". RemoteWakeupConnected was
539 * saved if boot firmware (BIOS/SMM/...) told us it's connected,
540 * or if bus glue did the same (e.g. for PCI add-in cards with
543 ohci_dbg (ohci, "resetting from state '%s', control = 0x%x\n",
544 hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS),
545 ohci_readl (ohci, &ohci->regs->control));
546 if ((ohci->hc_control & OHCI_CTRL_RWC) != 0
547 && !device_may_wakeup(hcd->self.controller))
548 device_init_wakeup(hcd->self.controller, 1);
550 switch (ohci->hc_control & OHCI_CTRL_HCFS) {
554 case OHCI_USB_SUSPEND:
555 case OHCI_USB_RESUME:
556 ohci->hc_control &= OHCI_CTRL_RWC;
557 ohci->hc_control |= OHCI_USB_RESUME;
558 temp = 10 /* msec wait */;
560 // case OHCI_USB_RESET:
562 ohci->hc_control &= OHCI_CTRL_RWC;
563 ohci->hc_control |= OHCI_USB_RESET;
564 temp = 50 /* msec wait */;
567 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
569 (void) ohci_readl (ohci, &ohci->regs->control);
571 temp = roothub_a (ohci);
572 if (!(temp & RH_A_NPS)) {
573 /* power down each port */
574 for (temp = 0; temp < ohci->num_ports; temp++)
575 ohci_writel (ohci, RH_PS_LSDA,
576 &ohci->regs->roothub.portstatus [temp]);
578 // flush those writes
579 (void) ohci_readl (ohci, &ohci->regs->control);
580 memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
582 /* 2msec timelimit here means no irqs/preempt */
583 spin_lock_irq (&ohci->lock);
586 /* HC Reset requires max 10 us delay */
587 ohci_writel (ohci, OHCI_HCR, &ohci->regs->cmdstatus);
588 temp = 30; /* ... allow extra time */
589 while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
591 spin_unlock_irq (&ohci->lock);
592 ohci_err (ohci, "USB HC reset timed out!\n");
598 /* now we're in the SUSPEND state ... must go OPERATIONAL
599 * within 2msec else HC enters RESUME
601 * ... but some hardware won't init fmInterval "by the book"
602 * (SiS, OPTi ...), so reset again instead. SiS doesn't need
603 * this if we write fmInterval after we're OPERATIONAL.
604 * Unclear about ALi, ServerWorks, and others ... this could
605 * easily be a longstanding bug in chip init on Linux.
607 if (ohci->flags & OHCI_QUIRK_INITRESET) {
608 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
609 // flush those writes
610 (void) ohci_readl (ohci, &ohci->regs->control);
613 /* Tell the controller where the control and bulk lists are
614 * The lists are empty now. */
615 ohci_writel (ohci, 0, &ohci->regs->ed_controlhead);
616 ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead);
618 /* a reset clears this */
619 ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca);
621 periodic_reinit (ohci);
623 /* some OHCI implementations are finicky about how they init.
624 * bogus values here mean not even enumeration could work.
626 if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0
627 || !ohci_readl (ohci, &ohci->regs->periodicstart)) {
628 if (!(ohci->flags & OHCI_QUIRK_INITRESET)) {
629 ohci->flags |= OHCI_QUIRK_INITRESET;
630 ohci_dbg (ohci, "enabling initreset quirk\n");
633 spin_unlock_irq (&ohci->lock);
634 ohci_err (ohci, "init err (%08x %04x)\n",
635 ohci_readl (ohci, &ohci->regs->fminterval),
636 ohci_readl (ohci, &ohci->regs->periodicstart));
640 /* start controller operations */
641 ohci->hc_control &= OHCI_CTRL_RWC;
642 ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
643 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
644 hcd->state = HC_STATE_RUNNING;
646 /* wake on ConnectStatusChange, matching external hubs */
647 ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status);
649 /* Choose the interrupts we care about now, others later on demand */
650 mask = OHCI_INTR_INIT;
651 ohci_writel (ohci, mask, &ohci->regs->intrstatus);
652 ohci_writel (ohci, mask, &ohci->regs->intrenable);
654 /* handle root hub init quirks ... */
655 temp = roothub_a (ohci);
656 temp &= ~(RH_A_PSM | RH_A_OCPM);
657 if (ohci->flags & OHCI_QUIRK_SUPERIO) {
658 /* NSC 87560 and maybe others */
660 temp &= ~(RH_A_POTPGT | RH_A_NPS);
661 ohci_writel (ohci, temp, &ohci->regs->roothub.a);
662 } else if ((ohci->flags & OHCI_QUIRK_AMD756) || distrust_firmware) {
663 /* hub power always on; required for AMD-756 and some
664 * Mac platforms. ganged overcurrent reporting, if any.
667 ohci_writel (ohci, temp, &ohci->regs->roothub.a);
669 ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status);
670 ohci_writel (ohci, (temp & RH_A_NPS) ? 0 : RH_B_PPCM,
671 &ohci->regs->roothub.b);
672 // flush those writes
673 (void) ohci_readl (ohci, &ohci->regs->control);
675 spin_unlock_irq (&ohci->lock);
677 // POTPGT delay is bits 24-31, in 2 ms units.
678 mdelay ((temp >> 23) & 0x1fe);
679 hcd->state = HC_STATE_RUNNING;
686 /*-------------------------------------------------------------------------*/
688 /* an interrupt happens */
690 static irqreturn_t ohci_irq (struct usb_hcd *hcd, struct pt_regs *ptregs)
692 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
693 struct ohci_regs __iomem *regs = ohci->regs;
696 /* we can eliminate a (slow) ohci_readl()
697 if _only_ WDH caused this irq */
698 if ((ohci->hcca->done_head != 0)
699 && ! (hc32_to_cpup (ohci, &ohci->hcca->done_head)
701 ints = OHCI_INTR_WDH;
703 /* cardbus/... hardware gone before remove() */
704 } else if ((ints = ohci_readl (ohci, ®s->intrstatus)) == ~(u32)0) {
706 ohci_dbg (ohci, "device removed!\n");
709 /* interrupt for some other device? */
710 } else if ((ints &= ohci_readl (ohci, ®s->intrenable)) == 0) {
714 if (ints & OHCI_INTR_UE) {
716 ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
717 // e.g. due to PCI Master/Target Abort
720 ohci_usb_reset (ohci);
723 if (ints & OHCI_INTR_RD) {
724 ohci_vdbg (ohci, "resume detect\n");
725 ohci_writel (ohci, OHCI_INTR_RD, ®s->intrstatus);
726 if (hcd->state != HC_STATE_QUIESCING)
727 usb_hcd_resume_root_hub(hcd);
730 if (ints & OHCI_INTR_WDH) {
731 if (HC_IS_RUNNING(hcd->state))
732 ohci_writel (ohci, OHCI_INTR_WDH, ®s->intrdisable);
733 spin_lock (&ohci->lock);
734 dl_done_list (ohci, ptregs);
735 spin_unlock (&ohci->lock);
736 if (HC_IS_RUNNING(hcd->state))
737 ohci_writel (ohci, OHCI_INTR_WDH, ®s->intrenable);
740 /* could track INTR_SO to reduce available PCI/... bandwidth */
742 /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
743 * when there's still unlinking to be done (next frame).
745 spin_lock (&ohci->lock);
746 if (ohci->ed_rm_list)
747 finish_unlinks (ohci, ohci_frame_no(ohci), ptregs);
748 if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list
749 && HC_IS_RUNNING(hcd->state))
750 ohci_writel (ohci, OHCI_INTR_SF, ®s->intrdisable);
751 spin_unlock (&ohci->lock);
753 if (HC_IS_RUNNING(hcd->state)) {
754 ohci_writel (ohci, ints, ®s->intrstatus);
755 ohci_writel (ohci, OHCI_INTR_MIE, ®s->intrenable);
756 // flush those writes
757 (void) ohci_readl (ohci, &ohci->regs->control);
763 /*-------------------------------------------------------------------------*/
765 static void ohci_stop (struct usb_hcd *hcd)
767 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
769 ohci_dbg (ohci, "stop %s controller (state 0x%02x)\n",
770 hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS),
774 flush_scheduled_work();
776 ohci_usb_reset (ohci);
777 ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
779 remove_debug_files (ohci);
780 unregister_reboot_notifier (&ohci->reboot_notifier);
781 ohci_mem_cleanup (ohci);
783 dma_free_coherent (hcd->self.controller,
785 ohci->hcca, ohci->hcca_dma);
791 /*-------------------------------------------------------------------------*/
793 /* must not be called from interrupt context */
797 static int ohci_restart (struct ohci_hcd *ohci)
801 struct urb_priv *priv;
803 /* mark any devices gone, so they do nothing till khubd disconnects.
804 * recycle any "live" eds/tds (and urbs) right away.
805 * later, khubd disconnect processing will recycle the other state,
806 * (either as disconnect/reconnect, or maybe someday as a reset).
808 spin_lock_irq(&ohci->lock);
810 usb_root_hub_lost_power(ohci_to_hcd(ohci)->self.root_hub);
811 if (!list_empty (&ohci->pending))
812 ohci_dbg(ohci, "abort schedule...\n");
813 list_for_each_entry (priv, &ohci->pending, pending) {
814 struct urb *urb = priv->td[0]->urb;
815 struct ed *ed = priv->ed;
819 ed->state = ED_UNLINK;
820 ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE);
821 ed_deschedule (ohci, ed);
823 ed->ed_next = ohci->ed_rm_list;
825 ohci->ed_rm_list = ed;
830 ohci_dbg(ohci, "bogus ed %p state %d\n",
834 spin_lock (&urb->lock);
835 urb->status = -ESHUTDOWN;
836 spin_unlock (&urb->lock);
838 finish_unlinks (ohci, 0, NULL);
839 spin_unlock_irq(&ohci->lock);
841 /* paranoia, in case that didn't work: */
843 /* empty the interrupt branches */
844 for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
845 for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
847 /* no EDs to remove */
848 ohci->ed_rm_list = NULL;
850 /* empty control and bulk lists */
851 ohci->ed_controltail = NULL;
852 ohci->ed_bulktail = NULL;
854 if ((temp = ohci_run (ohci)) < 0) {
855 ohci_err (ohci, "can't restart, %d\n", temp);
858 /* here we "know" root ports should always stay powered,
859 * and that if we try to turn them back on the root hub
860 * will respond to CSC processing.
864 ohci_writel (ohci, RH_PS_PSS,
865 &ohci->regs->roothub.portstatus [i]);
866 ohci_dbg (ohci, "restart complete\n");
872 /*-------------------------------------------------------------------------*/
874 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
876 MODULE_AUTHOR (DRIVER_AUTHOR);
877 MODULE_DESCRIPTION (DRIVER_INFO);
878 MODULE_LICENSE ("GPL");
881 #include "ohci-pci.c"
885 #include "ohci-sa1111.c"
888 #ifdef CONFIG_ARCH_S3C2410
889 #include "ohci-s3c2410.c"
892 #ifdef CONFIG_ARCH_OMAP
893 #include "ohci-omap.c"
896 #ifdef CONFIG_ARCH_LH7A404
897 #include "ohci-lh7a404.c"
901 #include "ohci-pxa27x.c"
904 #ifdef CONFIG_ARCH_EP93XX
905 #include "ohci-ep93xx.c"
908 #ifdef CONFIG_SOC_AU1X00
909 #include "ohci-au1xxx.c"
912 #ifdef CONFIG_USB_OHCI_HCD_PPC_SOC
913 #include "ohci-ppc-soc.c"
916 #ifdef CONFIG_ARCH_AT91RM9200
917 #include "ohci-at91.c"
920 #if !(defined(CONFIG_PCI) \
921 || defined(CONFIG_SA1111) \
922 || defined(CONFIG_ARCH_S3C2410) \
923 || defined(CONFIG_ARCH_OMAP) \
924 || defined (CONFIG_ARCH_LH7A404) \
925 || defined (CONFIG_PXA27x) \
926 || defined (CONFIG_ARCH_EP93XX) \
927 || defined (CONFIG_SOC_AU1X00) \
928 || defined (CONFIG_USB_OHCI_HCD_PPC_SOC) \
929 || defined (CONFIG_ARCH_AT91RM9200) \
931 #error "missing bus glue for ohci-hcd"