drivers/usb/host/ehci-tegra.c

   1 /*
   2  * EHCI-compliant USB host controller driver for NVIDIA Tegra SoCs
   3  *
   4  * Copyright (C) 2010 Google, Inc.
   5  * Copyright (C) 2009 NVIDIA Corporation
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License as published by the
   9  * Free Software Foundation; either version 2 of the License, or (at your
  10  * option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  */
  18
  19 #include <linux/clk.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/platform_data/tegra_usb.h>
  22 #include <linux/irq.h>
  23 #include <linux/usb/otg.h>
  24 #include <mach/usb_phy.h>
  25
  26 #define TEGRA_USB_DMA_ALIGN 32
  27
  28 struct tegra_ehci_hcd {
  29         struct ehci_hcd *ehci;
  30         struct tegra_usb_phy *phy;
  31         struct clk *clk;
  32         struct clk *emc_clk;
  33         struct otg_transceiver *transceiver;
  34         int host_resumed;
  35         int bus_suspended;
  36         int port_resuming;
  37         int power_down_on_bus_suspend;
  38         enum tegra_usb_phy_port_speed port_speed;
  39 };
  40
  41 static void tegra_ehci_power_up(struct usb_hcd *hcd)
  42 {
  43         struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller);
  44
  45         clk_enable(tegra->emc_clk);
  46         clk_enable(tegra->clk);
  47         tegra_usb_phy_power_on(tegra->phy);
  48         tegra->host_resumed = 1;
  49 }
  50
  51 static void tegra_ehci_power_down(struct usb_hcd *hcd)
  52 {
  53         struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller);
  54
  55         tegra->host_resumed = 0;
  56         tegra_usb_phy_power_off(tegra->phy);
  57         clk_disable(tegra->clk);
  58         clk_disable(tegra->emc_clk);
  59 }
  60
  61 static int tegra_ehci_hub_control(
  62         struct usb_hcd  *hcd,
  63         u16             typeReq,
  64         u16             wValue,
  65         u16             wIndex,
  66         char            *buf,
  67         u16             wLength
  68 )
  69 {
  70         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  71         struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller);
  72         u32 __iomem     *status_reg;
  73         u32             temp;
  74         unsigned long   flags;
  75         int             retval = 0;
  76
  77         status_reg = &ehci->regs->port_status[(wIndex & 0xff) - 1];
  78
  79         spin_lock_irqsave(&ehci->lock, flags);
  80
  81         /*
  82          * In ehci_hub_control() for USB_PORT_FEAT_ENABLE clears the other bits
  83          * that are write on clear, by writing back the register read value, so
  84          * USB_PORT_FEAT_ENABLE is handled by masking the set on clear bits
  85          */
  86         if (typeReq == ClearPortFeature && wValue == USB_PORT_FEAT_ENABLE) {
  87                 temp = ehci_readl(ehci, status_reg) & ~PORT_RWC_BITS;
  88                 ehci_writel(ehci, temp & ~PORT_PE, status_reg);
  89                 goto done;
  90         }
  91
  92         else if (typeReq == GetPortStatus) {
  93                 temp = ehci_readl(ehci, status_reg);
  94                 if (tegra->port_resuming && !(temp & PORT_SUSPEND)) {
  95                         /* Resume completed, re-enable disconnect detection */
  96                         tegra->port_resuming = 0;
  97                         tegra_usb_phy_postresume(tegra->phy);
  98                 }
  99         }
 100
 101         else if (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_SUSPEND) {
 102                 temp = ehci_readl(ehci, status_reg);
 103                 if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) != 0) {
 104                         retval = -EPIPE;
 105                         goto done;
 106                 }
 107
 108                 temp &= ~PORT_WKCONN_E;
 109                 temp |= PORT_WKDISC_E | PORT_WKOC_E;
 110                 ehci_writel(ehci, temp | PORT_SUSPEND, status_reg);
 111
 112                 /*
 113                  * If a transaction is in progress, there may be a delay in
 114                  * suspending the port. Poll until the port is suspended.
 115                  */
 116                 if (handshake(ehci, status_reg, PORT_SUSPEND,
 117                                                 PORT_SUSPEND, 5000))
 118                         pr_err("%s: timeout waiting for SUSPEND\n", __func__);
 119
 120                 set_bit((wIndex & 0xff) - 1, &ehci->suspended_ports);
 121                 goto done;
 122         }
 123
 124         /*
 125          * Tegra host controller will time the resume operation to clear the bit
 126          * when the port control state switches to HS or FS Idle. This behavior
 127          * is different from EHCI where the host controller driver is required
 128          * to set this bit to a zero after the resume duration is timed in the
 129          * driver.
 130          */
 131         else if (typeReq == ClearPortFeature &&
 132                                         wValue == USB_PORT_FEAT_SUSPEND) {
 133                 temp = ehci_readl(ehci, status_reg);
 134                 if ((temp & PORT_RESET) || !(temp & PORT_PE)) {
 135                         retval = -EPIPE;
 136                         goto done;
 137                 }
 138
 139                 if (!(temp & PORT_SUSPEND))
 140                         goto done;
 141
 142                 /* Disable disconnect detection during port resume */
 143                 tegra_usb_phy_preresume(tegra->phy);
 144
 145                 ehci->reset_done[wIndex-1] = jiffies + msecs_to_jiffies(25);
 146
 147                 temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
 148                 /* start resume signalling */
 149                 ehci_writel(ehci, temp | PORT_RESUME, status_reg);
 150
 151                 spin_unlock_irqrestore(&ehci->lock, flags);
 152                 msleep(20);
 153                 spin_lock_irqsave(&ehci->lock, flags);
 154
 155                 /* Poll until the controller clears RESUME and SUSPEND */
 156                 if (handshake(ehci, status_reg, PORT_RESUME, 0, 2000))
 157                         pr_err("%s: timeout waiting for RESUME\n", __func__);
 158                 if (handshake(ehci, status_reg, PORT_SUSPEND, 0, 2000))
 159                         pr_err("%s: timeout waiting for SUSPEND\n", __func__);
 160
 161                 ehci->reset_done[wIndex-1] = 0;
 162
 163                 tegra->port_resuming = 1;
 164                 goto done;
 165         }
 166
 167         spin_unlock_irqrestore(&ehci->lock, flags);
 168
 169         /* Handle the hub control events here */
 170         return ehci_hub_control(hcd, typeReq, wValue, wIndex, buf, wLength);
 171 done:
 172         spin_unlock_irqrestore(&ehci->lock, flags);
 173         return retval;
 174 }
 175
 176 static void tegra_ehci_restart(struct usb_hcd *hcd)
 177 {
 178         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 179
 180         ehci_reset(ehci);
 181
 182         /* setup the frame list and Async q heads */
 183         ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
 184         ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
 185         /* setup the command register and set the controller in RUN mode */
 186         ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
 187         ehci->command |= CMD_RUN;
 188         ehci_writel(ehci, ehci->command, &ehci->regs->command);
 189
 190         down_write(&ehci_cf_port_reset_rwsem);
 191         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
 192         /* flush posted writes */
 193         ehci_readl(ehci, &ehci->regs->command);
 194         up_write(&ehci_cf_port_reset_rwsem);
 195 }
 196
 197 static int tegra_usb_suspend(struct usb_hcd *hcd)
 198 {
 199         struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller);
 200         struct ehci_regs __iomem *hw = tegra->ehci->regs;
 201         unsigned long flags;
 202
 203         spin_lock_irqsave(&tegra->ehci->lock, flags);
 204
 205         tegra->port_speed = (readl(&hw->port_status[0]) >> 26) & 0x3;
 206         ehci_halt(tegra->ehci);
 207         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
 208
 209         spin_unlock_irqrestore(&tegra->ehci->lock, flags);
 210
 211         tegra_ehci_power_down(hcd);
 212         return 0;
 213 }
 214
 215 static int tegra_usb_resume(struct usb_hcd *hcd)
 216 {
 217         struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller);
 218         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 219         struct ehci_regs __iomem *hw = ehci->regs;
 220         unsigned long val;
 221
 222         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
 223         tegra_ehci_power_up(hcd);
 224
 225         if (tegra->port_speed > TEGRA_USB_PHY_PORT_SPEED_HIGH) {
 226                 /* Wait for the phy to detect new devices
 227                  * before we restart the controller */
 228                 msleep(10);
 229                 goto restart;
 230         }
 231
 232         /* Force the phy to keep data lines in suspend state */
 233         tegra_ehci_phy_restore_start(tegra->phy, tegra->port_speed);
 234
 235         /* Enable host mode */
 236         tdi_reset(ehci);
 237
 238         /* Enable Port Power */
 239         val = readl(&hw->port_status[0]);
 240         val |= PORT_POWER;
 241         writel(val, &hw->port_status[0]);
 242         udelay(10);
 243
 244         /* Check if the phy resume from LP0. When the phy resume from LP0
 245          * USB register will be reset. */
 246         if (!readl(&hw->async_next)) {
 247                 /* Program the field PTC based on the saved speed mode */
 248                 val = readl(&hw->port_status[0]);
 249                 val &= ~PORT_TEST(~0);
 250                 if (tegra->port_speed == TEGRA_USB_PHY_PORT_SPEED_HIGH)
 251                         val |= PORT_TEST_FORCE;
 252                 else if (tegra->port_speed == TEGRA_USB_PHY_PORT_SPEED_FULL)
 253                         val |= PORT_TEST(6);
 254                 else if (tegra->port_speed == TEGRA_USB_PHY_PORT_SPEED_LOW)
 255                         val |= PORT_TEST(7);
 256                 writel(val, &hw->port_status[0]);
 257                 udelay(10);
 258
 259                 /* Disable test mode by setting PTC field to NORMAL_OP */
 260                 val = readl(&hw->port_status[0]);
 261                 val &= ~PORT_TEST(~0);
 262                 writel(val, &hw->port_status[0]);
 263                 udelay(10);
 264         }
 265
 266         /* Poll until CCS is enabled */
 267         if (handshake(ehci, &hw->port_status[0], PORT_CONNECT,
 268                                                  PORT_CONNECT, 2000)) {
 269                 pr_err("%s: timeout waiting for PORT_CONNECT\n", __func__);
 270                 goto restart;
 271         }
 272
 273         /* Poll until PE is enabled */
 274         if (handshake(ehci, &hw->port_status[0], PORT_PE,
 275                                                  PORT_PE, 2000)) {
 276                 pr_err("%s: timeout waiting for USB_PORTSC1_PE\n", __func__);
 277                 goto restart;
 278         }
 279
 280         /* Clear the PCI status, to avoid an interrupt taken upon resume */
 281         val = readl(&hw->status);
 282         val |= STS_PCD;
 283         writel(val, &hw->status);
 284
 285         /* Put controller in suspend mode by writing 1 to SUSP bit of PORTSC */
 286         val = readl(&hw->port_status[0]);
 287         if ((val & PORT_POWER) && (val & PORT_PE)) {
 288                 val |= PORT_SUSPEND;
 289                 writel(val, &hw->port_status[0]);
 290
 291                 /* Wait until port suspend completes */
 292                 if (handshake(ehci, &hw->port_status[0], PORT_SUSPEND,
 293                                                          PORT_SUSPEND, 1000)) {
 294                         pr_err("%s: timeout waiting for PORT_SUSPEND\n",
 295                                                                 __func__);
 296                         goto restart;
 297                 }
 298         }
 299
 300         tegra_ehci_phy_restore_end(tegra->phy);
 301         return 0;
 302
 303 restart:
 304         if (tegra->port_speed <= TEGRA_USB_PHY_PORT_SPEED_HIGH)
 305                 tegra_ehci_phy_restore_end(tegra->phy);
 306
 307         tegra_ehci_restart(hcd);
 308         return 0;
 309 }
 310
 311 static void tegra_ehci_shutdown(struct usb_hcd *hcd)
 312 {
 313         struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller);
 314
 315         /* ehci_shutdown touches the USB controller registers, make sure
 316          * controller has clocks to it */
 317         if (!tegra->host_resumed)
 318                 tegra_ehci_power_up(hcd);
 319
 320         ehci_shutdown(hcd);
 321 }
 322
 323 static int tegra_ehci_setup(struct usb_hcd *hcd)
 324 {
 325         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 326         int retval;
 327
 328         /* EHCI registers start at offset 0x100 */
 329         ehci->caps = hcd->regs + 0x100;
 330         ehci->regs = hcd->regs + 0x100 +
 331                 HC_LENGTH(readl(&ehci->caps->hc_capbase));
 332
 333         dbg_hcs_params(ehci, "reset");
 334         dbg_hcc_params(ehci, "reset");
 335
 336         /* cache this readonly data; minimize chip reads */
 337         ehci->hcs_params = readl(&ehci->caps->hcs_params);
 338
 339         /* switch to host mode */
 340         hcd->has_tt = 1;
 341         ehci_reset(ehci);
 342
 343         retval = ehci_halt(ehci);
 344         if (retval)
 345                 return retval;
 346
 347         /* data structure init */
 348         retval = ehci_init(hcd);
 349         if (retval)
 350                 return retval;
 351
 352         ehci->sbrn = 0x20;
 353
 354         ehci_port_power(ehci, 1);
 355         return retval;
 356 }
 357
 358 #ifdef CONFIG_PM
 359 static int tegra_ehci_bus_suspend(struct usb_hcd *hcd)
 360 {
 361         struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller);
 362         int error_status = 0;
 363
 364         error_status = ehci_bus_suspend(hcd);
 365         if (!error_status && tegra->power_down_on_bus_suspend) {
 366                 tegra_usb_suspend(hcd);
 367                 tegra->bus_suspended = 1;
 368         }
 369
 370         return error_status;
 371 }
 372
 373 static int tegra_ehci_bus_resume(struct usb_hcd *hcd)
 374 {
 375         struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller);
 376
 377         if (tegra->bus_suspended && tegra->power_down_on_bus_suspend) {
 378                 tegra_usb_resume(hcd);
 379                 tegra->bus_suspended = 0;
 380         }
 381
 382         tegra_usb_phy_preresume(tegra->phy);
 383         tegra->port_resuming = 1;
 384         return ehci_bus_resume(hcd);
 385 }
 386 #endif
 387
 388 struct temp_buffer {
 389         void *kmalloc_ptr;
 390         void *old_xfer_buffer;
 391         u8 data[0];
 392 };
 393
 394 static void free_temp_buffer(struct urb *urb)
 395 {
 396         enum dma_data_direction dir;
 397         struct temp_buffer *temp;
 398
 399         if (!(urb->transfer_flags & URB_ALIGNED_TEMP_BUFFER))
 400                 return;
 401
 402         dir = usb_urb_dir_in(urb) ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
 403
 404         temp = container_of(urb->transfer_buffer, struct temp_buffer,
 405                             data);
 406
 407         if (dir == DMA_FROM_DEVICE)
 408                 memcpy(temp->old_xfer_buffer, temp->data,
 409                        urb->transfer_buffer_length);
 410         urb->transfer_buffer = temp->old_xfer_buffer;
 411         kfree(temp->kmalloc_ptr);
 412
 413         urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER;
 414 }
 415
 416 static int alloc_temp_buffer(struct urb *urb, gfp_t mem_flags)
 417 {
 418         enum dma_data_direction dir;
 419         struct temp_buffer *temp, *kmalloc_ptr;
 420         size_t kmalloc_size;
 421
 422         if (urb->num_sgs || urb->sg ||
 423             urb->transfer_buffer_length == 0 ||
 424             !((uintptr_t)urb->transfer_buffer & (TEGRA_USB_DMA_ALIGN - 1)))
 425                 return 0;
 426
 427         dir = usb_urb_dir_in(urb) ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
 428
 429         /* Allocate a buffer with enough padding for alignment */
 430         kmalloc_size = urb->transfer_buffer_length +
 431                 sizeof(struct temp_buffer) + TEGRA_USB_DMA_ALIGN - 1;
 432
 433         kmalloc_ptr = kmalloc(kmalloc_size, mem_flags);
 434         if (!kmalloc_ptr)
 435                 return -ENOMEM;
 436
 437         /* Position our struct temp_buffer such that data is aligned */
 438         temp = PTR_ALIGN(kmalloc_ptr + 1, TEGRA_USB_DMA_ALIGN) - 1;
 439
 440         temp->kmalloc_ptr = kmalloc_ptr;
 441         temp->old_xfer_buffer = urb->transfer_buffer;
 442         if (dir == DMA_TO_DEVICE)
 443                 memcpy(temp->data, urb->transfer_buffer,
 444                        urb->transfer_buffer_length);
 445         urb->transfer_buffer = temp->data;
 446
 447         urb->transfer_flags |= URB_ALIGNED_TEMP_BUFFER;
 448
 449         return 0;
 450 }
 451
 452 static int tegra_ehci_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb,
 453                                       gfp_t mem_flags)
 454 {
 455         int ret;
 456
 457         ret = alloc_temp_buffer(urb, mem_flags);
 458         if (ret)
 459                 return ret;
 460
 461         ret = usb_hcd_map_urb_for_dma(hcd, urb, mem_flags);
 462         if (ret)
 463                 free_temp_buffer(urb);
 464
 465         return ret;
 466 }
 467
 468 static void tegra_ehci_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb)
 469 {
 470         usb_hcd_unmap_urb_for_dma(hcd, urb);
 471         free_temp_buffer(urb);
 472 }
 473
 474 static const struct hc_driver tegra_ehci_hc_driver = {
 475         .description            = hcd_name,
 476         .product_desc           = "Tegra EHCI Host Controller",
 477         .hcd_priv_size          = sizeof(struct ehci_hcd),
 478
 479         .flags                  = HCD_USB2 | HCD_MEMORY,
 480
 481         .reset                  = tegra_ehci_setup,
 482         .irq                    = ehci_irq,
 483
 484         .start                  = ehci_run,
 485         .stop                   = ehci_stop,
 486         .shutdown               = tegra_ehci_shutdown,
 487         .urb_enqueue            = ehci_urb_enqueue,
 488         .urb_dequeue            = ehci_urb_dequeue,
 489         .map_urb_for_dma        = tegra_ehci_map_urb_for_dma,
 490         .unmap_urb_for_dma      = tegra_ehci_unmap_urb_for_dma,
 491         .endpoint_disable       = ehci_endpoint_disable,
 492         .endpoint_reset         = ehci_endpoint_reset,
 493         .get_frame_number       = ehci_get_frame,
 494         .hub_status_data        = ehci_hub_status_data,
 495         .hub_control            = tegra_ehci_hub_control,
 496         .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
 497 #ifdef CONFIG_PM
 498         .bus_suspend            = tegra_ehci_bus_suspend,
 499         .bus_resume             = tegra_ehci_bus_resume,
 500 #endif
 501         .relinquish_port        = ehci_relinquish_port,
 502         .port_handed_over       = ehci_port_handed_over,
 503 };
 504
 505 static int tegra_ehci_probe(struct platform_device *pdev)
 506 {
 507         struct resource *res;
 508         struct usb_hcd *hcd;
 509         struct tegra_ehci_hcd *tegra;
 510         struct tegra_ehci_platform_data *pdata;
 511         int err = 0;
 512         int irq;
 513         int instance = pdev->id;
 514
 515         pdata = pdev->dev.platform_data;
 516         if (!pdata) {
 517                 dev_err(&pdev->dev, "Platform data missing\n");
 518                 return -EINVAL;
 519         }
 520
 521         tegra = kzalloc(sizeof(struct tegra_ehci_hcd), GFP_KERNEL);
 522         if (!tegra)
 523                 return -ENOMEM;
 524
 525         hcd = usb_create_hcd(&tegra_ehci_hc_driver, &pdev->dev,
 526                                         dev_name(&pdev->dev));
 527         if (!hcd) {
 528                 dev_err(&pdev->dev, "Unable to create HCD\n");
 529                 err = -ENOMEM;
 530                 goto fail_hcd;
 531         }
 532
 533         platform_set_drvdata(pdev, tegra);
 534
 535         tegra->clk = clk_get(&pdev->dev, NULL);
 536         if (IS_ERR(tegra->clk)) {
 537                 dev_err(&pdev->dev, "Can't get ehci clock\n");
 538                 err = PTR_ERR(tegra->clk);
 539                 goto fail_clk;
 540         }
 541
 542         err = clk_enable(tegra->clk);
 543         if (err)
 544                 goto fail_clken;
 545
 546         tegra->emc_clk = clk_get(&pdev->dev, "emc");
 547         if (IS_ERR(tegra->emc_clk)) {
 548                 dev_err(&pdev->dev, "Can't get emc clock\n");
 549                 err = PTR_ERR(tegra->emc_clk);
 550                 goto fail_emc_clk;
 551         }
 552
 553         clk_enable(tegra->emc_clk);
 554         clk_set_rate(tegra->emc_clk, 400000000);
 555
 556         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 557         if (!res) {
 558                 dev_err(&pdev->dev, "Failed to get I/O memory\n");
 559                 err = -ENXIO;
 560                 goto fail_io;
 561         }
 562         hcd->rsrc_start = res->start;
 563         hcd->rsrc_len = resource_size(res);
 564         hcd->regs = ioremap(res->start, resource_size(res));
 565         if (!hcd->regs) {
 566                 dev_err(&pdev->dev, "Failed to remap I/O memory\n");
 567                 err = -ENOMEM;
 568                 goto fail_io;
 569         }
 570
 571         tegra->phy = tegra_usb_phy_open(instance, hcd->regs, pdata->phy_config,
 572                                                 TEGRA_USB_PHY_MODE_HOST);
 573         if (IS_ERR(tegra->phy)) {
 574                 dev_err(&pdev->dev, "Failed to open USB phy\n");
 575                 err = -ENXIO;
 576                 goto fail_phy;
 577         }
 578
 579         err = tegra_usb_phy_power_on(tegra->phy);
 580         if (err) {
 581                 dev_err(&pdev->dev, "Failed to power on the phy\n");
 582                 goto fail;
 583         }
 584
 585         tegra->host_resumed = 1;
 586         tegra->power_down_on_bus_suspend = pdata->power_down_on_bus_suspend;
 587         tegra->ehci = hcd_to_ehci(hcd);
 588
 589         irq = platform_get_irq(pdev, 0);
 590         if (!irq) {
 591                 dev_err(&pdev->dev, "Failed to get IRQ\n");
 592                 err = -ENODEV;
 593                 goto fail;
 594         }
 595         set_irq_flags(irq, IRQF_VALID);
 596
 597 #ifdef CONFIG_USB_OTG_UTILS
 598         if (pdata->operating_mode == TEGRA_USB_OTG) {
 599                 tegra->transceiver = otg_get_transceiver();
 600                 if (tegra->transceiver)
 601                         otg_set_host(tegra->transceiver, &hcd->self);
 602         }
 603 #endif
 604
 605         err = usb_add_hcd(hcd, irq, IRQF_DISABLED | IRQF_SHARED);
 606         if (err) {
 607                 dev_err(&pdev->dev, "Failed to add USB HCD\n");
 608                 goto fail;
 609         }
 610
 611         return err;
 612
 613 fail:
 614 #ifdef CONFIG_USB_OTG_UTILS
 615         if (tegra->transceiver) {
 616                 otg_set_host(tegra->transceiver, NULL);
 617                 otg_put_transceiver(tegra->transceiver);
 618         }
 619 #endif
 620         tegra_usb_phy_close(tegra->phy);
 621 fail_phy:
 622         iounmap(hcd->regs);
 623 fail_io:
 624         clk_disable(tegra->emc_clk);
 625         clk_put(tegra->emc_clk);
 626 fail_emc_clk:
 627         clk_disable(tegra->clk);
 628 fail_clken:
 629         clk_put(tegra->clk);
 630 fail_clk:
 631         usb_put_hcd(hcd);
 632 fail_hcd:
 633         kfree(tegra);
 634         return err;
 635 }
 636
 637 #ifdef CONFIG_PM
 638 static int tegra_ehci_resume(struct platform_device *pdev)
 639 {
 640         struct tegra_ehci_hcd *tegra = platform_get_drvdata(pdev);
 641         struct usb_hcd *hcd = ehci_to_hcd(tegra->ehci);
 642
 643         if (tegra->bus_suspended)
 644                 return 0;
 645
 646         return tegra_usb_resume(hcd);
 647 }
 648
 649 static int tegra_ehci_suspend(struct platform_device *pdev, pm_message_t state)
 650 {
 651         struct tegra_ehci_hcd *tegra = platform_get_drvdata(pdev);
 652         struct usb_hcd *hcd = ehci_to_hcd(tegra->ehci);
 653
 654         if (tegra->bus_suspended)
 655                 return 0;
 656
 657         if (time_before(jiffies, tegra->ehci->next_statechange))
 658                 msleep(10);
 659
 660         return tegra_usb_suspend(hcd);
 661 }
 662 #endif
 663
 664 static int tegra_ehci_remove(struct platform_device *pdev)
 665 {
 666         struct tegra_ehci_hcd *tegra = platform_get_drvdata(pdev);
 667         struct usb_hcd *hcd = ehci_to_hcd(tegra->ehci);
 668
 669         if (tegra == NULL || hcd == NULL)
 670                 return -EINVAL;
 671
 672 #ifdef CONFIG_USB_OTG_UTILS
 673         if (tegra->transceiver) {
 674                 otg_set_host(tegra->transceiver, NULL);
 675                 otg_put_transceiver(tegra->transceiver);
 676         }
 677 #endif
 678
 679         usb_remove_hcd(hcd);
 680         usb_put_hcd(hcd);
 681
 682         tegra_usb_phy_close(tegra->phy);
 683         iounmap(hcd->regs);
 684
 685         clk_disable(tegra->clk);
 686         clk_put(tegra->clk);
 687
 688         clk_disable(tegra->emc_clk);
 689         clk_put(tegra->emc_clk);
 690
 691         kfree(tegra);
 692         return 0;
 693 }
 694
 695 static void tegra_ehci_hcd_shutdown(struct platform_device *pdev)
 696 {
 697         struct tegra_ehci_hcd *tegra = platform_get_drvdata(pdev);
 698         struct usb_hcd *hcd = ehci_to_hcd(tegra->ehci);
 699
 700         if (hcd->driver->shutdown)
 701                 hcd->driver->shutdown(hcd);
 702 }
 703
 704 static struct platform_driver tegra_ehci_driver = {
 705         .probe          = tegra_ehci_probe,
 706         .remove         = tegra_ehci_remove,
 707 #ifdef CONFIG_PM
 708         .suspend        = tegra_ehci_suspend,
 709         .resume         = tegra_ehci_resume,
 710 #endif
 711         .shutdown       = tegra_ehci_hcd_shutdown,
 712         .driver         = {
 713                 .name   = "tegra-ehci",
 714         }
 715 };