drivers/usb/host/ehci-q.c

   1 /*
   2  * Copyright (C) 2001-2004 by David Brownell
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms of the GNU General Public License as published by the
   6  * Free Software Foundation; either version 2 of the License, or (at your
   7  * option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful, but
  10  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software Foundation,
  16  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17  */
  18
  19 /* this file is part of ehci-hcd.c */
  20
  21 /*-------------------------------------------------------------------------*/
  22
  23 /*
  24  * EHCI hardware queue manipulation ... the core.  QH/QTD manipulation.
  25  *
  26  * Control, bulk, and interrupt traffic all use "qh" lists.  They list "qtd"
  27  * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
  28  * buffers needed for the larger number).  We use one QH per endpoint, queue
  29  * multiple urbs (all three types) per endpoint.  URBs may need several qtds.
  30  *
  31  * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
  32  * interrupts) needs careful scheduling.  Performance improvements can be
  33  * an ongoing challenge.  That's in "ehci-sched.c".
  34  *
  35  * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
  36  * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
  37  * (b) special fields in qh entries or (c) split iso entries.  TTs will
  38  * buffer low/full speed data so the host collects it at high speed.
  39  */
  40
  41 /*-------------------------------------------------------------------------*/
  42
  43 /* fill a qtd, returning how much of the buffer we were able to queue up */
  44
  45 static int
  46 qtd_fill(struct ehci_hcd *ehci, struct ehci_qtd *qtd, dma_addr_t buf,
  47                   size_t len, int token, int maxpacket)
  48 {
  49         int     i, count;
  50         u64     addr = buf;
  51
  52         /* one buffer entry per 4K ... first might be short or unaligned */
  53         qtd->hw_buf[0] = cpu_to_hc32(ehci, (u32)addr);
  54         qtd->hw_buf_hi[0] = cpu_to_hc32(ehci, (u32)(addr >> 32));
  55         count = 0x1000 - (buf & 0x0fff);        /* rest of that page */
  56         if (likely (len < count))               /* ... iff needed */
  57                 count = len;
  58         else {
  59                 buf +=  0x1000;
  60                 buf &= ~0x0fff;
  61
  62                 /* per-qtd limit: from 16K to 20K (best alignment) */
  63                 for (i = 1; count < len && i < 5; i++) {
  64                         addr = buf;
  65                         qtd->hw_buf[i] = cpu_to_hc32(ehci, (u32)addr);
  66                         qtd->hw_buf_hi[i] = cpu_to_hc32(ehci,
  67                                         (u32)(addr >> 32));
  68                         buf += 0x1000;
  69                         if ((count + 0x1000) < len)
  70                                 count += 0x1000;
  71                         else
  72                                 count = len;
  73                 }
  74
  75                 /* short packets may only terminate transfers */
  76                 if (count != len)
  77                         count -= (count % maxpacket);
  78         }
  79         qtd->hw_token = cpu_to_hc32(ehci, (count << 16) | token);
  80         qtd->length = count;
  81
  82         return count;
  83 }
  84
  85 /*-------------------------------------------------------------------------*/
  86
  87 static inline void
  88 qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
  89 {
  90         /* writes to an active overlay are unsafe */
  91         BUG_ON(qh->qh_state != QH_STATE_IDLE);
  92
  93         qh->hw_qtd_next = QTD_NEXT(ehci, qtd->qtd_dma);
  94         qh->hw_alt_next = EHCI_LIST_END(ehci);
  95
  96         /* Except for control endpoints, we make hardware maintain data
  97          * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
  98          * and set the pseudo-toggle in udev. Only usb_clear_halt() will
  99          * ever clear it.
 100          */
 101         if (!(qh->hw_info1 & cpu_to_hc32(ehci, 1 << 14))) {
 102                 unsigned        is_out, epnum;
 103
 104                 is_out = !(qtd->hw_token & cpu_to_hc32(ehci, 1 << 8));
 105                 epnum = (hc32_to_cpup(ehci, &qh->hw_info1) >> 8) & 0x0f;
 106                 if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) {
 107                         qh->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE);
 108                         usb_settoggle (qh->dev, epnum, is_out, 1);
 109                 }
 110         }
 111
 112         /* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
 113         wmb ();
 114         qh->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING);
 115 }
 116
 117 /* if it weren't for a common silicon quirk (writing the dummy into the qh
 118  * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
 119  * recovery (including urb dequeue) would need software changes to a QH...
 120  */
 121 static void
 122 qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh)
 123 {
 124         struct ehci_qtd *qtd;
 125
 126         if (list_empty (&qh->qtd_list))
 127                 qtd = qh->dummy;
 128         else {
 129                 qtd = list_entry (qh->qtd_list.next,
 130                                 struct ehci_qtd, qtd_list);
 131                 /* first qtd may already be partially processed */
 132                 if (cpu_to_hc32(ehci, qtd->qtd_dma) == qh->hw_current)
 133                         qtd = NULL;
 134         }
 135
 136         if (qtd)
 137                 qh_update (ehci, qh, qtd);
 138 }
 139
 140 /*-------------------------------------------------------------------------*/
 141
 142 static void qtd_copy_status (
 143         struct ehci_hcd *ehci,
 144         struct urb *urb,
 145         size_t length,
 146         u32 token
 147 )
 148 {
 149         /* count IN/OUT bytes, not SETUP (even short packets) */
 150         if (likely (QTD_PID (token) != 2))
 151                 urb->actual_length += length - QTD_LENGTH (token);
 152
 153         /* don't modify error codes */
 154         if (unlikely(urb->unlinked))
 155                 return;
 156
 157         /* force cleanup after short read; not always an error */
 158         if (unlikely (IS_SHORT_READ (token)))
 159                 urb->status = -EREMOTEIO;
 160
 161         /* serious "can't proceed" faults reported by the hardware */
 162         if (token & QTD_STS_HALT) {
 163                 if (token & QTD_STS_BABBLE) {
 164                         /* FIXME "must" disable babbling device's port too */
 165                         urb->status = -EOVERFLOW;
 166                 } else if (token & QTD_STS_MMF) {
 167                         /* fs/ls interrupt xfer missed the complete-split */
 168                         urb->status = -EPROTO;
 169                 } else if (token & QTD_STS_DBE) {
 170                         urb->status = (QTD_PID (token) == 1) /* IN ? */
 171                                 ? -ENOSR  /* hc couldn't read data */
 172                                 : -ECOMM; /* hc couldn't write data */
 173                 } else if (token & QTD_STS_XACT) {
 174                         /* timeout, bad crc, wrong PID, etc; retried */
 175                         if (QTD_CERR (token))
 176                                 urb->status = -EPIPE;
 177                         else {
 178                                 ehci_dbg (ehci, "devpath %s ep%d%s 3strikes\n",
 179                                         urb->dev->devpath,
 180                                         usb_pipeendpoint (urb->pipe),
 181                                         usb_pipein (urb->pipe) ? "in" : "out");
 182                                 urb->status = -EPROTO;
 183                         }
 184                 /* CERR nonzero + no errors + halt --> stall */
 185                 } else if (QTD_CERR (token))
 186                         urb->status = -EPIPE;
 187                 else    /* unknown */
 188                         urb->status = -EPROTO;
 189
 190                 ehci_vdbg (ehci,
 191                         "dev%d ep%d%s qtd token %08x --> status %d\n",
 192                         usb_pipedevice (urb->pipe),
 193                         usb_pipeendpoint (urb->pipe),
 194                         usb_pipein (urb->pipe) ? "in" : "out",
 195                         token, urb->status);
 196
 197                 /* if async CSPLIT failed, try cleaning out the TT buffer */
 198                 if (urb->status != -EPIPE
 199                                 && urb->dev->tt && !usb_pipeint (urb->pipe)
 200                                 && ((token & QTD_STS_MMF) != 0
 201                                         || QTD_CERR(token) == 0)
 202                                 && (!ehci_is_TDI(ehci)
 203                                         || urb->dev->tt->hub !=
 204                                            ehci_to_hcd(ehci)->self.root_hub)) {
 205 #ifdef DEBUG
 206                         struct usb_device *tt = urb->dev->tt->hub;
 207                         dev_dbg (&tt->dev,
 208                                 "clear tt buffer port %d, a%d ep%d t%08x\n",
 209                                 urb->dev->ttport, urb->dev->devnum,
 210                                 usb_pipeendpoint (urb->pipe), token);
 211 #endif /* DEBUG */
 212                         usb_hub_tt_clear_buffer (urb->dev, urb->pipe);
 213                 }
 214         }
 215 }
 216
 217 static void
 218 ehci_urb_done (struct ehci_hcd *ehci, struct urb *urb)
 219 __releases(ehci->lock)
 220 __acquires(ehci->lock)
 221 {
 222         if (likely (urb->hcpriv != NULL)) {
 223                 struct ehci_qh  *qh = (struct ehci_qh *) urb->hcpriv;
 224
 225                 /* S-mask in a QH means it's an interrupt urb */
 226                 if ((qh->hw_info2 & cpu_to_hc32(ehci, QH_SMASK)) != 0) {
 227
 228                         /* ... update hc-wide periodic stats (for usbfs) */
 229                         ehci_to_hcd(ehci)->self.bandwidth_int_reqs--;
 230                 }
 231                 qh_put (qh);
 232         }
 233
 234         spin_lock (&urb->lock);
 235         if (unlikely(urb->unlinked)) {
 236                 COUNT(ehci->stats.unlink);
 237         } else {
 238                 if (likely(urb->status == -EINPROGRESS ||
 239                                 (urb->status == -EREMOTEIO &&
 240                                  !(urb->transfer_flags & URB_SHORT_NOT_OK))))
 241                         urb->status = 0;
 242                 COUNT(ehci->stats.complete);
 243         }
 244         spin_unlock (&urb->lock);
 245
 246 #ifdef EHCI_URB_TRACE
 247         ehci_dbg (ehci,
 248                 "%s %s urb %p ep%d%s status %d len %d/%d\n",
 249                 __FUNCTION__, urb->dev->devpath, urb,
 250                 usb_pipeendpoint (urb->pipe),
 251                 usb_pipein (urb->pipe) ? "in" : "out",
 252                 urb->status,
 253                 urb->actual_length, urb->transfer_buffer_length);
 254 #endif
 255
 256         /* complete() can reenter this HCD */
 257         usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
 258         spin_unlock (&ehci->lock);
 259         usb_hcd_giveback_urb (ehci_to_hcd(ehci), urb);
 260         spin_lock (&ehci->lock);
 261 }
 262
 263 static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
 264 static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
 265
 266 static void intr_deschedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
 267 static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
 268
 269 /*
 270  * Process and free completed qtds for a qh, returning URBs to drivers.
 271  * Chases up to qh->hw_current.  Returns number of completions called,
 272  * indicating how much "real" work we did.
 273  */
 274 static unsigned
 275 qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
 276 {
 277         struct ehci_qtd         *last = NULL, *end = qh->dummy;
 278         struct list_head        *entry, *tmp;
 279         int                     stopped;
 280         unsigned                count = 0;
 281         int                     do_status = 0;
 282         u8                      state;
 283         u32                     halt = HALT_BIT(ehci);
 284
 285         if (unlikely (list_empty (&qh->qtd_list)))
 286                 return count;
 287
 288         /* completions (or tasks on other cpus) must never clobber HALT
 289          * till we've gone through and cleaned everything up, even when
 290          * they add urbs to this qh's queue or mark them for unlinking.
 291          *
 292          * NOTE:  unlinking expects to be done in queue order.
 293          */
 294         state = qh->qh_state;
 295         qh->qh_state = QH_STATE_COMPLETING;
 296         stopped = (state == QH_STATE_IDLE);
 297
 298         /* remove de-activated QTDs from front of queue.
 299          * after faults (including short reads), cleanup this urb
 300          * then let the queue advance.
 301          * if queue is stopped, handles unlinks.
 302          */
 303         list_for_each_safe (entry, tmp, &qh->qtd_list) {
 304                 struct ehci_qtd *qtd;
 305                 struct urb      *urb;
 306                 u32             token = 0;
 307
 308                 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
 309                 urb = qtd->urb;
 310
 311                 /* clean up any state from previous QTD ...*/
 312                 if (last) {
 313                         if (likely (last->urb != urb)) {
 314                                 ehci_urb_done (ehci, last->urb);
 315                                 count++;
 316                         }
 317                         ehci_qtd_free (ehci, last);
 318                         last = NULL;
 319                 }
 320
 321                 /* ignore urbs submitted during completions we reported */
 322                 if (qtd == end)
 323                         break;
 324
 325                 /* hardware copies qtd out of qh overlay */
 326                 rmb ();
 327                 token = hc32_to_cpu(ehci, qtd->hw_token);
 328
 329                 /* always clean up qtds the hc de-activated */
 330                 if ((token & QTD_STS_ACTIVE) == 0) {
 331
 332                         if ((token & QTD_STS_HALT) != 0) {
 333                                 stopped = 1;
 334
 335                         /* magic dummy for some short reads; qh won't advance.
 336                          * that silicon quirk can kick in with this dummy too.
 337                          */
 338                         } else if (IS_SHORT_READ (token)
 339                                         && !(qtd->hw_alt_next
 340                                                 & EHCI_LIST_END(ehci))) {
 341                                 stopped = 1;
 342                                 goto halt;
 343                         }
 344
 345                 /* stop scanning when we reach qtds the hc is using */
 346                 } else if (likely (!stopped
 347                                 && HC_IS_RUNNING (ehci_to_hcd(ehci)->state))) {
 348                         break;
 349
 350                 } else {
 351                         stopped = 1;
 352
 353                         if (unlikely (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state)))
 354                                 urb->status = -ESHUTDOWN;
 355
 356                         /* ignore active urbs unless some previous qtd
 357                          * for the urb faulted (including short read) or
 358                          * its urb was canceled.  we may patch qh or qtds.
 359                          */
 360                         if (likely(urb->status == -EINPROGRESS &&
 361                                         !urb->unlinked))
 362                                 continue;
 363
 364                         /* issue status after short control reads */
 365                         if (unlikely (do_status != 0)
 366                                         && QTD_PID (token) == 0 /* OUT */) {
 367                                 do_status = 0;
 368                                 continue;
 369                         }
 370
 371                         /* token in overlay may be most current */
 372                         if (state == QH_STATE_IDLE
 373                                         && cpu_to_hc32(ehci, qtd->qtd_dma)
 374                                                 == qh->hw_current)
 375                                 token = hc32_to_cpu(ehci, qh->hw_token);
 376
 377                         /* force halt for unlinked or blocked qh, so we'll
 378                          * patch the qh later and so that completions can't
 379                          * activate it while we "know" it's stopped.
 380                          */
 381                         if ((halt & qh->hw_token) == 0) {
 382 halt:
 383                                 qh->hw_token |= halt;
 384                                 wmb ();
 385                         }
 386                 }
 387
 388                 /* remove it from the queue */
 389                 spin_lock (&urb->lock);
 390                 qtd_copy_status (ehci, urb, qtd->length, token);
 391                 if (unlikely(urb->status == -EREMOTEIO)) {
 392                         do_status = (!urb->unlinked &&
 393                                         usb_pipecontrol(urb->pipe));
 394                         urb->status = 0;
 395                 }
 396                 spin_unlock (&urb->lock);
 397
 398                 if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
 399                         last = list_entry (qtd->qtd_list.prev,
 400                                         struct ehci_qtd, qtd_list);
 401                         last->hw_next = qtd->hw_next;
 402                 }
 403                 list_del (&qtd->qtd_list);
 404                 last = qtd;
 405         }
 406
 407         /* last urb's completion might still need calling */
 408         if (likely (last != NULL)) {
 409                 ehci_urb_done (ehci, last->urb);
 410                 count++;
 411                 ehci_qtd_free (ehci, last);
 412         }
 413
 414         /* restore original state; caller must unlink or relink */
 415         qh->qh_state = state;
 416
 417         /* be sure the hardware's done with the qh before refreshing
 418          * it after fault cleanup, or recovering from silicon wrongly
 419          * overlaying the dummy qtd (which reduces DMA chatter).
 420          */
 421         if (stopped != 0 || qh->hw_qtd_next == EHCI_LIST_END(ehci)) {
 422                 switch (state) {
 423                 case QH_STATE_IDLE:
 424                         qh_refresh(ehci, qh);
 425                         break;
 426                 case QH_STATE_LINKED:
 427                         /* should be rare for periodic transfers,
 428                          * except maybe high bandwidth ...
 429                          */
 430                         if ((cpu_to_hc32(ehci, QH_SMASK)
 431                                         & qh->hw_info2) != 0) {
 432                                 intr_deschedule (ehci, qh);
 433                                 (void) qh_schedule (ehci, qh);
 434                         } else
 435                                 unlink_async (ehci, qh);
 436                         break;
 437                 /* otherwise, unlink already started */
 438                 }
 439         }
 440
 441         return count;
 442 }
 443
 444 /*-------------------------------------------------------------------------*/
 445
 446 // high bandwidth multiplier, as encoded in highspeed endpoint descriptors
 447 #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
 448 // ... and packet size, for any kind of endpoint descriptor
 449 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
 450
 451 /*
 452  * reverse of qh_urb_transaction:  free a list of TDs.
 453  * used for cleanup after errors, before HC sees an URB's TDs.
 454  */
 455 static void qtd_list_free (
 456         struct ehci_hcd         *ehci,
 457         struct urb              *urb,
 458         struct list_head        *qtd_list
 459 ) {
 460         struct list_head        *entry, *temp;
 461
 462         list_for_each_safe (entry, temp, qtd_list) {
 463                 struct ehci_qtd *qtd;
 464
 465                 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
 466                 list_del (&qtd->qtd_list);
 467                 ehci_qtd_free (ehci, qtd);
 468         }
 469 }
 470
 471 /*
 472  * create a list of filled qtds for this URB; won't link into qh.
 473  */
 474 static struct list_head *
 475 qh_urb_transaction (
 476         struct ehci_hcd         *ehci,
 477         struct urb              *urb,
 478         struct list_head        *head,
 479         gfp_t                   flags
 480 ) {
 481         struct ehci_qtd         *qtd, *qtd_prev;
 482         dma_addr_t              buf;
 483         int                     len, maxpacket;
 484         int                     is_input;
 485         u32                     token;
 486
 487         /*
 488          * URBs map to sequences of QTDs:  one logical transaction
 489          */
 490         qtd = ehci_qtd_alloc (ehci, flags);
 491         if (unlikely (!qtd))
 492                 return NULL;
 493         list_add_tail (&qtd->qtd_list, head);
 494         qtd->urb = urb;
 495
 496         token = QTD_STS_ACTIVE;
 497         token |= (EHCI_TUNE_CERR << 10);
 498         /* for split transactions, SplitXState initialized to zero */
 499
 500         len = urb->transfer_buffer_length;
 501         is_input = usb_pipein (urb->pipe);
 502         if (usb_pipecontrol (urb->pipe)) {
 503                 /* SETUP pid */
 504                 qtd_fill(ehci, qtd, urb->setup_dma,
 505                                 sizeof (struct usb_ctrlrequest),
 506                                 token | (2 /* "setup" */ << 8), 8);
 507
 508                 /* ... and always at least one more pid */
 509                 token ^= QTD_TOGGLE;
 510                 qtd_prev = qtd;
 511                 qtd = ehci_qtd_alloc (ehci, flags);
 512                 if (unlikely (!qtd))
 513                         goto cleanup;
 514                 qtd->urb = urb;
 515                 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
 516                 list_add_tail (&qtd->qtd_list, head);
 517
 518                 /* for zero length DATA stages, STATUS is always IN */
 519                 if (len == 0)
 520                         token |= (1 /* "in" */ << 8);
 521         }
 522
 523         /*
 524          * data transfer stage:  buffer setup
 525          */
 526         buf = urb->transfer_dma;
 527
 528         if (is_input)
 529                 token |= (1 /* "in" */ << 8);
 530         /* else it's already initted to "out" pid (0 << 8) */
 531
 532         maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
 533
 534         /*
 535          * buffer gets wrapped in one or more qtds;
 536          * last one may be "short" (including zero len)
 537          * and may serve as a control status ack
 538          */
 539         for (;;) {
 540                 int this_qtd_len;
 541
 542                 this_qtd_len = qtd_fill(ehci, qtd, buf, len, token, maxpacket);
 543                 len -= this_qtd_len;
 544                 buf += this_qtd_len;
 545                 if (is_input)
 546                         qtd->hw_alt_next = ehci->async->hw_alt_next;
 547
 548                 /* qh makes control packets use qtd toggle; maybe switch it */
 549                 if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
 550                         token ^= QTD_TOGGLE;
 551
 552                 if (likely (len <= 0))
 553                         break;
 554
 555                 qtd_prev = qtd;
 556                 qtd = ehci_qtd_alloc (ehci, flags);
 557                 if (unlikely (!qtd))
 558                         goto cleanup;
 559                 qtd->urb = urb;
 560                 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
 561                 list_add_tail (&qtd->qtd_list, head);
 562         }
 563
 564         /* unless the bulk/interrupt caller wants a chance to clean
 565          * up after short reads, hc should advance qh past this urb
 566          */
 567         if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
 568                                 || usb_pipecontrol (urb->pipe)))
 569                 qtd->hw_alt_next = EHCI_LIST_END(ehci);
 570
 571         /*
 572          * control requests may need a terminating data "status" ack;
 573          * bulk ones may need a terminating short packet (zero length).
 574          */
 575         if (likely (urb->transfer_buffer_length != 0)) {
 576                 int     one_more = 0;
 577
 578                 if (usb_pipecontrol (urb->pipe)) {
 579                         one_more = 1;
 580                         token ^= 0x0100;        /* "in" <--> "out"  */
 581                         token |= QTD_TOGGLE;    /* force DATA1 */
 582                 } else if (usb_pipebulk (urb->pipe)
 583                                 && (urb->transfer_flags & URB_ZERO_PACKET)
 584                                 && !(urb->transfer_buffer_length % maxpacket)) {
 585                         one_more = 1;
 586                 }
 587                 if (one_more) {
 588                         qtd_prev = qtd;
 589                         qtd = ehci_qtd_alloc (ehci, flags);
 590                         if (unlikely (!qtd))
 591                                 goto cleanup;
 592                         qtd->urb = urb;
 593                         qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
 594                         list_add_tail (&qtd->qtd_list, head);
 595
 596                         /* never any data in such packets */
 597                         qtd_fill(ehci, qtd, 0, 0, token, 0);
 598                 }
 599         }
 600
 601         /* by default, enable interrupt on urb completion */
 602         if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
 603                 qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
 604         return head;
 605
 606 cleanup:
 607         qtd_list_free (ehci, urb, head);
 608         return NULL;
 609 }
 610
 611 /*-------------------------------------------------------------------------*/
 612
 613 // Would be best to create all qh's from config descriptors,
 614 // when each interface/altsetting is established.  Unlink
 615 // any previous qh and cancel its urbs first; endpoints are
 616 // implicitly reset then (data toggle too).
 617 // That'd mean updating how usbcore talks to HCDs. (2.7?)
 618
 619
 620 /*
 621  * Each QH holds a qtd list; a QH is used for everything except iso.
 622  *
 623  * For interrupt urbs, the scheduler must set the microframe scheduling
 624  * mask(s) each time the QH gets scheduled.  For highspeed, that's
 625  * just one microframe in the s-mask.  For split interrupt transactions
 626  * there are additional complications: c-mask, maybe FSTNs.
 627  */
 628 static struct ehci_qh *
 629 qh_make (
 630         struct ehci_hcd         *ehci,
 631         struct urb              *urb,
 632         gfp_t                   flags
 633 ) {
 634         struct ehci_qh          *qh = ehci_qh_alloc (ehci, flags);
 635         u32                     info1 = 0, info2 = 0;
 636         int                     is_input, type;
 637         int                     maxp = 0;
 638
 639         if (!qh)
 640                 return qh;
 641
 642         /*
 643          * init endpoint/device data for this QH
 644          */
 645         info1 |= usb_pipeendpoint (urb->pipe) << 8;
 646         info1 |= usb_pipedevice (urb->pipe) << 0;
 647
 648         is_input = usb_pipein (urb->pipe);
 649         type = usb_pipetype (urb->pipe);
 650         maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
 651
 652         /* Compute interrupt scheduling parameters just once, and save.
 653          * - allowing for high bandwidth, how many nsec/uframe are used?
 654          * - split transactions need a second CSPLIT uframe; same question
 655          * - splits also need a schedule gap (for full/low speed I/O)
 656          * - qh has a polling interval
 657          *
 658          * For control/bulk requests, the HC or TT handles these.
 659          */
 660         if (type == PIPE_INTERRUPT) {
 661                 qh->usecs = NS_TO_US (usb_calc_bus_time (USB_SPEED_HIGH, is_input, 0,
 662                                 hb_mult (maxp) * max_packet (maxp)));
 663                 qh->start = NO_FRAME;
 664
 665                 if (urb->dev->speed == USB_SPEED_HIGH) {
 666                         qh->c_usecs = 0;
 667                         qh->gap_uf = 0;
 668
 669                         qh->period = urb->interval >> 3;
 670                         if (qh->period == 0 && urb->interval != 1) {
 671                                 /* NOTE interval 2 or 4 uframes could work.
 672                                  * But interval 1 scheduling is simpler, and
 673                                  * includes high bandwidth.
 674                                  */
 675                                 dbg ("intr period %d uframes, NYET!",
 676                                                 urb->interval);
 677                                 goto done;
 678                         }
 679                 } else {
 680                         struct usb_tt   *tt = urb->dev->tt;
 681                         int             think_time;
 682
 683                         /* gap is f(FS/LS transfer times) */
 684                         qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
 685                                         is_input, 0, maxp) / (125 * 1000);
 686
 687                         /* FIXME this just approximates SPLIT/CSPLIT times */
 688                         if (is_input) {         // SPLIT, gap, CSPLIT+DATA
 689                                 qh->c_usecs = qh->usecs + HS_USECS (0);
 690                                 qh->usecs = HS_USECS (1);
 691                         } else {                // SPLIT+DATA, gap, CSPLIT
 692                                 qh->usecs += HS_USECS (1);
 693                                 qh->c_usecs = HS_USECS (0);
 694                         }
 695
 696                         think_time = tt ? tt->think_time : 0;
 697                         qh->tt_usecs = NS_TO_US (think_time +
 698                                         usb_calc_bus_time (urb->dev->speed,
 699                                         is_input, 0, max_packet (maxp)));
 700                         qh->period = urb->interval;
 701                 }
 702         }
 703
 704         /* support for tt scheduling, and access to toggles */
 705         qh->dev = urb->dev;
 706
 707         /* using TT? */
 708         switch (urb->dev->speed) {
 709         case USB_SPEED_LOW:
 710                 info1 |= (1 << 12);     /* EPS "low" */
 711                 /* FALL THROUGH */
 712
 713         case USB_SPEED_FULL:
 714                 /* EPS 0 means "full" */
 715                 if (type != PIPE_INTERRUPT)
 716                         info1 |= (EHCI_TUNE_RL_TT << 28);
 717                 if (type == PIPE_CONTROL) {
 718                         info1 |= (1 << 27);     /* for TT */
 719                         info1 |= 1 << 14;       /* toggle from qtd */
 720                 }
 721                 info1 |= maxp << 16;
 722
 723                 info2 |= (EHCI_TUNE_MULT_TT << 30);
 724
 725                 /* Some Freescale processors have an erratum in which the
 726                  * port number in the queue head was 0..N-1 instead of 1..N.
 727                  */
 728                 if (ehci_has_fsl_portno_bug(ehci))
 729                         info2 |= (urb->dev->ttport-1) << 23;
 730                 else
 731                         info2 |= urb->dev->ttport << 23;
 732
 733                 /* set the address of the TT; for TDI's integrated
 734                  * root hub tt, leave it zeroed.
 735                  */
 736                 if (!ehci_is_TDI(ehci)
 737                                 || urb->dev->tt->hub !=
 738                                         ehci_to_hcd(ehci)->self.root_hub)
 739                         info2 |= urb->dev->tt->hub->devnum << 16;
 740
 741                 /* NOTE:  if (PIPE_INTERRUPT) { scheduler sets c-mask } */
 742
 743                 break;
 744
 745         case USB_SPEED_HIGH:            /* no TT involved */
 746                 info1 |= (2 << 12);     /* EPS "high" */
 747                 if (type == PIPE_CONTROL) {
 748                         info1 |= (EHCI_TUNE_RL_HS << 28);
 749                         info1 |= 64 << 16;      /* usb2 fixed maxpacket */
 750                         info1 |= 1 << 14;       /* toggle from qtd */
 751                         info2 |= (EHCI_TUNE_MULT_HS << 30);
 752                 } else if (type == PIPE_BULK) {
 753                         info1 |= (EHCI_TUNE_RL_HS << 28);
 754                         info1 |= 512 << 16;     /* usb2 fixed maxpacket */
 755                         info2 |= (EHCI_TUNE_MULT_HS << 30);
 756                 } else {                /* PIPE_INTERRUPT */
 757                         info1 |= max_packet (maxp) << 16;
 758                         info2 |= hb_mult (maxp) << 30;
 759                 }
 760                 break;
 761         default:
 762                 dbg ("bogus dev %p speed %d", urb->dev, urb->dev->speed);
 763 done:
 764                 qh_put (qh);
 765                 return NULL;
 766         }
 767
 768         /* NOTE:  if (PIPE_INTERRUPT) { scheduler sets s-mask } */
 769
 770         /* init as live, toggle clear, advance to dummy */
 771         qh->qh_state = QH_STATE_IDLE;
 772         qh->hw_info1 = cpu_to_hc32(ehci, info1);
 773         qh->hw_info2 = cpu_to_hc32(ehci, info2);
 774         usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
 775         qh_refresh (ehci, qh);
 776         return qh;
 777 }
 778
 779 /*-------------------------------------------------------------------------*/
 780
 781 /* move qh (and its qtds) onto async queue; maybe enable queue.  */
 782
 783 static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
 784 {
 785         __hc32          dma = QH_NEXT(ehci, qh->qh_dma);
 786         struct ehci_qh  *head;
 787
 788         /* (re)start the async schedule? */
 789         head = ehci->async;
 790         timer_action_done (ehci, TIMER_ASYNC_OFF);
 791         if (!head->qh_next.qh) {
 792                 u32     cmd = ehci_readl(ehci, &ehci->regs->command);
 793
 794                 if (!(cmd & CMD_ASE)) {
 795                         /* in case a clear of CMD_ASE didn't take yet */
 796                         (void)handshake(ehci, &ehci->regs->status,
 797                                         STS_ASS, 0, 150);
 798                         cmd |= CMD_ASE | CMD_RUN;
 799                         ehci_writel(ehci, cmd, &ehci->regs->command);
 800                         ehci_to_hcd(ehci)->state = HC_STATE_RUNNING;
 801                         /* posted write need not be known to HC yet ... */
 802                 }
 803         }
 804
 805         /* clear halt and/or toggle; and maybe recover from silicon quirk */
 806         if (qh->qh_state == QH_STATE_IDLE)
 807                 qh_refresh (ehci, qh);
 808
 809         /* splice right after start */
 810         qh->qh_next = head->qh_next;
 811         qh->hw_next = head->hw_next;
 812         wmb ();
 813
 814         head->qh_next.qh = qh;
 815         head->hw_next = dma;
 816
 817         qh->qh_state = QH_STATE_LINKED;
 818         /* qtd completions reported later by interrupt */
 819 }
 820
 821 /*-------------------------------------------------------------------------*/
 822
 823 /*
 824  * For control/bulk/interrupt, return QH with these TDs appended.
 825  * Allocates and initializes the QH if necessary.
 826  * Returns null if it can't allocate a QH it needs to.
 827  * If the QH has TDs (urbs) already, that's great.
 828  */
 829 static struct ehci_qh *qh_append_tds (
 830         struct ehci_hcd         *ehci,
 831         struct urb              *urb,
 832         struct list_head        *qtd_list,
 833         int                     epnum,
 834         void                    **ptr
 835 )
 836 {
 837         struct ehci_qh          *qh = NULL;
 838         u32                     qh_addr_mask = cpu_to_hc32(ehci, 0x7f);
 839
 840         qh = (struct ehci_qh *) *ptr;
 841         if (unlikely (qh == NULL)) {
 842                 /* can't sleep here, we have ehci->lock... */
 843                 qh = qh_make (ehci, urb, GFP_ATOMIC);
 844                 *ptr = qh;
 845         }
 846         if (likely (qh != NULL)) {
 847                 struct ehci_qtd *qtd;
 848
 849                 if (unlikely (list_empty (qtd_list)))
 850                         qtd = NULL;
 851                 else
 852                         qtd = list_entry (qtd_list->next, struct ehci_qtd,
 853                                         qtd_list);
 854
 855                 /* control qh may need patching ... */
 856                 if (unlikely (epnum == 0)) {
 857
 858                         /* usb_reset_device() briefly reverts to address 0 */
 859                         if (usb_pipedevice (urb->pipe) == 0)
 860                                 qh->hw_info1 &= ~qh_addr_mask;
 861                 }
 862
 863                 /* just one way to queue requests: swap with the dummy qtd.
 864                  * only hc or qh_refresh() ever modify the overlay.
 865                  */
 866                 if (likely (qtd != NULL)) {
 867                         struct ehci_qtd         *dummy;
 868                         dma_addr_t              dma;
 869                         __hc32                  token;
 870
 871                         /* to avoid racing the HC, use the dummy td instead of
 872                          * the first td of our list (becomes new dummy).  both
 873                          * tds stay deactivated until we're done, when the
 874                          * HC is allowed to fetch the old dummy (4.10.2).
 875                          */
 876                         token = qtd->hw_token;
 877                         qtd->hw_token = HALT_BIT(ehci);
 878                         wmb ();
 879                         dummy = qh->dummy;
 880
 881                         dma = dummy->qtd_dma;
 882                         *dummy = *qtd;
 883                         dummy->qtd_dma = dma;
 884
 885                         list_del (&qtd->qtd_list);
 886                         list_add (&dummy->qtd_list, qtd_list);
 887                         __list_splice (qtd_list, qh->qtd_list.prev);
 888
 889                         ehci_qtd_init(ehci, qtd, qtd->qtd_dma);
 890                         qh->dummy = qtd;
 891
 892                         /* hc must see the new dummy at list end */
 893                         dma = qtd->qtd_dma;
 894                         qtd = list_entry (qh->qtd_list.prev,
 895                                         struct ehci_qtd, qtd_list);
 896                         qtd->hw_next = QTD_NEXT(ehci, dma);
 897
 898                         /* let the hc process these next qtds */
 899                         wmb ();
 900                         dummy->hw_token = token;
 901
 902                         urb->hcpriv = qh_get (qh);
 903                 }
 904         }
 905         return qh;
 906 }
 907
 908 /*-------------------------------------------------------------------------*/
 909
 910 static int
 911 submit_async (
 912         struct ehci_hcd         *ehci,
 913         struct urb              *urb,
 914         struct list_head        *qtd_list,
 915         gfp_t                   mem_flags
 916 ) {
 917         struct ehci_qtd         *qtd;
 918         int                     epnum;
 919         unsigned long           flags;
 920         struct ehci_qh          *qh = NULL;
 921         int                     rc;
 922
 923         qtd = list_entry (qtd_list->next, struct ehci_qtd, qtd_list);
 924         epnum = urb->ep->desc.bEndpointAddress;
 925
 926 #ifdef EHCI_URB_TRACE
 927         ehci_dbg (ehci,
 928                 "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
 929                 __FUNCTION__, urb->dev->devpath, urb,
 930                 epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
 931                 urb->transfer_buffer_length,
 932                 qtd, urb->ep->hcpriv);
 933 #endif
 934
 935         spin_lock_irqsave (&ehci->lock, flags);
 936         if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
 937                                &ehci_to_hcd(ehci)->flags))) {
 938                 rc = -ESHUTDOWN;
 939                 goto done;
 940         }
 941         rc = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
 942         if (unlikely(rc))
 943                 goto done;
 944
 945         qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
 946         if (unlikely(qh == NULL)) {
 947                 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
 948                 rc = -ENOMEM;
 949                 goto done;
 950         }
 951
 952         /* Control/bulk operations through TTs don't need scheduling,
 953          * the HC and TT handle it when the TT has a buffer ready.
 954          */
 955         if (likely (qh->qh_state == QH_STATE_IDLE))
 956                 qh_link_async (ehci, qh_get (qh));
 957  done:
 958         spin_unlock_irqrestore (&ehci->lock, flags);
 959         if (unlikely (qh == NULL))
 960                 qtd_list_free (ehci, urb, qtd_list);
 961         return rc;
 962 }
 963
 964 /*-------------------------------------------------------------------------*/
 965
 966 /* the async qh for the qtds being reclaimed are now unlinked from the HC */
 967
 968 static void end_unlink_async (struct ehci_hcd *ehci)
 969 {
 970         struct ehci_qh          *qh = ehci->reclaim;
 971         struct ehci_qh          *next;
 972
 973         timer_action_done (ehci, TIMER_IAA_WATCHDOG);
 974
 975         // qh->hw_next = cpu_to_hc32(qh->qh_dma);
 976         qh->qh_state = QH_STATE_IDLE;
 977         qh->qh_next.qh = NULL;
 978         qh_put (qh);                    // refcount from reclaim
 979
 980         /* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
 981         next = qh->reclaim;
 982         ehci->reclaim = next;
 983         ehci->reclaim_ready = 0;
 984         qh->reclaim = NULL;
 985
 986         qh_completions (ehci, qh);
 987
 988         if (!list_empty (&qh->qtd_list)
 989                         && HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
 990                 qh_link_async (ehci, qh);
 991         else {
 992                 qh_put (qh);            // refcount from async list
 993
 994                 /* it's not free to turn the async schedule on/off; leave it
 995                  * active but idle for a while once it empties.
 996                  */
 997                 if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state)
 998                                 && ehci->async->qh_next.qh == NULL)
 999                         timer_action (ehci, TIMER_ASYNC_OFF);
1000         }
1001
1002         if (next) {
1003                 ehci->reclaim = NULL;
1004                 start_unlink_async (ehci, next);
1005         }
1006 }
1007
1008 /* makes sure the async qh will become idle */
1009 /* caller must own ehci->lock */
1010
1011 static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
1012 {
1013         int             cmd = ehci_readl(ehci, &ehci->regs->command);
1014         struct ehci_qh  *prev;
1015
1016 #ifdef DEBUG
1017         assert_spin_locked(&ehci->lock);
1018         if (ehci->reclaim
1019                         || (qh->qh_state != QH_STATE_LINKED
1020                                 && qh->qh_state != QH_STATE_UNLINK_WAIT)
1021                         )
1022                 BUG ();
1023 #endif
1024
1025         /* stop async schedule right now? */
1026         if (unlikely (qh == ehci->async)) {
1027                 /* can't get here without STS_ASS set */
1028                 if (ehci_to_hcd(ehci)->state != HC_STATE_HALT
1029                                 && !ehci->reclaim) {
1030                         /* ... and CMD_IAAD clear */
1031                         ehci_writel(ehci, cmd & ~CMD_ASE,
1032                                     &ehci->regs->command);
1033                         wmb ();
1034                         // handshake later, if we need to
1035                         timer_action_done (ehci, TIMER_ASYNC_OFF);
1036                 }
1037                 return;
1038         }
1039
1040         qh->qh_state = QH_STATE_UNLINK;
1041         ehci->reclaim = qh = qh_get (qh);
1042
1043         prev = ehci->async;
1044         while (prev->qh_next.qh != qh)
1045                 prev = prev->qh_next.qh;
1046
1047         prev->hw_next = qh->hw_next;
1048         prev->qh_next = qh->qh_next;
1049         wmb ();
1050
1051         if (unlikely (ehci_to_hcd(ehci)->state == HC_STATE_HALT)) {
1052                 /* if (unlikely (qh->reclaim != 0))
1053                  *      this will recurse, probably not much
1054                  */
1055                 end_unlink_async (ehci);
1056                 return;
1057         }
1058
1059         ehci->reclaim_ready = 0;
1060         cmd |= CMD_IAAD;
1061         ehci_writel(ehci, cmd, &ehci->regs->command);
1062         (void)ehci_readl(ehci, &ehci->regs->command);
1063         timer_action (ehci, TIMER_IAA_WATCHDOG);
1064 }
1065
1066 /*-------------------------------------------------------------------------*/
1067
1068 static void scan_async (struct ehci_hcd *ehci)
1069 {
1070         struct ehci_qh          *qh;
1071         enum ehci_timer_action  action = TIMER_IO_WATCHDOG;
1072
1073         if (!++(ehci->stamp))
1074                 ehci->stamp++;
1075         timer_action_done (ehci, TIMER_ASYNC_SHRINK);
1076 rescan:
1077         qh = ehci->async->qh_next.qh;
1078         if (likely (qh != NULL)) {
1079                 do {
1080                         /* clean any finished work for this qh */
1081                         if (!list_empty (&qh->qtd_list)
1082                                         && qh->stamp != ehci->stamp) {
1083                                 int temp;
1084
1085                                 /* unlinks could happen here; completion
1086                                  * reporting drops the lock.  rescan using
1087                                  * the latest schedule, but don't rescan
1088                                  * qhs we already finished (no looping).
1089                                  */
1090                                 qh = qh_get (qh);
1091                                 qh->stamp = ehci->stamp;
1092                                 temp = qh_completions (ehci, qh);
1093                                 qh_put (qh);
1094                                 if (temp != 0) {
1095                                         goto rescan;
1096                                 }
1097                         }
1098
1099                         /* unlink idle entries, reducing HC PCI usage as well
1100                          * as HCD schedule-scanning costs.  delay for any qh
1101                          * we just scanned, there's a not-unusual case that it
1102                          * doesn't stay idle for long.
1103                          * (plus, avoids some kind of re-activation race.)
1104                          */
1105                         if (list_empty (&qh->qtd_list)) {
1106                                 if (qh->stamp == ehci->stamp)
1107                                         action = TIMER_ASYNC_SHRINK;
1108                                 else if (!ehci->reclaim
1109                                             && qh->qh_state == QH_STATE_LINKED)
1110                                         start_unlink_async (ehci, qh);
1111                         }
1112
1113                         qh = qh->qh_next.qh;
1114                 } while (qh);
1115         }
1116         if (action == TIMER_ASYNC_SHRINK)
1117                 timer_action (ehci, TIMER_ASYNC_SHRINK);
1118 }