drivers/usb/host/ehci-q.c

   1 /*
   2  * Copyright (C) 2001-2004 by David Brownell
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms of the GNU General Public License as published by the
   6  * Free Software Foundation; either version 2 of the License, or (at your
   7  * option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful, but
  10  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software Foundation,
  16  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17  */
  18
  19 /* this file is part of ehci-hcd.c */
  20
  21 /*-------------------------------------------------------------------------*/
  22
  23 /*
  24  * EHCI hardware queue manipulation ... the core.  QH/QTD manipulation.
  25  *
  26  * Control, bulk, and interrupt traffic all use "qh" lists.  They list "qtd"
  27  * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
  28  * buffers needed for the larger number).  We use one QH per endpoint, queue
  29  * multiple urbs (all three types) per endpoint.  URBs may need several qtds.
  30  *
  31  * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
  32  * interrupts) needs careful scheduling.  Performance improvements can be
  33  * an ongoing challenge.  That's in "ehci-sched.c".
  34  *
  35  * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
  36  * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
  37  * (b) special fields in qh entries or (c) split iso entries.  TTs will
  38  * buffer low/full speed data so the host collects it at high speed.
  39  */
  40
  41 /*-------------------------------------------------------------------------*/
  42
  43 /* fill a qtd, returning how much of the buffer we were able to queue up */
  44
  45 static int
  46 qtd_fill(struct ehci_hcd *ehci, struct ehci_qtd *qtd, dma_addr_t buf,
  47                   size_t len, int token, int maxpacket)
  48 {
  49         int     i, count;
  50         u64     addr = buf;
  51
  52         /* one buffer entry per 4K ... first might be short or unaligned */
  53         qtd->hw_buf[0] = cpu_to_hc32(ehci, (u32)addr);
  54         qtd->hw_buf_hi[0] = cpu_to_hc32(ehci, (u32)(addr >> 32));
  55         count = 0x1000 - (buf & 0x0fff);        /* rest of that page */
  56         if (likely (len < count))               /* ... iff needed */
  57                 count = len;
  58         else {
  59                 buf +=  0x1000;
  60                 buf &= ~0x0fff;
  61
  62                 /* per-qtd limit: from 16K to 20K (best alignment) */
  63                 for (i = 1; count < len && i < 5; i++) {
  64                         addr = buf;
  65                         qtd->hw_buf[i] = cpu_to_hc32(ehci, (u32)addr);
  66                         qtd->hw_buf_hi[i] = cpu_to_hc32(ehci,
  67                                         (u32)(addr >> 32));
  68                         buf += 0x1000;
  69                         if ((count + 0x1000) < len)
  70                                 count += 0x1000;
  71                         else
  72                                 count = len;
  73                 }
  74
  75                 /* short packets may only terminate transfers */
  76                 if (count != len)
  77                         count -= (count % maxpacket);
  78         }
  79         qtd->hw_token = cpu_to_hc32(ehci, (count << 16) | token);
  80         qtd->length = count;
  81
  82         return count;
  83 }
  84
  85 /*-------------------------------------------------------------------------*/
  86
  87 static inline void
  88 qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
  89 {
  90         /* writes to an active overlay are unsafe */
  91         BUG_ON(qh->qh_state != QH_STATE_IDLE);
  92
  93         qh->hw_qtd_next = QTD_NEXT(ehci, qtd->qtd_dma);
  94         qh->hw_alt_next = EHCI_LIST_END(ehci);
  95
  96         /* Except for control endpoints, we make hardware maintain data
  97          * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
  98          * and set the pseudo-toggle in udev. Only usb_clear_halt() will
  99          * ever clear it.
 100          */
 101         if (!(qh->hw_info1 & cpu_to_hc32(ehci, 1 << 14))) {
 102                 unsigned        is_out, epnum;
 103
 104                 is_out = !(qtd->hw_token & cpu_to_hc32(ehci, 1 << 8));
 105                 epnum = (hc32_to_cpup(ehci, &qh->hw_info1) >> 8) & 0x0f;
 106                 if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) {
 107                         qh->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE);
 108                         usb_settoggle (qh->dev, epnum, is_out, 1);
 109                 }
 110         }
 111
 112         /* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
 113         wmb ();
 114         qh->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING);
 115 }
 116
 117 /* if it weren't for a common silicon quirk (writing the dummy into the qh
 118  * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
 119  * recovery (including urb dequeue) would need software changes to a QH...
 120  */
 121 static void
 122 qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh)
 123 {
 124         struct ehci_qtd *qtd;
 125
 126         if (list_empty (&qh->qtd_list))
 127                 qtd = qh->dummy;
 128         else {
 129                 qtd = list_entry (qh->qtd_list.next,
 130                                 struct ehci_qtd, qtd_list);
 131                 /* first qtd may already be partially processed */
 132                 if (cpu_to_hc32(ehci, qtd->qtd_dma) == qh->hw_current)
 133                         qtd = NULL;
 134         }
 135
 136         if (qtd)
 137                 qh_update (ehci, qh, qtd);
 138 }
 139
 140 /*-------------------------------------------------------------------------*/
 141
 142 static void qtd_copy_status (
 143         struct ehci_hcd *ehci,
 144         struct urb *urb,
 145         size_t length,
 146         u32 token
 147 )
 148 {
 149         /* count IN/OUT bytes, not SETUP (even short packets) */
 150         if (likely (QTD_PID (token) != 2))
 151                 urb->actual_length += length - QTD_LENGTH (token);
 152
 153         /* don't modify error codes */
 154         if (unlikely (urb->status != -EINPROGRESS))
 155                 return;
 156
 157         /* force cleanup after short read; not always an error */
 158         if (unlikely (IS_SHORT_READ (token)))
 159                 urb->status = -EREMOTEIO;
 160
 161         /* serious "can't proceed" faults reported by the hardware */
 162         if (token & QTD_STS_HALT) {
 163                 if (token & QTD_STS_BABBLE) {
 164                         /* FIXME "must" disable babbling device's port too */
 165                         urb->status = -EOVERFLOW;
 166                 } else if (token & QTD_STS_MMF) {
 167                         /* fs/ls interrupt xfer missed the complete-split */
 168                         urb->status = -EPROTO;
 169                 } else if (token & QTD_STS_DBE) {
 170                         urb->status = (QTD_PID (token) == 1) /* IN ? */
 171                                 ? -ENOSR  /* hc couldn't read data */
 172                                 : -ECOMM; /* hc couldn't write data */
 173                 } else if (token & QTD_STS_XACT) {
 174                         /* timeout, bad crc, wrong PID, etc; retried */
 175                         if (QTD_CERR (token))
 176                                 urb->status = -EPIPE;
 177                         else {
 178                                 ehci_dbg (ehci, "devpath %s ep%d%s 3strikes\n",
 179                                         urb->dev->devpath,
 180                                         usb_pipeendpoint (urb->pipe),
 181                                         usb_pipein (urb->pipe) ? "in" : "out");
 182                                 urb->status = -EPROTO;
 183                         }
 184                 /* CERR nonzero + no errors + halt --> stall */
 185                 } else if (QTD_CERR (token))
 186                         urb->status = -EPIPE;
 187                 else    /* unknown */
 188                         urb->status = -EPROTO;
 189
 190                 ehci_vdbg (ehci,
 191                         "dev%d ep%d%s qtd token %08x --> status %d\n",
 192                         usb_pipedevice (urb->pipe),
 193                         usb_pipeendpoint (urb->pipe),
 194                         usb_pipein (urb->pipe) ? "in" : "out",
 195                         token, urb->status);
 196
 197                 /* if async CSPLIT failed, try cleaning out the TT buffer */
 198                 if (urb->status != -EPIPE
 199                                 && urb->dev->tt && !usb_pipeint (urb->pipe)
 200                                 && ((token & QTD_STS_MMF) != 0
 201                                         || QTD_CERR(token) == 0)
 202                                 && (!ehci_is_TDI(ehci)
 203                                         || urb->dev->tt->hub !=
 204                                            ehci_to_hcd(ehci)->self.root_hub)) {
 205 #ifdef DEBUG
 206                         struct usb_device *tt = urb->dev->tt->hub;
 207                         dev_dbg (&tt->dev,
 208                                 "clear tt buffer port %d, a%d ep%d t%08x\n",
 209                                 urb->dev->ttport, urb->dev->devnum,
 210                                 usb_pipeendpoint (urb->pipe), token);
 211 #endif /* DEBUG */
 212                         usb_hub_tt_clear_buffer (urb->dev, urb->pipe);
 213                 }
 214         }
 215 }
 216
 217 static void
 218 ehci_urb_done (struct ehci_hcd *ehci, struct urb *urb)
 219 __releases(ehci->lock)
 220 __acquires(ehci->lock)
 221 {
 222         if (likely (urb->hcpriv != NULL)) {
 223                 struct ehci_qh  *qh = (struct ehci_qh *) urb->hcpriv;
 224
 225                 /* S-mask in a QH means it's an interrupt urb */
 226                 if ((qh->hw_info2 & cpu_to_hc32(ehci, QH_SMASK)) != 0) {
 227
 228                         /* ... update hc-wide periodic stats (for usbfs) */
 229                         ehci_to_hcd(ehci)->self.bandwidth_int_reqs--;
 230                 }
 231                 qh_put (qh);
 232         }
 233
 234         spin_lock (&urb->lock);
 235         urb->hcpriv = NULL;
 236         switch (urb->status) {
 237         case -EINPROGRESS:              /* success */
 238                 urb->status = 0;
 239         default:                        /* fault */
 240                 COUNT (ehci->stats.complete);
 241                 break;
 242         case -EREMOTEIO:                /* fault or normal */
 243                 if (!(urb->transfer_flags & URB_SHORT_NOT_OK))
 244                         urb->status = 0;
 245                 COUNT (ehci->stats.complete);
 246                 break;
 247         case -ECONNRESET:               /* canceled */
 248         case -ENOENT:
 249                 COUNT (ehci->stats.unlink);
 250                 break;
 251         }
 252         spin_unlock (&urb->lock);
 253
 254 #ifdef EHCI_URB_TRACE
 255         ehci_dbg (ehci,
 256                 "%s %s urb %p ep%d%s status %d len %d/%d\n",
 257                 __FUNCTION__, urb->dev->devpath, urb,
 258                 usb_pipeendpoint (urb->pipe),
 259                 usb_pipein (urb->pipe) ? "in" : "out",
 260                 urb->status,
 261                 urb->actual_length, urb->transfer_buffer_length);
 262 #endif
 263
 264         /* complete() can reenter this HCD */
 265         usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
 266         spin_unlock (&ehci->lock);
 267         usb_hcd_giveback_urb (ehci_to_hcd(ehci), urb);
 268         spin_lock (&ehci->lock);
 269 }
 270
 271 static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
 272 static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
 273
 274 static void intr_deschedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
 275 static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
 276
 277 /*
 278  * Process and free completed qtds for a qh, returning URBs to drivers.
 279  * Chases up to qh->hw_current.  Returns number of completions called,
 280  * indicating how much "real" work we did.
 281  */
 282 static unsigned
 283 qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
 284 {
 285         struct ehci_qtd         *last = NULL, *end = qh->dummy;
 286         struct list_head        *entry, *tmp;
 287         int                     stopped;
 288         unsigned                count = 0;
 289         int                     do_status = 0;
 290         u8                      state;
 291         u32                     halt = HALT_BIT(ehci);
 292
 293         if (unlikely (list_empty (&qh->qtd_list)))
 294                 return count;
 295
 296         /* completions (or tasks on other cpus) must never clobber HALT
 297          * till we've gone through and cleaned everything up, even when
 298          * they add urbs to this qh's queue or mark them for unlinking.
 299          *
 300          * NOTE:  unlinking expects to be done in queue order.
 301          */
 302         state = qh->qh_state;
 303         qh->qh_state = QH_STATE_COMPLETING;
 304         stopped = (state == QH_STATE_IDLE);
 305
 306         /* remove de-activated QTDs from front of queue.
 307          * after faults (including short reads), cleanup this urb
 308          * then let the queue advance.
 309          * if queue is stopped, handles unlinks.
 310          */
 311         list_for_each_safe (entry, tmp, &qh->qtd_list) {
 312                 struct ehci_qtd *qtd;
 313                 struct urb      *urb;
 314                 u32             token = 0;
 315
 316                 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
 317                 urb = qtd->urb;
 318
 319                 /* clean up any state from previous QTD ...*/
 320                 if (last) {
 321                         if (likely (last->urb != urb)) {
 322                                 ehci_urb_done (ehci, last->urb);
 323                                 count++;
 324                         }
 325                         ehci_qtd_free (ehci, last);
 326                         last = NULL;
 327                 }
 328
 329                 /* ignore urbs submitted during completions we reported */
 330                 if (qtd == end)
 331                         break;
 332
 333                 /* hardware copies qtd out of qh overlay */
 334                 rmb ();
 335                 token = hc32_to_cpu(ehci, qtd->hw_token);
 336
 337                 /* always clean up qtds the hc de-activated */
 338                 if ((token & QTD_STS_ACTIVE) == 0) {
 339
 340                         if ((token & QTD_STS_HALT) != 0) {
 341                                 stopped = 1;
 342
 343                         /* magic dummy for some short reads; qh won't advance.
 344                          * that silicon quirk can kick in with this dummy too.
 345                          */
 346                         } else if (IS_SHORT_READ (token)
 347                                         && !(qtd->hw_alt_next
 348                                                 & EHCI_LIST_END(ehci))) {
 349                                 stopped = 1;
 350                                 goto halt;
 351                         }
 352
 353                 /* stop scanning when we reach qtds the hc is using */
 354                 } else if (likely (!stopped
 355                                 && HC_IS_RUNNING (ehci_to_hcd(ehci)->state))) {
 356                         break;
 357
 358                 } else {
 359                         stopped = 1;
 360
 361                         if (unlikely (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state)))
 362                                 urb->status = -ESHUTDOWN;
 363
 364                         /* ignore active urbs unless some previous qtd
 365                          * for the urb faulted (including short read) or
 366                          * its urb was canceled.  we may patch qh or qtds.
 367                          */
 368                         if (likely (urb->status == -EINPROGRESS))
 369                                 continue;
 370
 371                         /* issue status after short control reads */
 372                         if (unlikely (do_status != 0)
 373                                         && QTD_PID (token) == 0 /* OUT */) {
 374                                 do_status = 0;
 375                                 continue;
 376                         }
 377
 378                         /* token in overlay may be most current */
 379                         if (state == QH_STATE_IDLE
 380                                         && cpu_to_hc32(ehci, qtd->qtd_dma)
 381                                                 == qh->hw_current)
 382                                 token = hc32_to_cpu(ehci, qh->hw_token);
 383
 384                         /* force halt for unlinked or blocked qh, so we'll
 385                          * patch the qh later and so that completions can't
 386                          * activate it while we "know" it's stopped.
 387                          */
 388                         if ((halt & qh->hw_token) == 0) {
 389 halt:
 390                                 qh->hw_token |= halt;
 391                                 wmb ();
 392                         }
 393                 }
 394
 395                 /* remove it from the queue */
 396                 spin_lock (&urb->lock);
 397                 qtd_copy_status (ehci, urb, qtd->length, token);
 398                 do_status = (urb->status == -EREMOTEIO)
 399                                 && usb_pipecontrol (urb->pipe);
 400                 spin_unlock (&urb->lock);
 401
 402                 if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
 403                         last = list_entry (qtd->qtd_list.prev,
 404                                         struct ehci_qtd, qtd_list);
 405                         last->hw_next = qtd->hw_next;
 406                 }
 407                 list_del (&qtd->qtd_list);
 408                 last = qtd;
 409         }
 410
 411         /* last urb's completion might still need calling */
 412         if (likely (last != NULL)) {
 413                 ehci_urb_done (ehci, last->urb);
 414                 count++;
 415                 ehci_qtd_free (ehci, last);
 416         }
 417
 418         /* restore original state; caller must unlink or relink */
 419         qh->qh_state = state;
 420
 421         /* be sure the hardware's done with the qh before refreshing
 422          * it after fault cleanup, or recovering from silicon wrongly
 423          * overlaying the dummy qtd (which reduces DMA chatter).
 424          */
 425         if (stopped != 0 || qh->hw_qtd_next == EHCI_LIST_END(ehci)) {
 426                 switch (state) {
 427                 case QH_STATE_IDLE:
 428                         qh_refresh(ehci, qh);
 429                         break;
 430                 case QH_STATE_LINKED:
 431                         /* should be rare for periodic transfers,
 432                          * except maybe high bandwidth ...
 433                          */
 434                         if ((cpu_to_hc32(ehci, QH_SMASK)
 435                                         & qh->hw_info2) != 0) {
 436                                 intr_deschedule (ehci, qh);
 437                                 (void) qh_schedule (ehci, qh);
 438                         } else
 439                                 unlink_async (ehci, qh);
 440                         break;
 441                 /* otherwise, unlink already started */
 442                 }
 443         }
 444
 445         return count;
 446 }
 447
 448 /*-------------------------------------------------------------------------*/
 449
 450 // high bandwidth multiplier, as encoded in highspeed endpoint descriptors
 451 #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
 452 // ... and packet size, for any kind of endpoint descriptor
 453 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
 454
 455 /*
 456  * reverse of qh_urb_transaction:  free a list of TDs.
 457  * used for cleanup after errors, before HC sees an URB's TDs.
 458  */
 459 static void qtd_list_free (
 460         struct ehci_hcd         *ehci,
 461         struct urb              *urb,
 462         struct list_head        *qtd_list
 463 ) {
 464         struct list_head        *entry, *temp;
 465
 466         list_for_each_safe (entry, temp, qtd_list) {
 467                 struct ehci_qtd *qtd;
 468
 469                 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
 470                 list_del (&qtd->qtd_list);
 471                 ehci_qtd_free (ehci, qtd);
 472         }
 473 }
 474
 475 /*
 476  * create a list of filled qtds for this URB; won't link into qh.
 477  */
 478 static struct list_head *
 479 qh_urb_transaction (
 480         struct ehci_hcd         *ehci,
 481         struct urb              *urb,
 482         struct list_head        *head,
 483         gfp_t                   flags
 484 ) {
 485         struct ehci_qtd         *qtd, *qtd_prev;
 486         dma_addr_t              buf;
 487         int                     len, maxpacket;
 488         int                     is_input;
 489         u32                     token;
 490
 491         /*
 492          * URBs map to sequences of QTDs:  one logical transaction
 493          */
 494         qtd = ehci_qtd_alloc (ehci, flags);
 495         if (unlikely (!qtd))
 496                 return NULL;
 497         list_add_tail (&qtd->qtd_list, head);
 498         qtd->urb = urb;
 499
 500         token = QTD_STS_ACTIVE;
 501         token |= (EHCI_TUNE_CERR << 10);
 502         /* for split transactions, SplitXState initialized to zero */
 503
 504         len = urb->transfer_buffer_length;
 505         is_input = usb_pipein (urb->pipe);
 506         if (usb_pipecontrol (urb->pipe)) {
 507                 /* SETUP pid */
 508                 qtd_fill(ehci, qtd, urb->setup_dma,
 509                                 sizeof (struct usb_ctrlrequest),
 510                                 token | (2 /* "setup" */ << 8), 8);
 511
 512                 /* ... and always at least one more pid */
 513                 token ^= QTD_TOGGLE;
 514                 qtd_prev = qtd;
 515                 qtd = ehci_qtd_alloc (ehci, flags);
 516                 if (unlikely (!qtd))
 517                         goto cleanup;
 518                 qtd->urb = urb;
 519                 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
 520                 list_add_tail (&qtd->qtd_list, head);
 521
 522                 /* for zero length DATA stages, STATUS is always IN */
 523                 if (len == 0)
 524                         token |= (1 /* "in" */ << 8);
 525         }
 526
 527         /*
 528          * data transfer stage:  buffer setup
 529          */
 530         buf = urb->transfer_dma;
 531
 532         if (is_input)
 533                 token |= (1 /* "in" */ << 8);
 534         /* else it's already initted to "out" pid (0 << 8) */
 535
 536         maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
 537
 538         /*
 539          * buffer gets wrapped in one or more qtds;
 540          * last one may be "short" (including zero len)
 541          * and may serve as a control status ack
 542          */
 543         for (;;) {
 544                 int this_qtd_len;
 545
 546                 this_qtd_len = qtd_fill(ehci, qtd, buf, len, token, maxpacket);
 547                 len -= this_qtd_len;
 548                 buf += this_qtd_len;
 549                 if (is_input)
 550                         qtd->hw_alt_next = ehci->async->hw_alt_next;
 551
 552                 /* qh makes control packets use qtd toggle; maybe switch it */
 553                 if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
 554                         token ^= QTD_TOGGLE;
 555
 556                 if (likely (len <= 0))
 557                         break;
 558
 559                 qtd_prev = qtd;
 560                 qtd = ehci_qtd_alloc (ehci, flags);
 561                 if (unlikely (!qtd))
 562                         goto cleanup;
 563                 qtd->urb = urb;
 564                 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
 565                 list_add_tail (&qtd->qtd_list, head);
 566         }
 567
 568         /* unless the bulk/interrupt caller wants a chance to clean
 569          * up after short reads, hc should advance qh past this urb
 570          */
 571         if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
 572                                 || usb_pipecontrol (urb->pipe)))
 573                 qtd->hw_alt_next = EHCI_LIST_END(ehci);
 574
 575         /*
 576          * control requests may need a terminating data "status" ack;
 577          * bulk ones may need a terminating short packet (zero length).
 578          */
 579         if (likely (urb->transfer_buffer_length != 0)) {
 580                 int     one_more = 0;
 581
 582                 if (usb_pipecontrol (urb->pipe)) {
 583                         one_more = 1;
 584                         token ^= 0x0100;        /* "in" <--> "out"  */
 585                         token |= QTD_TOGGLE;    /* force DATA1 */
 586                 } else if (usb_pipebulk (urb->pipe)
 587                                 && (urb->transfer_flags & URB_ZERO_PACKET)
 588                                 && !(urb->transfer_buffer_length % maxpacket)) {
 589                         one_more = 1;
 590                 }
 591                 if (one_more) {
 592                         qtd_prev = qtd;
 593                         qtd = ehci_qtd_alloc (ehci, flags);
 594                         if (unlikely (!qtd))
 595                                 goto cleanup;
 596                         qtd->urb = urb;
 597                         qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
 598                         list_add_tail (&qtd->qtd_list, head);
 599
 600                         /* never any data in such packets */
 601                         qtd_fill(ehci, qtd, 0, 0, token, 0);
 602                 }
 603         }
 604
 605         /* by default, enable interrupt on urb completion */
 606         if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
 607                 qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
 608         return head;
 609
 610 cleanup:
 611         qtd_list_free (ehci, urb, head);
 612         return NULL;
 613 }
 614
 615 /*-------------------------------------------------------------------------*/
 616
 617 // Would be best to create all qh's from config descriptors,
 618 // when each interface/altsetting is established.  Unlink
 619 // any previous qh and cancel its urbs first; endpoints are
 620 // implicitly reset then (data toggle too).
 621 // That'd mean updating how usbcore talks to HCDs. (2.7?)
 622
 623
 624 /*
 625  * Each QH holds a qtd list; a QH is used for everything except iso.
 626  *
 627  * For interrupt urbs, the scheduler must set the microframe scheduling
 628  * mask(s) each time the QH gets scheduled.  For highspeed, that's
 629  * just one microframe in the s-mask.  For split interrupt transactions
 630  * there are additional complications: c-mask, maybe FSTNs.
 631  */
 632 static struct ehci_qh *
 633 qh_make (
 634         struct ehci_hcd         *ehci,
 635         struct urb              *urb,
 636         gfp_t                   flags
 637 ) {
 638         struct ehci_qh          *qh = ehci_qh_alloc (ehci, flags);
 639         u32                     info1 = 0, info2 = 0;
 640         int                     is_input, type;
 641         int                     maxp = 0;
 642
 643         if (!qh)
 644                 return qh;
 645
 646         /*
 647          * init endpoint/device data for this QH
 648          */
 649         info1 |= usb_pipeendpoint (urb->pipe) << 8;
 650         info1 |= usb_pipedevice (urb->pipe) << 0;
 651
 652         is_input = usb_pipein (urb->pipe);
 653         type = usb_pipetype (urb->pipe);
 654         maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
 655
 656         /* Compute interrupt scheduling parameters just once, and save.
 657          * - allowing for high bandwidth, how many nsec/uframe are used?
 658          * - split transactions need a second CSPLIT uframe; same question
 659          * - splits also need a schedule gap (for full/low speed I/O)
 660          * - qh has a polling interval
 661          *
 662          * For control/bulk requests, the HC or TT handles these.
 663          */
 664         if (type == PIPE_INTERRUPT) {
 665                 qh->usecs = NS_TO_US (usb_calc_bus_time (USB_SPEED_HIGH, is_input, 0,
 666                                 hb_mult (maxp) * max_packet (maxp)));
 667                 qh->start = NO_FRAME;
 668
 669                 if (urb->dev->speed == USB_SPEED_HIGH) {
 670                         qh->c_usecs = 0;
 671                         qh->gap_uf = 0;
 672
 673                         qh->period = urb->interval >> 3;
 674                         if (qh->period == 0 && urb->interval != 1) {
 675                                 /* NOTE interval 2 or 4 uframes could work.
 676                                  * But interval 1 scheduling is simpler, and
 677                                  * includes high bandwidth.
 678                                  */
 679                                 dbg ("intr period %d uframes, NYET!",
 680                                                 urb->interval);
 681                                 goto done;
 682                         }
 683                 } else {
 684                         struct usb_tt   *tt = urb->dev->tt;
 685                         int             think_time;
 686
 687                         /* gap is f(FS/LS transfer times) */
 688                         qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
 689                                         is_input, 0, maxp) / (125 * 1000);
 690
 691                         /* FIXME this just approximates SPLIT/CSPLIT times */
 692                         if (is_input) {         // SPLIT, gap, CSPLIT+DATA
 693                                 qh->c_usecs = qh->usecs + HS_USECS (0);
 694                                 qh->usecs = HS_USECS (1);
 695                         } else {                // SPLIT+DATA, gap, CSPLIT
 696                                 qh->usecs += HS_USECS (1);
 697                                 qh->c_usecs = HS_USECS (0);
 698                         }
 699
 700                         think_time = tt ? tt->think_time : 0;
 701                         qh->tt_usecs = NS_TO_US (think_time +
 702                                         usb_calc_bus_time (urb->dev->speed,
 703                                         is_input, 0, max_packet (maxp)));
 704                         qh->period = urb->interval;
 705                 }
 706         }
 707
 708         /* support for tt scheduling, and access to toggles */
 709         qh->dev = urb->dev;
 710
 711         /* using TT? */
 712         switch (urb->dev->speed) {
 713         case USB_SPEED_LOW:
 714                 info1 |= (1 << 12);     /* EPS "low" */
 715                 /* FALL THROUGH */
 716
 717         case USB_SPEED_FULL:
 718                 /* EPS 0 means "full" */
 719                 if (type != PIPE_INTERRUPT)
 720                         info1 |= (EHCI_TUNE_RL_TT << 28);
 721                 if (type == PIPE_CONTROL) {
 722                         info1 |= (1 << 27);     /* for TT */
 723                         info1 |= 1 << 14;       /* toggle from qtd */
 724                 }
 725                 info1 |= maxp << 16;
 726
 727                 info2 |= (EHCI_TUNE_MULT_TT << 30);
 728
 729                 /* Some Freescale processors have an erratum in which the
 730                  * port number in the queue head was 0..N-1 instead of 1..N.
 731                  */
 732                 if (ehci_has_fsl_portno_bug(ehci))
 733                         info2 |= (urb->dev->ttport-1) << 23;
 734                 else
 735                         info2 |= urb->dev->ttport << 23;
 736
 737                 /* set the address of the TT; for TDI's integrated
 738                  * root hub tt, leave it zeroed.
 739                  */
 740                 if (!ehci_is_TDI(ehci)
 741                                 || urb->dev->tt->hub !=
 742                                         ehci_to_hcd(ehci)->self.root_hub)
 743                         info2 |= urb->dev->tt->hub->devnum << 16;
 744
 745                 /* NOTE:  if (PIPE_INTERRUPT) { scheduler sets c-mask } */
 746
 747                 break;
 748
 749         case USB_SPEED_HIGH:            /* no TT involved */
 750                 info1 |= (2 << 12);     /* EPS "high" */
 751                 if (type == PIPE_CONTROL) {
 752                         info1 |= (EHCI_TUNE_RL_HS << 28);
 753                         info1 |= 64 << 16;      /* usb2 fixed maxpacket */
 754                         info1 |= 1 << 14;       /* toggle from qtd */
 755                         info2 |= (EHCI_TUNE_MULT_HS << 30);
 756                 } else if (type == PIPE_BULK) {
 757                         info1 |= (EHCI_TUNE_RL_HS << 28);
 758                         info1 |= 512 << 16;     /* usb2 fixed maxpacket */
 759                         info2 |= (EHCI_TUNE_MULT_HS << 30);
 760                 } else {                /* PIPE_INTERRUPT */
 761                         info1 |= max_packet (maxp) << 16;
 762                         info2 |= hb_mult (maxp) << 30;
 763                 }
 764                 break;
 765         default:
 766                 dbg ("bogus dev %p speed %d", urb->dev, urb->dev->speed);
 767 done:
 768                 qh_put (qh);
 769                 return NULL;
 770         }
 771
 772         /* NOTE:  if (PIPE_INTERRUPT) { scheduler sets s-mask } */
 773
 774         /* init as live, toggle clear, advance to dummy */
 775         qh->qh_state = QH_STATE_IDLE;
 776         qh->hw_info1 = cpu_to_hc32(ehci, info1);
 777         qh->hw_info2 = cpu_to_hc32(ehci, info2);
 778         usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
 779         qh_refresh (ehci, qh);
 780         return qh;
 781 }
 782
 783 /*-------------------------------------------------------------------------*/
 784
 785 /* move qh (and its qtds) onto async queue; maybe enable queue.  */
 786
 787 static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
 788 {
 789         __hc32          dma = QH_NEXT(ehci, qh->qh_dma);
 790         struct ehci_qh  *head;
 791
 792         /* (re)start the async schedule? */
 793         head = ehci->async;
 794         timer_action_done (ehci, TIMER_ASYNC_OFF);
 795         if (!head->qh_next.qh) {
 796                 u32     cmd = ehci_readl(ehci, &ehci->regs->command);
 797
 798                 if (!(cmd & CMD_ASE)) {
 799                         /* in case a clear of CMD_ASE didn't take yet */
 800                         (void)handshake(ehci, &ehci->regs->status,
 801                                         STS_ASS, 0, 150);
 802                         cmd |= CMD_ASE | CMD_RUN;
 803                         ehci_writel(ehci, cmd, &ehci->regs->command);
 804                         ehci_to_hcd(ehci)->state = HC_STATE_RUNNING;
 805                         /* posted write need not be known to HC yet ... */
 806                 }
 807         }
 808
 809         /* clear halt and/or toggle; and maybe recover from silicon quirk */
 810         if (qh->qh_state == QH_STATE_IDLE)
 811                 qh_refresh (ehci, qh);
 812
 813         /* splice right after start */
 814         qh->qh_next = head->qh_next;
 815         qh->hw_next = head->hw_next;
 816         wmb ();
 817
 818         head->qh_next.qh = qh;
 819         head->hw_next = dma;
 820
 821         qh->qh_state = QH_STATE_LINKED;
 822         /* qtd completions reported later by interrupt */
 823 }
 824
 825 /*-------------------------------------------------------------------------*/
 826
 827 /*
 828  * For control/bulk/interrupt, return QH with these TDs appended.
 829  * Allocates and initializes the QH if necessary.
 830  * Returns null if it can't allocate a QH it needs to.
 831  * If the QH has TDs (urbs) already, that's great.
 832  */
 833 static struct ehci_qh *qh_append_tds (
 834         struct ehci_hcd         *ehci,
 835         struct urb              *urb,
 836         struct list_head        *qtd_list,
 837         int                     epnum,
 838         void                    **ptr
 839 )
 840 {
 841         struct ehci_qh          *qh = NULL;
 842         u32                     qh_addr_mask = cpu_to_hc32(ehci, 0x7f);
 843
 844         qh = (struct ehci_qh *) *ptr;
 845         if (unlikely (qh == NULL)) {
 846                 /* can't sleep here, we have ehci->lock... */
 847                 qh = qh_make (ehci, urb, GFP_ATOMIC);
 848                 *ptr = qh;
 849         }
 850         if (likely (qh != NULL)) {
 851                 struct ehci_qtd *qtd;
 852
 853                 if (unlikely (list_empty (qtd_list)))
 854                         qtd = NULL;
 855                 else
 856                         qtd = list_entry (qtd_list->next, struct ehci_qtd,
 857                                         qtd_list);
 858
 859                 /* control qh may need patching ... */
 860                 if (unlikely (epnum == 0)) {
 861
 862                         /* usb_reset_device() briefly reverts to address 0 */
 863                         if (usb_pipedevice (urb->pipe) == 0)
 864                                 qh->hw_info1 &= ~qh_addr_mask;
 865                 }
 866
 867                 /* just one way to queue requests: swap with the dummy qtd.
 868                  * only hc or qh_refresh() ever modify the overlay.
 869                  */
 870                 if (likely (qtd != NULL)) {
 871                         struct ehci_qtd         *dummy;
 872                         dma_addr_t              dma;
 873                         __hc32                  token;
 874
 875                         /* to avoid racing the HC, use the dummy td instead of
 876                          * the first td of our list (becomes new dummy).  both
 877                          * tds stay deactivated until we're done, when the
 878                          * HC is allowed to fetch the old dummy (4.10.2).
 879                          */
 880                         token = qtd->hw_token;
 881                         qtd->hw_token = HALT_BIT(ehci);
 882                         wmb ();
 883                         dummy = qh->dummy;
 884
 885                         dma = dummy->qtd_dma;
 886                         *dummy = *qtd;
 887                         dummy->qtd_dma = dma;
 888
 889                         list_del (&qtd->qtd_list);
 890                         list_add (&dummy->qtd_list, qtd_list);
 891                         __list_splice (qtd_list, qh->qtd_list.prev);
 892
 893                         ehci_qtd_init(ehci, qtd, qtd->qtd_dma);
 894                         qh->dummy = qtd;
 895
 896                         /* hc must see the new dummy at list end */
 897                         dma = qtd->qtd_dma;
 898                         qtd = list_entry (qh->qtd_list.prev,
 899                                         struct ehci_qtd, qtd_list);
 900                         qtd->hw_next = QTD_NEXT(ehci, dma);
 901
 902                         /* let the hc process these next qtds */
 903                         wmb ();
 904                         dummy->hw_token = token;
 905
 906                         urb->hcpriv = qh_get (qh);
 907                 }
 908         }
 909         return qh;
 910 }
 911
 912 /*-------------------------------------------------------------------------*/
 913
 914 static int
 915 submit_async (
 916         struct ehci_hcd         *ehci,
 917         struct urb              *urb,
 918         struct list_head        *qtd_list,
 919         gfp_t                   mem_flags
 920 ) {
 921         struct ehci_qtd         *qtd;
 922         int                     epnum;
 923         unsigned long           flags;
 924         struct ehci_qh          *qh = NULL;
 925         int                     rc;
 926
 927         qtd = list_entry (qtd_list->next, struct ehci_qtd, qtd_list);
 928         epnum = urb->ep->desc.bEndpointAddress;
 929
 930 #ifdef EHCI_URB_TRACE
 931         ehci_dbg (ehci,
 932                 "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
 933                 __FUNCTION__, urb->dev->devpath, urb,
 934                 epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
 935                 urb->transfer_buffer_length,
 936                 qtd, urb->ep->hcpriv);
 937 #endif
 938
 939         spin_lock_irqsave (&ehci->lock, flags);
 940         if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
 941                                &ehci_to_hcd(ehci)->flags))) {
 942                 rc = -ESHUTDOWN;
 943                 goto done;
 944         }
 945         rc = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
 946         if (unlikely(rc))
 947                 goto done;
 948
 949         qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
 950         if (unlikely(qh == NULL)) {
 951                 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
 952                 rc = -ENOMEM;
 953                 goto done;
 954         }
 955
 956         /* Control/bulk operations through TTs don't need scheduling,
 957          * the HC and TT handle it when the TT has a buffer ready.
 958          */
 959         if (likely (qh->qh_state == QH_STATE_IDLE))
 960                 qh_link_async (ehci, qh_get (qh));
 961  done:
 962         spin_unlock_irqrestore (&ehci->lock, flags);
 963         if (unlikely (qh == NULL))
 964                 qtd_list_free (ehci, urb, qtd_list);
 965         return rc;
 966 }
 967
 968 /*-------------------------------------------------------------------------*/
 969
 970 /* the async qh for the qtds being reclaimed are now unlinked from the HC */
 971
 972 static void end_unlink_async (struct ehci_hcd *ehci)
 973 {
 974         struct ehci_qh          *qh = ehci->reclaim;
 975         struct ehci_qh          *next;
 976
 977         timer_action_done (ehci, TIMER_IAA_WATCHDOG);
 978
 979         // qh->hw_next = cpu_to_hc32(qh->qh_dma);
 980         qh->qh_state = QH_STATE_IDLE;
 981         qh->qh_next.qh = NULL;
 982         qh_put (qh);                    // refcount from reclaim
 983
 984         /* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
 985         next = qh->reclaim;
 986         ehci->reclaim = next;
 987         ehci->reclaim_ready = 0;
 988         qh->reclaim = NULL;
 989
 990         qh_completions (ehci, qh);
 991
 992         if (!list_empty (&qh->qtd_list)
 993                         && HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
 994                 qh_link_async (ehci, qh);
 995         else {
 996                 qh_put (qh);            // refcount from async list
 997
 998                 /* it's not free to turn the async schedule on/off; leave it
 999                  * active but idle for a while once it empties.
1000                  */
1001                 if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state)
1002                                 && ehci->async->qh_next.qh == NULL)
1003                         timer_action (ehci, TIMER_ASYNC_OFF);
1004         }
1005
1006         if (next) {
1007                 ehci->reclaim = NULL;
1008                 start_unlink_async (ehci, next);
1009         }
1010 }
1011
1012 /* makes sure the async qh will become idle */
1013 /* caller must own ehci->lock */
1014
1015 static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
1016 {
1017         int             cmd = ehci_readl(ehci, &ehci->regs->command);
1018         struct ehci_qh  *prev;
1019
1020 #ifdef DEBUG
1021         assert_spin_locked(&ehci->lock);
1022         if (ehci->reclaim
1023                         || (qh->qh_state != QH_STATE_LINKED
1024                                 && qh->qh_state != QH_STATE_UNLINK_WAIT)
1025                         )
1026                 BUG ();
1027 #endif
1028
1029         /* stop async schedule right now? */
1030         if (unlikely (qh == ehci->async)) {
1031                 /* can't get here without STS_ASS set */
1032                 if (ehci_to_hcd(ehci)->state != HC_STATE_HALT
1033                                 && !ehci->reclaim) {
1034                         /* ... and CMD_IAAD clear */
1035                         ehci_writel(ehci, cmd & ~CMD_ASE,
1036                                     &ehci->regs->command);
1037                         wmb ();
1038                         // handshake later, if we need to
1039                         timer_action_done (ehci, TIMER_ASYNC_OFF);
1040                 }
1041                 return;
1042         }
1043
1044         qh->qh_state = QH_STATE_UNLINK;
1045         ehci->reclaim = qh = qh_get (qh);
1046
1047         prev = ehci->async;
1048         while (prev->qh_next.qh != qh)
1049                 prev = prev->qh_next.qh;
1050
1051         prev->hw_next = qh->hw_next;
1052         prev->qh_next = qh->qh_next;
1053         wmb ();
1054
1055         if (unlikely (ehci_to_hcd(ehci)->state == HC_STATE_HALT)) {
1056                 /* if (unlikely (qh->reclaim != 0))
1057                  *      this will recurse, probably not much
1058                  */
1059                 end_unlink_async (ehci);
1060                 return;
1061         }
1062
1063         ehci->reclaim_ready = 0;
1064         cmd |= CMD_IAAD;
1065         ehci_writel(ehci, cmd, &ehci->regs->command);
1066         (void)ehci_readl(ehci, &ehci->regs->command);
1067         timer_action (ehci, TIMER_IAA_WATCHDOG);
1068 }
1069
1070 /*-------------------------------------------------------------------------*/
1071
1072 static void scan_async (struct ehci_hcd *ehci)
1073 {
1074         struct ehci_qh          *qh;
1075         enum ehci_timer_action  action = TIMER_IO_WATCHDOG;
1076
1077         if (!++(ehci->stamp))
1078                 ehci->stamp++;
1079         timer_action_done (ehci, TIMER_ASYNC_SHRINK);
1080 rescan:
1081         qh = ehci->async->qh_next.qh;
1082         if (likely (qh != NULL)) {
1083                 do {
1084                         /* clean any finished work for this qh */
1085                         if (!list_empty (&qh->qtd_list)
1086                                         && qh->stamp != ehci->stamp) {
1087                                 int temp;
1088
1089                                 /* unlinks could happen here; completion
1090                                  * reporting drops the lock.  rescan using
1091                                  * the latest schedule, but don't rescan
1092                                  * qhs we already finished (no looping).
1093                                  */
1094                                 qh = qh_get (qh);
1095                                 qh->stamp = ehci->stamp;
1096                                 temp = qh_completions (ehci, qh);
1097                                 qh_put (qh);
1098                                 if (temp != 0) {
1099                                         goto rescan;
1100                                 }
1101                         }
1102
1103                         /* unlink idle entries, reducing HC PCI usage as well
1104                          * as HCD schedule-scanning costs.  delay for any qh
1105                          * we just scanned, there's a not-unusual case that it
1106                          * doesn't stay idle for long.
1107                          * (plus, avoids some kind of re-activation race.)
1108                          */
1109                         if (list_empty (&qh->qtd_list)) {
1110                                 if (qh->stamp == ehci->stamp)
1111                                         action = TIMER_ASYNC_SHRINK;
1112                                 else if (!ehci->reclaim
1113                                             && qh->qh_state == QH_STATE_LINKED)
1114                                         start_unlink_async (ehci, qh);
1115                         }
1116
1117                         qh = qh->qh_next.qh;
1118                 } while (qh);
1119         }
1120         if (action == TIMER_ASYNC_SHRINK)
1121                 timer_action (ehci, TIMER_ASYNC_SHRINK);
1122 }