drivers/usb/host/ehci-hcd.c

   1 /*
   2  * Enhanced Host Controller Interface (EHCI) driver for USB.
   3  *
   4  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
   5  *
   6  * Copyright (c) 2000-2004 by David Brownell
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of the GNU General Public License as published by the
  10  * Free Software Foundation; either version 2 of the License, or (at your
  11  * option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  16  * for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software Foundation,
  20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/pci.h>
  25 #include <linux/dmapool.h>
  26 #include <linux/kernel.h>
  27 #include <linux/delay.h>
  28 #include <linux/ioport.h>
  29 #include <linux/sched.h>
  30 #include <linux/vmalloc.h>
  31 #include <linux/errno.h>
  32 #include <linux/init.h>
  33 #include <linux/hrtimer.h>
  34 #include <linux/list.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/usb.h>
  37 #include <linux/usb/hcd.h>
  38 #include <linux/moduleparam.h>
  39 #include <linux/dma-mapping.h>
  40 #include <linux/debugfs.h>
  41 #include <linux/slab.h>
  42 #include <linux/uaccess.h>
  43
  44 #include <asm/byteorder.h>
  45 #include <asm/io.h>
  46 #include <asm/irq.h>
  47 #include <asm/unaligned.h>
  48
  49 #if defined(CONFIG_PPC_PS3)
  50 #include <asm/firmware.h>
  51 #endif
  52
  53 /*-------------------------------------------------------------------------*/
  54
  55 /*
  56  * EHCI hc_driver implementation ... experimental, incomplete.
  57  * Based on the final 1.0 register interface specification.
  58  *
  59  * USB 2.0 shows up in upcoming www.pcmcia.org technology.
  60  * First was PCMCIA, like ISA; then CardBus, which is PCI.
  61  * Next comes "CardBay", using USB 2.0 signals.
  62  *
  63  * Contains additional contributions by Brad Hards, Rory Bolt, and others.
  64  * Special thanks to Intel and VIA for providing host controllers to
  65  * test this driver on, and Cypress (including In-System Design) for
  66  * providing early devices for those host controllers to talk to!
  67  */
  68
  69 #define DRIVER_AUTHOR "David Brownell"
  70 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
  71
  72 static const char       hcd_name [] = "ehci_hcd";
  73
  74
  75 #undef VERBOSE_DEBUG
  76 #undef EHCI_URB_TRACE
  77
  78 #ifdef DEBUG
  79 #define EHCI_STATS
  80 #endif
  81
  82 /* magic numbers that can affect system performance */
  83 #define EHCI_TUNE_CERR          3       /* 0-3 qtd retries; 0 == don't stop */
  84 #define EHCI_TUNE_RL_HS         4       /* nak throttle; see 4.9 */
  85 #define EHCI_TUNE_RL_TT         0
  86 #define EHCI_TUNE_MULT_HS       1       /* 1-3 transactions/uframe; 4.10.3 */
  87 #define EHCI_TUNE_MULT_TT       1
  88 /*
  89  * Some drivers think it's safe to schedule isochronous transfers more than
  90  * 256 ms into the future (partly as a result of an old bug in the scheduling
  91  * code).  In an attempt to avoid trouble, we will use a minimum scheduling
  92  * length of 512 frames instead of 256.
  93  */
  94 #define EHCI_TUNE_FLS           1       /* (medium) 512-frame schedule */
  95
  96 #define EHCI_IAA_MSECS          10              /* arbitrary */
  97 #define EHCI_IO_JIFFIES         (HZ/10)         /* io watchdog > irq_thresh */
  98 #define EHCI_SHRINK_JIFFIES     (DIV_ROUND_UP(HZ, 200) + 1)
  99                                                 /* 5-ms async qh unlink delay */
 100
 101 /* Initial IRQ latency:  faster than hw default */
 102 static int log2_irq_thresh = 0;         // 0 to 6
 103 module_param (log2_irq_thresh, int, S_IRUGO);
 104 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
 105
 106 /* initial park setting:  slower than hw default */
 107 static unsigned park = 0;
 108 module_param (park, uint, S_IRUGO);
 109 MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
 110
 111 /* for flakey hardware, ignore overcurrent indicators */
 112 static bool ignore_oc = 0;
 113 module_param (ignore_oc, bool, S_IRUGO);
 114 MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
 115
 116 /* for link power management(LPM) feature */
 117 static unsigned int hird;
 118 module_param(hird, int, S_IRUGO);
 119 MODULE_PARM_DESC(hird, "host initiated resume duration, +1 for each 75us");
 120
 121 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
 122
 123 /*-------------------------------------------------------------------------*/
 124
 125 #include "ehci.h"
 126 #include "ehci-dbg.c"
 127 #include "pci-quirks.h"
 128
 129 /*-------------------------------------------------------------------------*/
 130
 131 static void
 132 timer_action(struct ehci_hcd *ehci, enum ehci_timer_action action)
 133 {
 134         /* Don't override timeouts which shrink or (later) disable
 135          * the async ring; just the I/O watchdog.  Note that if a
 136          * SHRINK were pending, OFF would never be requested.
 137          */
 138         if (timer_pending(&ehci->watchdog)
 139                         && (BIT(TIMER_ASYNC_SHRINK)
 140                                 & ehci->actions))
 141                 return;
 142
 143         if (!test_and_set_bit(action, &ehci->actions)) {
 144                 unsigned long t;
 145
 146                 switch (action) {
 147                 case TIMER_IO_WATCHDOG:
 148                         if (!ehci->need_io_watchdog)
 149                                 return;
 150                         t = EHCI_IO_JIFFIES;
 151                         break;
 152                 /* case TIMER_ASYNC_SHRINK: */
 153                 default:
 154                         t = EHCI_SHRINK_JIFFIES;
 155                         break;
 156                 }
 157                 mod_timer(&ehci->watchdog, t + jiffies);
 158         }
 159 }
 160
 161 /*-------------------------------------------------------------------------*/
 162
 163 /*
 164  * handshake - spin reading hc until handshake completes or fails
 165  * @ptr: address of hc register to be read
 166  * @mask: bits to look at in result of read
 167  * @done: value of those bits when handshake succeeds
 168  * @usec: timeout in microseconds
 169  *
 170  * Returns negative errno, or zero on success
 171  *
 172  * Success happens when the "mask" bits have the specified value (hardware
 173  * handshake done).  There are two failure modes:  "usec" have passed (major
 174  * hardware flakeout), or the register reads as all-ones (hardware removed).
 175  *
 176  * That last failure should_only happen in cases like physical cardbus eject
 177  * before driver shutdown. But it also seems to be caused by bugs in cardbus
 178  * bridge shutdown:  shutting down the bridge before the devices using it.
 179  */
 180 static int handshake (struct ehci_hcd *ehci, void __iomem *ptr,
 181                       u32 mask, u32 done, int usec)
 182 {
 183         u32     result;
 184
 185         do {
 186                 result = ehci_readl(ehci, ptr);
 187                 if (result == ~(u32)0)          /* card removed */
 188                         return -ENODEV;
 189                 result &= mask;
 190                 if (result == done)
 191                         return 0;
 192                 udelay (1);
 193                 usec--;
 194         } while (usec > 0);
 195         return -ETIMEDOUT;
 196 }
 197
 198 /* check TDI/ARC silicon is in host mode */
 199 static int tdi_in_host_mode (struct ehci_hcd *ehci)
 200 {
 201         u32             tmp;
 202
 203         tmp = ehci_readl(ehci, &ehci->regs->usbmode);
 204         return (tmp & 3) == USBMODE_CM_HC;
 205 }
 206
 207 /* force HC to halt state from unknown (EHCI spec section 2.3) */
 208 static int ehci_halt (struct ehci_hcd *ehci)
 209 {
 210         u32     temp = ehci_readl(ehci, &ehci->regs->status);
 211
 212         /* disable any irqs left enabled by previous code */
 213         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 214
 215         if (ehci_is_TDI(ehci) && tdi_in_host_mode(ehci) == 0) {
 216                 return 0;
 217         }
 218
 219         if ((temp & STS_HALT) != 0)
 220                 return 0;
 221
 222         /*
 223          * This routine gets called during probe before ehci->command
 224          * has been initialized, so we can't rely on its value.
 225          */
 226         ehci->command &= ~CMD_RUN;
 227         temp = ehci_readl(ehci, &ehci->regs->command);
 228         temp &= ~(CMD_RUN | CMD_IAAD);
 229         ehci_writel(ehci, temp, &ehci->regs->command);
 230         return handshake (ehci, &ehci->regs->status,
 231                           STS_HALT, STS_HALT, 16 * 125);
 232 }
 233
 234 /* put TDI/ARC silicon into EHCI mode */
 235 static void tdi_reset (struct ehci_hcd *ehci)
 236 {
 237         u32             tmp;
 238
 239         tmp = ehci_readl(ehci, &ehci->regs->usbmode);
 240         tmp |= USBMODE_CM_HC;
 241         /* The default byte access to MMR space is LE after
 242          * controller reset. Set the required endian mode
 243          * for transfer buffers to match the host microprocessor
 244          */
 245         if (ehci_big_endian_mmio(ehci))
 246                 tmp |= USBMODE_BE;
 247         ehci_writel(ehci, tmp, &ehci->regs->usbmode);
 248 }
 249
 250 /* reset a non-running (STS_HALT == 1) controller */
 251 static int ehci_reset (struct ehci_hcd *ehci)
 252 {
 253         int     retval;
 254         u32     command = ehci_readl(ehci, &ehci->regs->command);
 255
 256         /* If the EHCI debug controller is active, special care must be
 257          * taken before and after a host controller reset */
 258         if (ehci->debug && !dbgp_reset_prep())
 259                 ehci->debug = NULL;
 260
 261         command |= CMD_RESET;
 262         dbg_cmd (ehci, "reset", command);
 263         ehci_writel(ehci, command, &ehci->regs->command);
 264         ehci->rh_state = EHCI_RH_HALTED;
 265         ehci->next_statechange = jiffies;
 266         retval = handshake (ehci, &ehci->regs->command,
 267                             CMD_RESET, 0, 250 * 1000);
 268
 269         if (ehci->has_hostpc) {
 270                 ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS,
 271                                 &ehci->regs->usbmode_ex);
 272                 ehci_writel(ehci, TXFIFO_DEFAULT, &ehci->regs->txfill_tuning);
 273         }
 274         if (retval)
 275                 return retval;
 276
 277         if (ehci_is_TDI(ehci))
 278                 tdi_reset (ehci);
 279
 280         if (ehci->debug)
 281                 dbgp_external_startup();
 282
 283         ehci->port_c_suspend = ehci->suspended_ports =
 284                         ehci->resuming_ports = 0;
 285         return retval;
 286 }
 287
 288 /* idle the controller (from running) */
 289 static void ehci_quiesce (struct ehci_hcd *ehci)
 290 {
 291         u32     temp;
 292
 293         if (ehci->rh_state != EHCI_RH_RUNNING)
 294                 return;
 295
 296         /* wait for any schedule enables/disables to take effect */
 297         temp = (ehci->command << 10) & (STS_ASS | STS_PSS);
 298         handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, temp, 16 * 125);
 299
 300         /* then disable anything that's still active */
 301         ehci->command &= ~(CMD_ASE | CMD_PSE);
 302         ehci_writel(ehci, ehci->command, &ehci->regs->command);
 303
 304         /* hardware can take 16 microframes to turn off ... */
 305         handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, 0, 16 * 125);
 306 }
 307
 308 /*-------------------------------------------------------------------------*/
 309
 310 static void end_unlink_async(struct ehci_hcd *ehci);
 311 static void ehci_work(struct ehci_hcd *ehci);
 312 static void start_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
 313 static void end_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
 314
 315 #include "ehci-timer.c"
 316 #include "ehci-hub.c"
 317 #include "ehci-lpm.c"
 318 #include "ehci-mem.c"
 319 #include "ehci-q.c"
 320 #include "ehci-sched.c"
 321 #include "ehci-sysfs.c"
 322
 323 /*-------------------------------------------------------------------------*/
 324
 325 static void ehci_iaa_watchdog(unsigned long param)
 326 {
 327         struct ehci_hcd         *ehci = (struct ehci_hcd *) param;
 328         unsigned long           flags;
 329
 330         spin_lock_irqsave (&ehci->lock, flags);
 331
 332         /* Lost IAA irqs wedge things badly; seen first with a vt8235.
 333          * So we need this watchdog, but must protect it against both
 334          * (a) SMP races against real IAA firing and retriggering, and
 335          * (b) clean HC shutdown, when IAA watchdog was pending.
 336          */
 337         if (ehci->async_unlink
 338                         && !timer_pending(&ehci->iaa_watchdog)
 339                         && ehci->rh_state == EHCI_RH_RUNNING) {
 340                 u32 cmd, status;
 341
 342                 /* If we get here, IAA is *REALLY* late.  It's barely
 343                  * conceivable that the system is so busy that CMD_IAAD
 344                  * is still legitimately set, so let's be sure it's
 345                  * clear before we read STS_IAA.  (The HC should clear
 346                  * CMD_IAAD when it sets STS_IAA.)
 347                  */
 348                 cmd = ehci_readl(ehci, &ehci->regs->command);
 349
 350                 /* If IAA is set here it either legitimately triggered
 351                  * before we cleared IAAD above (but _way_ late, so we'll
 352                  * still count it as lost) ... or a silicon erratum:
 353                  * - VIA seems to set IAA without triggering the IRQ;
 354                  * - IAAD potentially cleared without setting IAA.
 355                  */
 356                 status = ehci_readl(ehci, &ehci->regs->status);
 357                 if ((status & STS_IAA) || !(cmd & CMD_IAAD)) {
 358                         COUNT (ehci->stats.lost_iaa);
 359                         ehci_writel(ehci, STS_IAA, &ehci->regs->status);
 360                 }
 361
 362                 ehci_vdbg(ehci, "IAA watchdog: status %x cmd %x\n",
 363                                 status, cmd);
 364                 end_unlink_async(ehci);
 365         }
 366
 367         spin_unlock_irqrestore(&ehci->lock, flags);
 368 }
 369
 370 static void ehci_watchdog(unsigned long param)
 371 {
 372         struct ehci_hcd         *ehci = (struct ehci_hcd *) param;
 373         unsigned long           flags;
 374
 375         spin_lock_irqsave(&ehci->lock, flags);
 376
 377         /* ehci could run by timer, without IRQs ... */
 378         ehci_work (ehci);
 379
 380         spin_unlock_irqrestore (&ehci->lock, flags);
 381 }
 382
 383 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
 384  * The firmware seems to think that powering off is a wakeup event!
 385  * This routine turns off remote wakeup and everything else, on all ports.
 386  */
 387 static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
 388 {
 389         int     port = HCS_N_PORTS(ehci->hcs_params);
 390
 391         while (port--)
 392                 ehci_writel(ehci, PORT_RWC_BITS,
 393                                 &ehci->regs->port_status[port]);
 394 }
 395
 396 /*
 397  * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
 398  * Should be called with ehci->lock held.
 399  */
 400 static void ehci_silence_controller(struct ehci_hcd *ehci)
 401 {
 402         ehci_halt(ehci);
 403         ehci_turn_off_all_ports(ehci);
 404
 405         /* make BIOS/etc use companion controller during reboot */
 406         ehci_writel(ehci, 0, &ehci->regs->configured_flag);
 407
 408         /* unblock posted writes */
 409         ehci_readl(ehci, &ehci->regs->configured_flag);
 410 }
 411
 412 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
 413  * This forcibly disables dma and IRQs, helping kexec and other cases
 414  * where the next system software may expect clean state.
 415  */
 416 static void ehci_shutdown(struct usb_hcd *hcd)
 417 {
 418         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 419
 420         del_timer_sync(&ehci->watchdog);
 421         del_timer_sync(&ehci->iaa_watchdog);
 422
 423         spin_lock_irq(&ehci->lock);
 424         ehci->rh_state = EHCI_RH_STOPPING;
 425         ehci_silence_controller(ehci);
 426         ehci->enabled_hrtimer_events = 0;
 427         spin_unlock_irq(&ehci->lock);
 428
 429         hrtimer_cancel(&ehci->hrtimer);
 430 }
 431
 432 static void ehci_port_power (struct ehci_hcd *ehci, int is_on)
 433 {
 434         unsigned port;
 435
 436         if (!HCS_PPC (ehci->hcs_params))
 437                 return;
 438
 439         ehci_dbg (ehci, "...power%s ports...\n", is_on ? "up" : "down");
 440         for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; )
 441                 (void) ehci_hub_control(ehci_to_hcd(ehci),
 442                                 is_on ? SetPortFeature : ClearPortFeature,
 443                                 USB_PORT_FEAT_POWER,
 444                                 port--, NULL, 0);
 445         /* Flush those writes */
 446         ehci_readl(ehci, &ehci->regs->command);
 447         msleep(20);
 448 }
 449
 450 /*-------------------------------------------------------------------------*/
 451
 452 /*
 453  * ehci_work is called from some interrupts, timers, and so on.
 454  * it calls driver completion functions, after dropping ehci->lock.
 455  */
 456 static void ehci_work (struct ehci_hcd *ehci)
 457 {
 458         timer_action_done (ehci, TIMER_IO_WATCHDOG);
 459
 460         /* another CPU may drop ehci->lock during a schedule scan while
 461          * it reports urb completions.  this flag guards against bogus
 462          * attempts at re-entrant schedule scanning.
 463          */
 464         if (ehci->scanning)
 465                 return;
 466         ehci->scanning = 1;
 467         if (ehci->async_count)
 468                 scan_async(ehci);
 469         if (ehci->next_uframe != -1)
 470                 scan_periodic (ehci);
 471         ehci->scanning = 0;
 472
 473         /* the IO watchdog guards against hardware or driver bugs that
 474          * misplace IRQs, and should let us run completely without IRQs.
 475          * such lossage has been observed on both VT6202 and VT8235.
 476          */
 477         if (ehci->rh_state == EHCI_RH_RUNNING &&
 478                         (ehci->async->qh_next.ptr != NULL ||
 479                          ehci->periodic_count != 0))
 480                 timer_action (ehci, TIMER_IO_WATCHDOG);
 481 }
 482
 483 /*
 484  * Called when the ehci_hcd module is removed.
 485  */
 486 static void ehci_stop (struct usb_hcd *hcd)
 487 {
 488         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 489
 490         ehci_dbg (ehci, "stop\n");
 491
 492         /* no more interrupts ... */
 493         del_timer_sync (&ehci->watchdog);
 494         del_timer_sync(&ehci->iaa_watchdog);
 495
 496         spin_lock_irq(&ehci->lock);
 497         ehci->enabled_hrtimer_events = 0;
 498         ehci_quiesce(ehci);
 499
 500         ehci_silence_controller(ehci);
 501         ehci_reset (ehci);
 502         spin_unlock_irq(&ehci->lock);
 503
 504         hrtimer_cancel(&ehci->hrtimer);
 505         remove_sysfs_files(ehci);
 506         remove_debug_files (ehci);
 507
 508         /* root hub is shut down separately (first, when possible) */
 509         spin_lock_irq (&ehci->lock);
 510         if (ehci->async)
 511                 ehci_work (ehci);
 512         end_free_itds(ehci);
 513         spin_unlock_irq (&ehci->lock);
 514         ehci_mem_cleanup (ehci);
 515
 516         if (ehci->amd_pll_fix == 1)
 517                 usb_amd_dev_put();
 518
 519 #ifdef  EHCI_STATS
 520         ehci_dbg(ehci, "irq normal %ld err %ld iaa %ld (lost %ld)\n",
 521                 ehci->stats.normal, ehci->stats.error, ehci->stats.iaa,
 522                 ehci->stats.lost_iaa);
 523         ehci_dbg (ehci, "complete %ld unlink %ld\n",
 524                 ehci->stats.complete, ehci->stats.unlink);
 525 #endif
 526
 527         dbg_status (ehci, "ehci_stop completed",
 528                     ehci_readl(ehci, &ehci->regs->status));
 529 }
 530
 531 /* one-time init, only for memory state */
 532 static int ehci_init(struct usb_hcd *hcd)
 533 {
 534         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
 535         u32                     temp;
 536         int                     retval;
 537         u32                     hcc_params;
 538         struct ehci_qh_hw       *hw;
 539
 540         spin_lock_init(&ehci->lock);
 541
 542         /*
 543          * keep io watchdog by default, those good HCDs could turn off it later
 544          */
 545         ehci->need_io_watchdog = 1;
 546         init_timer(&ehci->watchdog);
 547         ehci->watchdog.function = ehci_watchdog;
 548         ehci->watchdog.data = (unsigned long) ehci;
 549
 550         init_timer(&ehci->iaa_watchdog);
 551         ehci->iaa_watchdog.function = ehci_iaa_watchdog;
 552         ehci->iaa_watchdog.data = (unsigned long) ehci;
 553
 554         hrtimer_init(&ehci->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
 555         ehci->hrtimer.function = ehci_hrtimer_func;
 556         ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT;
 557
 558         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 559
 560         /*
 561          * by default set standard 80% (== 100 usec/uframe) max periodic
 562          * bandwidth as required by USB 2.0
 563          */
 564         ehci->uframe_periodic_max = 100;
 565
 566         /*
 567          * hw default: 1K periodic list heads, one per frame.
 568          * periodic_size can shrink by USBCMD update if hcc_params allows.
 569          */
 570         ehci->periodic_size = DEFAULT_I_TDPS;
 571         INIT_LIST_HEAD(&ehci->cached_itd_list);
 572         INIT_LIST_HEAD(&ehci->cached_sitd_list);
 573
 574         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 575                 /* periodic schedule size can be smaller than default */
 576                 switch (EHCI_TUNE_FLS) {
 577                 case 0: ehci->periodic_size = 1024; break;
 578                 case 1: ehci->periodic_size = 512; break;
 579                 case 2: ehci->periodic_size = 256; break;
 580                 default:        BUG();
 581                 }
 582         }
 583         if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
 584                 return retval;
 585
 586         /* controllers may cache some of the periodic schedule ... */
 587         if (HCC_ISOC_CACHE(hcc_params))         // full frame cache
 588                 ehci->i_thresh = 2 + 8;
 589         else                                    // N microframes cached
 590                 ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
 591
 592         ehci->next_uframe = -1;
 593         ehci->clock_frame = -1;
 594
 595         /*
 596          * dedicate a qh for the async ring head, since we couldn't unlink
 597          * a 'real' qh without stopping the async schedule [4.8].  use it
 598          * as the 'reclamation list head' too.
 599          * its dummy is used in hw_alt_next of many tds, to prevent the qh
 600          * from automatically advancing to the next td after short reads.
 601          */
 602         ehci->async->qh_next.qh = NULL;
 603         hw = ehci->async->hw;
 604         hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
 605         hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
 606 #if defined(CONFIG_PPC_PS3)
 607         hw->hw_info1 |= cpu_to_hc32(ehci, QH_INACTIVATE);
 608 #endif
 609         hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
 610         hw->hw_qtd_next = EHCI_LIST_END(ehci);
 611         ehci->async->qh_state = QH_STATE_LINKED;
 612         hw->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
 613
 614         /* clear interrupt enables, set irq latency */
 615         if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
 616                 log2_irq_thresh = 0;
 617         temp = 1 << (16 + log2_irq_thresh);
 618         if (HCC_PER_PORT_CHANGE_EVENT(hcc_params)) {
 619                 ehci->has_ppcd = 1;
 620                 ehci_dbg(ehci, "enable per-port change event\n");
 621                 temp |= CMD_PPCEE;
 622         }
 623         if (HCC_CANPARK(hcc_params)) {
 624                 /* HW default park == 3, on hardware that supports it (like
 625                  * NVidia and ALI silicon), maximizes throughput on the async
 626                  * schedule by avoiding QH fetches between transfers.
 627                  *
 628                  * With fast usb storage devices and NForce2, "park" seems to
 629                  * make problems:  throughput reduction (!), data errors...
 630                  */
 631                 if (park) {
 632                         park = min(park, (unsigned) 3);
 633                         temp |= CMD_PARK;
 634                         temp |= park << 8;
 635                 }
 636                 ehci_dbg(ehci, "park %d\n", park);
 637         }
 638         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 639                 /* periodic schedule size can be smaller than default */
 640                 temp &= ~(3 << 2);
 641                 temp |= (EHCI_TUNE_FLS << 2);
 642         }
 643         if (HCC_LPM(hcc_params)) {
 644                 /* support link power management EHCI 1.1 addendum */
 645                 ehci_dbg(ehci, "support lpm\n");
 646                 ehci->has_lpm = 1;
 647                 if (hird > 0xf) {
 648                         ehci_dbg(ehci, "hird %d invalid, use default 0",
 649                         hird);
 650                         hird = 0;
 651                 }
 652                 temp |= hird << 24;
 653         }
 654         ehci->command = temp;
 655
 656         /* Accept arbitrarily long scatter-gather lists */
 657         if (!(hcd->driver->flags & HCD_LOCAL_MEM))
 658                 hcd->self.sg_tablesize = ~0;
 659         return 0;
 660 }
 661
 662 /* start HC running; it's halted, ehci_init() has been run (once) */
 663 static int ehci_run (struct usb_hcd *hcd)
 664 {
 665         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 666         u32                     temp;
 667         u32                     hcc_params;
 668
 669         hcd->uses_new_polling = 1;
 670
 671         /* EHCI spec section 4.1 */
 672
 673         ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
 674         ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
 675
 676         /*
 677          * hcc_params controls whether ehci->regs->segment must (!!!)
 678          * be used; it constrains QH/ITD/SITD and QTD locations.
 679          * pci_pool consistent memory always uses segment zero.
 680          * streaming mappings for I/O buffers, like pci_map_single(),
 681          * can return segments above 4GB, if the device allows.
 682          *
 683          * NOTE:  the dma mask is visible through dma_supported(), so
 684          * drivers can pass this info along ... like NETIF_F_HIGHDMA,
 685          * Scsi_Host.highmem_io, and so forth.  It's readonly to all
 686          * host side drivers though.
 687          */
 688         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 689         if (HCC_64BIT_ADDR(hcc_params)) {
 690                 ehci_writel(ehci, 0, &ehci->regs->segment);
 691 #if 0
 692 // this is deeply broken on almost all architectures
 693                 if (!dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)))
 694                         ehci_info(ehci, "enabled 64bit DMA\n");
 695 #endif
 696         }
 697
 698
 699         // Philips, Intel, and maybe others need CMD_RUN before the
 700         // root hub will detect new devices (why?); NEC doesn't
 701         ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
 702         ehci->command |= CMD_RUN;
 703         ehci_writel(ehci, ehci->command, &ehci->regs->command);
 704         dbg_cmd (ehci, "init", ehci->command);
 705
 706         /*
 707          * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
 708          * are explicitly handed to companion controller(s), so no TT is
 709          * involved with the root hub.  (Except where one is integrated,
 710          * and there's no companion controller unless maybe for USB OTG.)
 711          *
 712          * Turning on the CF flag will transfer ownership of all ports
 713          * from the companions to the EHCI controller.  If any of the
 714          * companions are in the middle of a port reset at the time, it
 715          * could cause trouble.  Write-locking ehci_cf_port_reset_rwsem
 716          * guarantees that no resets are in progress.  After we set CF,
 717          * a short delay lets the hardware catch up; new resets shouldn't
 718          * be started before the port switching actions could complete.
 719          */
 720         down_write(&ehci_cf_port_reset_rwsem);
 721         ehci->rh_state = EHCI_RH_RUNNING;
 722         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
 723         ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
 724         msleep(5);
 725         up_write(&ehci_cf_port_reset_rwsem);
 726         ehci->last_periodic_enable = ktime_get_real();
 727
 728         temp = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
 729         ehci_info (ehci,
 730                 "USB %x.%x started, EHCI %x.%02x%s\n",
 731                 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
 732                 temp >> 8, temp & 0xff,
 733                 ignore_oc ? ", overcurrent ignored" : "");
 734
 735         ehci_writel(ehci, INTR_MASK,
 736                     &ehci->regs->intr_enable); /* Turn On Interrupts */
 737
 738         /* GRR this is run-once init(), being done every time the HC starts.
 739          * So long as they're part of class devices, we can't do it init()
 740          * since the class device isn't created that early.
 741          */
 742         create_debug_files(ehci);
 743         create_sysfs_files(ehci);
 744
 745         return 0;
 746 }
 747
 748 static int ehci_setup(struct usb_hcd *hcd)
 749 {
 750         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 751         int retval;
 752
 753         ehci->regs = (void __iomem *)ehci->caps +
 754             HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
 755         dbg_hcs_params(ehci, "reset");
 756         dbg_hcc_params(ehci, "reset");
 757
 758         /* cache this readonly data; minimize chip reads */
 759         ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
 760
 761         ehci->sbrn = HCD_USB2;
 762
 763         /* data structure init */
 764         retval = ehci_init(hcd);
 765         if (retval)
 766                 return retval;
 767
 768         retval = ehci_halt(ehci);
 769         if (retval)
 770                 return retval;
 771
 772         if (ehci_is_TDI(ehci))
 773                 tdi_reset(ehci);
 774
 775         ehci_reset(ehci);
 776
 777         return 0;
 778 }
 779
 780 /*-------------------------------------------------------------------------*/
 781
 782 static irqreturn_t ehci_irq (struct usb_hcd *hcd)
 783 {
 784         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 785         u32                     status, masked_status, pcd_status = 0, cmd;
 786         int                     bh;
 787
 788         spin_lock (&ehci->lock);
 789
 790         status = ehci_readl(ehci, &ehci->regs->status);
 791
 792         /* e.g. cardbus physical eject */
 793         if (status == ~(u32) 0) {
 794                 ehci_dbg (ehci, "device removed\n");
 795                 goto dead;
 796         }
 797
 798         /*
 799          * We don't use STS_FLR, but some controllers don't like it to
 800          * remain on, so mask it out along with the other status bits.
 801          */
 802         masked_status = status & (INTR_MASK | STS_FLR);
 803
 804         /* Shared IRQ? */
 805         if (!masked_status || unlikely(ehci->rh_state == EHCI_RH_HALTED)) {
 806                 spin_unlock(&ehci->lock);
 807                 return IRQ_NONE;
 808         }
 809
 810         /* clear (just) interrupts */
 811         ehci_writel(ehci, masked_status, &ehci->regs->status);
 812         cmd = ehci_readl(ehci, &ehci->regs->command);
 813         bh = 0;
 814
 815 #ifdef  VERBOSE_DEBUG
 816         /* unrequested/ignored: Frame List Rollover */
 817         dbg_status (ehci, "irq", status);
 818 #endif
 819
 820         /* INT, ERR, and IAA interrupt rates can be throttled */
 821
 822         /* normal [4.15.1.2] or error [4.15.1.1] completion */
 823         if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
 824                 if (likely ((status & STS_ERR) == 0))
 825                         COUNT (ehci->stats.normal);
 826                 else
 827                         COUNT (ehci->stats.error);
 828                 bh = 1;
 829         }
 830
 831         /* complete the unlinking of some qh [4.15.2.3] */
 832         if (status & STS_IAA) {
 833                 /* guard against (alleged) silicon errata */
 834                 if (cmd & CMD_IAAD)
 835                         ehci_dbg(ehci, "IAA with IAAD still set?\n");
 836                 if (ehci->async_unlink) {
 837                         COUNT(ehci->stats.iaa);
 838                         end_unlink_async(ehci);
 839                 } else
 840                         ehci_dbg(ehci, "IAA with nothing unlinked?\n");
 841         }
 842
 843         /* remote wakeup [4.3.1] */
 844         if (status & STS_PCD) {
 845                 unsigned        i = HCS_N_PORTS (ehci->hcs_params);
 846                 u32             ppcd = 0;
 847
 848                 /* kick root hub later */
 849                 pcd_status = status;
 850
 851                 /* resume root hub? */
 852                 if (ehci->rh_state == EHCI_RH_SUSPENDED)
 853                         usb_hcd_resume_root_hub(hcd);
 854
 855                 /* get per-port change detect bits */
 856                 if (ehci->has_ppcd)
 857                         ppcd = status >> 16;
 858
 859                 while (i--) {
 860                         int pstatus;
 861
 862                         /* leverage per-port change bits feature */
 863                         if (ehci->has_ppcd && !(ppcd & (1 << i)))
 864                                 continue;
 865                         pstatus = ehci_readl(ehci,
 866                                          &ehci->regs->port_status[i]);
 867
 868                         if (pstatus & PORT_OWNER)
 869                                 continue;
 870                         if (!(test_bit(i, &ehci->suspended_ports) &&
 871                                         ((pstatus & PORT_RESUME) ||
 872                                                 !(pstatus & PORT_SUSPEND)) &&
 873                                         (pstatus & PORT_PE) &&
 874                                         ehci->reset_done[i] == 0))
 875                                 continue;
 876
 877                         /* start 20 msec resume signaling from this port,
 878                          * and make khubd collect PORT_STAT_C_SUSPEND to
 879                          * stop that signaling.  Use 5 ms extra for safety,
 880                          * like usb_port_resume() does.
 881                          */
 882                         ehci->reset_done[i] = jiffies + msecs_to_jiffies(25);
 883                         set_bit(i, &ehci->resuming_ports);
 884                         ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
 885                         mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
 886                 }
 887         }
 888
 889         /* PCI errors [4.15.2.4] */
 890         if (unlikely ((status & STS_FATAL) != 0)) {
 891                 ehci_err(ehci, "fatal error\n");
 892                 dbg_cmd(ehci, "fatal", cmd);
 893                 dbg_status(ehci, "fatal", status);
 894 dead:
 895                 usb_hc_died(hcd);
 896
 897                 /* Don't let the controller do anything more */
 898                 ehci->rh_state = EHCI_RH_STOPPING;
 899                 ehci->command &= ~(CMD_RUN | CMD_ASE | CMD_PSE);
 900                 ehci_writel(ehci, ehci->command, &ehci->regs->command);
 901                 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 902                 ehci_handle_controller_death(ehci);
 903
 904                 /* Handle completions when the controller stops */
 905                 bh = 0;
 906         }
 907
 908         if (bh)
 909                 ehci_work (ehci);
 910         spin_unlock (&ehci->lock);
 911         if (pcd_status)
 912                 usb_hcd_poll_rh_status(hcd);
 913         return IRQ_HANDLED;
 914 }
 915
 916 /*-------------------------------------------------------------------------*/
 917
 918 /*
 919  * non-error returns are a promise to giveback() the urb later
 920  * we drop ownership so next owner (or urb unlink) can get it
 921  *
 922  * urb + dev is in hcd.self.controller.urb_list
 923  * we're queueing TDs onto software and hardware lists
 924  *
 925  * hcd-specific init for hcpriv hasn't been done yet
 926  *
 927  * NOTE:  control, bulk, and interrupt share the same code to append TDs
 928  * to a (possibly active) QH, and the same QH scanning code.
 929  */
 930 static int ehci_urb_enqueue (
 931         struct usb_hcd  *hcd,
 932         struct urb      *urb,
 933         gfp_t           mem_flags
 934 ) {
 935         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 936         struct list_head        qtd_list;
 937
 938         INIT_LIST_HEAD (&qtd_list);
 939
 940         switch (usb_pipetype (urb->pipe)) {
 941         case PIPE_CONTROL:
 942                 /* qh_completions() code doesn't handle all the fault cases
 943                  * in multi-TD control transfers.  Even 1KB is rare anyway.
 944                  */
 945                 if (urb->transfer_buffer_length > (16 * 1024))
 946                         return -EMSGSIZE;
 947                 /* FALLTHROUGH */
 948         /* case PIPE_BULK: */
 949         default:
 950                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 951                         return -ENOMEM;
 952                 return submit_async(ehci, urb, &qtd_list, mem_flags);
 953
 954         case PIPE_INTERRUPT:
 955                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 956                         return -ENOMEM;
 957                 return intr_submit(ehci, urb, &qtd_list, mem_flags);
 958
 959         case PIPE_ISOCHRONOUS:
 960                 if (urb->dev->speed == USB_SPEED_HIGH)
 961                         return itd_submit (ehci, urb, mem_flags);
 962                 else
 963                         return sitd_submit (ehci, urb, mem_flags);
 964         }
 965 }
 966
 967 static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
 968 {
 969         /* failfast */
 970         if (ehci->rh_state < EHCI_RH_RUNNING && ehci->async_unlink)
 971                 end_unlink_async(ehci);
 972
 973         /* If the QH isn't linked then there's nothing we can do
 974          * unless we were called during a giveback, in which case
 975          * qh_completions() has to deal with it.
 976          */
 977         if (qh->qh_state != QH_STATE_LINKED) {
 978                 if (qh->qh_state == QH_STATE_COMPLETING)
 979                         qh->needs_rescan = 1;
 980                 return;
 981         }
 982
 983         /* defer till later if busy */
 984         if (ehci->async_unlink) {
 985                 qh->qh_state = QH_STATE_UNLINK_WAIT;
 986                 ehci->async_unlink_last->unlink_next = qh;
 987                 ehci->async_unlink_last = qh;
 988
 989         /* start IAA cycle */
 990         } else
 991                 start_unlink_async (ehci, qh);
 992 }
 993
 994 /* remove from hardware lists
 995  * completions normally happen asynchronously
 996  */
 997
 998 static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
 999 {
1000         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
1001         struct ehci_qh          *qh;
1002         unsigned long           flags;
1003         int                     rc;
1004
1005         spin_lock_irqsave (&ehci->lock, flags);
1006         rc = usb_hcd_check_unlink_urb(hcd, urb, status);
1007         if (rc)
1008                 goto done;
1009
1010         switch (usb_pipetype (urb->pipe)) {
1011         // case PIPE_CONTROL:
1012         // case PIPE_BULK:
1013         default:
1014                 qh = (struct ehci_qh *) urb->hcpriv;
1015                 if (!qh)
1016                         break;
1017                 switch (qh->qh_state) {
1018                 case QH_STATE_LINKED:
1019                 case QH_STATE_COMPLETING:
1020                         unlink_async(ehci, qh);
1021                         break;
1022                 case QH_STATE_UNLINK:
1023                 case QH_STATE_UNLINK_WAIT:
1024                         /* already started */
1025                         break;
1026                 case QH_STATE_IDLE:
1027                         /* QH might be waiting for a Clear-TT-Buffer */
1028                         qh_completions(ehci, qh);
1029                         break;
1030                 }
1031                 break;
1032
1033         case PIPE_INTERRUPT:
1034                 qh = (struct ehci_qh *) urb->hcpriv;
1035                 if (!qh)
1036                         break;
1037                 switch (qh->qh_state) {
1038                 case QH_STATE_LINKED:
1039                 case QH_STATE_COMPLETING:
1040                         start_unlink_intr(ehci, qh);
1041                         break;
1042                 case QH_STATE_IDLE:
1043                         qh_completions (ehci, qh);
1044                         break;
1045                 default:
1046                         ehci_dbg (ehci, "bogus qh %p state %d\n",
1047                                         qh, qh->qh_state);
1048                         goto done;
1049                 }
1050                 break;
1051
1052         case PIPE_ISOCHRONOUS:
1053                 // itd or sitd ...
1054
1055                 // wait till next completion, do it then.
1056                 // completion irqs can wait up to 1024 msec,
1057                 break;
1058         }
1059 done:
1060         spin_unlock_irqrestore (&ehci->lock, flags);
1061         return rc;
1062 }
1063
1064 /*-------------------------------------------------------------------------*/
1065
1066 // bulk qh holds the data toggle
1067
1068 static void
1069 ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1070 {
1071         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
1072         unsigned long           flags;
1073         struct ehci_qh          *qh, *tmp;
1074
1075         /* ASSERT:  any requests/urbs are being unlinked */
1076         /* ASSERT:  nobody can be submitting urbs for this any more */
1077
1078 rescan:
1079         spin_lock_irqsave (&ehci->lock, flags);
1080         qh = ep->hcpriv;
1081         if (!qh)
1082                 goto done;
1083
1084         /* endpoints can be iso streams.  for now, we don't
1085          * accelerate iso completions ... so spin a while.
1086          */
1087         if (qh->hw == NULL) {
1088                 struct ehci_iso_stream  *stream = ep->hcpriv;
1089
1090                 if (!list_empty(&stream->td_list))
1091                         goto idle_timeout;
1092
1093                 /* BUG_ON(!list_empty(&stream->free_list)); */
1094                 kfree(stream);
1095                 goto done;
1096         }
1097
1098         if (ehci->rh_state < EHCI_RH_RUNNING)
1099                 qh->qh_state = QH_STATE_IDLE;
1100         switch (qh->qh_state) {
1101         case QH_STATE_LINKED:
1102         case QH_STATE_COMPLETING:
1103                 for (tmp = ehci->async->qh_next.qh;
1104                                 tmp && tmp != qh;
1105                                 tmp = tmp->qh_next.qh)
1106                         continue;
1107                 /* periodic qh self-unlinks on empty, and a COMPLETING qh
1108                  * may already be unlinked.
1109                  */
1110                 if (tmp)
1111                         unlink_async(ehci, qh);
1112                 /* FALL THROUGH */
1113         case QH_STATE_UNLINK:           /* wait for hw to finish? */
1114         case QH_STATE_UNLINK_WAIT:
1115 idle_timeout:
1116                 spin_unlock_irqrestore (&ehci->lock, flags);
1117                 schedule_timeout_uninterruptible(1);
1118                 goto rescan;
1119         case QH_STATE_IDLE:             /* fully unlinked */
1120                 if (qh->clearing_tt)
1121                         goto idle_timeout;
1122                 if (list_empty (&qh->qtd_list)) {
1123                         qh_destroy(ehci, qh);
1124                         break;
1125                 }
1126                 /* else FALL THROUGH */
1127         default:
1128                 /* caller was supposed to have unlinked any requests;
1129                  * that's not our job.  just leak this memory.
1130                  */
1131                 ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
1132                         qh, ep->desc.bEndpointAddress, qh->qh_state,
1133                         list_empty (&qh->qtd_list) ? "" : "(has tds)");
1134                 break;
1135         }
1136  done:
1137         ep->hcpriv = NULL;
1138         spin_unlock_irqrestore (&ehci->lock, flags);
1139 }
1140
1141 static void
1142 ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1143 {
1144         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1145         struct ehci_qh          *qh;
1146         int                     eptype = usb_endpoint_type(&ep->desc);
1147         int                     epnum = usb_endpoint_num(&ep->desc);
1148         int                     is_out = usb_endpoint_dir_out(&ep->desc);
1149         unsigned long           flags;
1150
1151         if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
1152                 return;
1153
1154         spin_lock_irqsave(&ehci->lock, flags);
1155         qh = ep->hcpriv;
1156
1157         /* For Bulk and Interrupt endpoints we maintain the toggle state
1158          * in the hardware; the toggle bits in udev aren't used at all.
1159          * When an endpoint is reset by usb_clear_halt() we must reset
1160          * the toggle bit in the QH.
1161          */
1162         if (qh) {
1163                 usb_settoggle(qh->dev, epnum, is_out, 0);
1164                 if (!list_empty(&qh->qtd_list)) {
1165                         WARN_ONCE(1, "clear_halt for a busy endpoint\n");
1166                 } else if (qh->qh_state == QH_STATE_LINKED ||
1167                                 qh->qh_state == QH_STATE_COMPLETING) {
1168
1169                         /* The toggle value in the QH can't be updated
1170                          * while the QH is active.  Unlink it now;
1171                          * re-linking will call qh_refresh().
1172                          */
1173                         if (eptype == USB_ENDPOINT_XFER_BULK)
1174                                 unlink_async(ehci, qh);
1175                         else
1176                                 start_unlink_intr(ehci, qh);
1177                 }
1178         }
1179         spin_unlock_irqrestore(&ehci->lock, flags);
1180 }
1181
1182 static int ehci_get_frame (struct usb_hcd *hcd)
1183 {
1184         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
1185         return (ehci_read_frame_index(ehci) >> 3) % ehci->periodic_size;
1186 }
1187
1188 /*-------------------------------------------------------------------------*/
1189
1190 #ifdef  CONFIG_PM
1191
1192 /* suspend/resume, section 4.3 */
1193
1194 /* These routines handle the generic parts of controller suspend/resume */
1195
1196 static int __maybe_unused ehci_suspend(struct usb_hcd *hcd, bool do_wakeup)
1197 {
1198         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1199
1200         if (time_before(jiffies, ehci->next_statechange))
1201                 msleep(10);
1202
1203         /*
1204          * Root hub was already suspended.  Disable IRQ emission and
1205          * mark HW unaccessible.  The PM and USB cores make sure that
1206          * the root hub is either suspended or stopped.
1207          */
1208         ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup);
1209
1210         spin_lock_irq(&ehci->lock);
1211         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
1212         (void) ehci_readl(ehci, &ehci->regs->intr_enable);
1213
1214         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1215         spin_unlock_irq(&ehci->lock);
1216
1217         return 0;
1218 }
1219
1220 /* Returns 0 if power was preserved, 1 if power was lost */
1221 static int __maybe_unused ehci_resume(struct usb_hcd *hcd, bool hibernated)
1222 {
1223         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1224
1225         if (time_before(jiffies, ehci->next_statechange))
1226                 msleep(100);
1227
1228         /* Mark hardware accessible again as we are back to full power by now */
1229         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1230
1231         /*
1232          * If CF is still set and we aren't resuming from hibernation
1233          * then we maintained suspend power.
1234          * Just undo the effect of ehci_suspend().
1235          */
1236         if (ehci_readl(ehci, &ehci->regs->configured_flag) == FLAG_CF &&
1237                         !hibernated) {
1238                 int     mask = INTR_MASK;
1239
1240                 ehci_prepare_ports_for_controller_resume(ehci);
1241                 if (!hcd->self.root_hub->do_remote_wakeup)
1242                         mask &= ~STS_PCD;
1243                 ehci_writel(ehci, mask, &ehci->regs->intr_enable);
1244                 ehci_readl(ehci, &ehci->regs->intr_enable);
1245                 return 0;
1246         }
1247
1248         /*
1249          * Else reset, to cope with power loss or resume from hibernation
1250          * having let the firmware kick in during reboot.
1251          */
1252         usb_root_hub_lost_power(hcd->self.root_hub);
1253         (void) ehci_halt(ehci);
1254         (void) ehci_reset(ehci);
1255
1256         ehci_writel(ehci, ehci->command, &ehci->regs->command);
1257         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
1258         ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
1259
1260         /* here we "know" root ports should always stay powered */
1261         ehci_port_power(ehci, 1);
1262
1263         ehci->rh_state = EHCI_RH_SUSPENDED;
1264         return 1;
1265 }
1266
1267 #endif
1268
1269 /*-------------------------------------------------------------------------*/
1270
1271 /*
1272  * The EHCI in ChipIdea HDRC cannot be a separate module or device,
1273  * because its registers (and irq) are shared between host/gadget/otg
1274  * functions  and in order to facilitate role switching we cannot
1275  * give the ehci driver exclusive access to those.
1276  */
1277 #ifndef CHIPIDEA_EHCI
1278
1279 MODULE_DESCRIPTION(DRIVER_DESC);
1280 MODULE_AUTHOR (DRIVER_AUTHOR);
1281 MODULE_LICENSE ("GPL");
1282
1283 #ifdef CONFIG_PCI
1284 #include "ehci-pci.c"
1285 #define PCI_DRIVER              ehci_pci_driver
1286 #endif
1287
1288 #ifdef CONFIG_USB_EHCI_FSL
1289 #include "ehci-fsl.c"
1290 #define PLATFORM_DRIVER         ehci_fsl_driver
1291 #endif
1292
1293 #ifdef CONFIG_USB_EHCI_MXC
1294 #include "ehci-mxc.c"
1295 #define PLATFORM_DRIVER         ehci_mxc_driver
1296 #endif
1297
1298 #ifdef CONFIG_USB_EHCI_SH
1299 #include "ehci-sh.c"
1300 #define PLATFORM_DRIVER         ehci_hcd_sh_driver
1301 #endif
1302
1303 #ifdef CONFIG_MIPS_ALCHEMY
1304 #include "ehci-au1xxx.c"
1305 #define PLATFORM_DRIVER         ehci_hcd_au1xxx_driver
1306 #endif
1307
1308 #ifdef CONFIG_USB_EHCI_HCD_OMAP
1309 #include "ehci-omap.c"
1310 #define        PLATFORM_DRIVER         ehci_hcd_omap_driver
1311 #endif
1312
1313 #ifdef CONFIG_PPC_PS3
1314 #include "ehci-ps3.c"
1315 #define PS3_SYSTEM_BUS_DRIVER   ps3_ehci_driver
1316 #endif
1317
1318 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1319 #include "ehci-ppc-of.c"
1320 #define OF_PLATFORM_DRIVER      ehci_hcd_ppc_of_driver
1321 #endif
1322
1323 #ifdef CONFIG_XPS_USB_HCD_XILINX
1324 #include "ehci-xilinx-of.c"
1325 #define XILINX_OF_PLATFORM_DRIVER       ehci_hcd_xilinx_of_driver
1326 #endif
1327
1328 #ifdef CONFIG_PLAT_ORION
1329 #include "ehci-orion.c"
1330 #define PLATFORM_DRIVER         ehci_orion_driver
1331 #endif
1332
1333 #ifdef CONFIG_ARCH_IXP4XX
1334 #include "ehci-ixp4xx.c"
1335 #define PLATFORM_DRIVER         ixp4xx_ehci_driver
1336 #endif
1337
1338 #ifdef CONFIG_USB_W90X900_EHCI
1339 #include "ehci-w90x900.c"
1340 #define PLATFORM_DRIVER         ehci_hcd_w90x900_driver
1341 #endif
1342
1343 #ifdef CONFIG_ARCH_AT91
1344 #include "ehci-atmel.c"
1345 #define PLATFORM_DRIVER         ehci_atmel_driver
1346 #endif
1347
1348 #ifdef CONFIG_USB_OCTEON_EHCI
1349 #include "ehci-octeon.c"
1350 #define PLATFORM_DRIVER         ehci_octeon_driver
1351 #endif
1352
1353 #ifdef CONFIG_USB_CNS3XXX_EHCI
1354 #include "ehci-cns3xxx.c"
1355 #define PLATFORM_DRIVER         cns3xxx_ehci_driver
1356 #endif
1357
1358 #ifdef CONFIG_ARCH_VT8500
1359 #include "ehci-vt8500.c"
1360 #define PLATFORM_DRIVER         vt8500_ehci_driver
1361 #endif
1362
1363 #ifdef CONFIG_PLAT_SPEAR
1364 #include "ehci-spear.c"
1365 #define PLATFORM_DRIVER         spear_ehci_hcd_driver
1366 #endif
1367
1368 #ifdef CONFIG_USB_EHCI_MSM
1369 #include "ehci-msm.c"
1370 #define PLATFORM_DRIVER         ehci_msm_driver
1371 #endif
1372
1373 #ifdef CONFIG_USB_EHCI_HCD_PMC_MSP
1374 #include "ehci-pmcmsp.c"
1375 #define PLATFORM_DRIVER         ehci_hcd_msp_driver
1376 #endif
1377
1378 #ifdef CONFIG_USB_EHCI_TEGRA
1379 #include "ehci-tegra.c"
1380 #define PLATFORM_DRIVER         tegra_ehci_driver
1381 #endif
1382
1383 #ifdef CONFIG_USB_EHCI_S5P
1384 #include "ehci-s5p.c"
1385 #define PLATFORM_DRIVER         s5p_ehci_driver
1386 #endif
1387
1388 #ifdef CONFIG_SPARC_LEON
1389 #include "ehci-grlib.c"
1390 #define PLATFORM_DRIVER         ehci_grlib_driver
1391 #endif
1392
1393 #ifdef CONFIG_CPU_XLR
1394 #include "ehci-xls.c"
1395 #define PLATFORM_DRIVER         ehci_xls_driver
1396 #endif
1397
1398 #ifdef CONFIG_USB_EHCI_MV
1399 #include "ehci-mv.c"
1400 #define        PLATFORM_DRIVER         ehci_mv_driver
1401 #endif
1402
1403 #ifdef CONFIG_MACH_LOONGSON1
1404 #include "ehci-ls1x.c"
1405 #define PLATFORM_DRIVER         ehci_ls1x_driver
1406 #endif
1407
1408 #ifdef CONFIG_MIPS_SEAD3
1409 #include "ehci-sead3.c"
1410 #define PLATFORM_DRIVER         ehci_hcd_sead3_driver
1411 #endif
1412
1413 #ifdef CONFIG_USB_EHCI_HCD_PLATFORM
1414 #include "ehci-platform.c"
1415 #define PLATFORM_DRIVER         ehci_platform_driver
1416 #endif
1417
1418 #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
1419     !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) && \
1420     !defined(XILINX_OF_PLATFORM_DRIVER)
1421 #error "missing bus glue for ehci-hcd"
1422 #endif
1423
1424 static int __init ehci_hcd_init(void)
1425 {
1426         int retval = 0;
1427
1428         if (usb_disabled())
1429                 return -ENODEV;
1430
1431         printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1432         set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1433         if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
1434                         test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
1435                 printk(KERN_WARNING "Warning! ehci_hcd should always be loaded"
1436                                 " before uhci_hcd and ohci_hcd, not after\n");
1437
1438         pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1439                  hcd_name,
1440                  sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1441                  sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1442
1443 #ifdef DEBUG
1444         ehci_debug_root = debugfs_create_dir("ehci", usb_debug_root);
1445         if (!ehci_debug_root) {
1446                 retval = -ENOENT;
1447                 goto err_debug;
1448         }
1449 #endif
1450
1451 #ifdef PLATFORM_DRIVER
1452         retval = platform_driver_register(&PLATFORM_DRIVER);
1453         if (retval < 0)
1454                 goto clean0;
1455 #endif
1456
1457 #ifdef PCI_DRIVER
1458         retval = pci_register_driver(&PCI_DRIVER);
1459         if (retval < 0)
1460                 goto clean1;
1461 #endif
1462
1463 #ifdef PS3_SYSTEM_BUS_DRIVER
1464         retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1465         if (retval < 0)
1466                 goto clean2;
1467 #endif
1468
1469 #ifdef OF_PLATFORM_DRIVER
1470         retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1471         if (retval < 0)
1472                 goto clean3;
1473 #endif
1474
1475 #ifdef XILINX_OF_PLATFORM_DRIVER
1476         retval = platform_driver_register(&XILINX_OF_PLATFORM_DRIVER);
1477         if (retval < 0)
1478                 goto clean4;
1479 #endif
1480         return retval;
1481
1482 #ifdef XILINX_OF_PLATFORM_DRIVER
1483         /* platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER); */
1484 clean4:
1485 #endif
1486 #ifdef OF_PLATFORM_DRIVER
1487         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1488 clean3:
1489 #endif
1490 #ifdef PS3_SYSTEM_BUS_DRIVER
1491         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1492 clean2:
1493 #endif
1494 #ifdef PCI_DRIVER
1495         pci_unregister_driver(&PCI_DRIVER);
1496 clean1:
1497 #endif
1498 #ifdef PLATFORM_DRIVER
1499         platform_driver_unregister(&PLATFORM_DRIVER);
1500 clean0:
1501 #endif
1502 #ifdef DEBUG
1503         debugfs_remove(ehci_debug_root);
1504         ehci_debug_root = NULL;
1505 err_debug:
1506 #endif
1507         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1508         return retval;
1509 }
1510 module_init(ehci_hcd_init);
1511
1512 static void __exit ehci_hcd_cleanup(void)
1513 {
1514 #ifdef XILINX_OF_PLATFORM_DRIVER
1515         platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER);
1516 #endif
1517 #ifdef OF_PLATFORM_DRIVER
1518         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1519 #endif
1520 #ifdef PLATFORM_DRIVER
1521         platform_driver_unregister(&PLATFORM_DRIVER);
1522 #endif
1523 #ifdef PCI_DRIVER
1524         pci_unregister_driver(&PCI_DRIVER);
1525 #endif
1526 #ifdef PS3_SYSTEM_BUS_DRIVER
1527         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1528 #endif
1529 #ifdef DEBUG
1530         debugfs_remove(ehci_debug_root);
1531 #endif
1532         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1533 }
1534 module_exit(ehci_hcd_cleanup);
1535
1536 #endif /* CHIPIDEA_EHCI */