drivers/usb/host/ehci-fsl.c

   1 /*
   2  * Copyright 2005-2009 MontaVista Software, Inc.
   3  * Copyright 2008,2012,2015      Freescale Semiconductor, Inc.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License as published by the
   7  * Free Software Foundation; either version 2 of the License, or (at your
   8  * option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful, but
  11  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  12  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software Foundation,
  17  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18  *
  19  * Ported to 834x by Randy Vinson <rvinson@mvista.com> using code provided
  20  * by Hunter Wu.
  21  * Power Management support by Dave Liu <daveliu@freescale.com>,
  22  * Jerry Huang <Chang-Ming.Huang@freescale.com> and
  23  * Anton Vorontsov <avorontsov@ru.mvista.com>.
  24  */
  25
  26 #include <linux/kernel.h>
  27 #include <linux/module.h>
  28 #include <linux/types.h>
  29 #include <linux/delay.h>
  30 #include <linux/pm.h>
  31 #include <linux/err.h>
  32 #include <linux/usb.h>
  33 #include <linux/usb/ehci_def.h>
  34 #include <linux/usb/hcd.h>
  35 #include <linux/usb/otg.h>
  36 #include <linux/platform_device.h>
  37 #include <linux/fsl_devices.h>
  38
  39 #include "ehci.h"
  40 #include "ehci-fsl.h"
  41
  42 #define DRIVER_DESC "Freescale EHCI Host controller driver"
  43 #define DRV_NAME "ehci-fsl"
  44
  45 static struct hc_driver __read_mostly fsl_ehci_hc_driver;
  46
  47 /* configure so an HC device and id are always provided */
  48 /* always called with process context; sleeping is OK */
  49
  50 /*
  51  * fsl_ehci_drv_probe - initialize FSL-based HCDs
  52  * @pdev: USB Host Controller being probed
  53  * Context: !in_interrupt()
  54  *
  55  * Allocates basic resources for this USB host controller.
  56  *
  57  */
  58 static int fsl_ehci_drv_probe(struct platform_device *pdev)
  59 {
  60         struct fsl_usb2_platform_data *pdata;
  61         struct usb_hcd *hcd;
  62         struct resource *res;
  63         int irq;
  64         int retval;
  65
  66         pr_debug("initializing FSL-SOC USB Controller\n");
  67
  68         /* Need platform data for setup */
  69         pdata = dev_get_platdata(&pdev->dev);
  70         if (!pdata) {
  71                 dev_err(&pdev->dev,
  72                         "No platform data for %s.\n", dev_name(&pdev->dev));
  73                 return -ENODEV;
  74         }
  75
  76         /*
  77          * This is a host mode driver, verify that we're supposed to be
  78          * in host mode.
  79          */
  80         if (!((pdata->operating_mode == FSL_USB2_DR_HOST) ||
  81               (pdata->operating_mode == FSL_USB2_MPH_HOST) ||
  82               (pdata->operating_mode == FSL_USB2_DR_OTG))) {
  83                 dev_err(&pdev->dev,
  84                         "Non Host Mode configured for %s. Wrong driver linked.\n",
  85                         dev_name(&pdev->dev));
  86                 return -ENODEV;
  87         }
  88
  89         res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  90         if (!res) {
  91                 dev_err(&pdev->dev,
  92                         "Found HC with no IRQ. Check %s setup!\n",
  93                         dev_name(&pdev->dev));
  94                 return -ENODEV;
  95         }
  96         irq = res->start;
  97
  98         hcd = usb_create_hcd(&fsl_ehci_hc_driver, &pdev->dev,
  99                                 dev_name(&pdev->dev));
 100         if (!hcd) {
 101                 retval = -ENOMEM;
 102                 goto err1;
 103         }
 104
 105         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 106         hcd->regs = devm_ioremap_resource(&pdev->dev, res);
 107         if (IS_ERR(hcd->regs)) {
 108                 retval = PTR_ERR(hcd->regs);
 109                 goto err2;
 110         }
 111
 112         hcd->rsrc_start = res->start;
 113         hcd->rsrc_len = resource_size(res);
 114
 115         pdata->regs = hcd->regs;
 116
 117         if (pdata->power_budget)
 118                 hcd->power_budget = pdata->power_budget;
 119
 120         /*
 121          * do platform specific init: check the clock, grab/config pins, etc.
 122          */
 123         if (pdata->init && pdata->init(pdev)) {
 124                 retval = -ENODEV;
 125                 goto err2;
 126         }
 127
 128         /* Enable USB controller, 83xx or 8536 */
 129         if (pdata->have_sysif_regs && pdata->controller_ver < FSL_USB_VER_1_6)
 130                 setbits32(hcd->regs + FSL_SOC_USB_CTRL, 0x4);
 131
 132         /* Don't need to set host mode here. It will be done by tdi_reset() */
 133
 134         retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
 135         if (retval != 0)
 136                 goto err2;
 137         device_wakeup_enable(hcd->self.controller);
 138
 139 #ifdef CONFIG_USB_OTG
 140         if (pdata->operating_mode == FSL_USB2_DR_OTG) {
 141                 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 142
 143                 hcd->usb_phy = usb_get_phy(USB_PHY_TYPE_USB2);
 144                 dev_dbg(&pdev->dev, "hcd=0x%p  ehci=0x%p, phy=0x%p\n",
 145                         hcd, ehci, hcd->usb_phy);
 146
 147                 if (!IS_ERR_OR_NULL(hcd->usb_phy)) {
 148                         retval = otg_set_host(hcd->usb_phy->otg,
 149                                               &ehci_to_hcd(ehci)->self);
 150                         if (retval) {
 151                                 usb_put_phy(hcd->usb_phy);
 152                                 goto err2;
 153                         }
 154                 } else {
 155                         dev_err(&pdev->dev, "can't find phy\n");
 156                         retval = -ENODEV;
 157                         goto err2;
 158                 }
 159         }
 160 #endif
 161         return retval;
 162
 163       err2:
 164         usb_put_hcd(hcd);
 165       err1:
 166         dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), retval);
 167         if (pdata->exit)
 168                 pdata->exit(pdev);
 169         return retval;
 170 }
 171
 172 static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
 173                                enum fsl_usb2_phy_modes phy_mode,
 174                                unsigned int port_offset)
 175 {
 176         u32 portsc;
 177         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 178         void __iomem *non_ehci = hcd->regs;
 179         struct device *dev = hcd->self.controller;
 180         struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev);
 181
 182         if (pdata->controller_ver < 0) {
 183                 dev_warn(hcd->self.controller, "Could not get controller version\n");
 184                 return -ENODEV;
 185         }
 186
 187         portsc = ehci_readl(ehci, &ehci->regs->port_status[port_offset]);
 188         portsc &= ~(PORT_PTS_MSK | PORT_PTS_PTW);
 189
 190         switch (phy_mode) {
 191         case FSL_USB2_PHY_ULPI:
 192                 if (pdata->have_sysif_regs && pdata->controller_ver) {
 193                         /* controller version 1.6 or above */
 194                         clrbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
 195                         setbits32(non_ehci + FSL_SOC_USB_CTRL,
 196                                 ULPI_PHY_CLK_SEL | USB_CTRL_USB_EN);
 197                 }
 198                 portsc |= PORT_PTS_ULPI;
 199                 break;
 200         case FSL_USB2_PHY_SERIAL:
 201                 portsc |= PORT_PTS_SERIAL;
 202                 break;
 203         case FSL_USB2_PHY_UTMI_WIDE:
 204                 portsc |= PORT_PTS_PTW;
 205                 /* fall through */
 206         case FSL_USB2_PHY_UTMI:
 207                 if (pdata->have_sysif_regs && pdata->controller_ver) {
 208                         /* controller version 1.6 or above */
 209                         setbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
 210                         mdelay(FSL_UTMI_PHY_DLY);  /* Delay for UTMI PHY CLK to
 211                                                 become stable - 10ms*/
 212                 }
 213                 /* enable UTMI PHY */
 214                 if (pdata->have_sysif_regs)
 215                         setbits32(non_ehci + FSL_SOC_USB_CTRL,
 216                                   CTRL_UTMI_PHY_EN);
 217                 portsc |= PORT_PTS_UTMI;
 218                 break;
 219         case FSL_USB2_PHY_NONE:
 220                 break;
 221         }
 222
 223         if (pdata->have_sysif_regs &&
 224             pdata->controller_ver > FSL_USB_VER_1_6 &&
 225             (phy_mode == FSL_USB2_PHY_ULPI)) {
 226                 /* check PHY_CLK_VALID to get phy clk valid */
 227                 if (!(spin_event_timeout(in_be32(non_ehci + FSL_SOC_USB_CTRL) &
 228                                 PHY_CLK_VALID, FSL_USB_PHY_CLK_TIMEOUT, 0) ||
 229                                 in_be32(non_ehci + FSL_SOC_USB_PRICTRL))) {
 230                         dev_warn(hcd->self.controller, "USB PHY clock invalid\n");
 231                         return -EINVAL;
 232                 }
 233         }
 234
 235         ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
 236
 237         if (phy_mode != FSL_USB2_PHY_ULPI && pdata->have_sysif_regs)
 238                 setbits32(non_ehci + FSL_SOC_USB_CTRL, USB_CTRL_USB_EN);
 239
 240         return 0;
 241 }
 242
 243 static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
 244 {
 245         struct usb_hcd *hcd = ehci_to_hcd(ehci);
 246         struct fsl_usb2_platform_data *pdata;
 247         void __iomem *non_ehci = hcd->regs;
 248
 249         pdata = dev_get_platdata(hcd->self.controller);
 250
 251         if (pdata->have_sysif_regs) {
 252                 /*
 253                 * Turn on cache snooping hardware, since some PowerPC platforms
 254                 * wholly rely on hardware to deal with cache coherent
 255                 */
 256
 257                 /* Setup Snooping for all the 4GB space */
 258                 /* SNOOP1 starts from 0x0, size 2G */
 259                 out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0 | SNOOP_SIZE_2GB);
 260                 /* SNOOP2 starts from 0x80000000, size 2G */
 261                 out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x80000000 | SNOOP_SIZE_2GB);
 262         }
 263
 264         if ((pdata->operating_mode == FSL_USB2_DR_HOST) ||
 265                         (pdata->operating_mode == FSL_USB2_DR_OTG))
 266                 if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0))
 267                         return -EINVAL;
 268
 269         if (pdata->operating_mode == FSL_USB2_MPH_HOST) {
 270                 unsigned int chip, rev, svr;
 271
 272                 svr = mfspr(SPRN_SVR);
 273                 chip = svr >> 16;
 274                 rev = (svr >> 4) & 0xf;
 275
 276                 /* Deal with USB Erratum #14 on MPC834x Rev 1.0 & 1.1 chips */
 277                 if ((rev == 1) && (chip >= 0x8050) && (chip <= 0x8055))
 278                         ehci->has_fsl_port_bug = 1;
 279
 280                 if (pdata->port_enables & FSL_USB2_PORT0_ENABLED)
 281                         if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0))
 282                                 return -EINVAL;
 283
 284                 if (pdata->port_enables & FSL_USB2_PORT1_ENABLED)
 285                         if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 1))
 286                                 return -EINVAL;
 287         }
 288
 289         if (pdata->have_sysif_regs) {
 290 #ifdef CONFIG_FSL_SOC_BOOKE
 291                 out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008);
 292                 out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000080);
 293 #else
 294                 out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x0000000c);
 295                 out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000040);
 296 #endif
 297                 out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
 298         }
 299
 300         return 0;
 301 }
 302
 303 /* called after powerup, by probe or system-pm "wakeup" */
 304 static int ehci_fsl_reinit(struct ehci_hcd *ehci)
 305 {
 306         if (ehci_fsl_usb_setup(ehci))
 307                 return -EINVAL;
 308
 309         return 0;
 310 }
 311
 312 /* called during probe() after chip reset completes */
 313 static int ehci_fsl_setup(struct usb_hcd *hcd)
 314 {
 315         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 316         int retval;
 317         struct fsl_usb2_platform_data *pdata;
 318         struct device *dev;
 319
 320         dev = hcd->self.controller;
 321         pdata = dev_get_platdata(hcd->self.controller);
 322         ehci->big_endian_desc = pdata->big_endian_desc;
 323         ehci->big_endian_mmio = pdata->big_endian_mmio;
 324
 325         /* EHCI registers start at offset 0x100 */
 326         ehci->caps = hcd->regs + 0x100;
 327
 328 #ifdef CONFIG_PPC_83xx
 329         /*
 330          * Deal with MPC834X that need port power to be cycled after the power
 331          * fault condition is removed. Otherwise the state machine does not
 332          * reflect PORTSC[CSC] correctly.
 333          */
 334         ehci->need_oc_pp_cycle = 1;
 335 #endif
 336
 337         hcd->has_tt = 1;
 338
 339         retval = ehci_setup(hcd);
 340         if (retval)
 341                 return retval;
 342
 343         if (of_device_is_compatible(dev->parent->of_node,
 344                                     "fsl,mpc5121-usb2-dr")) {
 345                 /*
 346                  * set SBUSCFG:AHBBRST so that control msgs don't
 347                  * fail when doing heavy PATA writes.
 348                  */
 349                 ehci_writel(ehci, SBUSCFG_INCR8,
 350                             hcd->regs + FSL_SOC_USB_SBUSCFG);
 351         }
 352
 353         retval = ehci_fsl_reinit(ehci);
 354         return retval;
 355 }
 356
 357 struct ehci_fsl {
 358         struct ehci_hcd ehci;
 359
 360 #ifdef CONFIG_PM
 361         /* Saved USB PHY settings, need to restore after deep sleep. */
 362         u32 usb_ctrl;
 363 #endif
 364 };
 365
 366 #ifdef CONFIG_PM
 367
 368 #ifdef CONFIG_PPC_MPC512x
 369 static int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
 370 {
 371         struct usb_hcd *hcd = dev_get_drvdata(dev);
 372         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 373         struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev);
 374         u32 tmp;
 375
 376 #ifdef CONFIG_DYNAMIC_DEBUG
 377         u32 mode = ehci_readl(ehci, hcd->regs + FSL_SOC_USB_USBMODE);
 378         mode &= USBMODE_CM_MASK;
 379         tmp = ehci_readl(ehci, hcd->regs + 0x140);      /* usbcmd */
 380
 381         dev_dbg(dev, "suspend=%d already_suspended=%d "
 382                 "mode=%d  usbcmd %08x\n", pdata->suspended,
 383                 pdata->already_suspended, mode, tmp);
 384 #endif
 385
 386         /*
 387          * If the controller is already suspended, then this must be a
 388          * PM suspend.  Remember this fact, so that we will leave the
 389          * controller suspended at PM resume time.
 390          */
 391         if (pdata->suspended) {
 392                 dev_dbg(dev, "already suspended, leaving early\n");
 393                 pdata->already_suspended = 1;
 394                 return 0;
 395         }
 396
 397         dev_dbg(dev, "suspending...\n");
 398
 399         ehci->rh_state = EHCI_RH_SUSPENDED;
 400         dev->power.power_state = PMSG_SUSPEND;
 401
 402         /* ignore non-host interrupts */
 403         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
 404
 405         /* stop the controller */
 406         tmp = ehci_readl(ehci, &ehci->regs->command);
 407         tmp &= ~CMD_RUN;
 408         ehci_writel(ehci, tmp, &ehci->regs->command);
 409
 410         /* save EHCI registers */
 411         pdata->pm_command = ehci_readl(ehci, &ehci->regs->command);
 412         pdata->pm_command &= ~CMD_RUN;
 413         pdata->pm_status  = ehci_readl(ehci, &ehci->regs->status);
 414         pdata->pm_intr_enable  = ehci_readl(ehci, &ehci->regs->intr_enable);
 415         pdata->pm_frame_index  = ehci_readl(ehci, &ehci->regs->frame_index);
 416         pdata->pm_segment  = ehci_readl(ehci, &ehci->regs->segment);
 417         pdata->pm_frame_list  = ehci_readl(ehci, &ehci->regs->frame_list);
 418         pdata->pm_async_next  = ehci_readl(ehci, &ehci->regs->async_next);
 419         pdata->pm_configured_flag  =
 420                 ehci_readl(ehci, &ehci->regs->configured_flag);
 421         pdata->pm_portsc = ehci_readl(ehci, &ehci->regs->port_status[0]);
 422         pdata->pm_usbgenctrl = ehci_readl(ehci,
 423                                           hcd->regs + FSL_SOC_USB_USBGENCTRL);
 424
 425         /* clear the W1C bits */
 426         pdata->pm_portsc &= cpu_to_hc32(ehci, ~PORT_RWC_BITS);
 427
 428         pdata->suspended = 1;
 429
 430         /* clear PP to cut power to the port */
 431         tmp = ehci_readl(ehci, &ehci->regs->port_status[0]);
 432         tmp &= ~PORT_POWER;
 433         ehci_writel(ehci, tmp, &ehci->regs->port_status[0]);
 434
 435         return 0;
 436 }
 437
 438 static int ehci_fsl_mpc512x_drv_resume(struct device *dev)
 439 {
 440         struct usb_hcd *hcd = dev_get_drvdata(dev);
 441         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 442         struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev);
 443         u32 tmp;
 444
 445         dev_dbg(dev, "suspend=%d already_suspended=%d\n",
 446                 pdata->suspended, pdata->already_suspended);
 447
 448         /*
 449          * If the controller was already suspended at suspend time,
 450          * then don't resume it now.
 451          */
 452         if (pdata->already_suspended) {
 453                 dev_dbg(dev, "already suspended, leaving early\n");
 454                 pdata->already_suspended = 0;
 455                 return 0;
 456         }
 457
 458         if (!pdata->suspended) {
 459                 dev_dbg(dev, "not suspended, leaving early\n");
 460                 return 0;
 461         }
 462
 463         pdata->suspended = 0;
 464
 465         dev_dbg(dev, "resuming...\n");
 466
 467         /* set host mode */
 468         tmp = USBMODE_CM_HOST | (pdata->es ? USBMODE_ES : 0);
 469         ehci_writel(ehci, tmp, hcd->regs + FSL_SOC_USB_USBMODE);
 470
 471         ehci_writel(ehci, pdata->pm_usbgenctrl,
 472                     hcd->regs + FSL_SOC_USB_USBGENCTRL);
 473         ehci_writel(ehci, ISIPHYCTRL_PXE | ISIPHYCTRL_PHYE,
 474                     hcd->regs + FSL_SOC_USB_ISIPHYCTRL);
 475
 476         ehci_writel(ehci, SBUSCFG_INCR8, hcd->regs + FSL_SOC_USB_SBUSCFG);
 477
 478         /* restore EHCI registers */
 479         ehci_writel(ehci, pdata->pm_command, &ehci->regs->command);
 480         ehci_writel(ehci, pdata->pm_intr_enable, &ehci->regs->intr_enable);
 481         ehci_writel(ehci, pdata->pm_frame_index, &ehci->regs->frame_index);
 482         ehci_writel(ehci, pdata->pm_segment, &ehci->regs->segment);
 483         ehci_writel(ehci, pdata->pm_frame_list, &ehci->regs->frame_list);
 484         ehci_writel(ehci, pdata->pm_async_next, &ehci->regs->async_next);
 485         ehci_writel(ehci, pdata->pm_configured_flag,
 486                     &ehci->regs->configured_flag);
 487         ehci_writel(ehci, pdata->pm_portsc, &ehci->regs->port_status[0]);
 488
 489         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
 490         ehci->rh_state = EHCI_RH_RUNNING;
 491         dev->power.power_state = PMSG_ON;
 492
 493         tmp = ehci_readl(ehci, &ehci->regs->command);
 494         tmp |= CMD_RUN;
 495         ehci_writel(ehci, tmp, &ehci->regs->command);
 496
 497         usb_hcd_resume_root_hub(hcd);
 498
 499         return 0;
 500 }
 501 #else
 502 static inline int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
 503 {
 504         return 0;
 505 }
 506
 507 static inline int ehci_fsl_mpc512x_drv_resume(struct device *dev)
 508 {
 509         return 0;
 510 }
 511 #endif /* CONFIG_PPC_MPC512x */
 512
 513 static struct ehci_fsl *hcd_to_ehci_fsl(struct usb_hcd *hcd)
 514 {
 515         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 516
 517         return container_of(ehci, struct ehci_fsl, ehci);
 518 }
 519
 520 static int ehci_fsl_drv_suspend(struct device *dev)
 521 {
 522         struct usb_hcd *hcd = dev_get_drvdata(dev);
 523         struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
 524         void __iomem *non_ehci = hcd->regs;
 525
 526         if (of_device_is_compatible(dev->parent->of_node,
 527                                     "fsl,mpc5121-usb2-dr")) {
 528                 return ehci_fsl_mpc512x_drv_suspend(dev);
 529         }
 530
 531         ehci_prepare_ports_for_controller_suspend(hcd_to_ehci(hcd),
 532                         device_may_wakeup(dev));
 533         if (!fsl_deep_sleep())
 534                 return 0;
 535
 536         ehci_fsl->usb_ctrl = in_be32(non_ehci + FSL_SOC_USB_CTRL);
 537         return 0;
 538 }
 539
 540 static int ehci_fsl_drv_resume(struct device *dev)
 541 {
 542         struct usb_hcd *hcd = dev_get_drvdata(dev);
 543         struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
 544         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 545         void __iomem *non_ehci = hcd->regs;
 546
 547         if (of_device_is_compatible(dev->parent->of_node,
 548                                     "fsl,mpc5121-usb2-dr")) {
 549                 return ehci_fsl_mpc512x_drv_resume(dev);
 550         }
 551
 552         ehci_prepare_ports_for_controller_resume(ehci);
 553         if (!fsl_deep_sleep())
 554                 return 0;
 555
 556         usb_root_hub_lost_power(hcd->self.root_hub);
 557
 558         /* Restore USB PHY settings and enable the controller. */
 559         out_be32(non_ehci + FSL_SOC_USB_CTRL, ehci_fsl->usb_ctrl);
 560
 561         ehci_reset(ehci);
 562         ehci_fsl_reinit(ehci);
 563
 564         return 0;
 565 }
 566
 567 static int ehci_fsl_drv_restore(struct device *dev)
 568 {
 569         struct usb_hcd *hcd = dev_get_drvdata(dev);
 570
 571         usb_root_hub_lost_power(hcd->self.root_hub);
 572         return 0;
 573 }
 574
 575 static struct dev_pm_ops ehci_fsl_pm_ops = {
 576         .suspend = ehci_fsl_drv_suspend,
 577         .resume = ehci_fsl_drv_resume,
 578         .restore = ehci_fsl_drv_restore,
 579 };
 580
 581 #define EHCI_FSL_PM_OPS         (&ehci_fsl_pm_ops)
 582 #else
 583 #define EHCI_FSL_PM_OPS         NULL
 584 #endif /* CONFIG_PM */
 585
 586 #ifdef CONFIG_USB_OTG
 587 static int ehci_start_port_reset(struct usb_hcd *hcd, unsigned port)
 588 {
 589         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 590         u32 status;
 591
 592         if (!port)
 593                 return -EINVAL;
 594
 595         port--;
 596
 597         /* start port reset before HNP protocol time out */
 598         status = readl(&ehci->regs->port_status[port]);
 599         if (!(status & PORT_CONNECT))
 600                 return -ENODEV;
 601
 602         /* hub_wq will finish the reset later */
 603         if (ehci_is_TDI(ehci)) {
 604                 writel(PORT_RESET |
 605                        (status & ~(PORT_CSC | PORT_PEC | PORT_OCC)),
 606                        &ehci->regs->port_status[port]);
 607         } else {
 608                 writel(PORT_RESET, &ehci->regs->port_status[port]);
 609         }
 610
 611         return 0;
 612 }
 613 #else
 614 #define ehci_start_port_reset   NULL
 615 #endif /* CONFIG_USB_OTG */
 616
 617 static struct ehci_driver_overrides ehci_fsl_overrides __initdata = {
 618         .extra_priv_size = sizeof(struct ehci_fsl),
 619         .reset = ehci_fsl_setup,
 620 };
 621
 622 /**
 623  * fsl_ehci_drv_remove - shutdown processing for FSL-based HCDs
 624  * @dev: USB Host Controller being removed
 625  * Context: !in_interrupt()
 626  *
 627  * Reverses the effect of usb_hcd_fsl_probe().
 628  *
 629  */
 630
 631 static int fsl_ehci_drv_remove(struct platform_device *pdev)
 632 {
 633         struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev);
 634         struct usb_hcd *hcd = platform_get_drvdata(pdev);
 635
 636         if (!IS_ERR_OR_NULL(hcd->usb_phy)) {
 637                 otg_set_host(hcd->usb_phy->otg, NULL);
 638                 usb_put_phy(hcd->usb_phy);
 639         }
 640
 641         usb_remove_hcd(hcd);
 642
 643         /*
 644          * do platform specific un-initialization:
 645          * release iomux pins, disable clock, etc.
 646          */
 647         if (pdata->exit)
 648                 pdata->exit(pdev);
 649         usb_put_hcd(hcd);
 650
 651         return 0;
 652 }
 653
 654 static struct platform_driver ehci_fsl_driver = {
 655         .probe = fsl_ehci_drv_probe,
 656         .remove = fsl_ehci_drv_remove,
 657         .shutdown = usb_hcd_platform_shutdown,
 658         .driver = {
 659                 .name = "fsl-ehci",
 660                 .pm = EHCI_FSL_PM_OPS,
 661         },
 662 };
 663
 664 static int __init ehci_fsl_init(void)
 665 {
 666         if (usb_disabled())
 667                 return -ENODEV;
 668
 669         pr_info(DRV_NAME ": " DRIVER_DESC "\n");
 670
 671         ehci_init_driver(&fsl_ehci_hc_driver, &ehci_fsl_overrides);
 672
 673         fsl_ehci_hc_driver.product_desc =
 674                         "Freescale On-Chip EHCI Host Controller";
 675         fsl_ehci_hc_driver.start_port_reset = ehci_start_port_reset;
 676
 677
 678         return platform_driver_register(&ehci_fsl_driver);
 679 }
 680 module_init(ehci_fsl_init);
 681
 682 static void __exit ehci_fsl_cleanup(void)
 683 {
 684         platform_driver_unregister(&ehci_fsl_driver);
 685 }
 686 module_exit(ehci_fsl_cleanup);
 687
 688 MODULE_DESCRIPTION(DRIVER_DESC);
 689 MODULE_LICENSE("GPL");
 690 MODULE_ALIAS("platform:" DRV_NAME);