2 * Handles the Intel 27x USB Device Controller (UDC)
4 * Inspired by original driver by Frank Becker, David Brownell, and others.
5 * Copyright (C) 2008 Robert Jarzmik
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <linux/module.h>
23 #include <linux/kernel.h>
24 #include <linux/types.h>
25 #include <linux/errno.h>
26 #include <linux/platform_device.h>
27 #include <linux/delay.h>
28 #include <linux/list.h>
29 #include <linux/interrupt.h>
30 #include <linux/proc_fs.h>
31 #include <linux/clk.h>
32 #include <linux/irq.h>
33 #include <linux/gpio.h>
35 #include <asm/byteorder.h>
36 #include <mach/hardware.h>
38 #include <linux/usb.h>
39 #include <linux/usb/ch9.h>
40 #include <linux/usb/gadget.h>
43 #include "pxa27x_udc.h"
46 * This driver handles the USB Device Controller (UDC) in Intel's PXA 27x
49 * Such controller drivers work with a gadget driver. The gadget driver
50 * returns descriptors, implements configuration and data protocols used
51 * by the host to interact with this device, and allocates endpoints to
52 * the different protocol interfaces. The controller driver virtualizes
53 * usb hardware so that the gadget drivers will be more portable.
55 * This UDC hardware wants to implement a bit too much USB protocol. The
56 * biggest issues are: that the endpoints have to be set up before the
57 * controller can be enabled (minor, and not uncommon); and each endpoint
58 * can only have one configuration, interface and alternative interface
59 * number (major, and very unusual). Once set up, these cannot be changed
60 * without a controller reset.
62 * The workaround is to setup all combinations necessary for the gadgets which
63 * will work with this driver. This is done in pxa_udc structure, statically.
64 * See pxa_udc, udc_usb_ep versus pxa_ep, and matching function find_pxa_ep.
65 * (You could modify this if needed. Some drivers have a "fifo_mode" module
66 * parameter to facilitate such changes.)
68 * The combinations have been tested with these gadgets :
70 * - file storage gadget
73 * The driver doesn't use DMA, only IO access and IRQ callbacks. No use is
74 * made of UDC's double buffering either. USB "On-The-Go" is not implemented.
76 * All the requests are handled the same way :
77 * - the drivers tries to handle the request directly to the IO
78 * - if the IO fifo is not big enough, the remaining is send/received in
82 #define DRIVER_VERSION "2008-04-18"
83 #define DRIVER_DESC "PXA 27x USB Device Controller driver"
85 static const char driver_name[] = "pxa27x_udc";
86 static struct pxa_udc *the_controller;
88 static void handle_ep(struct pxa_ep *ep);
93 #ifdef CONFIG_USB_GADGET_DEBUG_FS
95 #include <linux/debugfs.h>
96 #include <linux/uaccess.h>
97 #include <linux/seq_file.h>
99 static int state_dbg_show(struct seq_file *s, void *p)
101 struct pxa_udc *udc = s->private;
109 /* basic device status */
110 pos += seq_printf(s, DRIVER_DESC "\n"
111 "%s version: %s\nGadget driver: %s\n",
112 driver_name, DRIVER_VERSION,
113 udc->driver ? udc->driver->driver.name : "(none)");
115 tmp = udc_readl(udc, UDCCR);
117 "udccr=0x%0x(%s%s%s%s%s%s%s%s%s%s), "
118 "con=%d,inter=%d,altinter=%d\n", tmp,
119 (tmp & UDCCR_OEN) ? " oen":"",
120 (tmp & UDCCR_AALTHNP) ? " aalthnp":"",
121 (tmp & UDCCR_AHNP) ? " rem" : "",
122 (tmp & UDCCR_BHNP) ? " rstir" : "",
123 (tmp & UDCCR_DWRE) ? " dwre" : "",
124 (tmp & UDCCR_SMAC) ? " smac" : "",
125 (tmp & UDCCR_EMCE) ? " emce" : "",
126 (tmp & UDCCR_UDR) ? " udr" : "",
127 (tmp & UDCCR_UDA) ? " uda" : "",
128 (tmp & UDCCR_UDE) ? " ude" : "",
129 (tmp & UDCCR_ACN) >> UDCCR_ACN_S,
130 (tmp & UDCCR_AIN) >> UDCCR_AIN_S,
131 (tmp & UDCCR_AAISN) >> UDCCR_AAISN_S);
132 /* registers for device and ep0 */
133 pos += seq_printf(s, "udcicr0=0x%08x udcicr1=0x%08x\n",
134 udc_readl(udc, UDCICR0), udc_readl(udc, UDCICR1));
135 pos += seq_printf(s, "udcisr0=0x%08x udcisr1=0x%08x\n",
136 udc_readl(udc, UDCISR0), udc_readl(udc, UDCISR1));
137 pos += seq_printf(s, "udcfnr=%d\n", udc_readl(udc, UDCFNR));
138 pos += seq_printf(s, "irqs: reset=%lu, suspend=%lu, resume=%lu, "
140 udc->stats.irqs_reset, udc->stats.irqs_suspend,
141 udc->stats.irqs_resume, udc->stats.irqs_reconfig);
148 static int queues_dbg_show(struct seq_file *s, void *p)
150 struct pxa_udc *udc = s->private;
152 struct pxa27x_request *req;
153 int pos = 0, i, maxpkt, ret;
159 /* dump endpoint queues */
160 for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
161 ep = &udc->pxa_ep[i];
162 maxpkt = ep->fifo_size;
163 pos += seq_printf(s, "%-12s max_pkt=%d %s\n",
164 EPNAME(ep), maxpkt, "pio");
166 if (list_empty(&ep->queue)) {
167 pos += seq_printf(s, "\t(nothing queued)\n");
171 list_for_each_entry(req, &ep->queue, queue) {
172 pos += seq_printf(s, "\treq %p len %d/%d buf %p\n",
173 &req->req, req->req.actual,
174 req->req.length, req->req.buf);
183 static int eps_dbg_show(struct seq_file *s, void *p)
185 struct pxa_udc *udc = s->private;
194 ep = &udc->pxa_ep[0];
195 tmp = udc_ep_readl(ep, UDCCSR);
196 pos += seq_printf(s, "udccsr0=0x%03x(%s%s%s%s%s%s%s)\n", tmp,
197 (tmp & UDCCSR0_SA) ? " sa" : "",
198 (tmp & UDCCSR0_RNE) ? " rne" : "",
199 (tmp & UDCCSR0_FST) ? " fst" : "",
200 (tmp & UDCCSR0_SST) ? " sst" : "",
201 (tmp & UDCCSR0_DME) ? " dme" : "",
202 (tmp & UDCCSR0_IPR) ? " ipr" : "",
203 (tmp & UDCCSR0_OPC) ? " opc" : "");
204 for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
205 ep = &udc->pxa_ep[i];
206 tmp = i? udc_ep_readl(ep, UDCCR) : udc_readl(udc, UDCCR);
207 pos += seq_printf(s, "%-12s: "
208 "IN %lu(%lu reqs), OUT %lu(%lu reqs), "
209 "irqs=%lu, udccr=0x%08x, udccsr=0x%03x, "
212 ep->stats.in_bytes, ep->stats.in_ops,
213 ep->stats.out_bytes, ep->stats.out_ops,
215 tmp, udc_ep_readl(ep, UDCCSR),
216 udc_ep_readl(ep, UDCBCR));
224 static int eps_dbg_open(struct inode *inode, struct file *file)
226 return single_open(file, eps_dbg_show, inode->i_private);
229 static int queues_dbg_open(struct inode *inode, struct file *file)
231 return single_open(file, queues_dbg_show, inode->i_private);
234 static int state_dbg_open(struct inode *inode, struct file *file)
236 return single_open(file, state_dbg_show, inode->i_private);
239 static const struct file_operations state_dbg_fops = {
240 .owner = THIS_MODULE,
241 .open = state_dbg_open,
244 .release = single_release,
247 static const struct file_operations queues_dbg_fops = {
248 .owner = THIS_MODULE,
249 .open = queues_dbg_open,
252 .release = single_release,
255 static const struct file_operations eps_dbg_fops = {
256 .owner = THIS_MODULE,
257 .open = eps_dbg_open,
260 .release = single_release,
263 static void pxa_init_debugfs(struct pxa_udc *udc)
265 struct dentry *root, *state, *queues, *eps;
267 root = debugfs_create_dir(udc->gadget.name, NULL);
268 if (IS_ERR(root) || !root)
271 state = debugfs_create_file("udcstate", 0400, root, udc,
275 queues = debugfs_create_file("queues", 0400, root, udc,
279 eps = debugfs_create_file("epstate", 0400, root, udc,
284 udc->debugfs_root = root;
285 udc->debugfs_state = state;
286 udc->debugfs_queues = queues;
287 udc->debugfs_eps = eps;
292 debugfs_remove(queues);
294 debugfs_remove(root);
296 dev_err(udc->dev, "debugfs is not available\n");
299 static void pxa_cleanup_debugfs(struct pxa_udc *udc)
301 debugfs_remove(udc->debugfs_eps);
302 debugfs_remove(udc->debugfs_queues);
303 debugfs_remove(udc->debugfs_state);
304 debugfs_remove(udc->debugfs_root);
305 udc->debugfs_eps = NULL;
306 udc->debugfs_queues = NULL;
307 udc->debugfs_state = NULL;
308 udc->debugfs_root = NULL;
312 static inline void pxa_init_debugfs(struct pxa_udc *udc)
316 static inline void pxa_cleanup_debugfs(struct pxa_udc *udc)
322 * is_match_usb_pxa - check if usb_ep and pxa_ep match
323 * @udc_usb_ep: usb endpoint
325 * @config: configuration required in pxa_ep
326 * @interface: interface required in pxa_ep
327 * @altsetting: altsetting required in pxa_ep
329 * Returns 1 if all criteria match between pxa and usb endpoint, 0 otherwise
331 static int is_match_usb_pxa(struct udc_usb_ep *udc_usb_ep, struct pxa_ep *ep,
332 int config, int interface, int altsetting)
334 if (usb_endpoint_num(&udc_usb_ep->desc) != ep->addr)
336 if (usb_endpoint_dir_in(&udc_usb_ep->desc) != ep->dir_in)
338 if (usb_endpoint_type(&udc_usb_ep->desc) != ep->type)
340 if ((ep->config != config) || (ep->interface != interface)
341 || (ep->alternate != altsetting))
347 * find_pxa_ep - find pxa_ep structure matching udc_usb_ep
349 * @udc_usb_ep: udc_usb_ep structure
351 * Match udc_usb_ep and all pxa_ep available, to see if one matches.
352 * This is necessary because of the strong pxa hardware restriction requiring
353 * that once pxa endpoints are initialized, their configuration is freezed, and
354 * no change can be made to their address, direction, or in which configuration,
355 * interface or altsetting they are active ... which differs from more usual
356 * models which have endpoints be roughly just addressable fifos, and leave
357 * configuration events up to gadget drivers (like all control messages).
359 * Note that there is still a blurred point here :
360 * - we rely on UDCCR register "active interface" and "active altsetting".
361 * This is a nonsense in regard of USB spec, where multiple interfaces are
362 * active at the same time.
363 * - if we knew for sure that the pxa can handle multiple interface at the
364 * same time, assuming Intel's Developer Guide is wrong, this function
365 * should be reviewed, and a cache of couples (iface, altsetting) should
366 * be kept in the pxa_udc structure. In this case this function would match
367 * against the cache of couples instead of the "last altsetting" set up.
369 * Returns the matched pxa_ep structure or NULL if none found
371 static struct pxa_ep *find_pxa_ep(struct pxa_udc *udc,
372 struct udc_usb_ep *udc_usb_ep)
376 int cfg = udc->config;
377 int iface = udc->last_interface;
378 int alt = udc->last_alternate;
380 if (udc_usb_ep == &udc->udc_usb_ep[0])
381 return &udc->pxa_ep[0];
383 for (i = 1; i < NR_PXA_ENDPOINTS; i++) {
384 ep = &udc->pxa_ep[i];
385 if (is_match_usb_pxa(udc_usb_ep, ep, cfg, iface, alt))
392 * update_pxa_ep_matches - update pxa_ep cached values in all udc_usb_ep
395 * Context: in_interrupt()
397 * Updates all pxa_ep fields in udc_usb_ep structures, if this field was
398 * previously set up (and is not NULL). The update is necessary is a
399 * configuration change or altsetting change was issued by the USB host.
401 static void update_pxa_ep_matches(struct pxa_udc *udc)
404 struct udc_usb_ep *udc_usb_ep;
406 for (i = 1; i < NR_USB_ENDPOINTS; i++) {
407 udc_usb_ep = &udc->udc_usb_ep[i];
408 if (udc_usb_ep->pxa_ep)
409 udc_usb_ep->pxa_ep = find_pxa_ep(udc, udc_usb_ep);
414 * pio_irq_enable - Enables irq generation for one endpoint
417 static void pio_irq_enable(struct pxa_ep *ep)
419 struct pxa_udc *udc = ep->dev;
420 int index = EPIDX(ep);
421 u32 udcicr0 = udc_readl(udc, UDCICR0);
422 u32 udcicr1 = udc_readl(udc, UDCICR1);
425 udc_writel(udc, UDCICR0, udcicr0 | (3 << (index * 2)));
427 udc_writel(udc, UDCICR1, udcicr1 | (3 << ((index - 16) * 2)));
431 * pio_irq_disable - Disables irq generation for one endpoint
434 static void pio_irq_disable(struct pxa_ep *ep)
436 struct pxa_udc *udc = ep->dev;
437 int index = EPIDX(ep);
438 u32 udcicr0 = udc_readl(udc, UDCICR0);
439 u32 udcicr1 = udc_readl(udc, UDCICR1);
442 udc_writel(udc, UDCICR0, udcicr0 & ~(3 << (index * 2)));
444 udc_writel(udc, UDCICR1, udcicr1 & ~(3 << ((index - 16) * 2)));
448 * udc_set_mask_UDCCR - set bits in UDCCR
450 * @mask: bits to set in UDCCR
452 * Sets bits in UDCCR, leaving DME and FST bits as they were.
454 static inline void udc_set_mask_UDCCR(struct pxa_udc *udc, int mask)
456 u32 udccr = udc_readl(udc, UDCCR);
457 udc_writel(udc, UDCCR,
458 (udccr & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS));
462 * udc_clear_mask_UDCCR - clears bits in UDCCR
464 * @mask: bit to clear in UDCCR
466 * Clears bits in UDCCR, leaving DME and FST bits as they were.
468 static inline void udc_clear_mask_UDCCR(struct pxa_udc *udc, int mask)
470 u32 udccr = udc_readl(udc, UDCCR);
471 udc_writel(udc, UDCCR,
472 (udccr & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS));
476 * ep_write_UDCCSR - set bits in UDCCSR
478 * @mask: bits to set in UDCCR
480 * Sets bits in UDCCSR (UDCCSR0 and UDCCSR*).
482 * A specific case is applied to ep0 : the ACM bit is always set to 1, for
483 * SET_INTERFACE and SET_CONFIGURATION.
485 static inline void ep_write_UDCCSR(struct pxa_ep *ep, int mask)
489 udc_ep_writel(ep, UDCCSR, mask);
493 * ep_count_bytes_remain - get how many bytes in udc endpoint
496 * Returns number of bytes in OUT fifos. Broken for IN fifos (-EOPNOTSUPP)
498 static int ep_count_bytes_remain(struct pxa_ep *ep)
502 return udc_ep_readl(ep, UDCBCR) & 0x3ff;
506 * ep_is_empty - checks if ep has byte ready for reading
509 * If endpoint is the control endpoint, checks if there are bytes in the
510 * control endpoint fifo. If endpoint is a data endpoint, checks if bytes
511 * are ready for reading on OUT endpoint.
513 * Returns 0 if ep not empty, 1 if ep empty, -EOPNOTSUPP if IN endpoint
515 static int ep_is_empty(struct pxa_ep *ep)
519 if (!is_ep0(ep) && ep->dir_in)
522 ret = !(udc_ep_readl(ep, UDCCSR) & UDCCSR0_RNE);
524 ret = !(udc_ep_readl(ep, UDCCSR) & UDCCSR_BNE);
529 * ep_is_full - checks if ep has place to write bytes
532 * If endpoint is not the control endpoint and is an IN endpoint, checks if
533 * there is place to write bytes into the endpoint.
535 * Returns 0 if ep not full, 1 if ep full, -EOPNOTSUPP if OUT endpoint
537 static int ep_is_full(struct pxa_ep *ep)
540 return (udc_ep_readl(ep, UDCCSR) & UDCCSR0_IPR);
543 return (!(udc_ep_readl(ep, UDCCSR) & UDCCSR_BNF));
547 * epout_has_pkt - checks if OUT endpoint fifo has a packet available
550 * Returns 1 if a complete packet is available, 0 if not, -EOPNOTSUPP for IN ep.
552 static int epout_has_pkt(struct pxa_ep *ep)
554 if (!is_ep0(ep) && ep->dir_in)
557 return (udc_ep_readl(ep, UDCCSR) & UDCCSR0_OPC);
558 return (udc_ep_readl(ep, UDCCSR) & UDCCSR_PC);
562 * set_ep0state - Set ep0 automata state
566 static void set_ep0state(struct pxa_udc *udc, int state)
568 struct pxa_ep *ep = &udc->pxa_ep[0];
569 char *old_stname = EP0_STNAME(udc);
571 udc->ep0state = state;
572 ep_dbg(ep, "state=%s->%s, udccsr0=0x%03x, udcbcr=%d\n", old_stname,
573 EP0_STNAME(udc), udc_ep_readl(ep, UDCCSR),
574 udc_ep_readl(ep, UDCBCR));
578 * ep0_idle - Put control endpoint into idle state
581 static void ep0_idle(struct pxa_udc *dev)
583 set_ep0state(dev, WAIT_FOR_SETUP);
587 * inc_ep_stats_reqs - Update ep stats counts
588 * @ep: physical endpoint
590 * @is_in: ep direction (USB_DIR_IN or 0)
593 static void inc_ep_stats_reqs(struct pxa_ep *ep, int is_in)
602 * inc_ep_stats_bytes - Update ep stats counts
603 * @ep: physical endpoint
604 * @count: bytes transfered on endpoint
605 * @is_in: ep direction (USB_DIR_IN or 0)
607 static void inc_ep_stats_bytes(struct pxa_ep *ep, int count, int is_in)
610 ep->stats.in_bytes += count;
612 ep->stats.out_bytes += count;
616 * pxa_ep_setup - Sets up an usb physical endpoint
617 * @ep: pxa27x physical endpoint
619 * Find the physical pxa27x ep, and setup its UDCCR
621 static __init void pxa_ep_setup(struct pxa_ep *ep)
625 new_udccr = ((ep->config << UDCCONR_CN_S) & UDCCONR_CN)
626 | ((ep->interface << UDCCONR_IN_S) & UDCCONR_IN)
627 | ((ep->alternate << UDCCONR_AISN_S) & UDCCONR_AISN)
628 | ((EPADDR(ep) << UDCCONR_EN_S) & UDCCONR_EN)
629 | ((EPXFERTYPE(ep) << UDCCONR_ET_S) & UDCCONR_ET)
630 | ((ep->dir_in) ? UDCCONR_ED : 0)
631 | ((ep->fifo_size << UDCCONR_MPS_S) & UDCCONR_MPS)
634 udc_ep_writel(ep, UDCCR, new_udccr);
638 * pxa_eps_setup - Sets up all usb physical endpoints
641 * Setup all pxa physical endpoints, except ep0
643 static __init void pxa_eps_setup(struct pxa_udc *dev)
647 dev_dbg(dev->dev, "%s: dev=%p\n", __func__, dev);
649 for (i = 1; i < NR_PXA_ENDPOINTS; i++)
650 pxa_ep_setup(&dev->pxa_ep[i]);
654 * pxa_ep_alloc_request - Allocate usb request
658 * For the pxa27x, these can just wrap kmalloc/kfree. gadget drivers
659 * must still pass correctly initialized endpoints, since other controller
660 * drivers may care about how it's currently set up (dma issues etc).
662 static struct usb_request *
663 pxa_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
665 struct pxa27x_request *req;
667 req = kzalloc(sizeof *req, gfp_flags);
671 INIT_LIST_HEAD(&req->queue);
673 req->udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
679 * pxa_ep_free_request - Free usb request
683 * Wrapper around kfree to free _req
685 static void pxa_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
687 struct pxa27x_request *req;
689 req = container_of(_req, struct pxa27x_request, req);
690 WARN_ON(!list_empty(&req->queue));
695 * ep_add_request - add a request to the endpoint's queue
699 * Context: ep->lock held
701 * Queues the request in the endpoint's queue, and enables the interrupts
704 static void ep_add_request(struct pxa_ep *ep, struct pxa27x_request *req)
708 ep_vdbg(ep, "req:%p, lg=%d, udccsr=0x%03x\n", req,
709 req->req.length, udc_ep_readl(ep, UDCCSR));
712 list_add_tail(&req->queue, &ep->queue);
717 * ep_del_request - removes a request from the endpoint's queue
721 * Context: ep->lock held
723 * Unqueue the request from the endpoint's queue. If there are no more requests
724 * on the endpoint, and if it's not the control endpoint, interrupts are
725 * disabled on the endpoint.
727 static void ep_del_request(struct pxa_ep *ep, struct pxa27x_request *req)
731 ep_vdbg(ep, "req:%p, lg=%d, udccsr=0x%03x\n", req,
732 req->req.length, udc_ep_readl(ep, UDCCSR));
734 list_del_init(&req->queue);
736 if (!is_ep0(ep) && list_empty(&ep->queue))
741 * req_done - Complete an usb request
742 * @ep: pxa physical endpoint
744 * @status: usb request status sent to gadget API
745 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
747 * Context: ep->lock held if flags not NULL, else ep->lock released
749 * Retire a pxa27x usb request. Endpoint must be locked.
751 static void req_done(struct pxa_ep *ep, struct pxa27x_request *req, int status,
752 unsigned long *pflags)
756 ep_del_request(ep, req);
757 if (likely(req->req.status == -EINPROGRESS))
758 req->req.status = status;
760 status = req->req.status;
762 if (status && status != -ESHUTDOWN)
763 ep_dbg(ep, "complete req %p stat %d len %u/%u\n",
765 req->req.actual, req->req.length);
768 spin_unlock_irqrestore(&ep->lock, *pflags);
769 local_irq_save(flags);
770 req->req.complete(&req->udc_usb_ep->usb_ep, &req->req);
771 local_irq_restore(flags);
773 spin_lock_irqsave(&ep->lock, *pflags);
777 * ep_end_out_req - Ends endpoint OUT request
778 * @ep: physical endpoint
780 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
782 * Context: ep->lock held or released (see req_done())
784 * Ends endpoint OUT request (completes usb request).
786 static void ep_end_out_req(struct pxa_ep *ep, struct pxa27x_request *req,
787 unsigned long *pflags)
789 inc_ep_stats_reqs(ep, !USB_DIR_IN);
790 req_done(ep, req, 0, pflags);
794 * ep0_end_out_req - Ends control endpoint OUT request (ends data stage)
795 * @ep: physical endpoint
797 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
799 * Context: ep->lock held or released (see req_done())
801 * Ends control endpoint OUT request (completes usb request), and puts
802 * control endpoint into idle state
804 static void ep0_end_out_req(struct pxa_ep *ep, struct pxa27x_request *req,
805 unsigned long *pflags)
807 set_ep0state(ep->dev, OUT_STATUS_STAGE);
808 ep_end_out_req(ep, req, pflags);
813 * ep_end_in_req - Ends endpoint IN request
814 * @ep: physical endpoint
816 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
818 * Context: ep->lock held or released (see req_done())
820 * Ends endpoint IN request (completes usb request).
822 static void ep_end_in_req(struct pxa_ep *ep, struct pxa27x_request *req,
823 unsigned long *pflags)
825 inc_ep_stats_reqs(ep, USB_DIR_IN);
826 req_done(ep, req, 0, pflags);
830 * ep0_end_in_req - Ends control endpoint IN request (ends data stage)
831 * @ep: physical endpoint
833 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
835 * Context: ep->lock held or released (see req_done())
837 * Ends control endpoint IN request (completes usb request), and puts
838 * control endpoint into status state
840 static void ep0_end_in_req(struct pxa_ep *ep, struct pxa27x_request *req,
841 unsigned long *pflags)
843 set_ep0state(ep->dev, IN_STATUS_STAGE);
844 ep_end_in_req(ep, req, pflags);
848 * nuke - Dequeue all requests
850 * @status: usb request status
852 * Context: ep->lock released
854 * Dequeues all requests on an endpoint. As a side effect, interrupts will be
855 * disabled on that endpoint (because no more requests).
857 static void nuke(struct pxa_ep *ep, int status)
859 struct pxa27x_request *req;
862 spin_lock_irqsave(&ep->lock, flags);
863 while (!list_empty(&ep->queue)) {
864 req = list_entry(ep->queue.next, struct pxa27x_request, queue);
865 req_done(ep, req, status, &flags);
867 spin_unlock_irqrestore(&ep->lock, flags);
871 * read_packet - transfer 1 packet from an OUT endpoint into request
872 * @ep: pxa physical endpoint
875 * Takes bytes from OUT endpoint and transfers them info the usb request.
876 * If there is less space in request than bytes received in OUT endpoint,
877 * bytes are left in the OUT endpoint.
879 * Returns how many bytes were actually transfered
881 static int read_packet(struct pxa_ep *ep, struct pxa27x_request *req)
884 int bytes_ep, bufferspace, count, i;
886 bytes_ep = ep_count_bytes_remain(ep);
887 bufferspace = req->req.length - req->req.actual;
889 buf = (u32 *)(req->req.buf + req->req.actual);
892 if (likely(!ep_is_empty(ep)))
893 count = min(bytes_ep, bufferspace);
897 for (i = count; i > 0; i -= 4)
898 *buf++ = udc_ep_readl(ep, UDCDR);
899 req->req.actual += count;
901 ep_write_UDCCSR(ep, UDCCSR_PC);
907 * write_packet - transfer 1 packet from request into an IN endpoint
908 * @ep: pxa physical endpoint
910 * @max: max bytes that fit into endpoint
912 * Takes bytes from usb request, and transfers them into the physical
913 * endpoint. If there are no bytes to transfer, doesn't write anything
914 * to physical endpoint.
916 * Returns how many bytes were actually transfered.
918 static int write_packet(struct pxa_ep *ep, struct pxa27x_request *req,
921 int length, count, remain, i;
925 buf = (u32 *)(req->req.buf + req->req.actual);
928 length = min(req->req.length - req->req.actual, max);
929 req->req.actual += length;
931 remain = length & 0x3;
932 count = length & ~(0x3);
933 for (i = count; i > 0 ; i -= 4)
934 udc_ep_writel(ep, UDCDR, *buf++);
937 for (i = remain; i > 0; i--)
938 udc_ep_writeb(ep, UDCDR, *buf_8++);
940 ep_vdbg(ep, "length=%d+%d, udccsr=0x%03x\n", count, remain,
941 udc_ep_readl(ep, UDCCSR));
947 * read_fifo - Transfer packets from OUT endpoint into usb request
948 * @ep: pxa physical endpoint
951 * Context: callable when in_interrupt()
953 * Unload as many packets as possible from the fifo we use for usb OUT
954 * transfers and put them into the request. Caller should have made sure
955 * there's at least one packet ready.
956 * Doesn't complete the request, that's the caller's job
958 * Returns 1 if the request completed, 0 otherwise
960 static int read_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
962 int count, is_short, completed = 0;
964 while (epout_has_pkt(ep)) {
965 count = read_packet(ep, req);
966 inc_ep_stats_bytes(ep, count, !USB_DIR_IN);
968 is_short = (count < ep->fifo_size);
969 ep_dbg(ep, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n",
970 udc_ep_readl(ep, UDCCSR), count, is_short ? "/S" : "",
971 &req->req, req->req.actual, req->req.length);
974 if (is_short || req->req.actual == req->req.length) {
978 /* finished that packet. the next one may be waiting... */
984 * write_fifo - transfer packets from usb request into an IN endpoint
985 * @ep: pxa physical endpoint
986 * @req: pxa usb request
988 * Write to an IN endpoint fifo, as many packets as possible.
989 * irqs will use this to write the rest later.
990 * caller guarantees at least one packet buffer is ready (or a zlp).
991 * Doesn't complete the request, that's the caller's job
993 * Returns 1 if request fully transfered, 0 if partial transfer
995 static int write_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
998 int count, is_short, is_last = 0, completed = 0, totcount = 0;
1001 max = ep->fifo_size;
1005 udccsr = udc_ep_readl(ep, UDCCSR);
1006 if (udccsr & UDCCSR_PC) {
1007 ep_vdbg(ep, "Clearing Transmit Complete, udccsr=%x\n",
1009 ep_write_UDCCSR(ep, UDCCSR_PC);
1011 if (udccsr & UDCCSR_TRN) {
1012 ep_vdbg(ep, "Clearing Underrun on, udccsr=%x\n",
1014 ep_write_UDCCSR(ep, UDCCSR_TRN);
1017 count = write_packet(ep, req, max);
1018 inc_ep_stats_bytes(ep, count, USB_DIR_IN);
1021 /* last packet is usually short (or a zlp) */
1022 if (unlikely(count < max)) {
1026 if (likely(req->req.length > req->req.actual)
1031 /* interrupt/iso maxpacket may not fill the fifo */
1032 is_short = unlikely(max < ep->fifo_size);
1036 ep_write_UDCCSR(ep, UDCCSR_SP);
1038 /* requests complete when all IN data is in the FIFO */
1043 } while (!ep_is_full(ep));
1045 ep_dbg(ep, "wrote count:%d bytes%s%s, left:%d req=%p\n",
1046 totcount, is_last ? "/L" : "", is_short ? "/S" : "",
1047 req->req.length - req->req.actual, &req->req);
1053 * read_ep0_fifo - Transfer packets from control endpoint into usb request
1054 * @ep: control endpoint
1055 * @req: pxa usb request
1057 * Special ep0 version of the above read_fifo. Reads as many bytes from control
1058 * endpoint as can be read, and stores them into usb request (limited by request
1061 * Returns 0 if usb request only partially filled, 1 if fully filled
1063 static int read_ep0_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
1065 int count, is_short, completed = 0;
1067 while (epout_has_pkt(ep)) {
1068 count = read_packet(ep, req);
1069 ep_write_UDCCSR(ep, UDCCSR0_OPC);
1070 inc_ep_stats_bytes(ep, count, !USB_DIR_IN);
1072 is_short = (count < ep->fifo_size);
1073 ep_dbg(ep, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n",
1074 udc_ep_readl(ep, UDCCSR), count, is_short ? "/S" : "",
1075 &req->req, req->req.actual, req->req.length);
1077 if (is_short || req->req.actual >= req->req.length) {
1087 * write_ep0_fifo - Send a request to control endpoint (ep0 in)
1088 * @ep: control endpoint
1091 * Context: callable when in_interrupt()
1093 * Sends a request (or a part of the request) to the control endpoint (ep0 in).
1094 * If the request doesn't fit, the remaining part will be sent from irq.
1095 * The request is considered fully written only if either :
1096 * - last write transfered all remaining bytes, but fifo was not fully filled
1097 * - last write was a 0 length write
1099 * Returns 1 if request fully written, 0 if request only partially sent
1101 static int write_ep0_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
1104 int is_last, is_short;
1106 count = write_packet(ep, req, EP0_FIFO_SIZE);
1107 inc_ep_stats_bytes(ep, count, USB_DIR_IN);
1109 is_short = (count < EP0_FIFO_SIZE);
1110 is_last = ((count == 0) || (count < EP0_FIFO_SIZE));
1112 /* Sends either a short packet or a 0 length packet */
1113 if (unlikely(is_short))
1114 ep_write_UDCCSR(ep, UDCCSR0_IPR);
1116 ep_dbg(ep, "in %d bytes%s%s, %d left, req=%p, udccsr0=0x%03x\n",
1117 count, is_short ? "/S" : "", is_last ? "/L" : "",
1118 req->req.length - req->req.actual,
1119 &req->req, udc_ep_readl(ep, UDCCSR));
1125 * pxa_ep_queue - Queue a request into an IN endpoint
1126 * @_ep: usb endpoint
1127 * @_req: usb request
1130 * Context: normally called when !in_interrupt, but callable when in_interrupt()
1131 * in the special case of ep0 setup :
1132 * (irq->handle_ep0_ctrl_req->gadget_setup->pxa_ep_queue)
1134 * Returns 0 if succedeed, error otherwise
1136 static int pxa_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
1139 struct udc_usb_ep *udc_usb_ep;
1141 struct pxa27x_request *req;
1142 struct pxa_udc *dev;
1143 unsigned long flags;
1147 int recursion_detected;
1149 req = container_of(_req, struct pxa27x_request, req);
1150 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1152 if (unlikely(!_req || !_req->complete || !_req->buf))
1158 dev = udc_usb_ep->dev;
1159 ep = udc_usb_ep->pxa_ep;
1164 if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1165 ep_dbg(ep, "bogus device state\n");
1169 /* iso is always one packet per request, that's the only way
1170 * we can report per-packet status. that also helps with dma.
1172 if (unlikely(EPXFERTYPE_is_ISO(ep)
1173 && req->req.length > ep->fifo_size))
1176 spin_lock_irqsave(&ep->lock, flags);
1177 recursion_detected = ep->in_handle_ep;
1179 is_first_req = list_empty(&ep->queue);
1180 ep_dbg(ep, "queue req %p(first=%s), len %d buf %p\n",
1181 _req, is_first_req ? "yes" : "no",
1182 _req->length, _req->buf);
1185 _req->status = -ESHUTDOWN;
1191 ep_err(ep, "refusing to queue req %p (already queued)\n", req);
1195 length = _req->length;
1196 _req->status = -EINPROGRESS;
1199 ep_add_request(ep, req);
1200 spin_unlock_irqrestore(&ep->lock, flags);
1203 switch (dev->ep0state) {
1204 case WAIT_ACK_SET_CONF_INTERF:
1206 ep_end_in_req(ep, req, NULL);
1208 ep_err(ep, "got a request of %d bytes while"
1209 "in state WAIT_ACK_SET_CONF_INTERF\n",
1211 ep_del_request(ep, req);
1217 if (!ep_is_full(ep))
1218 if (write_ep0_fifo(ep, req))
1219 ep0_end_in_req(ep, req, NULL);
1221 case OUT_DATA_STAGE:
1222 if ((length == 0) || !epout_has_pkt(ep))
1223 if (read_ep0_fifo(ep, req))
1224 ep0_end_out_req(ep, req, NULL);
1227 ep_err(ep, "odd state %s to send me a request\n",
1228 EP0_STNAME(ep->dev));
1229 ep_del_request(ep, req);
1234 if (!recursion_detected)
1241 spin_unlock_irqrestore(&ep->lock, flags);
1246 * pxa_ep_dequeue - Dequeue one request
1247 * @_ep: usb endpoint
1248 * @_req: usb request
1250 * Return 0 if no error, -EINVAL or -ECONNRESET otherwise
1252 static int pxa_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1255 struct udc_usb_ep *udc_usb_ep;
1256 struct pxa27x_request *req;
1257 unsigned long flags;
1262 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1263 ep = udc_usb_ep->pxa_ep;
1264 if (!ep || is_ep0(ep))
1267 spin_lock_irqsave(&ep->lock, flags);
1269 /* make sure it's actually queued on this endpoint */
1270 list_for_each_entry(req, &ep->queue, queue) {
1271 if (&req->req == _req) {
1277 spin_unlock_irqrestore(&ep->lock, flags);
1279 req_done(ep, req, -ECONNRESET, NULL);
1284 * pxa_ep_set_halt - Halts operations on one endpoint
1285 * @_ep: usb endpoint
1288 * Returns 0 if no error, -EINVAL, -EROFS, -EAGAIN otherwise
1290 static int pxa_ep_set_halt(struct usb_ep *_ep, int value)
1293 struct udc_usb_ep *udc_usb_ep;
1294 unsigned long flags;
1300 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1301 ep = udc_usb_ep->pxa_ep;
1302 if (!ep || is_ep0(ep))
1307 * This path (reset toggle+halt) is needed to implement
1308 * SET_INTERFACE on normal hardware. but it can't be
1309 * done from software on the PXA UDC, and the hardware
1310 * forgets to do it as part of SET_INTERFACE automagic.
1312 ep_dbg(ep, "only host can clear halt\n");
1316 spin_lock_irqsave(&ep->lock, flags);
1319 if (ep->dir_in && (ep_is_full(ep) || !list_empty(&ep->queue)))
1322 /* FST, FEF bits are the same for control and non control endpoints */
1324 ep_write_UDCCSR(ep, UDCCSR_FST | UDCCSR_FEF);
1326 set_ep0state(ep->dev, STALL);
1329 spin_unlock_irqrestore(&ep->lock, flags);
1334 * pxa_ep_fifo_status - Get how many bytes in physical endpoint
1335 * @_ep: usb endpoint
1337 * Returns number of bytes in OUT fifos. Broken for IN fifos.
1339 static int pxa_ep_fifo_status(struct usb_ep *_ep)
1342 struct udc_usb_ep *udc_usb_ep;
1346 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1347 ep = udc_usb_ep->pxa_ep;
1348 if (!ep || is_ep0(ep))
1353 if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN || ep_is_empty(ep))
1356 return ep_count_bytes_remain(ep) + 1;
1360 * pxa_ep_fifo_flush - Flushes one endpoint
1361 * @_ep: usb endpoint
1363 * Discards all data in one endpoint(IN or OUT), except control endpoint.
1365 static void pxa_ep_fifo_flush(struct usb_ep *_ep)
1368 struct udc_usb_ep *udc_usb_ep;
1369 unsigned long flags;
1373 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1374 ep = udc_usb_ep->pxa_ep;
1375 if (!ep || is_ep0(ep))
1378 spin_lock_irqsave(&ep->lock, flags);
1380 if (unlikely(!list_empty(&ep->queue)))
1381 ep_dbg(ep, "called while queue list not empty\n");
1382 ep_dbg(ep, "called\n");
1384 /* for OUT, just read and discard the FIFO contents. */
1386 while (!ep_is_empty(ep))
1387 udc_ep_readl(ep, UDCDR);
1389 /* most IN status is the same, but ISO can't stall */
1391 UDCCSR_PC | UDCCSR_FEF | UDCCSR_TRN
1392 | (EPXFERTYPE_is_ISO(ep) ? 0 : UDCCSR_SST));
1395 spin_unlock_irqrestore(&ep->lock, flags);
1401 * pxa_ep_enable - Enables usb endpoint
1402 * @_ep: usb endpoint
1403 * @desc: usb endpoint descriptor
1405 * Nothing much to do here, as ep configuration is done once and for all
1406 * before udc is enabled. After udc enable, no physical endpoint configuration
1408 * Function makes sanity checks and flushes the endpoint.
1410 static int pxa_ep_enable(struct usb_ep *_ep,
1411 const struct usb_endpoint_descriptor *desc)
1414 struct udc_usb_ep *udc_usb_ep;
1415 struct pxa_udc *udc;
1420 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1421 if (udc_usb_ep->pxa_ep) {
1422 ep = udc_usb_ep->pxa_ep;
1423 ep_warn(ep, "usb_ep %s already enabled, doing nothing\n",
1426 ep = find_pxa_ep(udc_usb_ep->dev, udc_usb_ep);
1429 if (!ep || is_ep0(ep)) {
1430 dev_err(udc_usb_ep->dev->dev,
1431 "unable to match pxa_ep for ep %s\n",
1436 if ((desc->bDescriptorType != USB_DT_ENDPOINT)
1437 || (ep->type != usb_endpoint_type(desc))) {
1438 ep_err(ep, "type mismatch\n");
1442 if (ep->fifo_size < le16_to_cpu(desc->wMaxPacketSize)) {
1443 ep_err(ep, "bad maxpacket\n");
1447 udc_usb_ep->pxa_ep = ep;
1450 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
1451 ep_err(ep, "bogus device state\n");
1457 /* flush fifo (mostly for OUT buffers) */
1458 pxa_ep_fifo_flush(_ep);
1460 ep_dbg(ep, "enabled\n");
1465 * pxa_ep_disable - Disable usb endpoint
1466 * @_ep: usb endpoint
1468 * Same as for pxa_ep_enable, no physical endpoint configuration can be
1470 * Function flushes the endpoint and related requests.
1472 static int pxa_ep_disable(struct usb_ep *_ep)
1475 struct udc_usb_ep *udc_usb_ep;
1480 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1481 ep = udc_usb_ep->pxa_ep;
1482 if (!ep || is_ep0(ep) || !list_empty(&ep->queue))
1486 nuke(ep, -ESHUTDOWN);
1488 pxa_ep_fifo_flush(_ep);
1489 udc_usb_ep->pxa_ep = NULL;
1491 ep_dbg(ep, "disabled\n");
1495 static struct usb_ep_ops pxa_ep_ops = {
1496 .enable = pxa_ep_enable,
1497 .disable = pxa_ep_disable,
1499 .alloc_request = pxa_ep_alloc_request,
1500 .free_request = pxa_ep_free_request,
1502 .queue = pxa_ep_queue,
1503 .dequeue = pxa_ep_dequeue,
1505 .set_halt = pxa_ep_set_halt,
1506 .fifo_status = pxa_ep_fifo_status,
1507 .fifo_flush = pxa_ep_fifo_flush,
1511 * dplus_pullup - Connect or disconnect pullup resistor to D+ pin
1513 * @on: 0 if disconnect pullup resistor, 1 otherwise
1516 * Handle D+ pullup resistor, make the device visible to the usb bus, and
1517 * declare it as a full speed usb device
1519 static void dplus_pullup(struct pxa_udc *udc, int on)
1522 if (gpio_is_valid(udc->mach->gpio_pullup))
1523 gpio_set_value(udc->mach->gpio_pullup,
1524 !udc->mach->gpio_pullup_inverted);
1525 if (udc->mach->udc_command)
1526 udc->mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
1528 if (gpio_is_valid(udc->mach->gpio_pullup))
1529 gpio_set_value(udc->mach->gpio_pullup,
1530 udc->mach->gpio_pullup_inverted);
1531 if (udc->mach->udc_command)
1532 udc->mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
1534 udc->pullup_on = on;
1538 * pxa_udc_get_frame - Returns usb frame number
1539 * @_gadget: usb gadget
1541 static int pxa_udc_get_frame(struct usb_gadget *_gadget)
1543 struct pxa_udc *udc = to_gadget_udc(_gadget);
1545 return (udc_readl(udc, UDCFNR) & 0x7ff);
1549 * pxa_udc_wakeup - Force udc device out of suspend
1550 * @_gadget: usb gadget
1552 * Returns 0 if successfull, error code otherwise
1554 static int pxa_udc_wakeup(struct usb_gadget *_gadget)
1556 struct pxa_udc *udc = to_gadget_udc(_gadget);
1558 /* host may not have enabled remote wakeup */
1559 if ((udc_readl(udc, UDCCR) & UDCCR_DWRE) == 0)
1560 return -EHOSTUNREACH;
1561 udc_set_mask_UDCCR(udc, UDCCR_UDR);
1565 static void udc_enable(struct pxa_udc *udc);
1566 static void udc_disable(struct pxa_udc *udc);
1569 * should_enable_udc - Tells if UDC should be enabled
1573 * The UDC should be enabled if :
1575 * - the pullup resistor is connected
1576 * - and a gadget driver is bound
1577 * - and vbus is sensed (or no vbus sense is available)
1579 * Returns 1 if UDC should be enabled, 0 otherwise
1581 static int should_enable_udc(struct pxa_udc *udc)
1585 put_on = ((udc->pullup_on) && (udc->driver));
1586 put_on &= ((udc->vbus_sensed) || (!udc->transceiver));
1591 * should_disable_udc - Tells if UDC should be disabled
1595 * The UDC should be disabled if :
1596 * - the pullup resistor is not connected
1597 * - or no gadget driver is bound
1598 * - or no vbus is sensed (when vbus sesing is available)
1600 * Returns 1 if UDC should be disabled
1602 static int should_disable_udc(struct pxa_udc *udc)
1606 put_off = ((!udc->pullup_on) || (!udc->driver));
1607 put_off |= ((!udc->vbus_sensed) && (udc->transceiver));
1612 * pxa_udc_pullup - Offer manual D+ pullup control
1613 * @_gadget: usb gadget using the control
1614 * @is_active: 0 if disconnect, else connect D+ pullup resistor
1615 * Context: !in_interrupt()
1617 * Returns 0 if OK, -EOPNOTSUPP if udc driver doesn't handle D+ pullup
1619 static int pxa_udc_pullup(struct usb_gadget *_gadget, int is_active)
1621 struct pxa_udc *udc = to_gadget_udc(_gadget);
1623 if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
1626 dplus_pullup(udc, is_active);
1628 if (should_enable_udc(udc))
1630 if (should_disable_udc(udc))
1635 static void udc_enable(struct pxa_udc *udc);
1636 static void udc_disable(struct pxa_udc *udc);
1639 * pxa_udc_vbus_session - Called by external transceiver to enable/disable udc
1640 * @_gadget: usb gadget
1641 * @is_active: 0 if should disable the udc, 1 if should enable
1643 * Enables the udc, and optionnaly activates D+ pullup resistor. Or disables the
1644 * udc, and deactivates D+ pullup resistor.
1648 static int pxa_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
1650 struct pxa_udc *udc = to_gadget_udc(_gadget);
1652 udc->vbus_sensed = is_active;
1653 if (should_enable_udc(udc))
1655 if (should_disable_udc(udc))
1662 * pxa_udc_vbus_draw - Called by gadget driver after SET_CONFIGURATION completed
1663 * @_gadget: usb gadget
1664 * @mA: current drawn
1666 * Context: !in_interrupt()
1668 * Called after a configuration was chosen by a USB host, to inform how much
1669 * current can be drawn by the device from VBus line.
1671 * Returns 0 or -EOPNOTSUPP if no transceiver is handling the udc
1673 static int pxa_udc_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
1675 struct pxa_udc *udc;
1677 udc = to_gadget_udc(_gadget);
1678 if (udc->transceiver)
1679 return otg_set_power(udc->transceiver, mA);
1683 static const struct usb_gadget_ops pxa_udc_ops = {
1684 .get_frame = pxa_udc_get_frame,
1685 .wakeup = pxa_udc_wakeup,
1686 .pullup = pxa_udc_pullup,
1687 .vbus_session = pxa_udc_vbus_session,
1688 .vbus_draw = pxa_udc_vbus_draw,
1692 * udc_disable - disable udc device controller
1696 * Disables the udc device : disables clocks, udc interrupts, control endpoint
1699 static void udc_disable(struct pxa_udc *udc)
1704 udc_writel(udc, UDCICR0, 0);
1705 udc_writel(udc, UDCICR1, 0);
1707 udc_clear_mask_UDCCR(udc, UDCCR_UDE);
1708 clk_disable(udc->clk);
1711 udc->gadget.speed = USB_SPEED_UNKNOWN;
1717 * udc_init_data - Initialize udc device data structures
1720 * Initializes gadget endpoint list, endpoints locks. No action is taken
1723 static __init void udc_init_data(struct pxa_udc *dev)
1728 /* device/ep0 records init */
1729 INIT_LIST_HEAD(&dev->gadget.ep_list);
1730 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
1731 dev->udc_usb_ep[0].pxa_ep = &dev->pxa_ep[0];
1734 /* PXA endpoints init */
1735 for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
1736 ep = &dev->pxa_ep[i];
1738 ep->enabled = is_ep0(ep);
1739 INIT_LIST_HEAD(&ep->queue);
1740 spin_lock_init(&ep->lock);
1743 /* USB endpoints init */
1744 for (i = 1; i < NR_USB_ENDPOINTS; i++)
1745 list_add_tail(&dev->udc_usb_ep[i].usb_ep.ep_list,
1746 &dev->gadget.ep_list);
1750 * udc_enable - Enables the udc device
1753 * Enables the udc device : enables clocks, udc interrupts, control endpoint
1754 * interrupts, sets usb as UDC client and setups endpoints.
1756 static void udc_enable(struct pxa_udc *udc)
1761 udc_writel(udc, UDCICR0, 0);
1762 udc_writel(udc, UDCICR1, 0);
1763 udc_clear_mask_UDCCR(udc, UDCCR_UDE);
1765 clk_enable(udc->clk);
1768 udc->gadget.speed = USB_SPEED_FULL;
1769 memset(&udc->stats, 0, sizeof(udc->stats));
1771 udc_set_mask_UDCCR(udc, UDCCR_UDE);
1772 ep_write_UDCCSR(&udc->pxa_ep[0], UDCCSR0_ACM);
1774 if (udc_readl(udc, UDCCR) & UDCCR_EMCE)
1775 dev_err(udc->dev, "Configuration errors, udc disabled\n");
1778 * Caller must be able to sleep in order to cope with startup transients
1782 /* enable suspend/resume and reset irqs */
1783 udc_writel(udc, UDCICR1,
1784 UDCICR1_IECC | UDCICR1_IERU
1785 | UDCICR1_IESU | UDCICR1_IERS);
1787 /* enable ep0 irqs */
1788 pio_irq_enable(&udc->pxa_ep[0]);
1794 * usb_gadget_register_driver - Register gadget driver
1795 * @driver: gadget driver
1797 * When a driver is successfully registered, it will receive control requests
1798 * including set_configuration(), which enables non-control requests. Then
1799 * usb traffic follows until a disconnect is reported. Then a host may connect
1800 * again, or the driver might get unbound.
1802 * Note that the udc is not automatically enabled. Check function
1803 * should_enable_udc().
1805 * Returns 0 if no error, -EINVAL, -ENODEV, -EBUSY otherwise
1807 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1809 struct pxa_udc *udc = the_controller;
1812 if (!driver || driver->speed < USB_SPEED_FULL || !driver->bind
1813 || !driver->disconnect || !driver->setup)
1820 /* first hook up the driver ... */
1821 udc->driver = driver;
1822 udc->gadget.dev.driver = &driver->driver;
1823 dplus_pullup(udc, 1);
1825 retval = device_add(&udc->gadget.dev);
1827 dev_err(udc->dev, "device_add error %d\n", retval);
1830 retval = driver->bind(&udc->gadget);
1832 dev_err(udc->dev, "bind to driver %s --> error %d\n",
1833 driver->driver.name, retval);
1836 dev_dbg(udc->dev, "registered gadget driver '%s'\n",
1837 driver->driver.name);
1839 if (udc->transceiver) {
1840 retval = otg_set_peripheral(udc->transceiver, &udc->gadget);
1842 dev_err(udc->dev, "can't bind to transceiver\n");
1843 goto transceiver_fail;
1847 if (should_enable_udc(udc))
1853 driver->unbind(&udc->gadget);
1855 device_del(&udc->gadget.dev);
1858 udc->gadget.dev.driver = NULL;
1861 EXPORT_SYMBOL(usb_gadget_register_driver);
1865 * stop_activity - Stops udc endpoints
1867 * @driver: gadget driver
1869 * Disables all udc endpoints (even control endpoint), report disconnect to
1872 static void stop_activity(struct pxa_udc *udc, struct usb_gadget_driver *driver)
1876 /* don't disconnect drivers more than once */
1877 if (udc->gadget.speed == USB_SPEED_UNKNOWN)
1879 udc->gadget.speed = USB_SPEED_UNKNOWN;
1881 for (i = 0; i < NR_USB_ENDPOINTS; i++)
1882 pxa_ep_disable(&udc->udc_usb_ep[i].usb_ep);
1885 driver->disconnect(&udc->gadget);
1889 * usb_gadget_unregister_driver - Unregister the gadget driver
1890 * @driver: gadget driver
1892 * Returns 0 if no error, -ENODEV, -EINVAL otherwise
1894 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1896 struct pxa_udc *udc = the_controller;
1900 if (!driver || driver != udc->driver || !driver->unbind)
1903 stop_activity(udc, driver);
1905 dplus_pullup(udc, 0);
1907 driver->unbind(&udc->gadget);
1910 device_del(&udc->gadget.dev);
1911 dev_info(udc->dev, "unregistered gadget driver '%s'\n",
1912 driver->driver.name);
1914 if (udc->transceiver)
1915 return otg_set_peripheral(udc->transceiver, NULL);
1918 EXPORT_SYMBOL(usb_gadget_unregister_driver);
1921 * handle_ep0_ctrl_req - handle control endpoint control request
1923 * @req: control request
1925 static void handle_ep0_ctrl_req(struct pxa_udc *udc,
1926 struct pxa27x_request *req)
1928 struct pxa_ep *ep = &udc->pxa_ep[0];
1930 struct usb_ctrlrequest r;
1934 int have_extrabytes = 0;
1935 unsigned long flags;
1938 spin_lock_irqsave(&ep->lock, flags);
1941 * In the PXA320 manual, in the section about Back-to-Back setup
1942 * packets, it describes this situation. The solution is to set OPC to
1943 * get rid of the status packet, and then continue with the setup
1944 * packet. Generalize to pxa27x CPUs.
1946 if (epout_has_pkt(ep) && (ep_count_bytes_remain(ep) == 0))
1947 ep_write_UDCCSR(ep, UDCCSR0_OPC);
1949 /* read SETUP packet */
1950 for (i = 0; i < 2; i++) {
1951 if (unlikely(ep_is_empty(ep)))
1953 u.word[i] = udc_ep_readl(ep, UDCDR);
1956 have_extrabytes = !ep_is_empty(ep);
1957 while (!ep_is_empty(ep)) {
1958 i = udc_ep_readl(ep, UDCDR);
1959 ep_err(ep, "wrong to have extra bytes for setup : 0x%08x\n", i);
1962 ep_dbg(ep, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1963 u.r.bRequestType, u.r.bRequest,
1964 le16_to_cpu(u.r.wValue), le16_to_cpu(u.r.wIndex),
1965 le16_to_cpu(u.r.wLength));
1966 if (unlikely(have_extrabytes))
1969 if (u.r.bRequestType & USB_DIR_IN)
1970 set_ep0state(udc, IN_DATA_STAGE);
1972 set_ep0state(udc, OUT_DATA_STAGE);
1974 /* Tell UDC to enter Data Stage */
1975 ep_write_UDCCSR(ep, UDCCSR0_SA | UDCCSR0_OPC);
1977 spin_unlock_irqrestore(&ep->lock, flags);
1978 i = udc->driver->setup(&udc->gadget, &u.r);
1979 spin_lock_irqsave(&ep->lock, flags);
1983 spin_unlock_irqrestore(&ep->lock, flags);
1986 ep_dbg(ep, "protocol STALL, udccsr0=%03x err %d\n",
1987 udc_ep_readl(ep, UDCCSR), i);
1988 ep_write_UDCCSR(ep, UDCCSR0_FST | UDCCSR0_FTF);
1989 set_ep0state(udc, STALL);
1994 * handle_ep0 - Handle control endpoint data transfers
1996 * @fifo_irq: 1 if triggered by fifo service type irq
1997 * @opc_irq: 1 if triggered by output packet complete type irq
1999 * Context : when in_interrupt() or with ep->lock held
2001 * Tries to transfer all pending request data into the endpoint and/or
2002 * transfer all pending data in the endpoint into usb requests.
2003 * Handles states of ep0 automata.
2005 * PXA27x hardware handles several standard usb control requests without
2006 * driver notification. The requests fully handled by hardware are :
2007 * SET_ADDRESS, SET_FEATURE, CLEAR_FEATURE, GET_CONFIGURATION, GET_INTERFACE,
2009 * The requests handled by hardware, but with irq notification are :
2010 * SYNCH_FRAME, SET_CONFIGURATION, SET_INTERFACE
2011 * The remaining standard requests really handled by handle_ep0 are :
2012 * GET_DESCRIPTOR, SET_DESCRIPTOR, specific requests.
2013 * Requests standardized outside of USB 2.0 chapter 9 are handled more
2014 * uniformly, by gadget drivers.
2016 * The control endpoint state machine is _not_ USB spec compliant, it's even
2017 * hardly compliant with Intel PXA270 developers guide.
2018 * The key points which inferred this state machine are :
2019 * - on every setup token, bit UDCCSR0_SA is raised and held until cleared by
2021 * - on every OUT packet received, UDCCSR0_OPC is raised and held until
2022 * cleared by software.
2023 * - clearing UDCCSR0_OPC always flushes ep0. If in setup stage, never do it
2024 * before reading ep0.
2025 * This is true only for PXA27x. This is not true anymore for PXA3xx family
2026 * (check Back-to-Back setup packet in developers guide).
2027 * - irq can be called on a "packet complete" event (opc_irq=1), while
2028 * UDCCSR0_OPC is not yet raised (delta can be as big as 100ms
2029 * from experimentation).
2030 * - as UDCCSR0_SA can be activated while in irq handling, and clearing
2031 * UDCCSR0_OPC would flush the setup data, we almost never clear UDCCSR0_OPC
2032 * => we never actually read the "status stage" packet of an IN data stage
2033 * => this is not documented in Intel documentation
2034 * - hardware as no idea of STATUS STAGE, it only handle SETUP STAGE and DATA
2035 * STAGE. The driver add STATUS STAGE to send last zero length packet in
2037 * - special attention was needed for IN_STATUS_STAGE. If a packet complete
2038 * event is detected, we terminate the status stage without ackowledging the
2039 * packet (not to risk to loose a potential SETUP packet)
2041 static void handle_ep0(struct pxa_udc *udc, int fifo_irq, int opc_irq)
2044 struct pxa_ep *ep = &udc->pxa_ep[0];
2045 struct pxa27x_request *req = NULL;
2048 if (!list_empty(&ep->queue))
2049 req = list_entry(ep->queue.next, struct pxa27x_request, queue);
2051 udccsr0 = udc_ep_readl(ep, UDCCSR);
2052 ep_dbg(ep, "state=%s, req=%p, udccsr0=0x%03x, udcbcr=%d, irq_msk=%x\n",
2053 EP0_STNAME(udc), req, udccsr0, udc_ep_readl(ep, UDCBCR),
2054 (fifo_irq << 1 | opc_irq));
2056 if (udccsr0 & UDCCSR0_SST) {
2057 ep_dbg(ep, "clearing stall status\n");
2059 ep_write_UDCCSR(ep, UDCCSR0_SST);
2063 if (udccsr0 & UDCCSR0_SA) {
2065 set_ep0state(udc, SETUP_STAGE);
2068 switch (udc->ep0state) {
2069 case WAIT_FOR_SETUP:
2071 * Hardware bug : beware, we cannot clear OPC, since we would
2072 * miss a potential OPC irq for a setup packet.
2073 * So, we only do ... nothing, and hope for a next irq with
2078 udccsr0 &= UDCCSR0_CTRL_REQ_MASK;
2079 if (likely(udccsr0 == UDCCSR0_CTRL_REQ_MASK))
2080 handle_ep0_ctrl_req(udc, req);
2082 case IN_DATA_STAGE: /* GET_DESCRIPTOR */
2083 if (epout_has_pkt(ep))
2084 ep_write_UDCCSR(ep, UDCCSR0_OPC);
2085 if (req && !ep_is_full(ep))
2086 completed = write_ep0_fifo(ep, req);
2088 ep0_end_in_req(ep, req, NULL);
2090 case OUT_DATA_STAGE: /* SET_DESCRIPTOR */
2091 if (epout_has_pkt(ep) && req)
2092 completed = read_ep0_fifo(ep, req);
2094 ep0_end_out_req(ep, req, NULL);
2097 ep_write_UDCCSR(ep, UDCCSR0_FST);
2099 case IN_STATUS_STAGE:
2101 * Hardware bug : beware, we cannot clear OPC, since we would
2102 * miss a potential PC irq for a setup packet.
2103 * So, we only put the ep0 into WAIT_FOR_SETUP state.
2108 case OUT_STATUS_STAGE:
2109 case WAIT_ACK_SET_CONF_INTERF:
2110 ep_warn(ep, "should never get in %s state here!!!\n",
2111 EP0_STNAME(ep->dev));
2118 * handle_ep - Handle endpoint data tranfers
2119 * @ep: pxa physical endpoint
2121 * Tries to transfer all pending request data into the endpoint and/or
2122 * transfer all pending data in the endpoint into usb requests.
2124 * Is always called when in_interrupt() and with ep->lock released.
2126 static void handle_ep(struct pxa_ep *ep)
2128 struct pxa27x_request *req;
2131 int is_in = ep->dir_in;
2133 unsigned long flags;
2135 spin_lock_irqsave(&ep->lock, flags);
2136 if (ep->in_handle_ep)
2137 goto recursion_detected;
2138 ep->in_handle_ep = 1;
2142 udccsr = udc_ep_readl(ep, UDCCSR);
2144 if (likely(!list_empty(&ep->queue)))
2145 req = list_entry(ep->queue.next,
2146 struct pxa27x_request, queue);
2150 ep_dbg(ep, "req:%p, udccsr 0x%03x loop=%d\n",
2151 req, udccsr, loop++);
2153 if (unlikely(udccsr & (UDCCSR_SST | UDCCSR_TRN)))
2154 udc_ep_writel(ep, UDCCSR,
2155 udccsr & (UDCCSR_SST | UDCCSR_TRN));
2159 if (unlikely(is_in)) {
2160 if (likely(!ep_is_full(ep)))
2161 completed = write_fifo(ep, req);
2163 if (likely(epout_has_pkt(ep)))
2164 completed = read_fifo(ep, req);
2169 ep_end_in_req(ep, req, &flags);
2171 ep_end_out_req(ep, req, &flags);
2173 } while (completed);
2175 ep->in_handle_ep = 0;
2177 spin_unlock_irqrestore(&ep->lock, flags);
2181 * pxa27x_change_configuration - Handle SET_CONF usb request notification
2183 * @config: usb configuration
2185 * Post the request to upper level.
2186 * Don't use any pxa specific harware configuration capabilities
2188 static void pxa27x_change_configuration(struct pxa_udc *udc, int config)
2190 struct usb_ctrlrequest req ;
2192 dev_dbg(udc->dev, "config=%d\n", config);
2194 udc->config = config;
2195 udc->last_interface = 0;
2196 udc->last_alternate = 0;
2198 req.bRequestType = 0;
2199 req.bRequest = USB_REQ_SET_CONFIGURATION;
2200 req.wValue = config;
2204 set_ep0state(udc, WAIT_ACK_SET_CONF_INTERF);
2205 udc->driver->setup(&udc->gadget, &req);
2206 ep_write_UDCCSR(&udc->pxa_ep[0], UDCCSR0_AREN);
2210 * pxa27x_change_interface - Handle SET_INTERF usb request notification
2212 * @iface: interface number
2213 * @alt: alternate setting number
2215 * Post the request to upper level.
2216 * Don't use any pxa specific harware configuration capabilities
2218 static void pxa27x_change_interface(struct pxa_udc *udc, int iface, int alt)
2220 struct usb_ctrlrequest req;
2222 dev_dbg(udc->dev, "interface=%d, alternate setting=%d\n", iface, alt);
2224 udc->last_interface = iface;
2225 udc->last_alternate = alt;
2227 req.bRequestType = USB_RECIP_INTERFACE;
2228 req.bRequest = USB_REQ_SET_INTERFACE;
2233 set_ep0state(udc, WAIT_ACK_SET_CONF_INTERF);
2234 udc->driver->setup(&udc->gadget, &req);
2235 ep_write_UDCCSR(&udc->pxa_ep[0], UDCCSR0_AREN);
2239 * irq_handle_data - Handle data transfer
2240 * @irq: irq IRQ number
2241 * @udc: dev pxa_udc device structure
2243 * Called from irq handler, transferts data to or from endpoint to queue
2245 static void irq_handle_data(int irq, struct pxa_udc *udc)
2249 u32 udcisr0 = udc_readl(udc, UDCISR0) & UDCCISR0_EP_MASK;
2250 u32 udcisr1 = udc_readl(udc, UDCISR1) & UDCCISR1_EP_MASK;
2252 if (udcisr0 & UDCISR_INT_MASK) {
2253 udc->pxa_ep[0].stats.irqs++;
2254 udc_writel(udc, UDCISR0, UDCISR_INT(0, UDCISR_INT_MASK));
2255 handle_ep0(udc, !!(udcisr0 & UDCICR_FIFOERR),
2256 !!(udcisr0 & UDCICR_PKTCOMPL));
2260 for (i = 1; udcisr0 != 0 && i < 16; udcisr0 >>= 2, i++) {
2261 if (!(udcisr0 & UDCISR_INT_MASK))
2264 udc_writel(udc, UDCISR0, UDCISR_INT(i, UDCISR_INT_MASK));
2266 WARN_ON(i >= ARRAY_SIZE(udc->pxa_ep));
2267 if (i < ARRAY_SIZE(udc->pxa_ep)) {
2268 ep = &udc->pxa_ep[i];
2274 for (i = 16; udcisr1 != 0 && i < 24; udcisr1 >>= 2, i++) {
2275 udc_writel(udc, UDCISR1, UDCISR_INT(i - 16, UDCISR_INT_MASK));
2276 if (!(udcisr1 & UDCISR_INT_MASK))
2279 WARN_ON(i >= ARRAY_SIZE(udc->pxa_ep));
2280 if (i < ARRAY_SIZE(udc->pxa_ep)) {
2281 ep = &udc->pxa_ep[i];
2290 * irq_udc_suspend - Handle IRQ "UDC Suspend"
2293 static void irq_udc_suspend(struct pxa_udc *udc)
2295 udc_writel(udc, UDCISR1, UDCISR1_IRSU);
2296 udc->stats.irqs_suspend++;
2298 if (udc->gadget.speed != USB_SPEED_UNKNOWN
2299 && udc->driver && udc->driver->suspend)
2300 udc->driver->suspend(&udc->gadget);
2305 * irq_udc_resume - Handle IRQ "UDC Resume"
2308 static void irq_udc_resume(struct pxa_udc *udc)
2310 udc_writel(udc, UDCISR1, UDCISR1_IRRU);
2311 udc->stats.irqs_resume++;
2313 if (udc->gadget.speed != USB_SPEED_UNKNOWN
2314 && udc->driver && udc->driver->resume)
2315 udc->driver->resume(&udc->gadget);
2319 * irq_udc_reconfig - Handle IRQ "UDC Change Configuration"
2322 static void irq_udc_reconfig(struct pxa_udc *udc)
2324 unsigned config, interface, alternate, config_change;
2325 u32 udccr = udc_readl(udc, UDCCR);
2327 udc_writel(udc, UDCISR1, UDCISR1_IRCC);
2328 udc->stats.irqs_reconfig++;
2330 config = (udccr & UDCCR_ACN) >> UDCCR_ACN_S;
2331 config_change = (config != udc->config);
2332 pxa27x_change_configuration(udc, config);
2334 interface = (udccr & UDCCR_AIN) >> UDCCR_AIN_S;
2335 alternate = (udccr & UDCCR_AAISN) >> UDCCR_AAISN_S;
2336 pxa27x_change_interface(udc, interface, alternate);
2339 update_pxa_ep_matches(udc);
2340 udc_set_mask_UDCCR(udc, UDCCR_SMAC);
2344 * irq_udc_reset - Handle IRQ "UDC Reset"
2347 static void irq_udc_reset(struct pxa_udc *udc)
2349 u32 udccr = udc_readl(udc, UDCCR);
2350 struct pxa_ep *ep = &udc->pxa_ep[0];
2352 dev_info(udc->dev, "USB reset\n");
2353 udc_writel(udc, UDCISR1, UDCISR1_IRRS);
2354 udc->stats.irqs_reset++;
2356 if ((udccr & UDCCR_UDA) == 0) {
2357 dev_dbg(udc->dev, "USB reset start\n");
2358 stop_activity(udc, udc->driver);
2360 udc->gadget.speed = USB_SPEED_FULL;
2361 memset(&udc->stats, 0, sizeof udc->stats);
2364 ep_write_UDCCSR(ep, UDCCSR0_FTF | UDCCSR0_OPC);
2369 * pxa_udc_irq - Main irq handler
2373 * Handles all udc interrupts
2375 static irqreturn_t pxa_udc_irq(int irq, void *_dev)
2377 struct pxa_udc *udc = _dev;
2378 u32 udcisr0 = udc_readl(udc, UDCISR0);
2379 u32 udcisr1 = udc_readl(udc, UDCISR1);
2380 u32 udccr = udc_readl(udc, UDCCR);
2383 dev_vdbg(udc->dev, "Interrupt, UDCISR0:0x%08x, UDCISR1:0x%08x, "
2384 "UDCCR:0x%08x\n", udcisr0, udcisr1, udccr);
2386 udcisr1_spec = udcisr1 & 0xf8000000;
2387 if (unlikely(udcisr1_spec & UDCISR1_IRSU))
2388 irq_udc_suspend(udc);
2389 if (unlikely(udcisr1_spec & UDCISR1_IRRU))
2390 irq_udc_resume(udc);
2391 if (unlikely(udcisr1_spec & UDCISR1_IRCC))
2392 irq_udc_reconfig(udc);
2393 if (unlikely(udcisr1_spec & UDCISR1_IRRS))
2396 if ((udcisr0 & UDCCISR0_EP_MASK) | (udcisr1 & UDCCISR1_EP_MASK))
2397 irq_handle_data(irq, udc);
2402 static struct pxa_udc memory = {
2404 .ops = &pxa_udc_ops,
2405 .ep0 = &memory.udc_usb_ep[0].usb_ep,
2406 .name = driver_name,
2408 .init_name = "gadget",
2423 /* Endpoints for gadget zero */
2424 PXA_EP_OUT_BULK(1, 1, 3, 0, 0),
2425 PXA_EP_IN_BULK(2, 2, 3, 0, 0),
2426 /* Endpoints for ether gadget, file storage gadget */
2427 PXA_EP_OUT_BULK(3, 1, 1, 0, 0),
2428 PXA_EP_IN_BULK(4, 2, 1, 0, 0),
2429 PXA_EP_IN_ISO(5, 3, 1, 0, 0),
2430 PXA_EP_OUT_ISO(6, 4, 1, 0, 0),
2431 PXA_EP_IN_INT(7, 5, 1, 0, 0),
2432 /* Endpoints for RNDIS, serial */
2433 PXA_EP_OUT_BULK(8, 1, 2, 0, 0),
2434 PXA_EP_IN_BULK(9, 2, 2, 0, 0),
2435 PXA_EP_IN_INT(10, 5, 2, 0, 0),
2437 * All the following endpoints are only for completion. They
2438 * won't never work, as multiple interfaces are really broken on
2441 PXA_EP_OUT_BULK(11, 1, 2, 1, 0),
2442 PXA_EP_IN_BULK(12, 2, 2, 1, 0),
2443 /* Endpoint for CDC Ether */
2444 PXA_EP_OUT_BULK(13, 1, 1, 1, 1),
2445 PXA_EP_IN_BULK(14, 2, 1, 1, 1),
2450 * pxa_udc_probe - probes the udc device
2451 * @_dev: platform device
2453 * Perform basic init : allocates udc clock, creates sysfs files, requests
2456 static int __init pxa_udc_probe(struct platform_device *pdev)
2458 struct resource *regs;
2459 struct pxa_udc *udc = &memory;
2460 int retval = 0, gpio;
2462 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2465 udc->irq = platform_get_irq(pdev, 0);
2469 udc->dev = &pdev->dev;
2470 udc->mach = pdev->dev.platform_data;
2471 udc->transceiver = otg_get_transceiver();
2473 gpio = udc->mach->gpio_pullup;
2474 if (gpio_is_valid(gpio)) {
2475 retval = gpio_request(gpio, "USB D+ pullup");
2477 gpio_direction_output(gpio,
2478 udc->mach->gpio_pullup_inverted);
2481 dev_err(&pdev->dev, "Couldn't request gpio %d : %d\n",
2486 udc->clk = clk_get(&pdev->dev, NULL);
2487 if (IS_ERR(udc->clk)) {
2488 retval = PTR_ERR(udc->clk);
2493 udc->regs = ioremap(regs->start, resource_size(regs));
2495 dev_err(&pdev->dev, "Unable to map UDC I/O memory\n");
2499 device_initialize(&udc->gadget.dev);
2500 udc->gadget.dev.parent = &pdev->dev;
2501 udc->gadget.dev.dma_mask = NULL;
2502 udc->vbus_sensed = 0;
2504 the_controller = udc;
2505 platform_set_drvdata(pdev, udc);
2509 /* irq setup after old hardware state is cleaned up */
2510 retval = request_irq(udc->irq, pxa_udc_irq,
2511 IRQF_SHARED, driver_name, udc);
2513 dev_err(udc->dev, "%s: can't get irq %i, err %d\n",
2514 driver_name, IRQ_USB, retval);
2518 pxa_init_debugfs(udc);
2530 * pxa_udc_remove - removes the udc device driver
2531 * @_dev: platform device
2533 static int __exit pxa_udc_remove(struct platform_device *_dev)
2535 struct pxa_udc *udc = platform_get_drvdata(_dev);
2536 int gpio = udc->mach->gpio_pullup;
2538 usb_gadget_unregister_driver(udc->driver);
2539 free_irq(udc->irq, udc);
2540 pxa_cleanup_debugfs(udc);
2541 if (gpio_is_valid(gpio))
2544 otg_put_transceiver(udc->transceiver);
2546 udc->transceiver = NULL;
2547 platform_set_drvdata(_dev, NULL);
2548 the_controller = NULL;
2555 static void pxa_udc_shutdown(struct platform_device *_dev)
2557 struct pxa_udc *udc = platform_get_drvdata(_dev);
2559 if (udc_readl(udc, UDCCR) & UDCCR_UDE)
2563 #ifdef CONFIG_CPU_PXA27x
2564 extern void pxa27x_clear_otgph(void);
2566 #define pxa27x_clear_otgph() do {} while (0)
2571 * pxa_udc_suspend - Suspend udc device
2572 * @_dev: platform device
2573 * @state: suspend state
2575 * Suspends udc : saves configuration registers (UDCCR*), then disables the udc
2578 static int pxa_udc_suspend(struct platform_device *_dev, pm_message_t state)
2581 struct pxa_udc *udc = platform_get_drvdata(_dev);
2584 ep = &udc->pxa_ep[0];
2585 udc->udccsr0 = udc_ep_readl(ep, UDCCSR);
2586 for (i = 1; i < NR_PXA_ENDPOINTS; i++) {
2587 ep = &udc->pxa_ep[i];
2588 ep->udccsr_value = udc_ep_readl(ep, UDCCSR);
2589 ep->udccr_value = udc_ep_readl(ep, UDCCR);
2590 ep_dbg(ep, "udccsr:0x%03x, udccr:0x%x\n",
2591 ep->udccsr_value, ep->udccr_value);
2595 udc->pullup_resume = udc->pullup_on;
2596 dplus_pullup(udc, 0);
2602 * pxa_udc_resume - Resume udc device
2603 * @_dev: platform device
2605 * Resumes udc : restores configuration registers (UDCCR*), then enables the udc
2608 static int pxa_udc_resume(struct platform_device *_dev)
2611 struct pxa_udc *udc = platform_get_drvdata(_dev);
2614 ep = &udc->pxa_ep[0];
2615 udc_ep_writel(ep, UDCCSR, udc->udccsr0 & (UDCCSR0_FST | UDCCSR0_DME));
2616 for (i = 1; i < NR_PXA_ENDPOINTS; i++) {
2617 ep = &udc->pxa_ep[i];
2618 udc_ep_writel(ep, UDCCSR, ep->udccsr_value);
2619 udc_ep_writel(ep, UDCCR, ep->udccr_value);
2620 ep_dbg(ep, "udccsr:0x%03x, udccr:0x%x\n",
2621 ep->udccsr_value, ep->udccr_value);
2624 dplus_pullup(udc, udc->pullup_resume);
2625 if (should_enable_udc(udc))
2628 * We do not handle OTG yet.
2630 * OTGPH bit is set when sleep mode is entered.
2631 * it indicates that OTG pad is retaining its state.
2632 * Upon exit from sleep mode and before clearing OTGPH,
2633 * Software must configure the USB OTG pad, UDC, and UHC
2634 * to the state they were in before entering sleep mode.
2636 pxa27x_clear_otgph();
2642 /* work with hotplug and coldplug */
2643 MODULE_ALIAS("platform:pxa27x-udc");
2645 static struct platform_driver udc_driver = {
2647 .name = "pxa27x-udc",
2648 .owner = THIS_MODULE,
2650 .remove = __exit_p(pxa_udc_remove),
2651 .shutdown = pxa_udc_shutdown,
2653 .suspend = pxa_udc_suspend,
2654 .resume = pxa_udc_resume
2658 static int __init udc_init(void)
2660 if (!cpu_is_pxa27x() && !cpu_is_pxa3xx())
2663 printk(KERN_INFO "%s: version %s\n", driver_name, DRIVER_VERSION);
2664 return platform_driver_probe(&udc_driver, pxa_udc_probe);
2666 module_init(udc_init);
2669 static void __exit udc_exit(void)
2671 platform_driver_unregister(&udc_driver);
2673 module_exit(udc_exit);
2675 MODULE_DESCRIPTION(DRIVER_DESC);
2676 MODULE_AUTHOR("Robert Jarzmik");
2677 MODULE_LICENSE("GPL");