drivers/usb/gadget/pxa25x_udc.c

   1 /*
   2  * Intel PXA25x and IXP4xx on-chip full speed USB device controllers
   3  *
   4  * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker)
   5  * Copyright (C) 2003 Robert Schwebel, Pengutronix
   6  * Copyright (C) 2003 Benedikt Spranger, Pengutronix
   7  * Copyright (C) 2003 David Brownell
   8  * Copyright (C) 2003 Joshua Wise
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or
  13  * (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  23  *
  24  */
  25
  26 /* #define VERBOSE_DEBUG */
  27
  28 #include <linux/device.h>
  29 #include <linux/module.h>
  30 #include <linux/kernel.h>
  31 #include <linux/ioport.h>
  32 #include <linux/types.h>
  33 #include <linux/errno.h>
  34 #include <linux/delay.h>
  35 #include <linux/slab.h>
  36 #include <linux/init.h>
  37 #include <linux/timer.h>
  38 #include <linux/list.h>
  39 #include <linux/interrupt.h>
  40 #include <linux/mm.h>
  41 #include <linux/platform_device.h>
  42 #include <linux/dma-mapping.h>
  43 #include <linux/irq.h>
  44 #include <linux/clk.h>
  45 #include <linux/err.h>
  46 #include <linux/seq_file.h>
  47 #include <linux/debugfs.h>
  48 #include <linux/io.h>
  49
  50 #include <asm/byteorder.h>
  51 #include <asm/dma.h>
  52 #include <asm/gpio.h>
  53 #include <asm/system.h>
  54 #include <asm/mach-types.h>
  55 #include <asm/unaligned.h>
  56
  57 #include <linux/usb/ch9.h>
  58 #include <linux/usb/gadget.h>
  59
  60 /*
  61  * This driver is PXA25x only.  Grab the right register definitions.
  62  */
  63 #ifdef CONFIG_ARCH_PXA
  64 #include <asm/arch/pxa25x-udc.h>
  65 #endif
  66
  67 #include <asm/mach/udc_pxa2xx.h>
  68
  69
  70 /*
  71  * This driver handles the USB Device Controller (UDC) in Intel's PXA 25x
  72  * series processors.  The UDC for the IXP 4xx series is very similar.
  73  * There are fifteen endpoints, in addition to ep0.
  74  *
  75  * Such controller drivers work with a gadget driver.  The gadget driver
  76  * returns descriptors, implements configuration and data protocols used
  77  * by the host to interact with this device, and allocates endpoints to
  78  * the different protocol interfaces.  The controller driver virtualizes
  79  * usb hardware so that the gadget drivers will be more portable.
  80  *
  81  * This UDC hardware wants to implement a bit too much USB protocol, so
  82  * it constrains the sorts of USB configuration change events that work.
  83  * The errata for these chips are misleading; some "fixed" bugs from
  84  * pxa250 a0/a1 b0/b1/b2 sure act like they're still there.
  85  *
  86  * Note that the UDC hardware supports DMA (except on IXP) but that's
  87  * not used here.  IN-DMA (to host) is simple enough, when the data is
  88  * suitably aligned (16 bytes) ... the network stack doesn't do that,
  89  * other software can.  OUT-DMA is buggy in most chip versions, as well
  90  * as poorly designed (data toggle not automatic).  So this driver won't
  91  * bother using DMA.  (Mostly-working IN-DMA support was available in
  92  * kernels before 2.6.23, but was never enabled or well tested.)
  93  */
  94
  95 #define DRIVER_VERSION  "30-June-2007"
  96 #define DRIVER_DESC     "PXA 25x USB Device Controller driver"
  97
  98
  99 static const char driver_name [] = "pxa25x_udc";
 100
 101 static const char ep0name [] = "ep0";
 102
 103
 104 #ifdef CONFIG_ARCH_IXP4XX
 105
 106 /* cpu-specific register addresses are compiled in to this code */
 107 #ifdef CONFIG_ARCH_PXA
 108 #error "Can't configure both IXP and PXA"
 109 #endif
 110
 111 /* IXP doesn't yet support <linux/clk.h> */
 112 #define clk_get(dev,name)       NULL
 113 #define clk_enable(clk)         do { } while (0)
 114 #define clk_disable(clk)        do { } while (0)
 115 #define clk_put(clk)            do { } while (0)
 116
 117 #endif
 118
 119 #include "pxa25x_udc.h"
 120
 121
 122 #ifdef  CONFIG_USB_PXA25X_SMALL
 123 #define SIZE_STR        " (small)"
 124 #else
 125 #define SIZE_STR        ""
 126 #endif
 127
 128 /* ---------------------------------------------------------------------------
 129  *      endpoint related parts of the api to the usb controller hardware,
 130  *      used by gadget driver; and the inner talker-to-hardware core.
 131  * ---------------------------------------------------------------------------
 132  */
 133
 134 static void pxa25x_ep_fifo_flush (struct usb_ep *ep);
 135 static void nuke (struct pxa25x_ep *, int status);
 136
 137 /* one GPIO should be used to detect VBUS from the host */
 138 static int is_vbus_present(void)
 139 {
 140         struct pxa2xx_udc_mach_info             *mach = the_controller->mach;
 141
 142         if (mach->gpio_vbus) {
 143                 int value = gpio_get_value(mach->gpio_vbus);
 144                 return mach->gpio_vbus_inverted ? !value : value;
 145         }
 146         if (mach->udc_is_connected)
 147                 return mach->udc_is_connected();
 148         return 1;
 149 }
 150
 151 /* one GPIO should control a D+ pullup, so host sees this device (or not) */
 152 static void pullup_off(void)
 153 {
 154         struct pxa2xx_udc_mach_info             *mach = the_controller->mach;
 155
 156         if (mach->gpio_pullup)
 157                 gpio_set_value(mach->gpio_pullup, 0);
 158         else if (mach->udc_command)
 159                 mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
 160 }
 161
 162 static void pullup_on(void)
 163 {
 164         struct pxa2xx_udc_mach_info             *mach = the_controller->mach;
 165
 166         if (mach->gpio_pullup)
 167                 gpio_set_value(mach->gpio_pullup, 1);
 168         else if (mach->udc_command)
 169                 mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
 170 }
 171
 172 static void pio_irq_enable(int bEndpointAddress)
 173 {
 174         bEndpointAddress &= 0xf;
 175         if (bEndpointAddress < 8)
 176                 UICR0 &= ~(1 << bEndpointAddress);
 177         else {
 178                 bEndpointAddress -= 8;
 179                 UICR1 &= ~(1 << bEndpointAddress);
 180         }
 181 }
 182
 183 static void pio_irq_disable(int bEndpointAddress)
 184 {
 185         bEndpointAddress &= 0xf;
 186         if (bEndpointAddress < 8)
 187                 UICR0 |= 1 << bEndpointAddress;
 188         else {
 189                 bEndpointAddress -= 8;
 190                 UICR1 |= 1 << bEndpointAddress;
 191         }
 192 }
 193
 194 /* The UDCCR reg contains mask and interrupt status bits,
 195  * so using '|=' isn't safe as it may ack an interrupt.
 196  */
 197 #define UDCCR_MASK_BITS         (UDCCR_REM | UDCCR_SRM | UDCCR_UDE)
 198
 199 static inline void udc_set_mask_UDCCR(int mask)
 200 {
 201         UDCCR = (UDCCR & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS);
 202 }
 203
 204 static inline void udc_clear_mask_UDCCR(int mask)
 205 {
 206         UDCCR = (UDCCR & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS);
 207 }
 208
 209 static inline void udc_ack_int_UDCCR(int mask)
 210 {
 211         /* udccr contains the bits we dont want to change */
 212         __u32 udccr = UDCCR & UDCCR_MASK_BITS;
 213
 214         UDCCR = udccr | (mask & ~UDCCR_MASK_BITS);
 215 }
 216
 217 /*
 218  * endpoint enable/disable
 219  *
 220  * we need to verify the descriptors used to enable endpoints.  since pxa25x
 221  * endpoint configurations are fixed, and are pretty much always enabled,
 222  * there's not a lot to manage here.
 223  *
 224  * because pxa25x can't selectively initialize bulk (or interrupt) endpoints,
 225  * (resetting endpoint halt and toggle), SET_INTERFACE is unusable except
 226  * for a single interface (with only the default altsetting) and for gadget
 227  * drivers that don't halt endpoints (not reset by set_interface).  that also
 228  * means that if you use ISO, you must violate the USB spec rule that all
 229  * iso endpoints must be in non-default altsettings.
 230  */
 231 static int pxa25x_ep_enable (struct usb_ep *_ep,
 232                 const struct usb_endpoint_descriptor *desc)
 233 {
 234         struct pxa25x_ep        *ep;
 235         struct pxa25x_udc       *dev;
 236
 237         ep = container_of (_ep, struct pxa25x_ep, ep);
 238         if (!_ep || !desc || ep->desc || _ep->name == ep0name
 239                         || desc->bDescriptorType != USB_DT_ENDPOINT
 240                         || ep->bEndpointAddress != desc->bEndpointAddress
 241                         || ep->fifo_size < le16_to_cpu
 242                                                 (desc->wMaxPacketSize)) {
 243                 DMSG("%s, bad ep or descriptor\n", __func__);
 244                 return -EINVAL;
 245         }
 246
 247         /* xfer types must match, except that interrupt ~= bulk */
 248         if (ep->bmAttributes != desc->bmAttributes
 249                         && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
 250                         && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
 251                 DMSG("%s, %s type mismatch\n", __func__, _ep->name);
 252                 return -EINVAL;
 253         }
 254
 255         /* hardware _could_ do smaller, but driver doesn't */
 256         if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
 257                                 && le16_to_cpu (desc->wMaxPacketSize)
 258                                                 != BULK_FIFO_SIZE)
 259                         || !desc->wMaxPacketSize) {
 260                 DMSG("%s, bad %s maxpacket\n", __func__, _ep->name);
 261                 return -ERANGE;
 262         }
 263
 264         dev = ep->dev;
 265         if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
 266                 DMSG("%s, bogus device state\n", __func__);
 267                 return -ESHUTDOWN;
 268         }
 269
 270         ep->desc = desc;
 271         ep->stopped = 0;
 272         ep->pio_irqs = 0;
 273         ep->ep.maxpacket = le16_to_cpu (desc->wMaxPacketSize);
 274
 275         /* flush fifo (mostly for OUT buffers) */
 276         pxa25x_ep_fifo_flush (_ep);
 277
 278         /* ... reset halt state too, if we could ... */
 279
 280         DBG(DBG_VERBOSE, "enabled %s\n", _ep->name);
 281         return 0;
 282 }
 283
 284 static int pxa25x_ep_disable (struct usb_ep *_ep)
 285 {
 286         struct pxa25x_ep        *ep;
 287         unsigned long           flags;
 288
 289         ep = container_of (_ep, struct pxa25x_ep, ep);
 290         if (!_ep || !ep->desc) {
 291                 DMSG("%s, %s not enabled\n", __func__,
 292                         _ep ? ep->ep.name : NULL);
 293                 return -EINVAL;
 294         }
 295         local_irq_save(flags);
 296
 297         nuke (ep, -ESHUTDOWN);
 298
 299         /* flush fifo (mostly for IN buffers) */
 300         pxa25x_ep_fifo_flush (_ep);
 301
 302         ep->desc = NULL;
 303         ep->stopped = 1;
 304
 305         local_irq_restore(flags);
 306         DBG(DBG_VERBOSE, "%s disabled\n", _ep->name);
 307         return 0;
 308 }
 309
 310 /*-------------------------------------------------------------------------*/
 311
 312 /* for the pxa25x, these can just wrap kmalloc/kfree.  gadget drivers
 313  * must still pass correctly initialized endpoints, since other controller
 314  * drivers may care about how it's currently set up (dma issues etc).
 315  */
 316
 317 /*
 318  *      pxa25x_ep_alloc_request - allocate a request data structure
 319  */
 320 static struct usb_request *
 321 pxa25x_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags)
 322 {
 323         struct pxa25x_request *req;
 324
 325         req = kzalloc(sizeof(*req), gfp_flags);
 326         if (!req)
 327                 return NULL;
 328
 329         INIT_LIST_HEAD (&req->queue);
 330         return &req->req;
 331 }
 332
 333
 334 /*
 335  *      pxa25x_ep_free_request - deallocate a request data structure
 336  */
 337 static void
 338 pxa25x_ep_free_request (struct usb_ep *_ep, struct usb_request *_req)
 339 {
 340         struct pxa25x_request   *req;
 341
 342         req = container_of (_req, struct pxa25x_request, req);
 343         WARN_ON (!list_empty (&req->queue));
 344         kfree(req);
 345 }
 346
 347 /*-------------------------------------------------------------------------*/
 348
 349 /*
 350  *      done - retire a request; caller blocked irqs
 351  */
 352 static void done(struct pxa25x_ep *ep, struct pxa25x_request *req, int status)
 353 {
 354         unsigned                stopped = ep->stopped;
 355
 356         list_del_init(&req->queue);
 357
 358         if (likely (req->req.status == -EINPROGRESS))
 359                 req->req.status = status;
 360         else
 361                 status = req->req.status;
 362
 363         if (status && status != -ESHUTDOWN)
 364                 DBG(DBG_VERBOSE, "complete %s req %p stat %d len %u/%u\n",
 365                         ep->ep.name, &req->req, status,
 366                         req->req.actual, req->req.length);
 367
 368         /* don't modify queue heads during completion callback */
 369         ep->stopped = 1;
 370         req->req.complete(&ep->ep, &req->req);
 371         ep->stopped = stopped;
 372 }
 373
 374
 375 static inline void ep0_idle (struct pxa25x_udc *dev)
 376 {
 377         dev->ep0state = EP0_IDLE;
 378 }
 379
 380 static int
 381 write_packet(volatile u32 *uddr, struct pxa25x_request *req, unsigned max)
 382 {
 383         u8              *buf;
 384         unsigned        length, count;
 385
 386         buf = req->req.buf + req->req.actual;
 387         prefetch(buf);
 388
 389         /* how big will this packet be? */
 390         length = min(req->req.length - req->req.actual, max);
 391         req->req.actual += length;
 392
 393         count = length;
 394         while (likely(count--))
 395                 *uddr = *buf++;
 396
 397         return length;
 398 }
 399
 400 /*
 401  * write to an IN endpoint fifo, as many packets as possible.
 402  * irqs will use this to write the rest later.
 403  * caller guarantees at least one packet buffer is ready (or a zlp).
 404  */
 405 static int
 406 write_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
 407 {
 408         unsigned                max;
 409
 410         max = le16_to_cpu(ep->desc->wMaxPacketSize);
 411         do {
 412                 unsigned        count;
 413                 int             is_last, is_short;
 414
 415                 count = write_packet(ep->reg_uddr, req, max);
 416
 417                 /* last packet is usually short (or a zlp) */
 418                 if (unlikely (count != max))
 419                         is_last = is_short = 1;
 420                 else {
 421                         if (likely(req->req.length != req->req.actual)
 422                                         || req->req.zero)
 423                                 is_last = 0;
 424                         else
 425                                 is_last = 1;
 426                         /* interrupt/iso maxpacket may not fill the fifo */
 427                         is_short = unlikely (max < ep->fifo_size);
 428                 }
 429
 430                 DBG(DBG_VERY_NOISY, "wrote %s %d bytes%s%s %d left %p\n",
 431                         ep->ep.name, count,
 432                         is_last ? "/L" : "", is_short ? "/S" : "",
 433                         req->req.length - req->req.actual, req);
 434
 435                 /* let loose that packet. maybe try writing another one,
 436                  * double buffering might work.  TSP, TPC, and TFS
 437                  * bit values are the same for all normal IN endpoints.
 438                  */
 439                 *ep->reg_udccs = UDCCS_BI_TPC;
 440                 if (is_short)
 441                         *ep->reg_udccs = UDCCS_BI_TSP;
 442
 443                 /* requests complete when all IN data is in the FIFO */
 444                 if (is_last) {
 445                         done (ep, req, 0);
 446                         if (list_empty(&ep->queue))
 447                                 pio_irq_disable (ep->bEndpointAddress);
 448                         return 1;
 449                 }
 450
 451                 // TODO experiment: how robust can fifo mode tweaking be?
 452                 // double buffering is off in the default fifo mode, which
 453                 // prevents TFS from being set here.
 454
 455         } while (*ep->reg_udccs & UDCCS_BI_TFS);
 456         return 0;
 457 }
 458
 459 /* caller asserts req->pending (ep0 irq status nyet cleared); starts
 460  * ep0 data stage.  these chips want very simple state transitions.
 461  */
 462 static inline
 463 void ep0start(struct pxa25x_udc *dev, u32 flags, const char *tag)
 464 {
 465         UDCCS0 = flags|UDCCS0_SA|UDCCS0_OPR;
 466         USIR0 = USIR0_IR0;
 467         dev->req_pending = 0;
 468         DBG(DBG_VERY_NOISY, "%s %s, %02x/%02x\n",
 469                 __func__, tag, UDCCS0, flags);
 470 }
 471
 472 static int
 473 write_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
 474 {
 475         unsigned        count;
 476         int             is_short;
 477
 478         count = write_packet(&UDDR0, req, EP0_FIFO_SIZE);
 479         ep->dev->stats.write.bytes += count;
 480
 481         /* last packet "must be" short (or a zlp) */
 482         is_short = (count != EP0_FIFO_SIZE);
 483
 484         DBG(DBG_VERY_NOISY, "ep0in %d bytes %d left %p\n", count,
 485                 req->req.length - req->req.actual, req);
 486
 487         if (unlikely (is_short)) {
 488                 if (ep->dev->req_pending)
 489                         ep0start(ep->dev, UDCCS0_IPR, "short IN");
 490                 else
 491                         UDCCS0 = UDCCS0_IPR;
 492
 493                 count = req->req.length;
 494                 done (ep, req, 0);
 495                 ep0_idle(ep->dev);
 496 #ifndef CONFIG_ARCH_IXP4XX
 497 #if 1
 498                 /* This seems to get rid of lost status irqs in some cases:
 499                  * host responds quickly, or next request involves config
 500                  * change automagic, or should have been hidden, or ...
 501                  *
 502                  * FIXME get rid of all udelays possible...
 503                  */
 504                 if (count >= EP0_FIFO_SIZE) {
 505                         count = 100;
 506                         do {
 507                                 if ((UDCCS0 & UDCCS0_OPR) != 0) {
 508                                         /* clear OPR, generate ack */
 509                                         UDCCS0 = UDCCS0_OPR;
 510                                         break;
 511                                 }
 512                                 count--;
 513                                 udelay(1);
 514                         } while (count);
 515                 }
 516 #endif
 517 #endif
 518         } else if (ep->dev->req_pending)
 519                 ep0start(ep->dev, 0, "IN");
 520         return is_short;
 521 }
 522
 523
 524 /*
 525  * read_fifo -  unload packet(s) from the fifo we use for usb OUT
 526  * transfers and put them into the request.  caller should have made
 527  * sure there's at least one packet ready.
 528  *
 529  * returns true if the request completed because of short packet or the
 530  * request buffer having filled (and maybe overran till end-of-packet).
 531  */
 532 static int
 533 read_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
 534 {
 535         for (;;) {
 536                 u32             udccs;
 537                 u8              *buf;
 538                 unsigned        bufferspace, count, is_short;
 539
 540                 /* make sure there's a packet in the FIFO.
 541                  * UDCCS_{BO,IO}_RPC are all the same bit value.
 542                  * UDCCS_{BO,IO}_RNE are all the same bit value.
 543                  */
 544                 udccs = *ep->reg_udccs;
 545                 if (unlikely ((udccs & UDCCS_BO_RPC) == 0))
 546                         break;
 547                 buf = req->req.buf + req->req.actual;
 548                 prefetchw(buf);
 549                 bufferspace = req->req.length - req->req.actual;
 550
 551                 /* read all bytes from this packet */
 552                 if (likely (udccs & UDCCS_BO_RNE)) {
 553                         count = 1 + (0x0ff & *ep->reg_ubcr);
 554                         req->req.actual += min (count, bufferspace);
 555                 } else /* zlp */
 556                         count = 0;
 557                 is_short = (count < ep->ep.maxpacket);
 558                 DBG(DBG_VERY_NOISY, "read %s %02x, %d bytes%s req %p %d/%d\n",
 559                         ep->ep.name, udccs, count,
 560                         is_short ? "/S" : "",
 561                         req, req->req.actual, req->req.length);
 562                 while (likely (count-- != 0)) {
 563                         u8      byte = (u8) *ep->reg_uddr;
 564
 565                         if (unlikely (bufferspace == 0)) {
 566                                 /* this happens when the driver's buffer
 567                                  * is smaller than what the host sent.
 568                                  * discard the extra data.
 569                                  */
 570                                 if (req->req.status != -EOVERFLOW)
 571                                         DMSG("%s overflow %d\n",
 572                                                 ep->ep.name, count);
 573                                 req->req.status = -EOVERFLOW;
 574                         } else {
 575                                 *buf++ = byte;
 576                                 bufferspace--;
 577                         }
 578                 }
 579                 *ep->reg_udccs =  UDCCS_BO_RPC;
 580                 /* RPC/RSP/RNE could now reflect the other packet buffer */
 581
 582                 /* iso is one request per packet */
 583                 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 584                         if (udccs & UDCCS_IO_ROF)
 585                                 req->req.status = -EHOSTUNREACH;
 586                         /* more like "is_done" */
 587                         is_short = 1;
 588                 }
 589
 590                 /* completion */
 591                 if (is_short || req->req.actual == req->req.length) {
 592                         done (ep, req, 0);
 593                         if (list_empty(&ep->queue))
 594                                 pio_irq_disable (ep->bEndpointAddress);
 595                         return 1;
 596                 }
 597
 598                 /* finished that packet.  the next one may be waiting... */
 599         }
 600         return 0;
 601 }
 602
 603 /*
 604  * special ep0 version of the above.  no UBCR0 or double buffering; status
 605  * handshaking is magic.  most device protocols don't need control-OUT.
 606  * CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other
 607  * protocols do use them.
 608  */
 609 static int
 610 read_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
 611 {
 612         u8              *buf, byte;
 613         unsigned        bufferspace;
 614
 615         buf = req->req.buf + req->req.actual;
 616         bufferspace = req->req.length - req->req.actual;
 617
 618         while (UDCCS0 & UDCCS0_RNE) {
 619                 byte = (u8) UDDR0;
 620
 621                 if (unlikely (bufferspace == 0)) {
 622                         /* this happens when the driver's buffer
 623                          * is smaller than what the host sent.
 624                          * discard the extra data.
 625                          */
 626                         if (req->req.status != -EOVERFLOW)
 627                                 DMSG("%s overflow\n", ep->ep.name);
 628                         req->req.status = -EOVERFLOW;
 629                 } else {
 630                         *buf++ = byte;
 631                         req->req.actual++;
 632                         bufferspace--;
 633                 }
 634         }
 635
 636         UDCCS0 = UDCCS0_OPR | UDCCS0_IPR;
 637
 638         /* completion */
 639         if (req->req.actual >= req->req.length)
 640                 return 1;
 641
 642         /* finished that packet.  the next one may be waiting... */
 643         return 0;
 644 }
 645
 646 /*-------------------------------------------------------------------------*/
 647
 648 static int
 649 pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
 650 {
 651         struct pxa25x_request   *req;
 652         struct pxa25x_ep        *ep;
 653         struct pxa25x_udc       *dev;
 654         unsigned long           flags;
 655
 656         req = container_of(_req, struct pxa25x_request, req);
 657         if (unlikely (!_req || !_req->complete || !_req->buf
 658                         || !list_empty(&req->queue))) {
 659                 DMSG("%s, bad params\n", __func__);
 660                 return -EINVAL;
 661         }
 662
 663         ep = container_of(_ep, struct pxa25x_ep, ep);
 664         if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) {
 665                 DMSG("%s, bad ep\n", __func__);
 666                 return -EINVAL;
 667         }
 668
 669         dev = ep->dev;
 670         if (unlikely (!dev->driver
 671                         || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
 672                 DMSG("%s, bogus device state\n", __func__);
 673                 return -ESHUTDOWN;
 674         }
 675
 676         /* iso is always one packet per request, that's the only way
 677          * we can report per-packet status.  that also helps with dma.
 678          */
 679         if (unlikely (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
 680                         && req->req.length > le16_to_cpu
 681                                                 (ep->desc->wMaxPacketSize)))
 682                 return -EMSGSIZE;
 683
 684         DBG(DBG_NOISY, "%s queue req %p, len %d buf %p\n",
 685                 _ep->name, _req, _req->length, _req->buf);
 686
 687         local_irq_save(flags);
 688
 689         _req->status = -EINPROGRESS;
 690         _req->actual = 0;
 691
 692         /* kickstart this i/o queue? */
 693         if (list_empty(&ep->queue) && !ep->stopped) {
 694                 if (ep->desc == NULL/* ep0 */) {
 695                         unsigned        length = _req->length;
 696
 697                         switch (dev->ep0state) {
 698                         case EP0_IN_DATA_PHASE:
 699                                 dev->stats.write.ops++;
 700                                 if (write_ep0_fifo(ep, req))
 701                                         req = NULL;
 702                                 break;
 703
 704                         case EP0_OUT_DATA_PHASE:
 705                                 dev->stats.read.ops++;
 706                                 /* messy ... */
 707                                 if (dev->req_config) {
 708                                         DBG(DBG_VERBOSE, "ep0 config ack%s\n",
 709                                                 dev->has_cfr ?  "" : " raced");
 710                                         if (dev->has_cfr)
 711                                                 UDCCFR = UDCCFR_AREN|UDCCFR_ACM
 712                                                         |UDCCFR_MB1;
 713                                         done(ep, req, 0);
 714                                         dev->ep0state = EP0_END_XFER;
 715                                         local_irq_restore (flags);
 716                                         return 0;
 717                                 }
 718                                 if (dev->req_pending)
 719                                         ep0start(dev, UDCCS0_IPR, "OUT");
 720                                 if (length == 0 || ((UDCCS0 & UDCCS0_RNE) != 0
 721                                                 && read_ep0_fifo(ep, req))) {
 722                                         ep0_idle(dev);
 723                                         done(ep, req, 0);
 724                                         req = NULL;
 725                                 }
 726                                 break;
 727
 728                         default:
 729                                 DMSG("ep0 i/o, odd state %d\n", dev->ep0state);
 730                                 local_irq_restore (flags);
 731                                 return -EL2HLT;
 732                         }
 733                 /* can the FIFO can satisfy the request immediately? */
 734                 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
 735                         if ((*ep->reg_udccs & UDCCS_BI_TFS) != 0
 736                                         && write_fifo(ep, req))
 737                                 req = NULL;
 738                 } else if ((*ep->reg_udccs & UDCCS_BO_RFS) != 0
 739                                 && read_fifo(ep, req)) {
 740                         req = NULL;
 741                 }
 742
 743                 if (likely (req && ep->desc))
 744                         pio_irq_enable(ep->bEndpointAddress);
 745         }
 746
 747         /* pio or dma irq handler advances the queue. */
 748         if (likely(req != NULL))
 749                 list_add_tail(&req->queue, &ep->queue);
 750         local_irq_restore(flags);
 751
 752         return 0;
 753 }
 754
 755
 756 /*
 757  *      nuke - dequeue ALL requests
 758  */
 759 static void nuke(struct pxa25x_ep *ep, int status)
 760 {
 761         struct pxa25x_request *req;
 762
 763         /* called with irqs blocked */
 764         while (!list_empty(&ep->queue)) {
 765                 req = list_entry(ep->queue.next,
 766                                 struct pxa25x_request,
 767                                 queue);
 768                 done(ep, req, status);
 769         }
 770         if (ep->desc)
 771                 pio_irq_disable (ep->bEndpointAddress);
 772 }
 773
 774
 775 /* dequeue JUST ONE request */
 776 static int pxa25x_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
 777 {
 778         struct pxa25x_ep        *ep;
 779         struct pxa25x_request   *req;
 780         unsigned long           flags;
 781
 782         ep = container_of(_ep, struct pxa25x_ep, ep);
 783         if (!_ep || ep->ep.name == ep0name)
 784                 return -EINVAL;
 785
 786         local_irq_save(flags);
 787
 788         /* make sure it's actually queued on this endpoint */
 789         list_for_each_entry (req, &ep->queue, queue) {
 790                 if (&req->req == _req)
 791                         break;
 792         }
 793         if (&req->req != _req) {
 794                 local_irq_restore(flags);
 795                 return -EINVAL;
 796         }
 797
 798         done(ep, req, -ECONNRESET);
 799
 800         local_irq_restore(flags);
 801         return 0;
 802 }
 803
 804 /*-------------------------------------------------------------------------*/
 805
 806 static int pxa25x_ep_set_halt(struct usb_ep *_ep, int value)
 807 {
 808         struct pxa25x_ep        *ep;
 809         unsigned long           flags;
 810
 811         ep = container_of(_ep, struct pxa25x_ep, ep);
 812         if (unlikely (!_ep
 813                         || (!ep->desc && ep->ep.name != ep0name))
 814                         || ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 815                 DMSG("%s, bad ep\n", __func__);
 816                 return -EINVAL;
 817         }
 818         if (value == 0) {
 819                 /* this path (reset toggle+halt) is needed to implement
 820                  * SET_INTERFACE on normal hardware.  but it can't be
 821                  * done from software on the PXA UDC, and the hardware
 822                  * forgets to do it as part of SET_INTERFACE automagic.
 823                  */
 824                 DMSG("only host can clear %s halt\n", _ep->name);
 825                 return -EROFS;
 826         }
 827
 828         local_irq_save(flags);
 829
 830         if ((ep->bEndpointAddress & USB_DIR_IN) != 0
 831                         && ((*ep->reg_udccs & UDCCS_BI_TFS) == 0
 832                            || !list_empty(&ep->queue))) {
 833                 local_irq_restore(flags);
 834                 return -EAGAIN;
 835         }
 836
 837         /* FST bit is the same for control, bulk in, bulk out, interrupt in */
 838         *ep->reg_udccs = UDCCS_BI_FST|UDCCS_BI_FTF;
 839
 840         /* ep0 needs special care */
 841         if (!ep->desc) {
 842                 start_watchdog(ep->dev);
 843                 ep->dev->req_pending = 0;
 844                 ep->dev->ep0state = EP0_STALL;
 845
 846         /* and bulk/intr endpoints like dropping stalls too */
 847         } else {
 848                 unsigned i;
 849                 for (i = 0; i < 1000; i += 20) {
 850                         if (*ep->reg_udccs & UDCCS_BI_SST)
 851                                 break;
 852                         udelay(20);
 853                 }
 854         }
 855         local_irq_restore(flags);
 856
 857         DBG(DBG_VERBOSE, "%s halt\n", _ep->name);
 858         return 0;
 859 }
 860
 861 static int pxa25x_ep_fifo_status(struct usb_ep *_ep)
 862 {
 863         struct pxa25x_ep        *ep;
 864
 865         ep = container_of(_ep, struct pxa25x_ep, ep);
 866         if (!_ep) {
 867                 DMSG("%s, bad ep\n", __func__);
 868                 return -ENODEV;
 869         }
 870         /* pxa can't report unclaimed bytes from IN fifos */
 871         if ((ep->bEndpointAddress & USB_DIR_IN) != 0)
 872                 return -EOPNOTSUPP;
 873         if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN
 874                         || (*ep->reg_udccs & UDCCS_BO_RFS) == 0)
 875                 return 0;
 876         else
 877                 return (*ep->reg_ubcr & 0xfff) + 1;
 878 }
 879
 880 static void pxa25x_ep_fifo_flush(struct usb_ep *_ep)
 881 {
 882         struct pxa25x_ep        *ep;
 883
 884         ep = container_of(_ep, struct pxa25x_ep, ep);
 885         if (!_ep || ep->ep.name == ep0name || !list_empty(&ep->queue)) {
 886                 DMSG("%s, bad ep\n", __func__);
 887                 return;
 888         }
 889
 890         /* toggle and halt bits stay unchanged */
 891
 892         /* for OUT, just read and discard the FIFO contents. */
 893         if ((ep->bEndpointAddress & USB_DIR_IN) == 0) {
 894                 while (((*ep->reg_udccs) & UDCCS_BO_RNE) != 0)
 895                         (void) *ep->reg_uddr;
 896                 return;
 897         }
 898
 899         /* most IN status is the same, but ISO can't stall */
 900         *ep->reg_udccs = UDCCS_BI_TPC|UDCCS_BI_FTF|UDCCS_BI_TUR
 901                 | (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC)
 902                         ? 0 : UDCCS_BI_SST;
 903 }
 904
 905
 906 static struct usb_ep_ops pxa25x_ep_ops = {
 907         .enable         = pxa25x_ep_enable,
 908         .disable        = pxa25x_ep_disable,
 909
 910         .alloc_request  = pxa25x_ep_alloc_request,
 911         .free_request   = pxa25x_ep_free_request,
 912
 913         .queue          = pxa25x_ep_queue,
 914         .dequeue        = pxa25x_ep_dequeue,
 915
 916         .set_halt       = pxa25x_ep_set_halt,
 917         .fifo_status    = pxa25x_ep_fifo_status,
 918         .fifo_flush     = pxa25x_ep_fifo_flush,
 919 };
 920
 921
 922 /* ---------------------------------------------------------------------------
 923  *      device-scoped parts of the api to the usb controller hardware
 924  * ---------------------------------------------------------------------------
 925  */
 926
 927 static int pxa25x_udc_get_frame(struct usb_gadget *_gadget)
 928 {
 929         return ((UFNRH & 0x07) << 8) | (UFNRL & 0xff);
 930 }
 931
 932 static int pxa25x_udc_wakeup(struct usb_gadget *_gadget)
 933 {
 934         /* host may not have enabled remote wakeup */
 935         if ((UDCCS0 & UDCCS0_DRWF) == 0)
 936                 return -EHOSTUNREACH;
 937         udc_set_mask_UDCCR(UDCCR_RSM);
 938         return 0;
 939 }
 940
 941 static void stop_activity(struct pxa25x_udc *, struct usb_gadget_driver *);
 942 static void udc_enable (struct pxa25x_udc *);
 943 static void udc_disable(struct pxa25x_udc *);
 944
 945 /* We disable the UDC -- and its 48 MHz clock -- whenever it's not
 946  * in active use.
 947  */
 948 static int pullup(struct pxa25x_udc *udc)
 949 {
 950         int is_active = udc->vbus && udc->pullup && !udc->suspended;
 951         DMSG("%s\n", is_active ? "active" : "inactive");
 952         if (is_active) {
 953                 if (!udc->active) {
 954                         udc->active = 1;
 955                         /* Enable clock for USB device */
 956                         clk_enable(udc->clk);
 957                         udc_enable(udc);
 958                 }
 959         } else {
 960                 if (udc->active) {
 961                         if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
 962                                 DMSG("disconnect %s\n", udc->driver
 963                                         ? udc->driver->driver.name
 964                                         : "(no driver)");
 965                                 stop_activity(udc, udc->driver);
 966                         }
 967                         udc_disable(udc);
 968                         /* Disable clock for USB device */
 969                         clk_disable(udc->clk);
 970                         udc->active = 0;
 971                 }
 972
 973         }
 974         return 0;
 975 }
 976
 977 /* VBUS reporting logically comes from a transceiver */
 978 static int pxa25x_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
 979 {
 980         struct pxa25x_udc       *udc;
 981
 982         udc = container_of(_gadget, struct pxa25x_udc, gadget);
 983         udc->vbus = (is_active != 0);
 984         DMSG("vbus %s\n", is_active ? "supplied" : "inactive");
 985         pullup(udc);
 986         return 0;
 987 }
 988
 989 /* drivers may have software control over D+ pullup */
 990 static int pxa25x_udc_pullup(struct usb_gadget *_gadget, int is_active)
 991 {
 992         struct pxa25x_udc       *udc;
 993
 994         udc = container_of(_gadget, struct pxa25x_udc, gadget);
 995
 996         /* not all boards support pullup control */
 997         if (!udc->mach->gpio_pullup && !udc->mach->udc_command)
 998                 return -EOPNOTSUPP;
 999
1000         udc->pullup = (is_active != 0);
1001         pullup(udc);
1002         return 0;
1003 }
1004
1005 static const struct usb_gadget_ops pxa25x_udc_ops = {
1006         .get_frame      = pxa25x_udc_get_frame,
1007         .wakeup         = pxa25x_udc_wakeup,
1008         .vbus_session   = pxa25x_udc_vbus_session,
1009         .pullup         = pxa25x_udc_pullup,
1010
1011         // .vbus_draw ... boards may consume current from VBUS, up to
1012         // 100-500mA based on config.  the 500uA suspend ceiling means
1013         // that exclusively vbus-powered PXA designs violate USB specs.
1014 };
1015
1016 /*-------------------------------------------------------------------------*/
1017
1018 #ifdef CONFIG_USB_GADGET_DEBUG_FS
1019
1020 static int
1021 udc_seq_show(struct seq_file *m, void *_d)
1022 {
1023         struct pxa25x_udc       *dev = m->private;
1024         unsigned long           flags;
1025         int                     i;
1026         u32                     tmp;
1027
1028         local_irq_save(flags);
1029
1030         /* basic device status */
1031         seq_printf(m, DRIVER_DESC "\n"
1032                 "%s version: %s\nGadget driver: %s\nHost %s\n\n",
1033                 driver_name, DRIVER_VERSION SIZE_STR "(pio)",
1034                 dev->driver ? dev->driver->driver.name : "(none)",
1035                 is_vbus_present() ? "full speed" : "disconnected");
1036
1037         /* registers for device and ep0 */
1038         seq_printf(m,
1039                 "uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n",
1040                 UICR1, UICR0, USIR1, USIR0, UFNRH, UFNRL);
1041
1042         tmp = UDCCR;
1043         seq_printf(m,
1044                 "udccr %02X =%s%s%s%s%s%s%s%s\n", tmp,
1045                 (tmp & UDCCR_REM) ? " rem" : "",
1046                 (tmp & UDCCR_RSTIR) ? " rstir" : "",
1047                 (tmp & UDCCR_SRM) ? " srm" : "",
1048                 (tmp & UDCCR_SUSIR) ? " susir" : "",
1049                 (tmp & UDCCR_RESIR) ? " resir" : "",
1050                 (tmp & UDCCR_RSM) ? " rsm" : "",
1051                 (tmp & UDCCR_UDA) ? " uda" : "",
1052                 (tmp & UDCCR_UDE) ? " ude" : "");
1053
1054         tmp = UDCCS0;
1055         seq_printf(m,
1056                 "udccs0 %02X =%s%s%s%s%s%s%s%s\n", tmp,
1057                 (tmp & UDCCS0_SA) ? " sa" : "",
1058                 (tmp & UDCCS0_RNE) ? " rne" : "",
1059                 (tmp & UDCCS0_FST) ? " fst" : "",
1060                 (tmp & UDCCS0_SST) ? " sst" : "",
1061                 (tmp & UDCCS0_DRWF) ? " dwrf" : "",
1062                 (tmp & UDCCS0_FTF) ? " ftf" : "",
1063                 (tmp & UDCCS0_IPR) ? " ipr" : "",
1064                 (tmp & UDCCS0_OPR) ? " opr" : "");
1065
1066         if (dev->has_cfr) {
1067                 tmp = UDCCFR;
1068                 seq_printf(m,
1069                         "udccfr %02X =%s%s\n", tmp,
1070                         (tmp & UDCCFR_AREN) ? " aren" : "",
1071                         (tmp & UDCCFR_ACM) ? " acm" : "");
1072         }
1073
1074         if (!is_vbus_present() || !dev->driver)
1075                 goto done;
1076
1077         seq_printf(m, "ep0 IN %lu/%lu, OUT %lu/%lu\nirqs %lu\n\n",
1078                 dev->stats.write.bytes, dev->stats.write.ops,
1079                 dev->stats.read.bytes, dev->stats.read.ops,
1080                 dev->stats.irqs);
1081
1082         /* dump endpoint queues */
1083         for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1084                 struct pxa25x_ep        *ep = &dev->ep [i];
1085                 struct pxa25x_request   *req;
1086
1087                 if (i != 0) {
1088                         const struct usb_endpoint_descriptor    *desc;
1089
1090                         desc = ep->desc;
1091                         if (!desc)
1092                                 continue;
1093                         tmp = *dev->ep [i].reg_udccs;
1094                         seq_printf(m,
1095                                 "%s max %d %s udccs %02x irqs %lu\n",
1096                                 ep->ep.name, le16_to_cpu(desc->wMaxPacketSize),
1097                                 "pio", tmp, ep->pio_irqs);
1098                         /* TODO translate all five groups of udccs bits! */
1099
1100                 } else /* ep0 should only have one transfer queued */
1101                         seq_printf(m, "ep0 max 16 pio irqs %lu\n",
1102                                 ep->pio_irqs);
1103
1104                 if (list_empty(&ep->queue)) {
1105                         seq_printf(m, "\t(nothing queued)\n");
1106                         continue;
1107                 }
1108                 list_for_each_entry(req, &ep->queue, queue) {
1109                         seq_printf(m,
1110                                         "\treq %p len %d/%d buf %p\n",
1111                                         &req->req, req->req.actual,
1112                                         req->req.length, req->req.buf);
1113                 }
1114         }
1115
1116 done:
1117         local_irq_restore(flags);
1118         return 0;
1119 }
1120
1121 static int
1122 udc_debugfs_open(struct inode *inode, struct file *file)
1123 {
1124         return single_open(file, udc_seq_show, inode->i_private);
1125 }
1126
1127 static const struct file_operations debug_fops = {
1128         .open           = udc_debugfs_open,
1129         .read           = seq_read,
1130         .llseek         = seq_lseek,
1131         .release        = single_release,
1132         .owner          = THIS_MODULE,
1133 };
1134
1135 #define create_debug_files(dev) \
1136         do { \
1137                 dev->debugfs_udc = debugfs_create_file(dev->gadget.name, \
1138                         S_IRUGO, NULL, dev, &debug_fops); \
1139         } while (0)
1140 #define remove_debug_files(dev) \
1141         do { \
1142                 if (dev->debugfs_udc) \
1143                         debugfs_remove(dev->debugfs_udc); \
1144         } while (0)
1145
1146 #else   /* !CONFIG_USB_GADGET_DEBUG_FILES */
1147
1148 #define create_debug_files(dev) do {} while (0)
1149 #define remove_debug_files(dev) do {} while (0)
1150
1151 #endif  /* CONFIG_USB_GADGET_DEBUG_FILES */
1152
1153 /*-------------------------------------------------------------------------*/
1154
1155 /*
1156  *      udc_disable - disable USB device controller
1157  */
1158 static void udc_disable(struct pxa25x_udc *dev)
1159 {
1160         /* block all irqs */
1161         udc_set_mask_UDCCR(UDCCR_SRM|UDCCR_REM);
1162         UICR0 = UICR1 = 0xff;
1163         UFNRH = UFNRH_SIM;
1164
1165         /* if hardware supports it, disconnect from usb */
1166         pullup_off();
1167
1168         udc_clear_mask_UDCCR(UDCCR_UDE);
1169
1170         ep0_idle (dev);
1171         dev->gadget.speed = USB_SPEED_UNKNOWN;
1172 }
1173
1174
1175 /*
1176  *      udc_reinit - initialize software state
1177  */
1178 static void udc_reinit(struct pxa25x_udc *dev)
1179 {
1180         u32     i;
1181
1182         /* device/ep0 records init */
1183         INIT_LIST_HEAD (&dev->gadget.ep_list);
1184         INIT_LIST_HEAD (&dev->gadget.ep0->ep_list);
1185         dev->ep0state = EP0_IDLE;
1186
1187         /* basic endpoint records init */
1188         for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1189                 struct pxa25x_ep *ep = &dev->ep[i];
1190
1191                 if (i != 0)
1192                         list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);
1193
1194                 ep->desc = NULL;
1195                 ep->stopped = 0;
1196                 INIT_LIST_HEAD (&ep->queue);
1197                 ep->pio_irqs = 0;
1198         }
1199
1200         /* the rest was statically initialized, and is read-only */
1201 }
1202
1203 /* until it's enabled, this UDC should be completely invisible
1204  * to any USB host.
1205  */
1206 static void udc_enable (struct pxa25x_udc *dev)
1207 {
1208         udc_clear_mask_UDCCR(UDCCR_UDE);
1209
1210         /* try to clear these bits before we enable the udc */
1211         udc_ack_int_UDCCR(UDCCR_SUSIR|/*UDCCR_RSTIR|*/UDCCR_RESIR);
1212
1213         ep0_idle(dev);
1214         dev->gadget.speed = USB_SPEED_UNKNOWN;
1215         dev->stats.irqs = 0;
1216
1217         /*
1218          * sequence taken from chapter 12.5.10, PXA250 AppProcDevManual:
1219          * - enable UDC
1220          * - if RESET is already in progress, ack interrupt
1221          * - unmask reset interrupt
1222          */
1223         udc_set_mask_UDCCR(UDCCR_UDE);
1224         if (!(UDCCR & UDCCR_UDA))
1225                 udc_ack_int_UDCCR(UDCCR_RSTIR);
1226
1227         if (dev->has_cfr /* UDC_RES2 is defined */) {
1228                 /* pxa255 (a0+) can avoid a set_config race that could
1229                  * prevent gadget drivers from configuring correctly
1230                  */
1231                 UDCCFR = UDCCFR_ACM | UDCCFR_MB1;
1232         } else {
1233                 /* "USB test mode" for pxa250 errata 40-42 (stepping a0, a1)
1234                  * which could result in missing packets and interrupts.
1235                  * supposedly one bit per endpoint, controlling whether it
1236                  * double buffers or not; ACM/AREN bits fit into the holes.
1237                  * zero bits (like USIR0_IRx) disable double buffering.
1238                  */
1239                 UDC_RES1 = 0x00;
1240                 UDC_RES2 = 0x00;
1241         }
1242
1243         /* enable suspend/resume and reset irqs */
1244         udc_clear_mask_UDCCR(UDCCR_SRM | UDCCR_REM);
1245
1246         /* enable ep0 irqs */
1247         UICR0 &= ~UICR0_IM0;
1248
1249         /* if hardware supports it, pullup D+ and wait for reset */
1250         pullup_on();
1251 }
1252
1253
1254 /* when a driver is successfully registered, it will receive
1255  * control requests including set_configuration(), which enables
1256  * non-control requests.  then usb traffic follows until a
1257  * disconnect is reported.  then a host may connect again, or
1258  * the driver might get unbound.
1259  */
1260 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1261 {
1262         struct pxa25x_udc       *dev = the_controller;
1263         int                     retval;
1264
1265         if (!driver
1266                         || driver->speed < USB_SPEED_FULL
1267                         || !driver->bind
1268                         || !driver->disconnect
1269                         || !driver->setup)
1270                 return -EINVAL;
1271         if (!dev)
1272                 return -ENODEV;
1273         if (dev->driver)
1274                 return -EBUSY;
1275
1276         /* first hook up the driver ... */
1277         dev->driver = driver;
1278         dev->gadget.dev.driver = &driver->driver;
1279         dev->pullup = 1;
1280
1281         retval = device_add (&dev->gadget.dev);
1282         if (retval) {
1283 fail:
1284                 dev->driver = NULL;
1285                 dev->gadget.dev.driver = NULL;
1286                 return retval;
1287         }
1288         retval = driver->bind(&dev->gadget);
1289         if (retval) {
1290                 DMSG("bind to driver %s --> error %d\n",
1291                                 driver->driver.name, retval);
1292                 device_del (&dev->gadget.dev);
1293                 goto fail;
1294         }
1295
1296         /* ... then enable host detection and ep0; and we're ready
1297          * for set_configuration as well as eventual disconnect.
1298          */
1299         DMSG("registered gadget driver '%s'\n", driver->driver.name);
1300         pullup(dev);
1301         dump_state(dev);
1302         return 0;
1303 }
1304 EXPORT_SYMBOL(usb_gadget_register_driver);
1305
1306 static void
1307 stop_activity(struct pxa25x_udc *dev, struct usb_gadget_driver *driver)
1308 {
1309         int i;
1310
1311         /* don't disconnect drivers more than once */
1312         if (dev->gadget.speed == USB_SPEED_UNKNOWN)
1313                 driver = NULL;
1314         dev->gadget.speed = USB_SPEED_UNKNOWN;
1315
1316         /* prevent new request submissions, kill any outstanding requests  */
1317         for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1318                 struct pxa25x_ep *ep = &dev->ep[i];
1319
1320                 ep->stopped = 1;
1321                 nuke(ep, -ESHUTDOWN);
1322         }
1323         del_timer_sync(&dev->timer);
1324
1325         /* report disconnect; the driver is already quiesced */
1326         if (driver)
1327                 driver->disconnect(&dev->gadget);
1328
1329         /* re-init driver-visible data structures */
1330         udc_reinit(dev);
1331 }
1332
1333 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1334 {
1335         struct pxa25x_udc       *dev = the_controller;
1336
1337         if (!dev)
1338                 return -ENODEV;
1339         if (!driver || driver != dev->driver || !driver->unbind)
1340                 return -EINVAL;
1341
1342         local_irq_disable();
1343         dev->pullup = 0;
1344         pullup(dev);
1345         stop_activity(dev, driver);
1346         local_irq_enable();
1347
1348         driver->unbind(&dev->gadget);
1349         dev->gadget.dev.driver = NULL;
1350         dev->driver = NULL;
1351
1352         device_del (&dev->gadget.dev);
1353
1354         DMSG("unregistered gadget driver '%s'\n", driver->driver.name);
1355         dump_state(dev);
1356         return 0;
1357 }
1358 EXPORT_SYMBOL(usb_gadget_unregister_driver);
1359
1360
1361 /*-------------------------------------------------------------------------*/
1362
1363 #ifdef CONFIG_ARCH_LUBBOCK
1364
1365 /* Lubbock has separate connect and disconnect irqs.  More typical designs
1366  * use one GPIO as the VBUS IRQ, and another to control the D+ pullup.
1367  */
1368
1369 static irqreturn_t
1370 lubbock_vbus_irq(int irq, void *_dev)
1371 {
1372         struct pxa25x_udc       *dev = _dev;
1373         int                     vbus;
1374
1375         dev->stats.irqs++;
1376         switch (irq) {
1377         case LUBBOCK_USB_IRQ:
1378                 vbus = 1;
1379                 disable_irq(LUBBOCK_USB_IRQ);
1380                 enable_irq(LUBBOCK_USB_DISC_IRQ);
1381                 break;
1382         case LUBBOCK_USB_DISC_IRQ:
1383                 vbus = 0;
1384                 disable_irq(LUBBOCK_USB_DISC_IRQ);
1385                 enable_irq(LUBBOCK_USB_IRQ);
1386                 break;
1387         default:
1388                 return IRQ_NONE;
1389         }
1390
1391         pxa25x_udc_vbus_session(&dev->gadget, vbus);
1392         return IRQ_HANDLED;
1393 }
1394
1395 #endif
1396
1397 static irqreturn_t udc_vbus_irq(int irq, void *_dev)
1398 {
1399         struct pxa25x_udc       *dev = _dev;
1400         int                     vbus = gpio_get_value(dev->mach->gpio_vbus);
1401
1402         if (dev->mach->gpio_vbus_inverted)
1403                 vbus = !vbus;
1404
1405         pxa25x_udc_vbus_session(&dev->gadget, vbus);
1406         return IRQ_HANDLED;
1407 }
1408
1409
1410 /*-------------------------------------------------------------------------*/
1411
1412 static inline void clear_ep_state (struct pxa25x_udc *dev)
1413 {
1414         unsigned i;
1415
1416         /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
1417          * fifos, and pending transactions mustn't be continued in any case.
1418          */
1419         for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++)
1420                 nuke(&dev->ep[i], -ECONNABORTED);
1421 }
1422
1423 static void udc_watchdog(unsigned long _dev)
1424 {
1425         struct pxa25x_udc       *dev = (void *)_dev;
1426
1427         local_irq_disable();
1428         if (dev->ep0state == EP0_STALL
1429                         && (UDCCS0 & UDCCS0_FST) == 0
1430                         && (UDCCS0 & UDCCS0_SST) == 0) {
1431                 UDCCS0 = UDCCS0_FST|UDCCS0_FTF;
1432                 DBG(DBG_VERBOSE, "ep0 re-stall\n");
1433                 start_watchdog(dev);
1434         }
1435         local_irq_enable();
1436 }
1437
1438 static void handle_ep0 (struct pxa25x_udc *dev)
1439 {
1440         u32                     udccs0 = UDCCS0;
1441         struct pxa25x_ep        *ep = &dev->ep [0];
1442         struct pxa25x_request   *req;
1443         union {
1444                 struct usb_ctrlrequest  r;
1445                 u8                      raw [8];
1446                 u32                     word [2];
1447         } u;
1448
1449         if (list_empty(&ep->queue))
1450                 req = NULL;
1451         else
1452                 req = list_entry(ep->queue.next, struct pxa25x_request, queue);
1453
1454         /* clear stall status */
1455         if (udccs0 & UDCCS0_SST) {
1456                 nuke(ep, -EPIPE);
1457                 UDCCS0 = UDCCS0_SST;
1458                 del_timer(&dev->timer);
1459                 ep0_idle(dev);
1460         }
1461
1462         /* previous request unfinished?  non-error iff back-to-back ... */
1463         if ((udccs0 & UDCCS0_SA) != 0 && dev->ep0state != EP0_IDLE) {
1464                 nuke(ep, 0);
1465                 del_timer(&dev->timer);
1466                 ep0_idle(dev);
1467         }
1468
1469         switch (dev->ep0state) {
1470         case EP0_IDLE:
1471                 /* late-breaking status? */
1472                 udccs0 = UDCCS0;
1473
1474                 /* start control request? */
1475                 if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))
1476                                 == (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))) {
1477                         int i;
1478
1479                         nuke (ep, -EPROTO);
1480
1481                         /* read SETUP packet */
1482                         for (i = 0; i < 8; i++) {
1483                                 if (unlikely(!(UDCCS0 & UDCCS0_RNE))) {
1484 bad_setup:
1485                                         DMSG("SETUP %d!\n", i);
1486                                         goto stall;
1487                                 }
1488                                 u.raw [i] = (u8) UDDR0;
1489                         }
1490                         if (unlikely((UDCCS0 & UDCCS0_RNE) != 0))
1491                                 goto bad_setup;
1492
1493 got_setup:
1494                         DBG(DBG_VERBOSE, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1495                                 u.r.bRequestType, u.r.bRequest,
1496                                 le16_to_cpu(u.r.wValue),
1497                                 le16_to_cpu(u.r.wIndex),
1498                                 le16_to_cpu(u.r.wLength));
1499
1500                         /* cope with automagic for some standard requests. */
1501                         dev->req_std = (u.r.bRequestType & USB_TYPE_MASK)
1502                                                 == USB_TYPE_STANDARD;
1503                         dev->req_config = 0;
1504                         dev->req_pending = 1;
1505                         switch (u.r.bRequest) {
1506                         /* hardware restricts gadget drivers here! */
1507                         case USB_REQ_SET_CONFIGURATION:
1508                                 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1509                                         /* reflect hardware's automagic
1510                                          * up to the gadget driver.
1511                                          */
1512 config_change:
1513                                         dev->req_config = 1;
1514                                         clear_ep_state(dev);
1515                                         /* if !has_cfr, there's no synch
1516                                          * else use AREN (later) not SA|OPR
1517                                          * USIR0_IR0 acts edge sensitive
1518                                          */
1519                                 }
1520                                 break;
1521                         /* ... and here, even more ... */
1522                         case USB_REQ_SET_INTERFACE:
1523                                 if (u.r.bRequestType == USB_RECIP_INTERFACE) {
1524                                         /* udc hardware is broken by design:
1525                                          *  - altsetting may only be zero;
1526                                          *  - hw resets all interfaces' eps;
1527                                          *  - ep reset doesn't include halt(?).
1528                                          */
1529                                         DMSG("broken set_interface (%d/%d)\n",
1530                                                 le16_to_cpu(u.r.wIndex),
1531                                                 le16_to_cpu(u.r.wValue));
1532                                         goto config_change;
1533                                 }
1534                                 break;
1535                         /* hardware was supposed to hide this */
1536                         case USB_REQ_SET_ADDRESS:
1537                                 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1538                                         ep0start(dev, 0, "address");
1539                                         return;
1540                                 }
1541                                 break;
1542                         }
1543
1544                         if (u.r.bRequestType & USB_DIR_IN)
1545                                 dev->ep0state = EP0_IN_DATA_PHASE;
1546                         else
1547                                 dev->ep0state = EP0_OUT_DATA_PHASE;
1548
1549                         i = dev->driver->setup(&dev->gadget, &u.r);
1550                         if (i < 0) {
1551                                 /* hardware automagic preventing STALL... */
1552                                 if (dev->req_config) {
1553                                         /* hardware sometimes neglects to tell
1554                                          * tell us about config change events,
1555                                          * so later ones may fail...
1556                                          */
1557                                         WARN("config change %02x fail %d?\n",
1558                                                 u.r.bRequest, i);
1559                                         return;
1560                                         /* TODO experiment:  if has_cfr,
1561                                          * hardware didn't ACK; maybe we
1562                                          * could actually STALL!
1563                                          */
1564                                 }
1565                                 DBG(DBG_VERBOSE, "protocol STALL, "
1566                                         "%02x err %d\n", UDCCS0, i);
1567 stall:
1568                                 /* the watchdog timer helps deal with cases
1569                                  * where udc seems to clear FST wrongly, and
1570                                  * then NAKs instead of STALLing.
1571                                  */
1572                                 ep0start(dev, UDCCS0_FST|UDCCS0_FTF, "stall");
1573                                 start_watchdog(dev);
1574                                 dev->ep0state = EP0_STALL;
1575
1576                         /* deferred i/o == no response yet */
1577                         } else if (dev->req_pending) {
1578                                 if (likely(dev->ep0state == EP0_IN_DATA_PHASE
1579                                                 || dev->req_std || u.r.wLength))
1580                                         ep0start(dev, 0, "defer");
1581                                 else
1582                                         ep0start(dev, UDCCS0_IPR, "defer/IPR");
1583                         }
1584
1585                         /* expect at least one data or status stage irq */
1586                         return;
1587
1588                 } else if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA))
1589                                 == (UDCCS0_OPR|UDCCS0_SA))) {
1590                         unsigned i;
1591
1592                         /* pxa210/250 erratum 131 for B0/B1 says RNE lies.
1593                          * still observed on a pxa255 a0.
1594                          */
1595                         DBG(DBG_VERBOSE, "e131\n");
1596                         nuke(ep, -EPROTO);
1597
1598                         /* read SETUP data, but don't trust it too much */
1599                         for (i = 0; i < 8; i++)
1600                                 u.raw [i] = (u8) UDDR0;
1601                         if ((u.r.bRequestType & USB_RECIP_MASK)
1602                                         > USB_RECIP_OTHER)
1603                                 goto stall;
1604                         if (u.word [0] == 0 && u.word [1] == 0)
1605                                 goto stall;
1606                         goto got_setup;
1607                 } else {
1608                         /* some random early IRQ:
1609                          * - we acked FST
1610                          * - IPR cleared
1611                          * - OPR got set, without SA (likely status stage)
1612                          */
1613                         UDCCS0 = udccs0 & (UDCCS0_SA|UDCCS0_OPR);
1614                 }
1615                 break;
1616         case EP0_IN_DATA_PHASE:                 /* GET_DESCRIPTOR etc */
1617                 if (udccs0 & UDCCS0_OPR) {
1618                         UDCCS0 = UDCCS0_OPR|UDCCS0_FTF;
1619                         DBG(DBG_VERBOSE, "ep0in premature status\n");
1620                         if (req)
1621                                 done(ep, req, 0);
1622                         ep0_idle(dev);
1623                 } else /* irq was IPR clearing */ {
1624                         if (req) {
1625                                 /* this IN packet might finish the request */
1626                                 (void) write_ep0_fifo(ep, req);
1627                         } /* else IN token before response was written */
1628                 }
1629                 break;
1630         case EP0_OUT_DATA_PHASE:                /* SET_DESCRIPTOR etc */
1631                 if (udccs0 & UDCCS0_OPR) {
1632                         if (req) {
1633                                 /* this OUT packet might finish the request */
1634                                 if (read_ep0_fifo(ep, req))
1635                                         done(ep, req, 0);
1636                                 /* else more OUT packets expected */
1637                         } /* else OUT token before read was issued */
1638                 } else /* irq was IPR clearing */ {
1639                         DBG(DBG_VERBOSE, "ep0out premature status\n");
1640                         if (req)
1641                                 done(ep, req, 0);
1642                         ep0_idle(dev);
1643                 }
1644                 break;
1645         case EP0_END_XFER:
1646                 if (req)
1647                         done(ep, req, 0);
1648                 /* ack control-IN status (maybe in-zlp was skipped)
1649                  * also appears after some config change events.
1650                  */
1651                 if (udccs0 & UDCCS0_OPR)
1652                         UDCCS0 = UDCCS0_OPR;
1653                 ep0_idle(dev);
1654                 break;
1655         case EP0_STALL:
1656                 UDCCS0 = UDCCS0_FST;
1657                 break;
1658         }
1659         USIR0 = USIR0_IR0;
1660 }
1661
1662 static void handle_ep(struct pxa25x_ep *ep)
1663 {
1664         struct pxa25x_request   *req;
1665         int                     is_in = ep->bEndpointAddress & USB_DIR_IN;
1666         int                     completed;
1667         u32                     udccs, tmp;
1668
1669         do {
1670                 completed = 0;
1671                 if (likely (!list_empty(&ep->queue)))
1672                         req = list_entry(ep->queue.next,
1673                                         struct pxa25x_request, queue);
1674                 else
1675                         req = NULL;
1676
1677                 // TODO check FST handling
1678
1679                 udccs = *ep->reg_udccs;
1680                 if (unlikely(is_in)) {  /* irq from TPC, SST, or (ISO) TUR */
1681                         tmp = UDCCS_BI_TUR;
1682                         if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1683                                 tmp |= UDCCS_BI_SST;
1684                         tmp &= udccs;
1685                         if (likely (tmp))
1686                                 *ep->reg_udccs = tmp;
1687                         if (req && likely ((udccs & UDCCS_BI_TFS) != 0))
1688                                 completed = write_fifo(ep, req);
1689
1690                 } else {        /* irq from RPC (or for ISO, ROF) */
1691                         if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1692                                 tmp = UDCCS_BO_SST | UDCCS_BO_DME;
1693                         else
1694                                 tmp = UDCCS_IO_ROF | UDCCS_IO_DME;
1695                         tmp &= udccs;
1696                         if (likely(tmp))
1697                                 *ep->reg_udccs = tmp;
1698
1699                         /* fifos can hold packets, ready for reading... */
1700                         if (likely(req)) {
1701                                 completed = read_fifo(ep, req);
1702                         } else
1703                                 pio_irq_disable (ep->bEndpointAddress);
1704                 }
1705                 ep->pio_irqs++;
1706         } while (completed);
1707 }
1708
1709 /*
1710  *      pxa25x_udc_irq - interrupt handler
1711  *
1712  * avoid delays in ep0 processing. the control handshaking isn't always
1713  * under software control (pxa250c0 and the pxa255 are better), and delays
1714  * could cause usb protocol errors.
1715  */
1716 static irqreturn_t
1717 pxa25x_udc_irq(int irq, void *_dev)
1718 {
1719         struct pxa25x_udc       *dev = _dev;
1720         int                     handled;
1721
1722         dev->stats.irqs++;
1723         do {
1724                 u32             udccr = UDCCR;
1725
1726                 handled = 0;
1727
1728                 /* SUSpend Interrupt Request */
1729                 if (unlikely(udccr & UDCCR_SUSIR)) {
1730                         udc_ack_int_UDCCR(UDCCR_SUSIR);
1731                         handled = 1;
1732                         DBG(DBG_VERBOSE, "USB suspend%s\n", is_vbus_present()
1733                                 ? "" : "+disconnect");
1734
1735                         if (!is_vbus_present())
1736                                 stop_activity(dev, dev->driver);
1737                         else if (dev->gadget.speed != USB_SPEED_UNKNOWN
1738                                         && dev->driver
1739                                         && dev->driver->suspend)
1740                                 dev->driver->suspend(&dev->gadget);
1741                         ep0_idle (dev);
1742                 }
1743
1744                 /* RESume Interrupt Request */
1745                 if (unlikely(udccr & UDCCR_RESIR)) {
1746                         udc_ack_int_UDCCR(UDCCR_RESIR);
1747                         handled = 1;
1748                         DBG(DBG_VERBOSE, "USB resume\n");
1749
1750                         if (dev->gadget.speed != USB_SPEED_UNKNOWN
1751                                         && dev->driver
1752                                         && dev->driver->resume
1753                                         && is_vbus_present())
1754                                 dev->driver->resume(&dev->gadget);
1755                 }
1756
1757                 /* ReSeT Interrupt Request - USB reset */
1758                 if (unlikely(udccr & UDCCR_RSTIR)) {
1759                         udc_ack_int_UDCCR(UDCCR_RSTIR);
1760                         handled = 1;
1761
1762                         if ((UDCCR & UDCCR_UDA) == 0) {
1763                                 DBG(DBG_VERBOSE, "USB reset start\n");
1764
1765                                 /* reset driver and endpoints,
1766                                  * in case that's not yet done
1767                                  */
1768                                 stop_activity (dev, dev->driver);
1769
1770                         } else {
1771                                 DBG(DBG_VERBOSE, "USB reset end\n");
1772                                 dev->gadget.speed = USB_SPEED_FULL;
1773                                 memset(&dev->stats, 0, sizeof dev->stats);
1774                                 /* driver and endpoints are still reset */
1775                         }
1776
1777                 } else {
1778                         u32     usir0 = USIR0 & ~UICR0;
1779                         u32     usir1 = USIR1 & ~UICR1;
1780                         int     i;
1781
1782                         if (unlikely (!usir0 && !usir1))
1783                                 continue;
1784
1785                         DBG(DBG_VERY_NOISY, "irq %02x.%02x\n", usir1, usir0);
1786
1787                         /* control traffic */
1788                         if (usir0 & USIR0_IR0) {
1789                                 dev->ep[0].pio_irqs++;
1790                                 handle_ep0(dev);
1791                                 handled = 1;
1792                         }
1793
1794                         /* endpoint data transfers */
1795                         for (i = 0; i < 8; i++) {
1796                                 u32     tmp = 1 << i;
1797
1798                                 if (i && (usir0 & tmp)) {
1799                                         handle_ep(&dev->ep[i]);
1800                                         USIR0 |= tmp;
1801                                         handled = 1;
1802                                 }
1803                                 if (usir1 & tmp) {
1804                                         handle_ep(&dev->ep[i+8]);
1805                                         USIR1 |= tmp;
1806                                         handled = 1;
1807                                 }
1808                         }
1809                 }
1810
1811                 /* we could also ask for 1 msec SOF (SIR) interrupts */
1812
1813         } while (handled);
1814         return IRQ_HANDLED;
1815 }
1816
1817 /*-------------------------------------------------------------------------*/
1818
1819 static void nop_release (struct device *dev)
1820 {
1821         DMSG("%s %s\n", __func__, dev->bus_id);
1822 }
1823
1824 /* this uses load-time allocation and initialization (instead of
1825  * doing it at run-time) to save code, eliminate fault paths, and
1826  * be more obviously correct.
1827  */
1828 static struct pxa25x_udc memory = {
1829         .gadget = {
1830                 .ops            = &pxa25x_udc_ops,
1831                 .ep0            = &memory.ep[0].ep,
1832                 .name           = driver_name,
1833                 .dev = {
1834                         .bus_id         = "gadget",
1835                         .release        = nop_release,
1836                 },
1837         },
1838
1839         /* control endpoint */
1840         .ep[0] = {
1841                 .ep = {
1842                         .name           = ep0name,
1843                         .ops            = &pxa25x_ep_ops,
1844                         .maxpacket      = EP0_FIFO_SIZE,
1845                 },
1846                 .dev            = &memory,
1847                 .reg_udccs      = &UDCCS0,
1848                 .reg_uddr       = &UDDR0,
1849         },
1850
1851         /* first group of endpoints */
1852         .ep[1] = {
1853                 .ep = {
1854                         .name           = "ep1in-bulk",
1855                         .ops            = &pxa25x_ep_ops,
1856                         .maxpacket      = BULK_FIFO_SIZE,
1857                 },
1858                 .dev            = &memory,
1859                 .fifo_size      = BULK_FIFO_SIZE,
1860                 .bEndpointAddress = USB_DIR_IN | 1,
1861                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1862                 .reg_udccs      = &UDCCS1,
1863                 .reg_uddr       = &UDDR1,
1864         },
1865         .ep[2] = {
1866                 .ep = {
1867                         .name           = "ep2out-bulk",
1868                         .ops            = &pxa25x_ep_ops,
1869                         .maxpacket      = BULK_FIFO_SIZE,
1870                 },
1871                 .dev            = &memory,
1872                 .fifo_size      = BULK_FIFO_SIZE,
1873                 .bEndpointAddress = 2,
1874                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1875                 .reg_udccs      = &UDCCS2,
1876                 .reg_ubcr       = &UBCR2,
1877                 .reg_uddr       = &UDDR2,
1878         },
1879 #ifndef CONFIG_USB_PXA25X_SMALL
1880         .ep[3] = {
1881                 .ep = {
1882                         .name           = "ep3in-iso",
1883                         .ops            = &pxa25x_ep_ops,
1884                         .maxpacket      = ISO_FIFO_SIZE,
1885                 },
1886                 .dev            = &memory,
1887                 .fifo_size      = ISO_FIFO_SIZE,
1888                 .bEndpointAddress = USB_DIR_IN | 3,
1889                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1890                 .reg_udccs      = &UDCCS3,
1891                 .reg_uddr       = &UDDR3,
1892         },
1893         .ep[4] = {
1894                 .ep = {
1895                         .name           = "ep4out-iso",
1896                         .ops            = &pxa25x_ep_ops,
1897                         .maxpacket      = ISO_FIFO_SIZE,
1898                 },
1899                 .dev            = &memory,
1900                 .fifo_size      = ISO_FIFO_SIZE,
1901                 .bEndpointAddress = 4,
1902                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1903                 .reg_udccs      = &UDCCS4,
1904                 .reg_ubcr       = &UBCR4,
1905                 .reg_uddr       = &UDDR4,
1906         },
1907         .ep[5] = {
1908                 .ep = {
1909                         .name           = "ep5in-int",
1910                         .ops            = &pxa25x_ep_ops,
1911                         .maxpacket      = INT_FIFO_SIZE,
1912                 },
1913                 .dev            = &memory,
1914                 .fifo_size      = INT_FIFO_SIZE,
1915                 .bEndpointAddress = USB_DIR_IN | 5,
1916                 .bmAttributes   = USB_ENDPOINT_XFER_INT,
1917                 .reg_udccs      = &UDCCS5,
1918                 .reg_uddr       = &UDDR5,
1919         },
1920
1921         /* second group of endpoints */
1922         .ep[6] = {
1923                 .ep = {
1924                         .name           = "ep6in-bulk",
1925                         .ops            = &pxa25x_ep_ops,
1926                         .maxpacket      = BULK_FIFO_SIZE,
1927                 },
1928                 .dev            = &memory,
1929                 .fifo_size      = BULK_FIFO_SIZE,
1930                 .bEndpointAddress = USB_DIR_IN | 6,
1931                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1932                 .reg_udccs      = &UDCCS6,
1933                 .reg_uddr       = &UDDR6,
1934         },
1935         .ep[7] = {
1936                 .ep = {
1937                         .name           = "ep7out-bulk",
1938                         .ops            = &pxa25x_ep_ops,
1939                         .maxpacket      = BULK_FIFO_SIZE,
1940                 },
1941                 .dev            = &memory,
1942                 .fifo_size      = BULK_FIFO_SIZE,
1943                 .bEndpointAddress = 7,
1944                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1945                 .reg_udccs      = &UDCCS7,
1946                 .reg_ubcr       = &UBCR7,
1947                 .reg_uddr       = &UDDR7,
1948         },
1949         .ep[8] = {
1950                 .ep = {
1951                         .name           = "ep8in-iso",
1952                         .ops            = &pxa25x_ep_ops,
1953                         .maxpacket      = ISO_FIFO_SIZE,
1954                 },
1955                 .dev            = &memory,
1956                 .fifo_size      = ISO_FIFO_SIZE,
1957                 .bEndpointAddress = USB_DIR_IN | 8,
1958                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1959                 .reg_udccs      = &UDCCS8,
1960                 .reg_uddr       = &UDDR8,
1961         },
1962         .ep[9] = {
1963                 .ep = {
1964                         .name           = "ep9out-iso",
1965                         .ops            = &pxa25x_ep_ops,
1966                         .maxpacket      = ISO_FIFO_SIZE,
1967                 },
1968                 .dev            = &memory,
1969                 .fifo_size      = ISO_FIFO_SIZE,
1970                 .bEndpointAddress = 9,
1971                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1972                 .reg_udccs      = &UDCCS9,
1973                 .reg_ubcr       = &UBCR9,
1974                 .reg_uddr       = &UDDR9,
1975         },
1976         .ep[10] = {
1977                 .ep = {
1978                         .name           = "ep10in-int",
1979                         .ops            = &pxa25x_ep_ops,
1980                         .maxpacket      = INT_FIFO_SIZE,
1981                 },
1982                 .dev            = &memory,
1983                 .fifo_size      = INT_FIFO_SIZE,
1984                 .bEndpointAddress = USB_DIR_IN | 10,
1985                 .bmAttributes   = USB_ENDPOINT_XFER_INT,
1986                 .reg_udccs      = &UDCCS10,
1987                 .reg_uddr       = &UDDR10,
1988         },
1989
1990         /* third group of endpoints */
1991         .ep[11] = {
1992                 .ep = {
1993                         .name           = "ep11in-bulk",
1994                         .ops            = &pxa25x_ep_ops,
1995                         .maxpacket      = BULK_FIFO_SIZE,
1996                 },
1997                 .dev            = &memory,
1998                 .fifo_size      = BULK_FIFO_SIZE,
1999                 .bEndpointAddress = USB_DIR_IN | 11,
2000                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
2001                 .reg_udccs      = &UDCCS11,
2002                 .reg_uddr       = &UDDR11,
2003         },
2004         .ep[12] = {
2005                 .ep = {
2006                         .name           = "ep12out-bulk",
2007                         .ops            = &pxa25x_ep_ops,
2008                         .maxpacket      = BULK_FIFO_SIZE,
2009                 },
2010                 .dev            = &memory,
2011                 .fifo_size      = BULK_FIFO_SIZE,
2012                 .bEndpointAddress = 12,
2013                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
2014                 .reg_udccs      = &UDCCS12,
2015                 .reg_ubcr       = &UBCR12,
2016                 .reg_uddr       = &UDDR12,
2017         },
2018         .ep[13] = {
2019                 .ep = {
2020                         .name           = "ep13in-iso",
2021                         .ops            = &pxa25x_ep_ops,
2022                         .maxpacket      = ISO_FIFO_SIZE,
2023                 },
2024                 .dev            = &memory,
2025                 .fifo_size      = ISO_FIFO_SIZE,
2026                 .bEndpointAddress = USB_DIR_IN | 13,
2027                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
2028                 .reg_udccs      = &UDCCS13,
2029                 .reg_uddr       = &UDDR13,
2030         },
2031         .ep[14] = {
2032                 .ep = {
2033                         .name           = "ep14out-iso",
2034                         .ops            = &pxa25x_ep_ops,
2035                         .maxpacket      = ISO_FIFO_SIZE,
2036                 },
2037                 .dev            = &memory,
2038                 .fifo_size      = ISO_FIFO_SIZE,
2039                 .bEndpointAddress = 14,
2040                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
2041                 .reg_udccs      = &UDCCS14,
2042                 .reg_ubcr       = &UBCR14,
2043                 .reg_uddr       = &UDDR14,
2044         },
2045         .ep[15] = {
2046                 .ep = {
2047                         .name           = "ep15in-int",
2048                         .ops            = &pxa25x_ep_ops,
2049                         .maxpacket      = INT_FIFO_SIZE,
2050                 },
2051                 .dev            = &memory,
2052                 .fifo_size      = INT_FIFO_SIZE,
2053                 .bEndpointAddress = USB_DIR_IN | 15,
2054                 .bmAttributes   = USB_ENDPOINT_XFER_INT,
2055                 .reg_udccs      = &UDCCS15,
2056                 .reg_uddr       = &UDDR15,
2057         },
2058 #endif /* !CONFIG_USB_PXA25X_SMALL */
2059 };
2060
2061 #define CP15R0_VENDOR_MASK      0xffffe000
2062
2063 #if     defined(CONFIG_ARCH_PXA)
2064 #define CP15R0_XSCALE_VALUE     0x69052000      /* intel/arm/xscale */
2065
2066 #elif   defined(CONFIG_ARCH_IXP4XX)
2067 #define CP15R0_XSCALE_VALUE     0x69054000      /* intel/arm/ixp4xx */
2068
2069 #endif
2070
2071 #define CP15R0_PROD_MASK        0x000003f0
2072 #define PXA25x                  0x00000100      /* and PXA26x */
2073 #define PXA210                  0x00000120
2074
2075 #define CP15R0_REV_MASK         0x0000000f
2076
2077 #define CP15R0_PRODREV_MASK     (CP15R0_PROD_MASK | CP15R0_REV_MASK)
2078
2079 #define PXA255_A0               0x00000106      /* or PXA260_B1 */
2080 #define PXA250_C0               0x00000105      /* or PXA26x_B0 */
2081 #define PXA250_B2               0x00000104
2082 #define PXA250_B1               0x00000103      /* or PXA260_A0 */
2083 #define PXA250_B0               0x00000102
2084 #define PXA250_A1               0x00000101
2085 #define PXA250_A0               0x00000100
2086
2087 #define PXA210_C0               0x00000125
2088 #define PXA210_B2               0x00000124
2089 #define PXA210_B1               0x00000123
2090 #define PXA210_B0               0x00000122
2091 #define IXP425_A0               0x000001c1
2092 #define IXP425_B0               0x000001f1
2093 #define IXP465_AD               0x00000200
2094
2095 /*
2096  *      probe - binds to the platform device
2097  */
2098 static int __init pxa25x_udc_probe(struct platform_device *pdev)
2099 {
2100         struct pxa25x_udc *dev = &memory;
2101         int retval, vbus_irq, irq;
2102         u32 chiprev;
2103
2104         /* insist on Intel/ARM/XScale */
2105         asm("mrc%? p15, 0, %0, c0, c0" : "=r" (chiprev));
2106         if ((chiprev & CP15R0_VENDOR_MASK) != CP15R0_XSCALE_VALUE) {
2107                 pr_err("%s: not XScale!\n", driver_name);
2108                 return -ENODEV;
2109         }
2110
2111         /* trigger chiprev-specific logic */
2112         switch (chiprev & CP15R0_PRODREV_MASK) {
2113 #if     defined(CONFIG_ARCH_PXA)
2114         case PXA255_A0:
2115                 dev->has_cfr = 1;
2116                 break;
2117         case PXA250_A0:
2118         case PXA250_A1:
2119                 /* A0/A1 "not released"; ep 13, 15 unusable */
2120                 /* fall through */
2121         case PXA250_B2: case PXA210_B2:
2122         case PXA250_B1: case PXA210_B1:
2123         case PXA250_B0: case PXA210_B0:
2124                 /* OUT-DMA is broken ... */
2125                 /* fall through */
2126         case PXA250_C0: case PXA210_C0:
2127                 break;
2128 #elif   defined(CONFIG_ARCH_IXP4XX)
2129         case IXP425_A0:
2130         case IXP425_B0:
2131         case IXP465_AD:
2132                 dev->has_cfr = 1;
2133                 break;
2134 #endif
2135         default:
2136                 pr_err("%s: unrecognized processor: %08x\n",
2137                         driver_name, chiprev);
2138                 /* iop3xx, ixp4xx, ... */
2139                 return -ENODEV;
2140         }
2141
2142         irq = platform_get_irq(pdev, 0);
2143         if (irq < 0)
2144                 return -ENODEV;
2145
2146         dev->clk = clk_get(&pdev->dev, "UDCCLK");
2147         if (IS_ERR(dev->clk)) {
2148                 retval = PTR_ERR(dev->clk);
2149                 goto err_clk;
2150         }
2151
2152         pr_debug("%s: IRQ %d%s%s\n", driver_name, irq,
2153                 dev->has_cfr ? "" : " (!cfr)",
2154                 SIZE_STR "(pio)"
2155                 );
2156
2157         /* other non-static parts of init */
2158         dev->dev = &pdev->dev;
2159         dev->mach = pdev->dev.platform_data;
2160
2161         if (dev->mach->gpio_vbus) {
2162                 if ((retval = gpio_request(dev->mach->gpio_vbus,
2163                                 "pxa25x_udc GPIO VBUS"))) {
2164                         dev_dbg(&pdev->dev,
2165                                 "can't get vbus gpio %d, err: %d\n",
2166                                 dev->mach->gpio_vbus, retval);
2167                         goto err_gpio_vbus;
2168                 }
2169                 gpio_direction_input(dev->mach->gpio_vbus);
2170                 vbus_irq = gpio_to_irq(dev->mach->gpio_vbus);
2171         } else
2172                 vbus_irq = 0;
2173
2174         if (dev->mach->gpio_pullup) {
2175                 if ((retval = gpio_request(dev->mach->gpio_pullup,
2176                                 "pca25x_udc GPIO PULLUP"))) {
2177                         dev_dbg(&pdev->dev,
2178                                 "can't get pullup gpio %d, err: %d\n",
2179                                 dev->mach->gpio_pullup, retval);
2180                         goto err_gpio_pullup;
2181                 }
2182                 gpio_direction_output(dev->mach->gpio_pullup, 0);
2183         }
2184
2185         init_timer(&dev->timer);
2186         dev->timer.function = udc_watchdog;
2187         dev->timer.data = (unsigned long) dev;
2188
2189         device_initialize(&dev->gadget.dev);
2190         dev->gadget.dev.parent = &pdev->dev;
2191         dev->gadget.dev.dma_mask = pdev->dev.dma_mask;
2192
2193         the_controller = dev;
2194         platform_set_drvdata(pdev, dev);
2195
2196         udc_disable(dev);
2197         udc_reinit(dev);
2198
2199         dev->vbus = is_vbus_present();
2200
2201         /* irq setup after old hardware state is cleaned up */
2202         retval = request_irq(irq, pxa25x_udc_irq,
2203                         IRQF_DISABLED, driver_name, dev);
2204         if (retval != 0) {
2205                 pr_err("%s: can't get irq %d, err %d\n",
2206                         driver_name, irq, retval);
2207                 goto err_irq1;
2208         }
2209         dev->got_irq = 1;
2210
2211 #ifdef CONFIG_ARCH_LUBBOCK
2212         if (machine_is_lubbock()) {
2213                 retval = request_irq(LUBBOCK_USB_DISC_IRQ,
2214                                 lubbock_vbus_irq,
2215                                 IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
2216                                 driver_name, dev);
2217                 if (retval != 0) {
2218                         pr_err("%s: can't get irq %i, err %d\n",
2219                                 driver_name, LUBBOCK_USB_DISC_IRQ, retval);
2220 lubbock_fail0:
2221                         goto err_irq_lub;
2222                 }
2223                 retval = request_irq(LUBBOCK_USB_IRQ,
2224                                 lubbock_vbus_irq,
2225                                 IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
2226                                 driver_name, dev);
2227                 if (retval != 0) {
2228                         pr_err("%s: can't get irq %i, err %d\n",
2229                                 driver_name, LUBBOCK_USB_IRQ, retval);
2230                         free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2231                         goto lubbock_fail0;
2232                 }
2233         } else
2234 #endif
2235         if (vbus_irq) {
2236                 retval = request_irq(vbus_irq, udc_vbus_irq,
2237                                 IRQF_DISABLED | IRQF_SAMPLE_RANDOM |
2238                                 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
2239                                 driver_name, dev);
2240                 if (retval != 0) {
2241                         pr_err("%s: can't get irq %i, err %d\n",
2242                                 driver_name, vbus_irq, retval);
2243                         goto err_vbus_irq;
2244                 }
2245         }
2246         create_debug_files(dev);
2247
2248         return 0;
2249
2250  err_vbus_irq:
2251 #ifdef  CONFIG_ARCH_LUBBOCK
2252         free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2253  err_irq_lub:
2254 #endif
2255         free_irq(irq, dev);
2256  err_irq1:
2257         if (dev->mach->gpio_pullup)
2258                 gpio_free(dev->mach->gpio_pullup);
2259  err_gpio_pullup:
2260         if (dev->mach->gpio_vbus)
2261                 gpio_free(dev->mach->gpio_vbus);
2262  err_gpio_vbus:
2263         clk_put(dev->clk);
2264  err_clk:
2265         return retval;
2266 }
2267
2268 static void pxa25x_udc_shutdown(struct platform_device *_dev)
2269 {
2270         pullup_off();
2271 }
2272
2273 static int __exit pxa25x_udc_remove(struct platform_device *pdev)
2274 {
2275         struct pxa25x_udc *dev = platform_get_drvdata(pdev);
2276
2277         if (dev->driver)
2278                 return -EBUSY;
2279
2280         dev->pullup = 0;
2281         pullup(dev);
2282
2283         remove_debug_files(dev);
2284
2285         if (dev->got_irq) {
2286                 free_irq(platform_get_irq(pdev, 0), dev);
2287                 dev->got_irq = 0;
2288         }
2289 #ifdef CONFIG_ARCH_LUBBOCK
2290         if (machine_is_lubbock()) {
2291                 free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2292                 free_irq(LUBBOCK_USB_IRQ, dev);
2293         }
2294 #endif
2295         if (dev->mach->gpio_vbus) {
2296                 free_irq(gpio_to_irq(dev->mach->gpio_vbus), dev);
2297                 gpio_free(dev->mach->gpio_vbus);
2298         }
2299         if (dev->mach->gpio_pullup)
2300                 gpio_free(dev->mach->gpio_pullup);
2301
2302         clk_put(dev->clk);
2303
2304         platform_set_drvdata(pdev, NULL);
2305         the_controller = NULL;
2306         return 0;
2307 }
2308
2309 /*-------------------------------------------------------------------------*/
2310
2311 #ifdef  CONFIG_PM
2312
2313 /* USB suspend (controlled by the host) and system suspend (controlled
2314  * by the PXA) don't necessarily work well together.  If USB is active,
2315  * the 48 MHz clock is required; so the system can't enter 33 MHz idle
2316  * mode, or any deeper PM saving state.
2317  *
2318  * For now, we punt and forcibly disconnect from the USB host when PXA
2319  * enters any suspend state.  While we're disconnected, we always disable
2320  * the 48MHz USB clock ... allowing PXA sleep and/or 33 MHz idle states.
2321  * Boards without software pullup control shouldn't use those states.
2322  * VBUS IRQs should probably be ignored so that the PXA device just acts
2323  * "dead" to USB hosts until system resume.
2324  */
2325 static int pxa25x_udc_suspend(struct platform_device *dev, pm_message_t state)
2326 {
2327         struct pxa25x_udc       *udc = platform_get_drvdata(dev);
2328         unsigned long flags;
2329
2330         if (!udc->mach->gpio_pullup && !udc->mach->udc_command)
2331                 WARN("USB host won't detect disconnect!\n");
2332         udc->suspended = 1;
2333
2334         local_irq_save(flags);
2335         pullup(udc);
2336         local_irq_restore(flags);
2337
2338         return 0;
2339 }
2340
2341 static int pxa25x_udc_resume(struct platform_device *dev)
2342 {
2343         struct pxa25x_udc       *udc = platform_get_drvdata(dev);
2344         unsigned long flags;
2345
2346         udc->suspended = 0;
2347         local_irq_save(flags);
2348         pullup(udc);
2349         local_irq_restore(flags);
2350
2351         return 0;
2352 }
2353
2354 #else
2355 #define pxa25x_udc_suspend      NULL
2356 #define pxa25x_udc_resume       NULL
2357 #endif
2358
2359 /*-------------------------------------------------------------------------*/
2360
2361 static struct platform_driver udc_driver = {
2362         .shutdown       = pxa25x_udc_shutdown,
2363         .remove         = __exit_p(pxa25x_udc_remove),
2364         .suspend        = pxa25x_udc_suspend,
2365         .resume         = pxa25x_udc_resume,
2366         .driver         = {
2367                 .owner  = THIS_MODULE,
2368                 .name   = "pxa25x-udc",
2369         },
2370 };
2371
2372 static int __init udc_init(void)
2373 {
2374         pr_info("%s: version %s\n", driver_name, DRIVER_VERSION);
2375         return platform_driver_probe(&udc_driver, pxa25x_udc_probe);
2376 }
2377 module_init(udc_init);
2378
2379 static void __exit udc_exit(void)
2380 {
2381         platform_driver_unregister(&udc_driver);
2382 }
2383 module_exit(udc_exit);
2384
2385 MODULE_DESCRIPTION(DRIVER_DESC);
2386 MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell");
2387 MODULE_LICENSE("GPL");
2388 MODULE_ALIAS("platform:pxa25x-udc");