drivers/usb/gadget/fsl_udc_core.c

   1 /*
   2  * Copyright (C) 2004-2007 Freescale Semicondutor, Inc. All rights reserved.
   3  *
   4  * Author: Li Yang <leoli@freescale.com>
   5  *         Jiang Bo <tanya.jiang@freescale.com>
   6  *
   7  * Description:
   8  * Freescale high-speed USB SOC DR module device controller driver.
   9  * This can be found on MPC8349E/MPC8313E cpus.
  10  * The driver is previously named as mpc_udc.  Based on bare board
  11  * code from Dave Liu and Shlomi Gridish.
  12  *
  13  * This program is free software; you can redistribute  it and/or modify it
  14  * under  the terms of  the GNU General  Public License as published by the
  15  * Free Software Foundation;  either version 2 of the  License, or (at your
  16  * option) any later version.
  17  */
  18
  19 #undef VERBOSE
  20
  21 #include <linux/module.h>
  22 #include <linux/kernel.h>
  23 #include <linux/ioport.h>
  24 #include <linux/types.h>
  25 #include <linux/errno.h>
  26 #include <linux/slab.h>
  27 #include <linux/init.h>
  28 #include <linux/list.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/proc_fs.h>
  31 #include <linux/mm.h>
  32 #include <linux/moduleparam.h>
  33 #include <linux/device.h>
  34 #include <linux/usb/ch9.h>
  35 #include <linux/usb/gadget.h>
  36 #include <linux/usb/otg.h>
  37 #include <linux/dma-mapping.h>
  38 #include <linux/platform_device.h>
  39 #include <linux/fsl_devices.h>
  40 #include <linux/dmapool.h>
  41 #include <linux/delay.h>
  42
  43 #include <asm/byteorder.h>
  44 #include <asm/io.h>
  45 #include <asm/system.h>
  46 #include <asm/unaligned.h>
  47 #include <asm/dma.h>
  48
  49 #include "fsl_usb2_udc.h"
  50
  51 #define DRIVER_DESC     "Freescale High-Speed USB SOC Device Controller driver"
  52 #define DRIVER_AUTHOR   "Li Yang/Jiang Bo"
  53 #define DRIVER_VERSION  "Apr 20, 2007"
  54
  55 #define DMA_ADDR_INVALID        (~(dma_addr_t)0)
  56
  57 static const char driver_name[] = "fsl-usb2-udc";
  58 static const char driver_desc[] = DRIVER_DESC;
  59
  60 static struct usb_dr_device *dr_regs;
  61 #ifndef CONFIG_ARCH_MXC
  62 static struct usb_sys_interface *usb_sys_regs;
  63 #endif
  64
  65 /* it is initialized in probe()  */
  66 static struct fsl_udc *udc_controller = NULL;
  67
  68 static const struct usb_endpoint_descriptor
  69 fsl_ep0_desc = {
  70         .bLength =              USB_DT_ENDPOINT_SIZE,
  71         .bDescriptorType =      USB_DT_ENDPOINT,
  72         .bEndpointAddress =     0,
  73         .bmAttributes =         USB_ENDPOINT_XFER_CONTROL,
  74         .wMaxPacketSize =       USB_MAX_CTRL_PAYLOAD,
  75 };
  76
  77 static void fsl_ep_fifo_flush(struct usb_ep *_ep);
  78
  79 #ifdef CONFIG_PPC32
  80 #define fsl_readl(addr)         in_le32(addr)
  81 #define fsl_writel(val32, addr) out_le32(addr, val32)
  82 #else
  83 #define fsl_readl(addr)         readl(addr)
  84 #define fsl_writel(val32, addr) writel(val32, addr)
  85 #endif
  86
  87 /********************************************************************
  88  *      Internal Used Function
  89 ********************************************************************/
  90 /*-----------------------------------------------------------------
  91  * done() - retire a request; caller blocked irqs
  92  * @status : request status to be set, only works when
  93  *      request is still in progress.
  94  *--------------------------------------------------------------*/
  95 static void done(struct fsl_ep *ep, struct fsl_req *req, int status)
  96 {
  97         struct fsl_udc *udc = NULL;
  98         unsigned char stopped = ep->stopped;
  99         struct ep_td_struct *curr_td, *next_td;
 100         int j;
 101
 102         udc = (struct fsl_udc *)ep->udc;
 103         /* Removed the req from fsl_ep->queue */
 104         list_del_init(&req->queue);
 105
 106         /* req.status should be set as -EINPROGRESS in ep_queue() */
 107         if (req->req.status == -EINPROGRESS)
 108                 req->req.status = status;
 109         else
 110                 status = req->req.status;
 111
 112         /* Free dtd for the request */
 113         next_td = req->head;
 114         for (j = 0; j < req->dtd_count; j++) {
 115                 curr_td = next_td;
 116                 if (j != req->dtd_count - 1) {
 117                         next_td = curr_td->next_td_virt;
 118                 }
 119                 dma_pool_free(udc->td_pool, curr_td, curr_td->td_dma);
 120         }
 121
 122         if (req->mapped) {
 123                 dma_unmap_single(ep->udc->gadget.dev.parent,
 124                         req->req.dma, req->req.length,
 125                         ep_is_in(ep)
 126                                 ? DMA_TO_DEVICE
 127                                 : DMA_FROM_DEVICE);
 128                 req->req.dma = DMA_ADDR_INVALID;
 129                 req->mapped = 0;
 130         } else
 131                 dma_sync_single_for_cpu(ep->udc->gadget.dev.parent,
 132                         req->req.dma, req->req.length,
 133                         ep_is_in(ep)
 134                                 ? DMA_TO_DEVICE
 135                                 : DMA_FROM_DEVICE);
 136
 137         if (status && (status != -ESHUTDOWN))
 138                 VDBG("complete %s req %p stat %d len %u/%u",
 139                         ep->ep.name, &req->req, status,
 140                         req->req.actual, req->req.length);
 141
 142         ep->stopped = 1;
 143
 144         spin_unlock(&ep->udc->lock);
 145         /* complete() is from gadget layer,
 146          * eg fsg->bulk_in_complete() */
 147         if (req->req.complete)
 148                 req->req.complete(&ep->ep, &req->req);
 149
 150         spin_lock(&ep->udc->lock);
 151         ep->stopped = stopped;
 152 }
 153
 154 /*-----------------------------------------------------------------
 155  * nuke(): delete all requests related to this ep
 156  * called with spinlock held
 157  *--------------------------------------------------------------*/
 158 static void nuke(struct fsl_ep *ep, int status)
 159 {
 160         ep->stopped = 1;
 161
 162         /* Flush fifo */
 163         fsl_ep_fifo_flush(&ep->ep);
 164
 165         /* Whether this eq has request linked */
 166         while (!list_empty(&ep->queue)) {
 167                 struct fsl_req *req = NULL;
 168
 169                 req = list_entry(ep->queue.next, struct fsl_req, queue);
 170                 done(ep, req, status);
 171         }
 172 }
 173
 174 /*------------------------------------------------------------------
 175         Internal Hardware related function
 176  ------------------------------------------------------------------*/
 177
 178 static int dr_controller_setup(struct fsl_udc *udc)
 179 {
 180         unsigned int tmp, portctrl;
 181 #ifndef CONFIG_ARCH_MXC
 182         unsigned int ctrl;
 183 #endif
 184         unsigned long timeout;
 185 #define FSL_UDC_RESET_TIMEOUT 1000
 186
 187         /* Config PHY interface */
 188         portctrl = fsl_readl(&dr_regs->portsc1);
 189         portctrl &= ~(PORTSCX_PHY_TYPE_SEL | PORTSCX_PORT_WIDTH);
 190         switch (udc->phy_mode) {
 191         case FSL_USB2_PHY_ULPI:
 192                 portctrl |= PORTSCX_PTS_ULPI;
 193                 break;
 194         case FSL_USB2_PHY_UTMI_WIDE:
 195                 portctrl |= PORTSCX_PTW_16BIT;
 196                 /* fall through */
 197         case FSL_USB2_PHY_UTMI:
 198                 portctrl |= PORTSCX_PTS_UTMI;
 199                 break;
 200         case FSL_USB2_PHY_SERIAL:
 201                 portctrl |= PORTSCX_PTS_FSLS;
 202                 break;
 203         default:
 204                 return -EINVAL;
 205         }
 206         fsl_writel(portctrl, &dr_regs->portsc1);
 207
 208         /* Stop and reset the usb controller */
 209         tmp = fsl_readl(&dr_regs->usbcmd);
 210         tmp &= ~USB_CMD_RUN_STOP;
 211         fsl_writel(tmp, &dr_regs->usbcmd);
 212
 213         tmp = fsl_readl(&dr_regs->usbcmd);
 214         tmp |= USB_CMD_CTRL_RESET;
 215         fsl_writel(tmp, &dr_regs->usbcmd);
 216
 217         /* Wait for reset to complete */
 218         timeout = jiffies + FSL_UDC_RESET_TIMEOUT;
 219         while (fsl_readl(&dr_regs->usbcmd) & USB_CMD_CTRL_RESET) {
 220                 if (time_after(jiffies, timeout)) {
 221                         ERR("udc reset timeout!\n");
 222                         return -ETIMEDOUT;
 223                 }
 224                 cpu_relax();
 225         }
 226
 227         /* Set the controller as device mode */
 228         tmp = fsl_readl(&dr_regs->usbmode);
 229         tmp |= USB_MODE_CTRL_MODE_DEVICE;
 230         /* Disable Setup Lockout */
 231         tmp |= USB_MODE_SETUP_LOCK_OFF;
 232         fsl_writel(tmp, &dr_regs->usbmode);
 233
 234         /* Clear the setup status */
 235         fsl_writel(0, &dr_regs->usbsts);
 236
 237         tmp = udc->ep_qh_dma;
 238         tmp &= USB_EP_LIST_ADDRESS_MASK;
 239         fsl_writel(tmp, &dr_regs->endpointlistaddr);
 240
 241         VDBG("vir[qh_base] is %p phy[qh_base] is 0x%8x reg is 0x%8x",
 242                 udc->ep_qh, (int)tmp,
 243                 fsl_readl(&dr_regs->endpointlistaddr));
 244
 245         /* Config control enable i/o output, cpu endian register */
 246 #ifndef CONFIG_ARCH_MXC
 247         ctrl = __raw_readl(&usb_sys_regs->control);
 248         ctrl |= USB_CTRL_IOENB;
 249         __raw_writel(ctrl, &usb_sys_regs->control);
 250 #endif
 251
 252 #if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
 253         /* Turn on cache snooping hardware, since some PowerPC platforms
 254          * wholly rely on hardware to deal with cache coherent. */
 255
 256         /* Setup Snooping for all the 4GB space */
 257         tmp = SNOOP_SIZE_2GB;   /* starts from 0x0, size 2G */
 258         __raw_writel(tmp, &usb_sys_regs->snoop1);
 259         tmp |= 0x80000000;      /* starts from 0x8000000, size 2G */
 260         __raw_writel(tmp, &usb_sys_regs->snoop2);
 261 #endif
 262
 263         return 0;
 264 }
 265
 266 /* Enable DR irq and set controller to run state */
 267 static void dr_controller_run(struct fsl_udc *udc)
 268 {
 269         u32 temp;
 270
 271         /* Enable DR irq reg */
 272         temp = USB_INTR_INT_EN | USB_INTR_ERR_INT_EN
 273                 | USB_INTR_PTC_DETECT_EN | USB_INTR_RESET_EN
 274                 | USB_INTR_DEVICE_SUSPEND | USB_INTR_SYS_ERR_EN;
 275
 276         fsl_writel(temp, &dr_regs->usbintr);
 277
 278         /* Clear stopped bit */
 279         udc->stopped = 0;
 280
 281         /* Set the controller as device mode */
 282         temp = fsl_readl(&dr_regs->usbmode);
 283         temp |= USB_MODE_CTRL_MODE_DEVICE;
 284         fsl_writel(temp, &dr_regs->usbmode);
 285
 286         /* Set controller to Run */
 287         temp = fsl_readl(&dr_regs->usbcmd);
 288         temp |= USB_CMD_RUN_STOP;
 289         fsl_writel(temp, &dr_regs->usbcmd);
 290
 291         return;
 292 }
 293
 294 static void dr_controller_stop(struct fsl_udc *udc)
 295 {
 296         unsigned int tmp;
 297
 298         /* disable all INTR */
 299         fsl_writel(0, &dr_regs->usbintr);
 300
 301         /* Set stopped bit for isr */
 302         udc->stopped = 1;
 303
 304         /* disable IO output */
 305 /*      usb_sys_regs->control = 0; */
 306
 307         /* set controller to Stop */
 308         tmp = fsl_readl(&dr_regs->usbcmd);
 309         tmp &= ~USB_CMD_RUN_STOP;
 310         fsl_writel(tmp, &dr_regs->usbcmd);
 311
 312         return;
 313 }
 314
 315 static void dr_ep_setup(unsigned char ep_num, unsigned char dir,
 316                         unsigned char ep_type)
 317 {
 318         unsigned int tmp_epctrl = 0;
 319
 320         tmp_epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
 321         if (dir) {
 322                 if (ep_num)
 323                         tmp_epctrl |= EPCTRL_TX_DATA_TOGGLE_RST;
 324                 tmp_epctrl |= EPCTRL_TX_ENABLE;
 325                 tmp_epctrl |= ((unsigned int)(ep_type)
 326                                 << EPCTRL_TX_EP_TYPE_SHIFT);
 327         } else {
 328                 if (ep_num)
 329                         tmp_epctrl |= EPCTRL_RX_DATA_TOGGLE_RST;
 330                 tmp_epctrl |= EPCTRL_RX_ENABLE;
 331                 tmp_epctrl |= ((unsigned int)(ep_type)
 332                                 << EPCTRL_RX_EP_TYPE_SHIFT);
 333         }
 334
 335         fsl_writel(tmp_epctrl, &dr_regs->endptctrl[ep_num]);
 336 }
 337
 338 static void
 339 dr_ep_change_stall(unsigned char ep_num, unsigned char dir, int value)
 340 {
 341         u32 tmp_epctrl = 0;
 342
 343         tmp_epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
 344
 345         if (value) {
 346                 /* set the stall bit */
 347                 if (dir)
 348                         tmp_epctrl |= EPCTRL_TX_EP_STALL;
 349                 else
 350                         tmp_epctrl |= EPCTRL_RX_EP_STALL;
 351         } else {
 352                 /* clear the stall bit and reset data toggle */
 353                 if (dir) {
 354                         tmp_epctrl &= ~EPCTRL_TX_EP_STALL;
 355                         tmp_epctrl |= EPCTRL_TX_DATA_TOGGLE_RST;
 356                 } else {
 357                         tmp_epctrl &= ~EPCTRL_RX_EP_STALL;
 358                         tmp_epctrl |= EPCTRL_RX_DATA_TOGGLE_RST;
 359                 }
 360         }
 361         fsl_writel(tmp_epctrl, &dr_regs->endptctrl[ep_num]);
 362 }
 363
 364 /* Get stall status of a specific ep
 365    Return: 0: not stalled; 1:stalled */
 366 static int dr_ep_get_stall(unsigned char ep_num, unsigned char dir)
 367 {
 368         u32 epctrl;
 369
 370         epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
 371         if (dir)
 372                 return (epctrl & EPCTRL_TX_EP_STALL) ? 1 : 0;
 373         else
 374                 return (epctrl & EPCTRL_RX_EP_STALL) ? 1 : 0;
 375 }
 376
 377 /********************************************************************
 378         Internal Structure Build up functions
 379 ********************************************************************/
 380
 381 /*------------------------------------------------------------------
 382 * struct_ep_qh_setup(): set the Endpoint Capabilites field of QH
 383  * @zlt: Zero Length Termination Select (1: disable; 0: enable)
 384  * @mult: Mult field
 385  ------------------------------------------------------------------*/
 386 static void struct_ep_qh_setup(struct fsl_udc *udc, unsigned char ep_num,
 387                 unsigned char dir, unsigned char ep_type,
 388                 unsigned int max_pkt_len,
 389                 unsigned int zlt, unsigned char mult)
 390 {
 391         struct ep_queue_head *p_QH = &udc->ep_qh[2 * ep_num + dir];
 392         unsigned int tmp = 0;
 393
 394         /* set the Endpoint Capabilites in QH */
 395         switch (ep_type) {
 396         case USB_ENDPOINT_XFER_CONTROL:
 397                 /* Interrupt On Setup (IOS). for control ep  */
 398                 tmp = (max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS)
 399                         | EP_QUEUE_HEAD_IOS;
 400                 break;
 401         case USB_ENDPOINT_XFER_ISOC:
 402                 tmp = (max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS)
 403                         | (mult << EP_QUEUE_HEAD_MULT_POS);
 404                 break;
 405         case USB_ENDPOINT_XFER_BULK:
 406         case USB_ENDPOINT_XFER_INT:
 407                 tmp = max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS;
 408                 break;
 409         default:
 410                 VDBG("error ep type is %d", ep_type);
 411                 return;
 412         }
 413         if (zlt)
 414                 tmp |= EP_QUEUE_HEAD_ZLT_SEL;
 415
 416         p_QH->max_pkt_length = cpu_to_le32(tmp);
 417         p_QH->next_dtd_ptr = 1;
 418         p_QH->size_ioc_int_sts = 0;
 419
 420         return;
 421 }
 422
 423 /* Setup qh structure and ep register for ep0. */
 424 static void ep0_setup(struct fsl_udc *udc)
 425 {
 426         /* the intialization of an ep includes: fields in QH, Regs,
 427          * fsl_ep struct */
 428         struct_ep_qh_setup(udc, 0, USB_RECV, USB_ENDPOINT_XFER_CONTROL,
 429                         USB_MAX_CTRL_PAYLOAD, 0, 0);
 430         struct_ep_qh_setup(udc, 0, USB_SEND, USB_ENDPOINT_XFER_CONTROL,
 431                         USB_MAX_CTRL_PAYLOAD, 0, 0);
 432         dr_ep_setup(0, USB_RECV, USB_ENDPOINT_XFER_CONTROL);
 433         dr_ep_setup(0, USB_SEND, USB_ENDPOINT_XFER_CONTROL);
 434
 435         return;
 436
 437 }
 438
 439 /***********************************************************************
 440                 Endpoint Management Functions
 441 ***********************************************************************/
 442
 443 /*-------------------------------------------------------------------------
 444  * when configurations are set, or when interface settings change
 445  * for example the do_set_interface() in gadget layer,
 446  * the driver will enable or disable the relevant endpoints
 447  * ep0 doesn't use this routine. It is always enabled.
 448 -------------------------------------------------------------------------*/
 449 static int fsl_ep_enable(struct usb_ep *_ep,
 450                 const struct usb_endpoint_descriptor *desc)
 451 {
 452         struct fsl_udc *udc = NULL;
 453         struct fsl_ep *ep = NULL;
 454         unsigned short max = 0;
 455         unsigned char mult = 0, zlt;
 456         int retval = -EINVAL;
 457         unsigned long flags = 0;
 458
 459         ep = container_of(_ep, struct fsl_ep, ep);
 460
 461         /* catch various bogus parameters */
 462         if (!_ep || !desc || ep->desc
 463                         || (desc->bDescriptorType != USB_DT_ENDPOINT))
 464                 return -EINVAL;
 465
 466         udc = ep->udc;
 467
 468         if (!udc->driver || (udc->gadget.speed == USB_SPEED_UNKNOWN))
 469                 return -ESHUTDOWN;
 470
 471         max = le16_to_cpu(desc->wMaxPacketSize);
 472
 473         /* Disable automatic zlp generation.  Driver is reponsible to indicate
 474          * explicitly through req->req.zero.  This is needed to enable multi-td
 475          * request. */
 476         zlt = 1;
 477
 478         /* Assume the max packet size from gadget is always correct */
 479         switch (desc->bmAttributes & 0x03) {
 480         case USB_ENDPOINT_XFER_CONTROL:
 481         case USB_ENDPOINT_XFER_BULK:
 482         case USB_ENDPOINT_XFER_INT:
 483                 /* mult = 0.  Execute N Transactions as demonstrated by
 484                  * the USB variable length packet protocol where N is
 485                  * computed using the Maximum Packet Length (dQH) and
 486                  * the Total Bytes field (dTD) */
 487                 mult = 0;
 488                 break;
 489         case USB_ENDPOINT_XFER_ISOC:
 490                 /* Calculate transactions needed for high bandwidth iso */
 491                 mult = (unsigned char)(1 + ((max >> 11) & 0x03));
 492                 max = max & 0x7ff;      /* bit 0~10 */
 493                 /* 3 transactions at most */
 494                 if (mult > 3)
 495                         goto en_done;
 496                 break;
 497         default:
 498                 goto en_done;
 499         }
 500
 501         spin_lock_irqsave(&udc->lock, flags);
 502         ep->ep.maxpacket = max;
 503         ep->desc = desc;
 504         ep->stopped = 0;
 505
 506         /* Controller related setup */
 507         /* Init EPx Queue Head (Ep Capabilites field in QH
 508          * according to max, zlt, mult) */
 509         struct_ep_qh_setup(udc, (unsigned char) ep_index(ep),
 510                         (unsigned char) ((desc->bEndpointAddress & USB_DIR_IN)
 511                                         ?  USB_SEND : USB_RECV),
 512                         (unsigned char) (desc->bmAttributes
 513                                         & USB_ENDPOINT_XFERTYPE_MASK),
 514                         max, zlt, mult);
 515
 516         /* Init endpoint ctrl register */
 517         dr_ep_setup((unsigned char) ep_index(ep),
 518                         (unsigned char) ((desc->bEndpointAddress & USB_DIR_IN)
 519                                         ? USB_SEND : USB_RECV),
 520                         (unsigned char) (desc->bmAttributes
 521                                         & USB_ENDPOINT_XFERTYPE_MASK));
 522
 523         spin_unlock_irqrestore(&udc->lock, flags);
 524         retval = 0;
 525
 526         VDBG("enabled %s (ep%d%s) maxpacket %d",ep->ep.name,
 527                         ep->desc->bEndpointAddress & 0x0f,
 528                         (desc->bEndpointAddress & USB_DIR_IN)
 529                                 ? "in" : "out", max);
 530 en_done:
 531         return retval;
 532 }
 533
 534 /*---------------------------------------------------------------------
 535  * @ep : the ep being unconfigured. May not be ep0
 536  * Any pending and uncomplete req will complete with status (-ESHUTDOWN)
 537 *---------------------------------------------------------------------*/
 538 static int fsl_ep_disable(struct usb_ep *_ep)
 539 {
 540         struct fsl_udc *udc = NULL;
 541         struct fsl_ep *ep = NULL;
 542         unsigned long flags = 0;
 543         u32 epctrl;
 544         int ep_num;
 545
 546         ep = container_of(_ep, struct fsl_ep, ep);
 547         if (!_ep || !ep->desc) {
 548                 VDBG("%s not enabled", _ep ? ep->ep.name : NULL);
 549                 return -EINVAL;
 550         }
 551
 552         /* disable ep on controller */
 553         ep_num = ep_index(ep);
 554         epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
 555         if (ep_is_in(ep))
 556                 epctrl &= ~EPCTRL_TX_ENABLE;
 557         else
 558                 epctrl &= ~EPCTRL_RX_ENABLE;
 559         fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
 560
 561         udc = (struct fsl_udc *)ep->udc;
 562         spin_lock_irqsave(&udc->lock, flags);
 563
 564         /* nuke all pending requests (does flush) */
 565         nuke(ep, -ESHUTDOWN);
 566
 567         ep->desc = NULL;
 568         ep->stopped = 1;
 569         spin_unlock_irqrestore(&udc->lock, flags);
 570
 571         VDBG("disabled %s OK", _ep->name);
 572         return 0;
 573 }
 574
 575 /*---------------------------------------------------------------------
 576  * allocate a request object used by this endpoint
 577  * the main operation is to insert the req->queue to the eq->queue
 578  * Returns the request, or null if one could not be allocated
 579 *---------------------------------------------------------------------*/
 580 static struct usb_request *
 581 fsl_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
 582 {
 583         struct fsl_req *req = NULL;
 584
 585         req = kzalloc(sizeof *req, gfp_flags);
 586         if (!req)
 587                 return NULL;
 588
 589         req->req.dma = DMA_ADDR_INVALID;
 590         INIT_LIST_HEAD(&req->queue);
 591
 592         return &req->req;
 593 }
 594
 595 static void fsl_free_request(struct usb_ep *_ep, struct usb_request *_req)
 596 {
 597         struct fsl_req *req = NULL;
 598
 599         req = container_of(_req, struct fsl_req, req);
 600
 601         if (_req)
 602                 kfree(req);
 603 }
 604
 605 /*-------------------------------------------------------------------------*/
 606 static void fsl_queue_td(struct fsl_ep *ep, struct fsl_req *req)
 607 {
 608         int i = ep_index(ep) * 2 + ep_is_in(ep);
 609         u32 temp, bitmask, tmp_stat;
 610         struct ep_queue_head *dQH = &ep->udc->ep_qh[i];
 611
 612         /* VDBG("QH addr Register 0x%8x", dr_regs->endpointlistaddr);
 613         VDBG("ep_qh[%d] addr is 0x%8x", i, (u32)&(ep->udc->ep_qh[i])); */
 614
 615         bitmask = ep_is_in(ep)
 616                 ? (1 << (ep_index(ep) + 16))
 617                 : (1 << (ep_index(ep)));
 618
 619         /* check if the pipe is empty */
 620         if (!(list_empty(&ep->queue))) {
 621                 /* Add td to the end */
 622                 struct fsl_req *lastreq;
 623                 lastreq = list_entry(ep->queue.prev, struct fsl_req, queue);
 624                 lastreq->tail->next_td_ptr =
 625                         cpu_to_le32(req->head->td_dma & DTD_ADDR_MASK);
 626                 /* Read prime bit, if 1 goto done */
 627                 if (fsl_readl(&dr_regs->endpointprime) & bitmask)
 628                         goto out;
 629
 630                 do {
 631                         /* Set ATDTW bit in USBCMD */
 632                         temp = fsl_readl(&dr_regs->usbcmd);
 633                         fsl_writel(temp | USB_CMD_ATDTW, &dr_regs->usbcmd);
 634
 635                         /* Read correct status bit */
 636                         tmp_stat = fsl_readl(&dr_regs->endptstatus) & bitmask;
 637
 638                 } while (!(fsl_readl(&dr_regs->usbcmd) & USB_CMD_ATDTW));
 639
 640                 /* Write ATDTW bit to 0 */
 641                 temp = fsl_readl(&dr_regs->usbcmd);
 642                 fsl_writel(temp & ~USB_CMD_ATDTW, &dr_regs->usbcmd);
 643
 644                 if (tmp_stat)
 645                         goto out;
 646         }
 647
 648         /* Write dQH next pointer and terminate bit to 0 */
 649         temp = req->head->td_dma & EP_QUEUE_HEAD_NEXT_POINTER_MASK;
 650         dQH->next_dtd_ptr = cpu_to_le32(temp);
 651
 652         /* Clear active and halt bit */
 653         temp = cpu_to_le32(~(EP_QUEUE_HEAD_STATUS_ACTIVE
 654                         | EP_QUEUE_HEAD_STATUS_HALT));
 655         dQH->size_ioc_int_sts &= temp;
 656
 657         /* Ensure that updates to the QH will occure before priming. */
 658         wmb();
 659
 660         /* Prime endpoint by writing 1 to ENDPTPRIME */
 661         temp = ep_is_in(ep)
 662                 ? (1 << (ep_index(ep) + 16))
 663                 : (1 << (ep_index(ep)));
 664         fsl_writel(temp, &dr_regs->endpointprime);
 665 out:
 666         return;
 667 }
 668
 669 /* Fill in the dTD structure
 670  * @req: request that the transfer belongs to
 671  * @length: return actually data length of the dTD
 672  * @dma: return dma address of the dTD
 673  * @is_last: return flag if it is the last dTD of the request
 674  * return: pointer to the built dTD */
 675 static struct ep_td_struct *fsl_build_dtd(struct fsl_req *req, unsigned *length,
 676                 dma_addr_t *dma, int *is_last)
 677 {
 678         u32 swap_temp;
 679         struct ep_td_struct *dtd;
 680
 681         /* how big will this transfer be? */
 682         *length = min(req->req.length - req->req.actual,
 683                         (unsigned)EP_MAX_LENGTH_TRANSFER);
 684
 685         dtd = dma_pool_alloc(udc_controller->td_pool, GFP_KERNEL, dma);
 686         if (dtd == NULL)
 687                 return dtd;
 688
 689         dtd->td_dma = *dma;
 690         /* Clear reserved field */
 691         swap_temp = cpu_to_le32(dtd->size_ioc_sts);
 692         swap_temp &= ~DTD_RESERVED_FIELDS;
 693         dtd->size_ioc_sts = cpu_to_le32(swap_temp);
 694
 695         /* Init all of buffer page pointers */
 696         swap_temp = (u32) (req->req.dma + req->req.actual);
 697         dtd->buff_ptr0 = cpu_to_le32(swap_temp);
 698         dtd->buff_ptr1 = cpu_to_le32(swap_temp + 0x1000);
 699         dtd->buff_ptr2 = cpu_to_le32(swap_temp + 0x2000);
 700         dtd->buff_ptr3 = cpu_to_le32(swap_temp + 0x3000);
 701         dtd->buff_ptr4 = cpu_to_le32(swap_temp + 0x4000);
 702
 703         req->req.actual += *length;
 704
 705         /* zlp is needed if req->req.zero is set */
 706         if (req->req.zero) {
 707                 if (*length == 0 || (*length % req->ep->ep.maxpacket) != 0)
 708                         *is_last = 1;
 709                 else
 710                         *is_last = 0;
 711         } else if (req->req.length == req->req.actual)
 712                 *is_last = 1;
 713         else
 714                 *is_last = 0;
 715
 716         if ((*is_last) == 0)
 717                 VDBG("multi-dtd request!");
 718         /* Fill in the transfer size; set active bit */
 719         swap_temp = ((*length << DTD_LENGTH_BIT_POS) | DTD_STATUS_ACTIVE);
 720
 721         /* Enable interrupt for the last dtd of a request */
 722         if (*is_last && !req->req.no_interrupt)
 723                 swap_temp |= DTD_IOC;
 724
 725         dtd->size_ioc_sts = cpu_to_le32(swap_temp);
 726
 727         mb();
 728
 729         VDBG("length = %d address= 0x%x", *length, (int)*dma);
 730
 731         return dtd;
 732 }
 733
 734 /* Generate dtd chain for a request */
 735 static int fsl_req_to_dtd(struct fsl_req *req)
 736 {
 737         unsigned        count;
 738         int             is_last;
 739         int             is_first =1;
 740         struct ep_td_struct     *last_dtd = NULL, *dtd;
 741         dma_addr_t dma;
 742
 743         do {
 744                 dtd = fsl_build_dtd(req, &count, &dma, &is_last);
 745                 if (dtd == NULL)
 746                         return -ENOMEM;
 747
 748                 if (is_first) {
 749                         is_first = 0;
 750                         req->head = dtd;
 751                 } else {
 752                         last_dtd->next_td_ptr = cpu_to_le32(dma);
 753                         last_dtd->next_td_virt = dtd;
 754                 }
 755                 last_dtd = dtd;
 756
 757                 req->dtd_count++;
 758         } while (!is_last);
 759
 760         dtd->next_td_ptr = cpu_to_le32(DTD_NEXT_TERMINATE);
 761
 762         req->tail = dtd;
 763
 764         return 0;
 765 }
 766
 767 /* queues (submits) an I/O request to an endpoint */
 768 static int
 769 fsl_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
 770 {
 771         struct fsl_ep *ep = container_of(_ep, struct fsl_ep, ep);
 772         struct fsl_req *req = container_of(_req, struct fsl_req, req);
 773         struct fsl_udc *udc;
 774         unsigned long flags;
 775         int is_iso = 0;
 776
 777         /* catch various bogus parameters */
 778         if (!_req || !req->req.complete || !req->req.buf
 779                         || !list_empty(&req->queue)) {
 780                 VDBG("%s, bad params", __func__);
 781                 return -EINVAL;
 782         }
 783         if (unlikely(!_ep || !ep->desc)) {
 784                 VDBG("%s, bad ep", __func__);
 785                 return -EINVAL;
 786         }
 787         if (ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 788                 if (req->req.length > ep->ep.maxpacket)
 789                         return -EMSGSIZE;
 790                 is_iso = 1;
 791         }
 792
 793         udc = ep->udc;
 794         if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
 795                 return -ESHUTDOWN;
 796
 797         req->ep = ep;
 798
 799         /* map virtual address to hardware */
 800         if (req->req.dma == DMA_ADDR_INVALID) {
 801                 req->req.dma = dma_map_single(ep->udc->gadget.dev.parent,
 802                                         req->req.buf,
 803                                         req->req.length, ep_is_in(ep)
 804                                                 ? DMA_TO_DEVICE
 805                                                 : DMA_FROM_DEVICE);
 806                 req->mapped = 1;
 807         } else {
 808                 dma_sync_single_for_device(ep->udc->gadget.dev.parent,
 809                                         req->req.dma, req->req.length,
 810                                         ep_is_in(ep)
 811                                                 ? DMA_TO_DEVICE
 812                                                 : DMA_FROM_DEVICE);
 813                 req->mapped = 0;
 814         }
 815
 816         req->req.status = -EINPROGRESS;
 817         req->req.actual = 0;
 818         req->dtd_count = 0;
 819
 820         spin_lock_irqsave(&udc->lock, flags);
 821
 822         /* build dtds and push them to device queue */
 823         if (!fsl_req_to_dtd(req)) {
 824                 fsl_queue_td(ep, req);
 825         } else {
 826                 spin_unlock_irqrestore(&udc->lock, flags);
 827                 return -ENOMEM;
 828         }
 829
 830         /* Update ep0 state */
 831         if ((ep_index(ep) == 0))
 832                 udc->ep0_state = DATA_STATE_XMIT;
 833
 834         /* irq handler advances the queue */
 835         if (req != NULL)
 836                 list_add_tail(&req->queue, &ep->queue);
 837         spin_unlock_irqrestore(&udc->lock, flags);
 838
 839         return 0;
 840 }
 841
 842 /* dequeues (cancels, unlinks) an I/O request from an endpoint */
 843 static int fsl_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
 844 {
 845         struct fsl_ep *ep = container_of(_ep, struct fsl_ep, ep);
 846         struct fsl_req *req;
 847         unsigned long flags;
 848         int ep_num, stopped, ret = 0;
 849         u32 epctrl;
 850
 851         if (!_ep || !_req)
 852                 return -EINVAL;
 853
 854         spin_lock_irqsave(&ep->udc->lock, flags);
 855         stopped = ep->stopped;
 856
 857         /* Stop the ep before we deal with the queue */
 858         ep->stopped = 1;
 859         ep_num = ep_index(ep);
 860         epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
 861         if (ep_is_in(ep))
 862                 epctrl &= ~EPCTRL_TX_ENABLE;
 863         else
 864                 epctrl &= ~EPCTRL_RX_ENABLE;
 865         fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
 866
 867         /* make sure it's actually queued on this endpoint */
 868         list_for_each_entry(req, &ep->queue, queue) {
 869                 if (&req->req == _req)
 870                         break;
 871         }
 872         if (&req->req != _req) {
 873                 ret = -EINVAL;
 874                 goto out;
 875         }
 876
 877         /* The request is in progress, or completed but not dequeued */
 878         if (ep->queue.next == &req->queue) {
 879                 _req->status = -ECONNRESET;
 880                 fsl_ep_fifo_flush(_ep); /* flush current transfer */
 881
 882                 /* The request isn't the last request in this ep queue */
 883                 if (req->queue.next != &ep->queue) {
 884                         struct ep_queue_head *qh;
 885                         struct fsl_req *next_req;
 886
 887                         qh = ep->qh;
 888                         next_req = list_entry(req->queue.next, struct fsl_req,
 889                                         queue);
 890
 891                         /* Point the QH to the first TD of next request */
 892                         fsl_writel((u32) next_req->head, &qh->curr_dtd_ptr);
 893                 }
 894
 895                 /* The request hasn't been processed, patch up the TD chain */
 896         } else {
 897                 struct fsl_req *prev_req;
 898
 899                 prev_req = list_entry(req->queue.prev, struct fsl_req, queue);
 900                 fsl_writel(fsl_readl(&req->tail->next_td_ptr),
 901                                 &prev_req->tail->next_td_ptr);
 902
 903         }
 904
 905         done(ep, req, -ECONNRESET);
 906
 907         /* Enable EP */
 908 out:    epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
 909         if (ep_is_in(ep))
 910                 epctrl |= EPCTRL_TX_ENABLE;
 911         else
 912                 epctrl |= EPCTRL_RX_ENABLE;
 913         fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
 914         ep->stopped = stopped;
 915
 916         spin_unlock_irqrestore(&ep->udc->lock, flags);
 917         return ret;
 918 }
 919
 920 /*-------------------------------------------------------------------------*/
 921
 922 /*-----------------------------------------------------------------
 923  * modify the endpoint halt feature
 924  * @ep: the non-isochronous endpoint being stalled
 925  * @value: 1--set halt  0--clear halt
 926  * Returns zero, or a negative error code.
 927 *----------------------------------------------------------------*/
 928 static int fsl_ep_set_halt(struct usb_ep *_ep, int value)
 929 {
 930         struct fsl_ep *ep = NULL;
 931         unsigned long flags = 0;
 932         int status = -EOPNOTSUPP;       /* operation not supported */
 933         unsigned char ep_dir = 0, ep_num = 0;
 934         struct fsl_udc *udc = NULL;
 935
 936         ep = container_of(_ep, struct fsl_ep, ep);
 937         udc = ep->udc;
 938         if (!_ep || !ep->desc) {
 939                 status = -EINVAL;
 940                 goto out;
 941         }
 942
 943         if (ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 944                 status = -EOPNOTSUPP;
 945                 goto out;
 946         }
 947
 948         /* Attempt to halt IN ep will fail if any transfer requests
 949          * are still queue */
 950         if (value && ep_is_in(ep) && !list_empty(&ep->queue)) {
 951                 status = -EAGAIN;
 952                 goto out;
 953         }
 954
 955         status = 0;
 956         ep_dir = ep_is_in(ep) ? USB_SEND : USB_RECV;
 957         ep_num = (unsigned char)(ep_index(ep));
 958         spin_lock_irqsave(&ep->udc->lock, flags);
 959         dr_ep_change_stall(ep_num, ep_dir, value);
 960         spin_unlock_irqrestore(&ep->udc->lock, flags);
 961
 962         if (ep_index(ep) == 0) {
 963                 udc->ep0_state = WAIT_FOR_SETUP;
 964                 udc->ep0_dir = 0;
 965         }
 966 out:
 967         VDBG(" %s %s halt stat %d", ep->ep.name,
 968                         value ?  "set" : "clear", status);
 969
 970         return status;
 971 }
 972
 973 static void fsl_ep_fifo_flush(struct usb_ep *_ep)
 974 {
 975         struct fsl_ep *ep;
 976         int ep_num, ep_dir;
 977         u32 bits;
 978         unsigned long timeout;
 979 #define FSL_UDC_FLUSH_TIMEOUT 1000
 980
 981         if (!_ep) {
 982                 return;
 983         } else {
 984                 ep = container_of(_ep, struct fsl_ep, ep);
 985                 if (!ep->desc)
 986                         return;
 987         }
 988         ep_num = ep_index(ep);
 989         ep_dir = ep_is_in(ep) ? USB_SEND : USB_RECV;
 990
 991         if (ep_num == 0)
 992                 bits = (1 << 16) | 1;
 993         else if (ep_dir == USB_SEND)
 994                 bits = 1 << (16 + ep_num);
 995         else
 996                 bits = 1 << ep_num;
 997
 998         timeout = jiffies + FSL_UDC_FLUSH_TIMEOUT;
 999         do {
1000                 fsl_writel(bits, &dr_regs->endptflush);
1001
1002                 /* Wait until flush complete */
1003                 while (fsl_readl(&dr_regs->endptflush)) {
1004                         if (time_after(jiffies, timeout)) {
1005                                 ERR("ep flush timeout\n");
1006                                 return;
1007                         }
1008                         cpu_relax();
1009                 }
1010                 /* See if we need to flush again */
1011         } while (fsl_readl(&dr_regs->endptstatus) & bits);
1012 }
1013
1014 static struct usb_ep_ops fsl_ep_ops = {
1015         .enable = fsl_ep_enable,
1016         .disable = fsl_ep_disable,
1017
1018         .alloc_request = fsl_alloc_request,
1019         .free_request = fsl_free_request,
1020
1021         .queue = fsl_ep_queue,
1022         .dequeue = fsl_ep_dequeue,
1023
1024         .set_halt = fsl_ep_set_halt,
1025         .fifo_flush = fsl_ep_fifo_flush,        /* flush fifo */
1026 };
1027
1028 /*-------------------------------------------------------------------------
1029                 Gadget Driver Layer Operations
1030 -------------------------------------------------------------------------*/
1031
1032 /*----------------------------------------------------------------------
1033  * Get the current frame number (from DR frame_index Reg )
1034  *----------------------------------------------------------------------*/
1035 static int fsl_get_frame(struct usb_gadget *gadget)
1036 {
1037         return (int)(fsl_readl(&dr_regs->frindex) & USB_FRINDEX_MASKS);
1038 }
1039
1040 /*-----------------------------------------------------------------------
1041  * Tries to wake up the host connected to this gadget
1042  -----------------------------------------------------------------------*/
1043 static int fsl_wakeup(struct usb_gadget *gadget)
1044 {
1045         struct fsl_udc *udc = container_of(gadget, struct fsl_udc, gadget);
1046         u32 portsc;
1047
1048         /* Remote wakeup feature not enabled by host */
1049         if (!udc->remote_wakeup)
1050                 return -ENOTSUPP;
1051
1052         portsc = fsl_readl(&dr_regs->portsc1);
1053         /* not suspended? */
1054         if (!(portsc & PORTSCX_PORT_SUSPEND))
1055                 return 0;
1056         /* trigger force resume */
1057         portsc |= PORTSCX_PORT_FORCE_RESUME;
1058         fsl_writel(portsc, &dr_regs->portsc1);
1059         return 0;
1060 }
1061
1062 static int can_pullup(struct fsl_udc *udc)
1063 {
1064         return udc->driver && udc->softconnect && udc->vbus_active;
1065 }
1066
1067 /* Notify controller that VBUS is powered, Called by whatever
1068    detects VBUS sessions */
1069 static int fsl_vbus_session(struct usb_gadget *gadget, int is_active)
1070 {
1071         struct fsl_udc  *udc;
1072         unsigned long   flags;
1073
1074         udc = container_of(gadget, struct fsl_udc, gadget);
1075         spin_lock_irqsave(&udc->lock, flags);
1076         VDBG("VBUS %s", is_active ? "on" : "off");
1077         udc->vbus_active = (is_active != 0);
1078         if (can_pullup(udc))
1079                 fsl_writel((fsl_readl(&dr_regs->usbcmd) | USB_CMD_RUN_STOP),
1080                                 &dr_regs->usbcmd);
1081         else
1082                 fsl_writel((fsl_readl(&dr_regs->usbcmd) & ~USB_CMD_RUN_STOP),
1083                                 &dr_regs->usbcmd);
1084         spin_unlock_irqrestore(&udc->lock, flags);
1085         return 0;
1086 }
1087
1088 /* constrain controller's VBUS power usage
1089  * This call is used by gadget drivers during SET_CONFIGURATION calls,
1090  * reporting how much power the device may consume.  For example, this
1091  * could affect how quickly batteries are recharged.
1092  *
1093  * Returns zero on success, else negative errno.
1094  */
1095 static int fsl_vbus_draw(struct usb_gadget *gadget, unsigned mA)
1096 {
1097         struct fsl_udc *udc;
1098
1099         udc = container_of(gadget, struct fsl_udc, gadget);
1100         if (udc->transceiver)
1101                 return otg_set_power(udc->transceiver, mA);
1102         return -ENOTSUPP;
1103 }
1104
1105 /* Change Data+ pullup status
1106  * this func is used by usb_gadget_connect/disconnet
1107  */
1108 static int fsl_pullup(struct usb_gadget *gadget, int is_on)
1109 {
1110         struct fsl_udc *udc;
1111
1112         udc = container_of(gadget, struct fsl_udc, gadget);
1113         udc->softconnect = (is_on != 0);
1114         if (can_pullup(udc))
1115                 fsl_writel((fsl_readl(&dr_regs->usbcmd) | USB_CMD_RUN_STOP),
1116                                 &dr_regs->usbcmd);
1117         else
1118                 fsl_writel((fsl_readl(&dr_regs->usbcmd) & ~USB_CMD_RUN_STOP),
1119                                 &dr_regs->usbcmd);
1120
1121         return 0;
1122 }
1123
1124 /* defined in gadget.h */
1125 static struct usb_gadget_ops fsl_gadget_ops = {
1126         .get_frame = fsl_get_frame,
1127         .wakeup = fsl_wakeup,
1128 /*      .set_selfpowered = fsl_set_selfpowered, */ /* Always selfpowered */
1129         .vbus_session = fsl_vbus_session,
1130         .vbus_draw = fsl_vbus_draw,
1131         .pullup = fsl_pullup,
1132 };
1133
1134 /* Set protocol stall on ep0, protocol stall will automatically be cleared
1135    on new transaction */
1136 static void ep0stall(struct fsl_udc *udc)
1137 {
1138         u32 tmp;
1139
1140         /* must set tx and rx to stall at the same time */
1141         tmp = fsl_readl(&dr_regs->endptctrl[0]);
1142         tmp |= EPCTRL_TX_EP_STALL | EPCTRL_RX_EP_STALL;
1143         fsl_writel(tmp, &dr_regs->endptctrl[0]);
1144         udc->ep0_state = WAIT_FOR_SETUP;
1145         udc->ep0_dir = 0;
1146 }
1147
1148 /* Prime a status phase for ep0 */
1149 static int ep0_prime_status(struct fsl_udc *udc, int direction)
1150 {
1151         struct fsl_req *req = udc->status_req;
1152         struct fsl_ep *ep;
1153
1154         if (direction == EP_DIR_IN)
1155                 udc->ep0_dir = USB_DIR_IN;
1156         else
1157                 udc->ep0_dir = USB_DIR_OUT;
1158
1159         ep = &udc->eps[0];
1160         udc->ep0_state = WAIT_FOR_OUT_STATUS;
1161
1162         req->ep = ep;
1163         req->req.length = 0;
1164         req->req.status = -EINPROGRESS;
1165         req->req.actual = 0;
1166         req->req.complete = NULL;
1167         req->dtd_count = 0;
1168
1169         if (fsl_req_to_dtd(req) == 0)
1170                 fsl_queue_td(ep, req);
1171         else
1172                 return -ENOMEM;
1173
1174         list_add_tail(&req->queue, &ep->queue);
1175
1176         return 0;
1177 }
1178
1179 static void udc_reset_ep_queue(struct fsl_udc *udc, u8 pipe)
1180 {
1181         struct fsl_ep *ep = get_ep_by_pipe(udc, pipe);
1182
1183         if (ep->name)
1184                 nuke(ep, -ESHUTDOWN);
1185 }
1186
1187 /*
1188  * ch9 Set address
1189  */
1190 static void ch9setaddress(struct fsl_udc *udc, u16 value, u16 index, u16 length)
1191 {
1192         /* Save the new address to device struct */
1193         udc->device_address = (u8) value;
1194         /* Update usb state */
1195         udc->usb_state = USB_STATE_ADDRESS;
1196         /* Status phase */
1197         if (ep0_prime_status(udc, EP_DIR_IN))
1198                 ep0stall(udc);
1199 }
1200
1201 /*
1202  * ch9 Get status
1203  */
1204 static void ch9getstatus(struct fsl_udc *udc, u8 request_type, u16 value,
1205                 u16 index, u16 length)
1206 {
1207         u16 tmp = 0;            /* Status, cpu endian */
1208         struct fsl_req *req;
1209         struct fsl_ep *ep;
1210
1211         ep = &udc->eps[0];
1212
1213         if ((request_type & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
1214                 /* Get device status */
1215                 tmp = 1 << USB_DEVICE_SELF_POWERED;
1216                 tmp |= udc->remote_wakeup << USB_DEVICE_REMOTE_WAKEUP;
1217         } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_INTERFACE) {
1218                 /* Get interface status */
1219                 /* We don't have interface information in udc driver */
1220                 tmp = 0;
1221         } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_ENDPOINT) {
1222                 /* Get endpoint status */
1223                 struct fsl_ep *target_ep;
1224
1225                 target_ep = get_ep_by_pipe(udc, get_pipe_by_windex(index));
1226
1227                 /* stall if endpoint doesn't exist */
1228                 if (!target_ep->desc)
1229                         goto stall;
1230                 tmp = dr_ep_get_stall(ep_index(target_ep), ep_is_in(target_ep))
1231                                 << USB_ENDPOINT_HALT;
1232         }
1233
1234         udc->ep0_dir = USB_DIR_IN;
1235         /* Borrow the per device status_req */
1236         req = udc->status_req;
1237         /* Fill in the reqest structure */
1238         *((u16 *) req->req.buf) = cpu_to_le16(tmp);
1239         req->ep = ep;
1240         req->req.length = 2;
1241         req->req.status = -EINPROGRESS;
1242         req->req.actual = 0;
1243         req->req.complete = NULL;
1244         req->dtd_count = 0;
1245
1246         /* prime the data phase */
1247         if ((fsl_req_to_dtd(req) == 0))
1248                 fsl_queue_td(ep, req);
1249         else                    /* no mem */
1250                 goto stall;
1251
1252         list_add_tail(&req->queue, &ep->queue);
1253         udc->ep0_state = DATA_STATE_XMIT;
1254         return;
1255 stall:
1256         ep0stall(udc);
1257 }
1258
1259 static void setup_received_irq(struct fsl_udc *udc,
1260                 struct usb_ctrlrequest *setup)
1261 {
1262         u16 wValue = le16_to_cpu(setup->wValue);
1263         u16 wIndex = le16_to_cpu(setup->wIndex);
1264         u16 wLength = le16_to_cpu(setup->wLength);
1265
1266         udc_reset_ep_queue(udc, 0);
1267
1268         /* We process some stardard setup requests here */
1269         switch (setup->bRequest) {
1270         case USB_REQ_GET_STATUS:
1271                 /* Data+Status phase from udc */
1272                 if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK))
1273                                         != (USB_DIR_IN | USB_TYPE_STANDARD))
1274                         break;
1275                 ch9getstatus(udc, setup->bRequestType, wValue, wIndex, wLength);
1276                 return;
1277
1278         case USB_REQ_SET_ADDRESS:
1279                 /* Status phase from udc */
1280                 if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD
1281                                                 | USB_RECIP_DEVICE))
1282                         break;
1283                 ch9setaddress(udc, wValue, wIndex, wLength);
1284                 return;
1285
1286         case USB_REQ_CLEAR_FEATURE:
1287         case USB_REQ_SET_FEATURE:
1288                 /* Status phase from udc */
1289         {
1290                 int rc = -EOPNOTSUPP;
1291
1292                 if ((setup->bRequestType & (USB_RECIP_MASK | USB_TYPE_MASK))
1293                                 == (USB_RECIP_ENDPOINT | USB_TYPE_STANDARD)) {
1294                         int pipe = get_pipe_by_windex(wIndex);
1295                         struct fsl_ep *ep;
1296
1297                         if (wValue != 0 || wLength != 0 || pipe > udc->max_ep)
1298                                 break;
1299                         ep = get_ep_by_pipe(udc, pipe);
1300
1301                         spin_unlock(&udc->lock);
1302                         rc = fsl_ep_set_halt(&ep->ep,
1303                                         (setup->bRequest == USB_REQ_SET_FEATURE)
1304                                                 ? 1 : 0);
1305                         spin_lock(&udc->lock);
1306
1307                 } else if ((setup->bRequestType & (USB_RECIP_MASK
1308                                 | USB_TYPE_MASK)) == (USB_RECIP_DEVICE
1309                                 | USB_TYPE_STANDARD)) {
1310                         /* Note: The driver has not include OTG support yet.
1311                          * This will be set when OTG support is added */
1312                         if (!gadget_is_otg(&udc->gadget))
1313                                 break;
1314                         else if (setup->bRequest == USB_DEVICE_B_HNP_ENABLE)
1315                                 udc->gadget.b_hnp_enable = 1;
1316                         else if (setup->bRequest == USB_DEVICE_A_HNP_SUPPORT)
1317                                 udc->gadget.a_hnp_support = 1;
1318                         else if (setup->bRequest ==
1319                                         USB_DEVICE_A_ALT_HNP_SUPPORT)
1320                                 udc->gadget.a_alt_hnp_support = 1;
1321                         else
1322                                 break;
1323                         rc = 0;
1324                 } else
1325                         break;
1326
1327                 if (rc == 0) {
1328                         if (ep0_prime_status(udc, EP_DIR_IN))
1329                                 ep0stall(udc);
1330                 }
1331                 return;
1332         }
1333
1334         default:
1335                 break;
1336         }
1337
1338         /* Requests handled by gadget */
1339         if (wLength) {
1340                 /* Data phase from gadget, status phase from udc */
1341                 udc->ep0_dir = (setup->bRequestType & USB_DIR_IN)
1342                                 ?  USB_DIR_IN : USB_DIR_OUT;
1343                 spin_unlock(&udc->lock);
1344                 if (udc->driver->setup(&udc->gadget,
1345                                 &udc->local_setup_buff) < 0)
1346                         ep0stall(udc);
1347                 spin_lock(&udc->lock);
1348                 udc->ep0_state = (setup->bRequestType & USB_DIR_IN)
1349                                 ?  DATA_STATE_XMIT : DATA_STATE_RECV;
1350         } else {
1351                 /* No data phase, IN status from gadget */
1352                 udc->ep0_dir = USB_DIR_IN;
1353                 spin_unlock(&udc->lock);
1354                 if (udc->driver->setup(&udc->gadget,
1355                                 &udc->local_setup_buff) < 0)
1356                         ep0stall(udc);
1357                 spin_lock(&udc->lock);
1358                 udc->ep0_state = WAIT_FOR_OUT_STATUS;
1359         }
1360 }
1361
1362 /* Process request for Data or Status phase of ep0
1363  * prime status phase if needed */
1364 static void ep0_req_complete(struct fsl_udc *udc, struct fsl_ep *ep0,
1365                 struct fsl_req *req)
1366 {
1367         if (udc->usb_state == USB_STATE_ADDRESS) {
1368                 /* Set the new address */
1369                 u32 new_address = (u32) udc->device_address;
1370                 fsl_writel(new_address << USB_DEVICE_ADDRESS_BIT_POS,
1371                                 &dr_regs->deviceaddr);
1372         }
1373
1374         done(ep0, req, 0);
1375
1376         switch (udc->ep0_state) {
1377         case DATA_STATE_XMIT:
1378                 /* receive status phase */
1379                 if (ep0_prime_status(udc, EP_DIR_OUT))
1380                         ep0stall(udc);
1381                 break;
1382         case DATA_STATE_RECV:
1383                 /* send status phase */
1384                 if (ep0_prime_status(udc, EP_DIR_IN))
1385                         ep0stall(udc);
1386                 break;
1387         case WAIT_FOR_OUT_STATUS:
1388                 udc->ep0_state = WAIT_FOR_SETUP;
1389                 break;
1390         case WAIT_FOR_SETUP:
1391                 ERR("Unexpect ep0 packets\n");
1392                 break;
1393         default:
1394                 ep0stall(udc);
1395                 break;
1396         }
1397 }
1398
1399 /* Tripwire mechanism to ensure a setup packet payload is extracted without
1400  * being corrupted by another incoming setup packet */
1401 static void tripwire_handler(struct fsl_udc *udc, u8 ep_num, u8 *buffer_ptr)
1402 {
1403         u32 temp;
1404         struct ep_queue_head *qh;
1405
1406         qh = &udc->ep_qh[ep_num * 2 + EP_DIR_OUT];
1407
1408         /* Clear bit in ENDPTSETUPSTAT */
1409         temp = fsl_readl(&dr_regs->endptsetupstat);
1410         fsl_writel(temp | (1 << ep_num), &dr_regs->endptsetupstat);
1411
1412         /* while a hazard exists when setup package arrives */
1413         do {
1414                 /* Set Setup Tripwire */
1415                 temp = fsl_readl(&dr_regs->usbcmd);
1416                 fsl_writel(temp | USB_CMD_SUTW, &dr_regs->usbcmd);
1417
1418                 /* Copy the setup packet to local buffer */
1419                 memcpy(buffer_ptr, (u8 *) qh->setup_buffer, 8);
1420         } while (!(fsl_readl(&dr_regs->usbcmd) & USB_CMD_SUTW));
1421
1422         /* Clear Setup Tripwire */
1423         temp = fsl_readl(&dr_regs->usbcmd);
1424         fsl_writel(temp & ~USB_CMD_SUTW, &dr_regs->usbcmd);
1425 }
1426
1427 /* process-ep_req(): free the completed Tds for this req */
1428 static int process_ep_req(struct fsl_udc *udc, int pipe,
1429                 struct fsl_req *curr_req)
1430 {
1431         struct ep_td_struct *curr_td;
1432         int     td_complete, actual, remaining_length, j, tmp;
1433         int     status = 0;
1434         int     errors = 0;
1435         struct  ep_queue_head *curr_qh = &udc->ep_qh[pipe];
1436         int direction = pipe % 2;
1437
1438         curr_td = curr_req->head;
1439         td_complete = 0;
1440         actual = curr_req->req.length;
1441
1442         for (j = 0; j < curr_req->dtd_count; j++) {
1443                 remaining_length = (le32_to_cpu(curr_td->size_ioc_sts)
1444                                         & DTD_PACKET_SIZE)
1445                                 >> DTD_LENGTH_BIT_POS;
1446                 actual -= remaining_length;
1447
1448                 if ((errors = le32_to_cpu(curr_td->size_ioc_sts) &
1449                                                 DTD_ERROR_MASK)) {
1450                         if (errors & DTD_STATUS_HALTED) {
1451                                 ERR("dTD error %08x QH=%d\n", errors, pipe);
1452                                 /* Clear the errors and Halt condition */
1453                                 tmp = le32_to_cpu(curr_qh->size_ioc_int_sts);
1454                                 tmp &= ~errors;
1455                                 curr_qh->size_ioc_int_sts = cpu_to_le32(tmp);
1456                                 status = -EPIPE;
1457                                 /* FIXME: continue with next queued TD? */
1458
1459                                 break;
1460                         }
1461                         if (errors & DTD_STATUS_DATA_BUFF_ERR) {
1462                                 VDBG("Transfer overflow");
1463                                 status = -EPROTO;
1464                                 break;
1465                         } else if (errors & DTD_STATUS_TRANSACTION_ERR) {
1466                                 VDBG("ISO error");
1467                                 status = -EILSEQ;
1468                                 break;
1469                         } else
1470                                 ERR("Unknown error has occured (0x%x)!\n",
1471                                         errors);
1472
1473                 } else if (le32_to_cpu(curr_td->size_ioc_sts)
1474                                 & DTD_STATUS_ACTIVE) {
1475                         VDBG("Request not complete");
1476                         status = REQ_UNCOMPLETE;
1477                         return status;
1478                 } else if (remaining_length) {
1479                         if (direction) {
1480                                 VDBG("Transmit dTD remaining length not zero");
1481                                 status = -EPROTO;
1482                                 break;
1483                         } else {
1484                                 td_complete++;
1485                                 break;
1486                         }
1487                 } else {
1488                         td_complete++;
1489                         VDBG("dTD transmitted successful");
1490                 }
1491
1492                 if (j != curr_req->dtd_count - 1)
1493                         curr_td = (struct ep_td_struct *)curr_td->next_td_virt;
1494         }
1495
1496         if (status)
1497                 return status;
1498
1499         curr_req->req.actual = actual;
1500
1501         return 0;
1502 }
1503
1504 /* Process a DTD completion interrupt */
1505 static void dtd_complete_irq(struct fsl_udc *udc)
1506 {
1507         u32 bit_pos;
1508         int i, ep_num, direction, bit_mask, status;
1509         struct fsl_ep *curr_ep;
1510         struct fsl_req *curr_req, *temp_req;
1511
1512         /* Clear the bits in the register */
1513         bit_pos = fsl_readl(&dr_regs->endptcomplete);
1514         fsl_writel(bit_pos, &dr_regs->endptcomplete);
1515
1516         if (!bit_pos)
1517                 return;
1518
1519         for (i = 0; i < udc->max_ep * 2; i++) {
1520                 ep_num = i >> 1;
1521                 direction = i % 2;
1522
1523                 bit_mask = 1 << (ep_num + 16 * direction);
1524
1525                 if (!(bit_pos & bit_mask))
1526                         continue;
1527
1528                 curr_ep = get_ep_by_pipe(udc, i);
1529
1530                 /* If the ep is configured */
1531                 if (curr_ep->name == NULL) {
1532                         WARNING("Invalid EP?");
1533                         continue;
1534                 }
1535
1536                 /* process the req queue until an uncomplete request */
1537                 list_for_each_entry_safe(curr_req, temp_req, &curr_ep->queue,
1538                                 queue) {
1539                         status = process_ep_req(udc, i, curr_req);
1540
1541                         VDBG("status of process_ep_req= %d, ep = %d",
1542                                         status, ep_num);
1543                         if (status == REQ_UNCOMPLETE)
1544                                 break;
1545                         /* write back status to req */
1546                         curr_req->req.status = status;
1547
1548                         if (ep_num == 0) {
1549                                 ep0_req_complete(udc, curr_ep, curr_req);
1550                                 break;
1551                         } else
1552                                 done(curr_ep, curr_req, status);
1553                 }
1554         }
1555 }
1556
1557 /* Process a port change interrupt */
1558 static void port_change_irq(struct fsl_udc *udc)
1559 {
1560         u32 speed;
1561
1562         /* Bus resetting is finished */
1563         if (!(fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_RESET)) {
1564                 /* Get the speed */
1565                 speed = (fsl_readl(&dr_regs->portsc1)
1566                                 & PORTSCX_PORT_SPEED_MASK);
1567                 switch (speed) {
1568                 case PORTSCX_PORT_SPEED_HIGH:
1569                         udc->gadget.speed = USB_SPEED_HIGH;
1570                         break;
1571                 case PORTSCX_PORT_SPEED_FULL:
1572                         udc->gadget.speed = USB_SPEED_FULL;
1573                         break;
1574                 case PORTSCX_PORT_SPEED_LOW:
1575                         udc->gadget.speed = USB_SPEED_LOW;
1576                         break;
1577                 default:
1578                         udc->gadget.speed = USB_SPEED_UNKNOWN;
1579                         break;
1580                 }
1581         }
1582
1583         /* Update USB state */
1584         if (!udc->resume_state)
1585                 udc->usb_state = USB_STATE_DEFAULT;
1586 }
1587
1588 /* Process suspend interrupt */
1589 static void suspend_irq(struct fsl_udc *udc)
1590 {
1591         udc->resume_state = udc->usb_state;
1592         udc->usb_state = USB_STATE_SUSPENDED;
1593
1594         /* report suspend to the driver, serial.c does not support this */
1595         if (udc->driver->suspend)
1596                 udc->driver->suspend(&udc->gadget);
1597 }
1598
1599 static void bus_resume(struct fsl_udc *udc)
1600 {
1601         udc->usb_state = udc->resume_state;
1602         udc->resume_state = 0;
1603
1604         /* report resume to the driver, serial.c does not support this */
1605         if (udc->driver->resume)
1606                 udc->driver->resume(&udc->gadget);
1607 }
1608
1609 /* Clear up all ep queues */
1610 static int reset_queues(struct fsl_udc *udc)
1611 {
1612         u8 pipe;
1613
1614         for (pipe = 0; pipe < udc->max_pipes; pipe++)
1615                 udc_reset_ep_queue(udc, pipe);
1616
1617         /* report disconnect; the driver is already quiesced */
1618         spin_unlock(&udc->lock);
1619         udc->driver->disconnect(&udc->gadget);
1620         spin_lock(&udc->lock);
1621
1622         return 0;
1623 }
1624
1625 /* Process reset interrupt */
1626 static void reset_irq(struct fsl_udc *udc)
1627 {
1628         u32 temp;
1629         unsigned long timeout;
1630
1631         /* Clear the device address */
1632         temp = fsl_readl(&dr_regs->deviceaddr);
1633         fsl_writel(temp & ~USB_DEVICE_ADDRESS_MASK, &dr_regs->deviceaddr);
1634
1635         udc->device_address = 0;
1636
1637         /* Clear usb state */
1638         udc->resume_state = 0;
1639         udc->ep0_dir = 0;
1640         udc->ep0_state = WAIT_FOR_SETUP;
1641         udc->remote_wakeup = 0; /* default to 0 on reset */
1642         udc->gadget.b_hnp_enable = 0;
1643         udc->gadget.a_hnp_support = 0;
1644         udc->gadget.a_alt_hnp_support = 0;
1645
1646         /* Clear all the setup token semaphores */
1647         temp = fsl_readl(&dr_regs->endptsetupstat);
1648         fsl_writel(temp, &dr_regs->endptsetupstat);
1649
1650         /* Clear all the endpoint complete status bits */
1651         temp = fsl_readl(&dr_regs->endptcomplete);
1652         fsl_writel(temp, &dr_regs->endptcomplete);
1653
1654         timeout = jiffies + 100;
1655         while (fsl_readl(&dr_regs->endpointprime)) {
1656                 /* Wait until all endptprime bits cleared */
1657                 if (time_after(jiffies, timeout)) {
1658                         ERR("Timeout for reset\n");
1659                         break;
1660                 }
1661                 cpu_relax();
1662         }
1663
1664         /* Write 1s to the flush register */
1665         fsl_writel(0xffffffff, &dr_regs->endptflush);
1666
1667         if (fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_RESET) {
1668                 VDBG("Bus reset");
1669                 /* Reset all the queues, include XD, dTD, EP queue
1670                  * head and TR Queue */
1671                 reset_queues(udc);
1672                 udc->usb_state = USB_STATE_DEFAULT;
1673         } else {
1674                 VDBG("Controller reset");
1675                 /* initialize usb hw reg except for regs for EP, not
1676                  * touch usbintr reg */
1677                 dr_controller_setup(udc);
1678
1679                 /* Reset all internal used Queues */
1680                 reset_queues(udc);
1681
1682                 ep0_setup(udc);
1683
1684                 /* Enable DR IRQ reg, Set Run bit, change udc state */
1685                 dr_controller_run(udc);
1686                 udc->usb_state = USB_STATE_ATTACHED;
1687         }
1688 }
1689
1690 /*
1691  * USB device controller interrupt handler
1692  */
1693 static irqreturn_t fsl_udc_irq(int irq, void *_udc)
1694 {
1695         struct fsl_udc *udc = _udc;
1696         u32 irq_src;
1697         irqreturn_t status = IRQ_NONE;
1698         unsigned long flags;
1699
1700         /* Disable ISR for OTG host mode */
1701         if (udc->stopped)
1702                 return IRQ_NONE;
1703         spin_lock_irqsave(&udc->lock, flags);
1704         irq_src = fsl_readl(&dr_regs->usbsts) & fsl_readl(&dr_regs->usbintr);
1705         /* Clear notification bits */
1706         fsl_writel(irq_src, &dr_regs->usbsts);
1707
1708         /* VDBG("irq_src [0x%8x]", irq_src); */
1709
1710         /* Need to resume? */
1711         if (udc->usb_state == USB_STATE_SUSPENDED)
1712                 if ((fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_SUSPEND) == 0)
1713                         bus_resume(udc);
1714
1715         /* USB Interrupt */
1716         if (irq_src & USB_STS_INT) {
1717                 VDBG("Packet int");
1718                 /* Setup package, we only support ep0 as control ep */
1719                 if (fsl_readl(&dr_regs->endptsetupstat) & EP_SETUP_STATUS_EP0) {
1720                         tripwire_handler(udc, 0,
1721                                         (u8 *) (&udc->local_setup_buff));
1722                         setup_received_irq(udc, &udc->local_setup_buff);
1723                         status = IRQ_HANDLED;
1724                 }
1725
1726                 /* completion of dtd */
1727                 if (fsl_readl(&dr_regs->endptcomplete)) {
1728                         dtd_complete_irq(udc);
1729                         status = IRQ_HANDLED;
1730                 }
1731         }
1732
1733         /* SOF (for ISO transfer) */
1734         if (irq_src & USB_STS_SOF) {
1735                 status = IRQ_HANDLED;
1736         }
1737
1738         /* Port Change */
1739         if (irq_src & USB_STS_PORT_CHANGE) {
1740                 port_change_irq(udc);
1741                 status = IRQ_HANDLED;
1742         }
1743
1744         /* Reset Received */
1745         if (irq_src & USB_STS_RESET) {
1746                 reset_irq(udc);
1747                 status = IRQ_HANDLED;
1748         }
1749
1750         /* Sleep Enable (Suspend) */
1751         if (irq_src & USB_STS_SUSPEND) {
1752                 suspend_irq(udc);
1753                 status = IRQ_HANDLED;
1754         }
1755
1756         if (irq_src & (USB_STS_ERR | USB_STS_SYS_ERR)) {
1757                 VDBG("Error IRQ %x", irq_src);
1758         }
1759
1760         spin_unlock_irqrestore(&udc->lock, flags);
1761         return status;
1762 }
1763
1764 /*----------------------------------------------------------------*
1765  * Hook to gadget drivers
1766  * Called by initialization code of gadget drivers
1767 *----------------------------------------------------------------*/
1768 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1769 {
1770         int retval = -ENODEV;
1771         unsigned long flags = 0;
1772
1773         if (!udc_controller)
1774                 return -ENODEV;
1775
1776         if (!driver || (driver->speed != USB_SPEED_FULL
1777                                 && driver->speed != USB_SPEED_HIGH)
1778                         || !driver->bind || !driver->disconnect
1779                         || !driver->setup)
1780                 return -EINVAL;
1781
1782         if (udc_controller->driver)
1783                 return -EBUSY;
1784
1785         /* lock is needed but whether should use this lock or another */
1786         spin_lock_irqsave(&udc_controller->lock, flags);
1787
1788         driver->driver.bus = NULL;
1789         /* hook up the driver */
1790         udc_controller->driver = driver;
1791         udc_controller->gadget.dev.driver = &driver->driver;
1792         spin_unlock_irqrestore(&udc_controller->lock, flags);
1793
1794         /* bind udc driver to gadget driver */
1795         retval = driver->bind(&udc_controller->gadget);
1796         if (retval) {
1797                 VDBG("bind to %s --> %d", driver->driver.name, retval);
1798                 udc_controller->gadget.dev.driver = NULL;
1799                 udc_controller->driver = NULL;
1800                 goto out;
1801         }
1802
1803         /* Enable DR IRQ reg and Set usbcmd reg  Run bit */
1804         dr_controller_run(udc_controller);
1805         udc_controller->usb_state = USB_STATE_ATTACHED;
1806         udc_controller->ep0_state = WAIT_FOR_SETUP;
1807         udc_controller->ep0_dir = 0;
1808         printk(KERN_INFO "%s: bind to driver %s\n",
1809                         udc_controller->gadget.name, driver->driver.name);
1810
1811 out:
1812         if (retval)
1813                 printk(KERN_WARNING "gadget driver register failed %d\n",
1814                        retval);
1815         return retval;
1816 }
1817 EXPORT_SYMBOL(usb_gadget_register_driver);
1818
1819 /* Disconnect from gadget driver */
1820 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1821 {
1822         struct fsl_ep *loop_ep;
1823         unsigned long flags;
1824
1825         if (!udc_controller)
1826                 return -ENODEV;
1827
1828         if (!driver || driver != udc_controller->driver || !driver->unbind)
1829                 return -EINVAL;
1830
1831         if (udc_controller->transceiver)
1832                 otg_set_peripheral(udc_controller->transceiver, NULL);
1833
1834         /* stop DR, disable intr */
1835         dr_controller_stop(udc_controller);
1836
1837         /* in fact, no needed */
1838         udc_controller->usb_state = USB_STATE_ATTACHED;
1839         udc_controller->ep0_state = WAIT_FOR_SETUP;
1840         udc_controller->ep0_dir = 0;
1841
1842         /* stand operation */
1843         spin_lock_irqsave(&udc_controller->lock, flags);
1844         udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
1845         nuke(&udc_controller->eps[0], -ESHUTDOWN);
1846         list_for_each_entry(loop_ep, &udc_controller->gadget.ep_list,
1847                         ep.ep_list)
1848                 nuke(loop_ep, -ESHUTDOWN);
1849         spin_unlock_irqrestore(&udc_controller->lock, flags);
1850
1851         /* report disconnect; the controller is already quiesced */
1852         driver->disconnect(&udc_controller->gadget);
1853
1854         /* unbind gadget and unhook driver. */
1855         driver->unbind(&udc_controller->gadget);
1856         udc_controller->gadget.dev.driver = NULL;
1857         udc_controller->driver = NULL;
1858
1859         printk(KERN_WARNING "unregistered gadget driver '%s'\n",
1860                driver->driver.name);
1861         return 0;
1862 }
1863 EXPORT_SYMBOL(usb_gadget_unregister_driver);
1864
1865 /*-------------------------------------------------------------------------
1866                 PROC File System Support
1867 -------------------------------------------------------------------------*/
1868 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
1869
1870 #include <linux/seq_file.h>
1871
1872 static const char proc_filename[] = "driver/fsl_usb2_udc";
1873
1874 static int fsl_proc_read(char *page, char **start, off_t off, int count,
1875                 int *eof, void *_dev)
1876 {
1877         char *buf = page;
1878         char *next = buf;
1879         unsigned size = count;
1880         unsigned long flags;
1881         int t, i;
1882         u32 tmp_reg;
1883         struct fsl_ep *ep = NULL;
1884         struct fsl_req *req;
1885
1886         struct fsl_udc *udc = udc_controller;
1887         if (off != 0)
1888                 return 0;
1889
1890         spin_lock_irqsave(&udc->lock, flags);
1891
1892         /* ------basic driver information ---- */
1893         t = scnprintf(next, size,
1894                         DRIVER_DESC "\n"
1895                         "%s version: %s\n"
1896                         "Gadget driver: %s\n\n",
1897                         driver_name, DRIVER_VERSION,
1898                         udc->driver ? udc->driver->driver.name : "(none)");
1899         size -= t;
1900         next += t;
1901
1902         /* ------ DR Registers ----- */
1903         tmp_reg = fsl_readl(&dr_regs->usbcmd);
1904         t = scnprintf(next, size,
1905                         "USBCMD reg:\n"
1906                         "SetupTW: %d\n"
1907                         "Run/Stop: %s\n\n",
1908                         (tmp_reg & USB_CMD_SUTW) ? 1 : 0,
1909                         (tmp_reg & USB_CMD_RUN_STOP) ? "Run" : "Stop");
1910         size -= t;
1911         next += t;
1912
1913         tmp_reg = fsl_readl(&dr_regs->usbsts);
1914         t = scnprintf(next, size,
1915                         "USB Status Reg:\n"
1916                         "Dr Suspend: %d Reset Received: %d System Error: %s "
1917                         "USB Error Interrupt: %s\n\n",
1918                         (tmp_reg & USB_STS_SUSPEND) ? 1 : 0,
1919                         (tmp_reg & USB_STS_RESET) ? 1 : 0,
1920                         (tmp_reg & USB_STS_SYS_ERR) ? "Err" : "Normal",
1921                         (tmp_reg & USB_STS_ERR) ? "Err detected" : "No err");
1922         size -= t;
1923         next += t;
1924
1925         tmp_reg = fsl_readl(&dr_regs->usbintr);
1926         t = scnprintf(next, size,
1927                         "USB Intrrupt Enable Reg:\n"
1928                         "Sleep Enable: %d SOF Received Enable: %d "
1929                         "Reset Enable: %d\n"
1930                         "System Error Enable: %d "
1931                         "Port Change Dectected Enable: %d\n"
1932                         "USB Error Intr Enable: %d USB Intr Enable: %d\n\n",
1933                         (tmp_reg & USB_INTR_DEVICE_SUSPEND) ? 1 : 0,
1934                         (tmp_reg & USB_INTR_SOF_EN) ? 1 : 0,
1935                         (tmp_reg & USB_INTR_RESET_EN) ? 1 : 0,
1936                         (tmp_reg & USB_INTR_SYS_ERR_EN) ? 1 : 0,
1937                         (tmp_reg & USB_INTR_PTC_DETECT_EN) ? 1 : 0,
1938                         (tmp_reg & USB_INTR_ERR_INT_EN) ? 1 : 0,
1939                         (tmp_reg & USB_INTR_INT_EN) ? 1 : 0);
1940         size -= t;
1941         next += t;
1942
1943         tmp_reg = fsl_readl(&dr_regs->frindex);
1944         t = scnprintf(next, size,
1945                         "USB Frame Index Reg: Frame Number is 0x%x\n\n",
1946                         (tmp_reg & USB_FRINDEX_MASKS));
1947         size -= t;
1948         next += t;
1949
1950         tmp_reg = fsl_readl(&dr_regs->deviceaddr);
1951         t = scnprintf(next, size,
1952                         "USB Device Address Reg: Device Addr is 0x%x\n\n",
1953                         (tmp_reg & USB_DEVICE_ADDRESS_MASK));
1954         size -= t;
1955         next += t;
1956
1957         tmp_reg = fsl_readl(&dr_regs->endpointlistaddr);
1958         t = scnprintf(next, size,
1959                         "USB Endpoint List Address Reg: "
1960                         "Device Addr is 0x%x\n\n",
1961                         (tmp_reg & USB_EP_LIST_ADDRESS_MASK));
1962         size -= t;
1963         next += t;
1964
1965         tmp_reg = fsl_readl(&dr_regs->portsc1);
1966         t = scnprintf(next, size,
1967                 "USB Port Status&Control Reg:\n"
1968                 "Port Transceiver Type : %s Port Speed: %s\n"
1969                 "PHY Low Power Suspend: %s Port Reset: %s "
1970                 "Port Suspend Mode: %s\n"
1971                 "Over-current Change: %s "
1972                 "Port Enable/Disable Change: %s\n"
1973                 "Port Enabled/Disabled: %s "
1974                 "Current Connect Status: %s\n\n", ( {
1975                         char *s;
1976                         switch (tmp_reg & PORTSCX_PTS_FSLS) {
1977                         case PORTSCX_PTS_UTMI:
1978                                 s = "UTMI"; break;
1979                         case PORTSCX_PTS_ULPI:
1980                                 s = "ULPI "; break;
1981                         case PORTSCX_PTS_FSLS:
1982                                 s = "FS/LS Serial"; break;
1983                         default:
1984                                 s = "None"; break;
1985                         }
1986                         s;} ), ( {
1987                         char *s;
1988                         switch (tmp_reg & PORTSCX_PORT_SPEED_UNDEF) {
1989                         case PORTSCX_PORT_SPEED_FULL:
1990                                 s = "Full Speed"; break;
1991                         case PORTSCX_PORT_SPEED_LOW:
1992                                 s = "Low Speed"; break;
1993                         case PORTSCX_PORT_SPEED_HIGH:
1994                                 s = "High Speed"; break;
1995                         default:
1996                                 s = "Undefined"; break;
1997                         }
1998                         s;
1999                 } ),
2000                 (tmp_reg & PORTSCX_PHY_LOW_POWER_SPD) ?
2001                 "Normal PHY mode" : "Low power mode",
2002                 (tmp_reg & PORTSCX_PORT_RESET) ? "In Reset" :
2003                 "Not in Reset",
2004                 (tmp_reg & PORTSCX_PORT_SUSPEND) ? "In " : "Not in",
2005                 (tmp_reg & PORTSCX_OVER_CURRENT_CHG) ? "Dected" :
2006                 "No",
2007                 (tmp_reg & PORTSCX_PORT_EN_DIS_CHANGE) ? "Disable" :
2008                 "Not change",
2009                 (tmp_reg & PORTSCX_PORT_ENABLE) ? "Enable" :
2010                 "Not correct",
2011                 (tmp_reg & PORTSCX_CURRENT_CONNECT_STATUS) ?
2012                 "Attached" : "Not-Att");
2013         size -= t;
2014         next += t;
2015
2016         tmp_reg = fsl_readl(&dr_regs->usbmode);
2017         t = scnprintf(next, size,
2018                         "USB Mode Reg: Controller Mode is: %s\n\n", ( {
2019                                 char *s;
2020                                 switch (tmp_reg & USB_MODE_CTRL_MODE_HOST) {
2021                                 case USB_MODE_CTRL_MODE_IDLE:
2022                                         s = "Idle"; break;
2023                                 case USB_MODE_CTRL_MODE_DEVICE:
2024                                         s = "Device Controller"; break;
2025                                 case USB_MODE_CTRL_MODE_HOST:
2026                                         s = "Host Controller"; break;
2027                                 default:
2028                                         s = "None"; break;
2029                                 }
2030                                 s;
2031                         } ));
2032         size -= t;
2033         next += t;
2034
2035         tmp_reg = fsl_readl(&dr_regs->endptsetupstat);
2036         t = scnprintf(next, size,
2037                         "Endpoint Setup Status Reg: SETUP on ep 0x%x\n\n",
2038                         (tmp_reg & EP_SETUP_STATUS_MASK));
2039         size -= t;
2040         next += t;
2041
2042         for (i = 0; i < udc->max_ep / 2; i++) {
2043                 tmp_reg = fsl_readl(&dr_regs->endptctrl[i]);
2044                 t = scnprintf(next, size, "EP Ctrl Reg [0x%x]: = [0x%x]\n",
2045                                 i, tmp_reg);
2046                 size -= t;
2047                 next += t;
2048         }
2049         tmp_reg = fsl_readl(&dr_regs->endpointprime);
2050         t = scnprintf(next, size, "EP Prime Reg = [0x%x]\n\n", tmp_reg);
2051         size -= t;
2052         next += t;
2053
2054 #ifndef CONFIG_ARCH_MXC
2055         tmp_reg = usb_sys_regs->snoop1;
2056         t = scnprintf(next, size, "Snoop1 Reg : = [0x%x]\n\n", tmp_reg);
2057         size -= t;
2058         next += t;
2059
2060         tmp_reg = usb_sys_regs->control;
2061         t = scnprintf(next, size, "General Control Reg : = [0x%x]\n\n",
2062                         tmp_reg);
2063         size -= t;
2064         next += t;
2065 #endif
2066
2067         /* ------fsl_udc, fsl_ep, fsl_request structure information ----- */
2068         ep = &udc->eps[0];
2069         t = scnprintf(next, size, "For %s Maxpkt is 0x%x index is 0x%x\n",
2070                         ep->ep.name, ep_maxpacket(ep), ep_index(ep));
2071         size -= t;
2072         next += t;
2073
2074         if (list_empty(&ep->queue)) {
2075                 t = scnprintf(next, size, "its req queue is empty\n\n");
2076                 size -= t;
2077                 next += t;
2078         } else {
2079                 list_for_each_entry(req, &ep->queue, queue) {
2080                         t = scnprintf(next, size,
2081                                 "req %p actual 0x%x length 0x%x buf %p\n",
2082                                 &req->req, req->req.actual,
2083                                 req->req.length, req->req.buf);
2084                         size -= t;
2085                         next += t;
2086                 }
2087         }
2088         /* other gadget->eplist ep */
2089         list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
2090                 if (ep->desc) {
2091                         t = scnprintf(next, size,
2092                                         "\nFor %s Maxpkt is 0x%x "
2093                                         "index is 0x%x\n",
2094                                         ep->ep.name, ep_maxpacket(ep),
2095                                         ep_index(ep));
2096                         size -= t;
2097                         next += t;
2098
2099                         if (list_empty(&ep->queue)) {
2100                                 t = scnprintf(next, size,
2101                                                 "its req queue is empty\n\n");
2102                                 size -= t;
2103                                 next += t;
2104                         } else {
2105                                 list_for_each_entry(req, &ep->queue, queue) {
2106                                         t = scnprintf(next, size,
2107                                                 "req %p actual 0x%x length "
2108                                                 "0x%x  buf %p\n",
2109                                                 &req->req, req->req.actual,
2110                                                 req->req.length, req->req.buf);
2111                                         size -= t;
2112                                         next += t;
2113                                         }       /* end for each_entry of ep req */
2114                                 }       /* end for else */
2115                         }       /* end for if(ep->queue) */
2116                 }               /* end (ep->desc) */
2117
2118         spin_unlock_irqrestore(&udc->lock, flags);
2119
2120         *eof = 1;
2121         return count - size;
2122 }
2123
2124 #define create_proc_file()      create_proc_read_entry(proc_filename, \
2125                                 0, NULL, fsl_proc_read, NULL)
2126
2127 #define remove_proc_file()      remove_proc_entry(proc_filename, NULL)
2128
2129 #else                           /* !CONFIG_USB_GADGET_DEBUG_FILES */
2130
2131 #define create_proc_file()      do {} while (0)
2132 #define remove_proc_file()      do {} while (0)
2133
2134 #endif                          /* CONFIG_USB_GADGET_DEBUG_FILES */
2135
2136 /*-------------------------------------------------------------------------*/
2137
2138 /* Release udc structures */
2139 static void fsl_udc_release(struct device *dev)
2140 {
2141         complete(udc_controller->done);
2142         dma_free_coherent(dev->parent, udc_controller->ep_qh_size,
2143                         udc_controller->ep_qh, udc_controller->ep_qh_dma);
2144         kfree(udc_controller);
2145 }
2146
2147 /******************************************************************
2148         Internal structure setup functions
2149 *******************************************************************/
2150 /*------------------------------------------------------------------
2151  * init resource for globle controller
2152  * Return the udc handle on success or NULL on failure
2153  ------------------------------------------------------------------*/
2154 static int __init struct_udc_setup(struct fsl_udc *udc,
2155                 struct platform_device *pdev)
2156 {
2157         struct fsl_usb2_platform_data *pdata;
2158         size_t size;
2159
2160         pdata = pdev->dev.platform_data;
2161         udc->phy_mode = pdata->phy_mode;
2162
2163         udc->eps = kzalloc(sizeof(struct fsl_ep) * udc->max_ep, GFP_KERNEL);
2164         if (!udc->eps) {
2165                 ERR("malloc fsl_ep failed\n");
2166                 return -1;
2167         }
2168
2169         /* initialized QHs, take care of alignment */
2170         size = udc->max_ep * sizeof(struct ep_queue_head);
2171         if (size < QH_ALIGNMENT)
2172                 size = QH_ALIGNMENT;
2173         else if ((size % QH_ALIGNMENT) != 0) {
2174                 size += QH_ALIGNMENT + 1;
2175                 size &= ~(QH_ALIGNMENT - 1);
2176         }
2177         udc->ep_qh = dma_alloc_coherent(&pdev->dev, size,
2178                                         &udc->ep_qh_dma, GFP_KERNEL);
2179         if (!udc->ep_qh) {
2180                 ERR("malloc QHs for udc failed\n");
2181                 kfree(udc->eps);
2182                 return -1;
2183         }
2184
2185         udc->ep_qh_size = size;
2186
2187         /* Initialize ep0 status request structure */
2188         /* FIXME: fsl_alloc_request() ignores ep argument */
2189         udc->status_req = container_of(fsl_alloc_request(NULL, GFP_KERNEL),
2190                         struct fsl_req, req);
2191         /* allocate a small amount of memory to get valid address */
2192         udc->status_req->req.buf = kmalloc(8, GFP_KERNEL);
2193         udc->status_req->req.dma = virt_to_phys(udc->status_req->req.buf);
2194
2195         udc->resume_state = USB_STATE_NOTATTACHED;
2196         udc->usb_state = USB_STATE_POWERED;
2197         udc->ep0_dir = 0;
2198         udc->remote_wakeup = 0; /* default to 0 on reset */
2199
2200         return 0;
2201 }
2202
2203 /*----------------------------------------------------------------
2204  * Setup the fsl_ep struct for eps
2205  * Link fsl_ep->ep to gadget->ep_list
2206  * ep0out is not used so do nothing here
2207  * ep0in should be taken care
2208  *--------------------------------------------------------------*/
2209 static int __init struct_ep_setup(struct fsl_udc *udc, unsigned char index,
2210                 char *name, int link)
2211 {
2212         struct fsl_ep *ep = &udc->eps[index];
2213
2214         ep->udc = udc;
2215         strcpy(ep->name, name);
2216         ep->ep.name = ep->name;
2217
2218         ep->ep.ops = &fsl_ep_ops;
2219         ep->stopped = 0;
2220
2221         /* for ep0: maxP defined in desc
2222          * for other eps, maxP is set by epautoconfig() called by gadget layer
2223          */
2224         ep->ep.maxpacket = (unsigned short) ~0;
2225
2226         /* the queue lists any req for this ep */
2227         INIT_LIST_HEAD(&ep->queue);
2228
2229         /* gagdet.ep_list used for ep_autoconfig so no ep0 */
2230         if (link)
2231                 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
2232         ep->gadget = &udc->gadget;
2233         ep->qh = &udc->ep_qh[index];
2234
2235         return 0;
2236 }
2237
2238 /* Driver probe function
2239  * all intialization operations implemented here except enabling usb_intr reg
2240  * board setup should have been done in the platform code
2241  */
2242 static int __init fsl_udc_probe(struct platform_device *pdev)
2243 {
2244         struct resource *res;
2245         int ret = -ENODEV;
2246         unsigned int i;
2247         u32 dccparams;
2248
2249         if (strcmp(pdev->name, driver_name)) {
2250                 VDBG("Wrong device");
2251                 return -ENODEV;
2252         }
2253
2254         udc_controller = kzalloc(sizeof(struct fsl_udc), GFP_KERNEL);
2255         if (udc_controller == NULL) {
2256                 ERR("malloc udc failed\n");
2257                 return -ENOMEM;
2258         }
2259
2260         spin_lock_init(&udc_controller->lock);
2261         udc_controller->stopped = 1;
2262
2263         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2264         if (!res) {
2265                 ret = -ENXIO;
2266                 goto err_kfree;
2267         }
2268
2269         if (!request_mem_region(res->start, res->end - res->start + 1,
2270                                 driver_name)) {
2271                 ERR("request mem region for %s failed\n", pdev->name);
2272                 ret = -EBUSY;
2273                 goto err_kfree;
2274         }
2275
2276         dr_regs = ioremap(res->start, resource_size(res));
2277         if (!dr_regs) {
2278                 ret = -ENOMEM;
2279                 goto err_release_mem_region;
2280         }
2281
2282 #ifndef CONFIG_ARCH_MXC
2283         usb_sys_regs = (struct usb_sys_interface *)
2284                         ((u32)dr_regs + USB_DR_SYS_OFFSET);
2285 #endif
2286
2287         /* Initialize USB clocks */
2288         ret = fsl_udc_clk_init(pdev);
2289         if (ret < 0)
2290                 goto err_iounmap_noclk;
2291
2292         /* Read Device Controller Capability Parameters register */
2293         dccparams = fsl_readl(&dr_regs->dccparams);
2294         if (!(dccparams & DCCPARAMS_DC)) {
2295                 ERR("This SOC doesn't support device role\n");
2296                 ret = -ENODEV;
2297                 goto err_iounmap;
2298         }
2299         /* Get max device endpoints */
2300         /* DEN is bidirectional ep number, max_ep doubles the number */
2301         udc_controller->max_ep = (dccparams & DCCPARAMS_DEN_MASK) * 2;
2302
2303         udc_controller->irq = platform_get_irq(pdev, 0);
2304         if (!udc_controller->irq) {
2305                 ret = -ENODEV;
2306                 goto err_iounmap;
2307         }
2308
2309         ret = request_irq(udc_controller->irq, fsl_udc_irq, IRQF_SHARED,
2310                         driver_name, udc_controller);
2311         if (ret != 0) {
2312                 ERR("cannot request irq %d err %d\n",
2313                                 udc_controller->irq, ret);
2314                 goto err_iounmap;
2315         }
2316
2317         /* Initialize the udc structure including QH member and other member */
2318         if (struct_udc_setup(udc_controller, pdev)) {
2319                 ERR("Can't initialize udc data structure\n");
2320                 ret = -ENOMEM;
2321                 goto err_free_irq;
2322         }
2323
2324         /* initialize usb hw reg except for regs for EP,
2325          * leave usbintr reg untouched */
2326         dr_controller_setup(udc_controller);
2327
2328         fsl_udc_clk_finalize(pdev);
2329
2330         /* Setup gadget structure */
2331         udc_controller->gadget.ops = &fsl_gadget_ops;
2332         udc_controller->gadget.is_dualspeed = 1;
2333         udc_controller->gadget.ep0 = &udc_controller->eps[0].ep;
2334         INIT_LIST_HEAD(&udc_controller->gadget.ep_list);
2335         udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
2336         udc_controller->gadget.name = driver_name;
2337
2338         /* Setup gadget.dev and register with kernel */
2339         dev_set_name(&udc_controller->gadget.dev, "gadget");
2340         udc_controller->gadget.dev.release = fsl_udc_release;
2341         udc_controller->gadget.dev.parent = &pdev->dev;
2342         ret = device_register(&udc_controller->gadget.dev);
2343         if (ret < 0)
2344                 goto err_free_irq;
2345
2346         /* setup QH and epctrl for ep0 */
2347         ep0_setup(udc_controller);
2348
2349         /* setup udc->eps[] for ep0 */
2350         struct_ep_setup(udc_controller, 0, "ep0", 0);
2351         /* for ep0: the desc defined here;
2352          * for other eps, gadget layer called ep_enable with defined desc
2353          */
2354         udc_controller->eps[0].desc = &fsl_ep0_desc;
2355         udc_controller->eps[0].ep.maxpacket = USB_MAX_CTRL_PAYLOAD;
2356
2357         /* setup the udc->eps[] for non-control endpoints and link
2358          * to gadget.ep_list */
2359         for (i = 1; i < (int)(udc_controller->max_ep / 2); i++) {
2360                 char name[14];
2361
2362                 sprintf(name, "ep%dout", i);
2363                 struct_ep_setup(udc_controller, i * 2, name, 1);
2364                 sprintf(name, "ep%din", i);
2365                 struct_ep_setup(udc_controller, i * 2 + 1, name, 1);
2366         }
2367
2368         /* use dma_pool for TD management */
2369         udc_controller->td_pool = dma_pool_create("udc_td", &pdev->dev,
2370                         sizeof(struct ep_td_struct),
2371                         DTD_ALIGNMENT, UDC_DMA_BOUNDARY);
2372         if (udc_controller->td_pool == NULL) {
2373                 ret = -ENOMEM;
2374                 goto err_unregister;
2375         }
2376         create_proc_file();
2377         return 0;
2378
2379 err_unregister:
2380         device_unregister(&udc_controller->gadget.dev);
2381 err_free_irq:
2382         free_irq(udc_controller->irq, udc_controller);
2383 err_iounmap:
2384         fsl_udc_clk_release();
2385 err_iounmap_noclk:
2386         iounmap(dr_regs);
2387 err_release_mem_region:
2388         release_mem_region(res->start, res->end - res->start + 1);
2389 err_kfree:
2390         kfree(udc_controller);
2391         udc_controller = NULL;
2392         return ret;
2393 }
2394
2395 /* Driver removal function
2396  * Free resources and finish pending transactions
2397  */
2398 static int __exit fsl_udc_remove(struct platform_device *pdev)
2399 {
2400         struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2401
2402         DECLARE_COMPLETION(done);
2403
2404         if (!udc_controller)
2405                 return -ENODEV;
2406         udc_controller->done = &done;
2407
2408         fsl_udc_clk_release();
2409
2410         /* DR has been stopped in usb_gadget_unregister_driver() */
2411         remove_proc_file();
2412
2413         /* Free allocated memory */
2414         kfree(udc_controller->status_req->req.buf);
2415         kfree(udc_controller->status_req);
2416         kfree(udc_controller->eps);
2417
2418         dma_pool_destroy(udc_controller->td_pool);
2419         free_irq(udc_controller->irq, udc_controller);
2420         iounmap(dr_regs);
2421         release_mem_region(res->start, res->end - res->start + 1);
2422
2423         device_unregister(&udc_controller->gadget.dev);
2424         /* free udc --wait for the release() finished */
2425         wait_for_completion(&done);
2426
2427         return 0;
2428 }
2429
2430 /*-----------------------------------------------------------------
2431  * Modify Power management attributes
2432  * Used by OTG statemachine to disable gadget temporarily
2433  -----------------------------------------------------------------*/
2434 static int fsl_udc_suspend(struct platform_device *pdev, pm_message_t state)
2435 {
2436         dr_controller_stop(udc_controller);
2437         return 0;
2438 }
2439
2440 /*-----------------------------------------------------------------
2441  * Invoked on USB resume. May be called in_interrupt.
2442  * Here we start the DR controller and enable the irq
2443  *-----------------------------------------------------------------*/
2444 static int fsl_udc_resume(struct platform_device *pdev)
2445 {
2446         /* Enable DR irq reg and set controller Run */
2447         if (udc_controller->stopped) {
2448                 dr_controller_setup(udc_controller);
2449                 dr_controller_run(udc_controller);
2450         }
2451         udc_controller->usb_state = USB_STATE_ATTACHED;
2452         udc_controller->ep0_state = WAIT_FOR_SETUP;
2453         udc_controller->ep0_dir = 0;
2454         return 0;
2455 }
2456
2457 /*-------------------------------------------------------------------------
2458         Register entry point for the peripheral controller driver
2459 --------------------------------------------------------------------------*/
2460
2461 static struct platform_driver udc_driver = {
2462         .remove  = __exit_p(fsl_udc_remove),
2463         /* these suspend and resume are not usb suspend and resume */
2464         .suspend = fsl_udc_suspend,
2465         .resume  = fsl_udc_resume,
2466         .driver  = {
2467                 .name = (char *)driver_name,
2468                 .owner = THIS_MODULE,
2469         },
2470 };
2471
2472 static int __init udc_init(void)
2473 {
2474         printk(KERN_INFO "%s (%s)\n", driver_desc, DRIVER_VERSION);
2475         return platform_driver_probe(&udc_driver, fsl_udc_probe);
2476 }
2477
2478 module_init(udc_init);
2479
2480 static void __exit udc_exit(void)
2481 {
2482         platform_driver_unregister(&udc_driver);
2483         printk(KERN_WARNING "%s unregistered\n", driver_desc);
2484 }
2485
2486 module_exit(udc_exit);
2487
2488 MODULE_DESCRIPTION(DRIVER_DESC);
2489 MODULE_AUTHOR(DRIVER_AUTHOR);
2490 MODULE_LICENSE("GPL");
2491 MODULE_ALIAS("platform:fsl-usb2-udc");