1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2011, Marvell Semiconductor Inc.
4 * Lei Wen <leiwen@marvell.com>
6 * Back ported to the 8xx platform (from the 8260 platform) by
7 * Murray.Jensen@cmst.csiro.au, 27-Jan-01.
16 #include <asm/byteorder.h>
17 #include <asm/cache.h>
18 #include <linux/delay.h>
19 #include <linux/errno.h>
21 #include <asm/unaligned.h>
22 #include <linux/types.h>
23 #include <linux/usb/ch9.h>
24 #include <linux/usb/gadget.h>
25 #include <usb/ci_udc.h>
26 #include "../host/ehci.h"
30 * Check if the system has too long cachelines. If the cachelines are
31 * longer then 128b, the driver will not be able flush/invalidate data
32 * cache over separate QH entries. We use 128b because one QH entry is
33 * 64b long and there are always two QH list entries for each endpoint.
35 #if ARCH_DMA_MINALIGN > 128
36 #error This driver can not work on systems with caches longer than 128b
40 * Every QTD must be individually aligned, since we can program any
41 * QTD's address into HW. Cache flushing requires ARCH_DMA_MINALIGN,
42 * and the USB HW requires 32-byte alignment. Align to both:
44 #define ILIST_ALIGN roundup(ARCH_DMA_MINALIGN, 32)
45 /* Each QTD is this size */
46 #define ILIST_ENT_RAW_SZ sizeof(struct ept_queue_item)
48 * Align the size of the QTD too, so we can add this value to each
49 * QTD's address to get another aligned address.
51 #define ILIST_ENT_SZ roundup(ILIST_ENT_RAW_SZ, ILIST_ALIGN)
52 /* For each endpoint, we need 2 QTDs, one for each of IN and OUT */
53 #define ILIST_SZ (NUM_ENDPOINTS * 2 * ILIST_ENT_SZ)
55 #define EP_MAX_LENGTH_TRANSFER 0x4000
58 #define DBG(x...) do {} while (0)
60 #define DBG(x...) printf(x)
61 static const char *reqname(unsigned r)
64 case USB_REQ_GET_STATUS: return "GET_STATUS";
65 case USB_REQ_CLEAR_FEATURE: return "CLEAR_FEATURE";
66 case USB_REQ_SET_FEATURE: return "SET_FEATURE";
67 case USB_REQ_SET_ADDRESS: return "SET_ADDRESS";
68 case USB_REQ_GET_DESCRIPTOR: return "GET_DESCRIPTOR";
69 case USB_REQ_SET_DESCRIPTOR: return "SET_DESCRIPTOR";
70 case USB_REQ_GET_CONFIGURATION: return "GET_CONFIGURATION";
71 case USB_REQ_SET_CONFIGURATION: return "SET_CONFIGURATION";
72 case USB_REQ_GET_INTERFACE: return "GET_INTERFACE";
73 case USB_REQ_SET_INTERFACE: return "SET_INTERFACE";
74 default: return "*UNKNOWN*";
79 static struct usb_endpoint_descriptor ep0_desc = {
80 .bLength = sizeof(struct usb_endpoint_descriptor),
81 .bDescriptorType = USB_DT_ENDPOINT,
82 .bEndpointAddress = USB_DIR_IN,
83 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
86 static int ci_pullup(struct usb_gadget *gadget, int is_on);
87 static int ci_ep_enable(struct usb_ep *ep,
88 const struct usb_endpoint_descriptor *desc);
89 static int ci_ep_disable(struct usb_ep *ep);
90 static int ci_ep_queue(struct usb_ep *ep,
91 struct usb_request *req, gfp_t gfp_flags);
92 static int ci_ep_dequeue(struct usb_ep *ep, struct usb_request *req);
93 static struct usb_request *
94 ci_ep_alloc_request(struct usb_ep *ep, unsigned int gfp_flags);
95 static void ci_ep_free_request(struct usb_ep *ep, struct usb_request *_req);
97 static struct usb_gadget_ops ci_udc_ops = {
101 static struct usb_ep_ops ci_ep_ops = {
102 .enable = ci_ep_enable,
103 .disable = ci_ep_disable,
104 .queue = ci_ep_queue,
105 .dequeue = ci_ep_dequeue,
106 .alloc_request = ci_ep_alloc_request,
107 .free_request = ci_ep_free_request,
110 __weak void ci_init_after_reset(struct ehci_ctrl *ctrl)
114 /* Init values for USB endpoints. */
115 static const struct usb_ep ci_ep_init[5] = {
123 .name = "ep1in-bulk",
128 .name = "ep2out-bulk",
143 static struct ci_drv controller = {
152 * ci_get_qh() - return queue head for endpoint
153 * @ep_num: Endpoint number
154 * @dir_in: Direction of the endpoint (IN = 1, OUT = 0)
156 * This function returns the QH associated with particular endpoint
157 * and it's direction.
159 static struct ept_queue_head *ci_get_qh(int ep_num, int dir_in)
161 return &controller.epts[(ep_num * 2) + dir_in];
165 * ci_get_qtd() - return queue item for endpoint
166 * @ep_num: Endpoint number
167 * @dir_in: Direction of the endpoint (IN = 1, OUT = 0)
169 * This function returns the QH associated with particular endpoint
170 * and it's direction.
172 static struct ept_queue_item *ci_get_qtd(int ep_num, int dir_in)
174 int index = (ep_num * 2) + dir_in;
175 uint8_t *imem = controller.items_mem + (index * ILIST_ENT_SZ);
176 return (struct ept_queue_item *)imem;
180 * ci_flush_qh - flush cache over queue head
181 * @ep_num: Endpoint number
183 * This function flushes cache over QH for particular endpoint.
185 static void ci_flush_qh(int ep_num)
187 struct ept_queue_head *head = ci_get_qh(ep_num, 0);
188 const unsigned long start = (unsigned long)head;
189 const unsigned long end = start + 2 * sizeof(*head);
191 flush_dcache_range(start, end);
195 * ci_invalidate_qh - invalidate cache over queue head
196 * @ep_num: Endpoint number
198 * This function invalidates cache over QH for particular endpoint.
200 static void ci_invalidate_qh(int ep_num)
202 struct ept_queue_head *head = ci_get_qh(ep_num, 0);
203 unsigned long start = (unsigned long)head;
204 unsigned long end = start + 2 * sizeof(*head);
206 invalidate_dcache_range(start, end);
210 * ci_flush_qtd - flush cache over queue item
211 * @ep_num: Endpoint number
213 * This function flushes cache over qTD pair for particular endpoint.
215 static void ci_flush_qtd(int ep_num)
217 struct ept_queue_item *item = ci_get_qtd(ep_num, 0);
218 const unsigned long start = (unsigned long)item;
219 const unsigned long end = start + 2 * ILIST_ENT_SZ;
221 flush_dcache_range(start, end);
225 * ci_flush_td - flush cache over queue item
228 * This function flushes cache for particular transfer descriptor.
230 static void ci_flush_td(struct ept_queue_item *td)
232 const unsigned long start = (unsigned long)td;
233 const unsigned long end = (unsigned long)td + ILIST_ENT_SZ;
234 flush_dcache_range(start, end);
238 * ci_invalidate_qtd - invalidate cache over queue item
239 * @ep_num: Endpoint number
241 * This function invalidates cache over qTD pair for particular endpoint.
243 static void ci_invalidate_qtd(int ep_num)
245 struct ept_queue_item *item = ci_get_qtd(ep_num, 0);
246 const unsigned long start = (unsigned long)item;
247 const unsigned long end = start + 2 * ILIST_ENT_SZ;
249 invalidate_dcache_range(start, end);
253 * ci_invalidate_td - invalidate cache over queue item
256 * This function invalidates cache for particular transfer descriptor.
258 static void ci_invalidate_td(struct ept_queue_item *td)
260 const unsigned long start = (unsigned long)td;
261 const unsigned long end = start + ILIST_ENT_SZ;
262 invalidate_dcache_range(start, end);
265 static struct usb_request *
266 ci_ep_alloc_request(struct usb_ep *ep, unsigned int gfp_flags)
268 struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep);
270 struct ci_req *ci_req;
273 num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
275 if (num == 0 && controller.ep0_req)
276 return &controller.ep0_req->req;
278 ci_req = calloc(1, sizeof(*ci_req));
282 INIT_LIST_HEAD(&ci_req->queue);
285 controller.ep0_req = ci_req;
290 static void ci_ep_free_request(struct usb_ep *ep, struct usb_request *req)
292 struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep);
293 struct ci_req *ci_req = container_of(req, struct ci_req, req);
297 num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
300 if (!controller.ep0_req)
302 controller.ep0_req = 0;
310 static void ep_enable(int num, int in, int maxpacket)
312 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
315 n = readl(&udc->epctrl[num]);
317 n |= (CTRL_TXE | CTRL_TXR | CTRL_TXT_BULK);
319 n |= (CTRL_RXE | CTRL_RXR | CTRL_RXT_BULK);
322 struct ept_queue_head *head = ci_get_qh(num, in);
324 head->config = CONFIG_MAX_PKT(maxpacket) | CONFIG_ZLT;
327 writel(n, &udc->epctrl[num]);
330 static int ci_ep_enable(struct usb_ep *ep,
331 const struct usb_endpoint_descriptor *desc)
333 struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep);
335 num = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
336 in = (desc->bEndpointAddress & USB_DIR_IN) != 0;
340 int max = get_unaligned_le16(&desc->wMaxPacketSize);
342 if ((max > 64) && (controller.gadget.speed == USB_SPEED_FULL))
344 if (ep->maxpacket != max) {
345 DBG("%s: from %d to %d\n", __func__,
350 ep_enable(num, in, ep->maxpacket);
351 DBG("%s: num=%d maxpacket=%d\n", __func__, num, ep->maxpacket);
355 static int ci_ep_disable(struct usb_ep *ep)
357 struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep);
363 static int ci_bounce(struct ci_req *ci_req, int in)
365 struct usb_request *req = &ci_req->req;
366 unsigned long addr = (unsigned long)req->buf;
367 unsigned long hwaddr;
368 uint32_t aligned_used_len;
370 /* Input buffer address is not aligned. */
371 if (addr & (ARCH_DMA_MINALIGN - 1))
374 /* Input buffer length is not aligned. */
375 if (req->length & (ARCH_DMA_MINALIGN - 1))
378 /* The buffer is well aligned, only flush cache. */
379 ci_req->hw_len = req->length;
380 ci_req->hw_buf = req->buf;
384 if (ci_req->b_buf && req->length > ci_req->b_len) {
388 if (!ci_req->b_buf) {
389 ci_req->b_len = roundup(req->length, ARCH_DMA_MINALIGN);
390 ci_req->b_buf = memalign(ARCH_DMA_MINALIGN, ci_req->b_len);
394 ci_req->hw_len = ci_req->b_len;
395 ci_req->hw_buf = ci_req->b_buf;
398 memcpy(ci_req->hw_buf, req->buf, req->length);
401 hwaddr = (unsigned long)ci_req->hw_buf;
402 aligned_used_len = roundup(req->length, ARCH_DMA_MINALIGN);
403 flush_dcache_range(hwaddr, hwaddr + aligned_used_len);
408 static void ci_debounce(struct ci_req *ci_req, int in)
410 struct usb_request *req = &ci_req->req;
411 unsigned long addr = (unsigned long)req->buf;
412 unsigned long hwaddr = (unsigned long)ci_req->hw_buf;
413 uint32_t aligned_used_len;
418 aligned_used_len = roundup(req->actual, ARCH_DMA_MINALIGN);
419 invalidate_dcache_range(hwaddr, hwaddr + aligned_used_len);
422 return; /* not a bounce */
424 memcpy(req->buf, ci_req->hw_buf, req->actual);
427 static void ci_ep_submit_next_request(struct ci_ep *ci_ep)
429 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
430 struct ept_queue_item *item;
431 struct ept_queue_head *head;
432 int bit, num, len, in;
433 struct ci_req *ci_req;
435 uint32_t len_left, len_this_dtd;
436 struct ept_queue_item *dtd, *qtd;
438 ci_ep->req_primed = true;
440 num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
441 in = (ci_ep->desc->bEndpointAddress & USB_DIR_IN) != 0;
442 item = ci_get_qtd(num, in);
443 head = ci_get_qh(num, in);
445 ci_req = list_first_entry(&ci_ep->queue, struct ci_req, queue);
446 len = ci_req->req.length;
448 head->next = (unsigned long)item;
451 ci_req->dtd_count = 0;
452 buf = ci_req->hw_buf;
457 len_this_dtd = min(len_left, (unsigned)EP_MAX_LENGTH_TRANSFER);
459 dtd->info = INFO_BYTES(len_this_dtd) | INFO_ACTIVE;
460 dtd->page0 = (unsigned long)buf;
461 dtd->page1 = ((unsigned long)buf & 0xfffff000) + 0x1000;
462 dtd->page2 = ((unsigned long)buf & 0xfffff000) + 0x2000;
463 dtd->page3 = ((unsigned long)buf & 0xfffff000) + 0x3000;
464 dtd->page4 = ((unsigned long)buf & 0xfffff000) + 0x4000;
466 len_left -= len_this_dtd;
470 qtd = (struct ept_queue_item *)
471 memalign(ILIST_ALIGN, ILIST_ENT_SZ);
472 dtd->next = (unsigned long)qtd;
474 memset(dtd, 0, ILIST_ENT_SZ);
482 * When sending the data for an IN transaction, the attached host
483 * knows that all data for the IN is sent when one of the following
485 * a) A zero-length packet is transmitted.
486 * b) A packet with length that isn't an exact multiple of the ep's
487 * maxpacket is transmitted.
488 * c) Enough data is sent to exactly fill the host's maximum expected
489 * IN transaction size.
491 * One of these conditions MUST apply at the end of an IN transaction,
492 * or the transaction will not be considered complete by the host. If
493 * none of (a)..(c) already applies, then we must force (a) to apply
494 * by explicitly sending an extra zero-length packet.
497 if (in && len && !(len % ci_ep->ep.maxpacket) && ci_req->req.zero) {
499 * Each endpoint has 2 items allocated, even though typically
500 * only 1 is used at a time since either an IN or an OUT but
501 * not both is queued. For an IN transaction, item currently
502 * points at the second of these items, so we know that we
503 * can use the other to transmit the extra zero-length packet.
505 struct ept_queue_item *other_item = ci_get_qtd(num, 0);
506 item->next = (unsigned long)other_item;
508 item->info = INFO_ACTIVE;
511 item->next = TERMINATE;
512 item->info |= INFO_IOC;
516 item = (struct ept_queue_item *)(unsigned long)head->next;
517 while (item->next != TERMINATE) {
518 ci_flush_td((struct ept_queue_item *)(unsigned long)item->next);
519 item = (struct ept_queue_item *)(unsigned long)item->next;
522 DBG("ept%d %s queue len %x, req %p, buffer %p\n",
523 num, in ? "in" : "out", len, ci_req, ci_req->hw_buf);
531 writel(bit, &udc->epprime);
534 static int ci_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
536 struct ci_ep *ci_ep = container_of(_ep, struct ci_ep, ep);
537 struct ci_req *ci_req;
539 list_for_each_entry(ci_req, &ci_ep->queue, queue) {
540 if (&ci_req->req == _req)
544 if (&ci_req->req != _req)
547 list_del_init(&ci_req->queue);
549 if (ci_req->req.status == -EINPROGRESS) {
550 ci_req->req.status = -ECONNRESET;
551 if (ci_req->req.complete)
552 ci_req->req.complete(_ep, _req);
558 static int ci_ep_queue(struct usb_ep *ep,
559 struct usb_request *req, gfp_t gfp_flags)
561 struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep);
562 struct ci_req *ci_req = container_of(req, struct ci_req, req);
564 int __maybe_unused num;
566 num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
567 in = (ci_ep->desc->bEndpointAddress & USB_DIR_IN) != 0;
569 if (!num && ci_ep->req_primed) {
571 * The flipping of ep0 between IN and OUT relies on
572 * ci_ep_queue consuming the current IN/OUT setting
573 * immediately. If this is deferred to a later point when the
574 * req is pulled out of ci_req->queue, then the IN/OUT setting
575 * may have been changed since the req was queued, and state
576 * will get out of sync. This condition doesn't occur today,
577 * but could if bugs were introduced later, and this error
578 * check will save a lot of debugging time.
580 printf("%s: ep0 transaction already in progress\n", __func__);
584 ret = ci_bounce(ci_req, in);
588 DBG("ept%d %s pre-queue req %p, buffer %p\n",
589 num, in ? "in" : "out", ci_req, ci_req->hw_buf);
590 list_add_tail(&ci_req->queue, &ci_ep->queue);
592 if (!ci_ep->req_primed)
593 ci_ep_submit_next_request(ci_ep);
598 static void flip_ep0_direction(void)
600 if (ep0_desc.bEndpointAddress == USB_DIR_IN) {
601 DBG("%s: Flipping ep0 to OUT\n", __func__);
602 ep0_desc.bEndpointAddress = 0;
604 DBG("%s: Flipping ep0 to IN\n", __func__);
605 ep0_desc.bEndpointAddress = USB_DIR_IN;
609 static void handle_ep_complete(struct ci_ep *ci_ep)
611 struct ept_queue_item *item, *next_td;
613 struct ci_req *ci_req;
615 num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
616 in = (ci_ep->desc->bEndpointAddress & USB_DIR_IN) != 0;
617 item = ci_get_qtd(num, in);
618 ci_invalidate_qtd(num);
619 ci_req = list_first_entry(&ci_ep->queue, struct ci_req, queue);
623 for (j = 0; j < ci_req->dtd_count; j++) {
624 ci_invalidate_td(next_td);
626 len += (item->info >> 16) & 0x7fff;
627 if (item->info & 0xff)
628 printf("EP%d/%s FAIL info=%x pg0=%x\n",
629 num, in ? "in" : "out", item->info, item->page0);
630 if (j != ci_req->dtd_count - 1)
631 next_td = (struct ept_queue_item *)(unsigned long)
637 list_del_init(&ci_req->queue);
638 ci_ep->req_primed = false;
640 if (!list_empty(&ci_ep->queue))
641 ci_ep_submit_next_request(ci_ep);
643 ci_req->req.actual = ci_req->req.length - len;
644 ci_debounce(ci_req, in);
646 DBG("ept%d %s req %p, complete %x\n",
647 num, in ? "in" : "out", ci_req, len);
648 if (num != 0 || controller.ep0_data_phase)
649 ci_req->req.complete(&ci_ep->ep, &ci_req->req);
650 if (num == 0 && controller.ep0_data_phase) {
652 * Data Stage is complete, so flip ep0 dir for Status Stage,
653 * which always transfers a packet in the opposite direction.
655 DBG("%s: flip ep0 dir for Status Stage\n", __func__);
656 flip_ep0_direction();
657 controller.ep0_data_phase = false;
658 ci_req->req.length = 0;
659 usb_ep_queue(&ci_ep->ep, &ci_req->req, 0);
663 #define SETUP(type, request) (((type) << 8) | (request))
665 static void handle_setup(void)
667 struct ci_ep *ci_ep = &controller.ep[0];
668 struct ci_req *ci_req;
669 struct usb_request *req;
670 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
671 struct ept_queue_head *head;
672 struct usb_ctrlrequest r;
674 int num, in, _num, _in, i;
677 ci_req = controller.ep0_req;
679 head = ci_get_qh(0, 0); /* EP0 OUT */
682 memcpy(&r, head->setup_data, sizeof(struct usb_ctrlrequest));
683 #ifdef CONFIG_CI_UDC_HAS_HOSTPC
684 writel(EPT_RX(0), &udc->epsetupstat);
686 writel(EPT_RX(0), &udc->epstat);
688 DBG("handle setup %s, %x, %x index %x value %x length %x\n",
689 reqname(r.bRequest), r.bRequestType, r.bRequest, r.wIndex,
690 r.wValue, r.wLength);
692 /* Set EP0 dir for Data Stage based on Setup Stage data */
693 if (r.bRequestType & USB_DIR_IN) {
694 DBG("%s: Set ep0 to IN for Data Stage\n", __func__);
695 ep0_desc.bEndpointAddress = USB_DIR_IN;
697 DBG("%s: Set ep0 to OUT for Data Stage\n", __func__);
698 ep0_desc.bEndpointAddress = 0;
701 controller.ep0_data_phase = true;
703 /* 0 length -> no Data Stage. Flip dir for Status Stage */
704 DBG("%s: 0 length: flip ep0 dir for Status Stage\n", __func__);
705 flip_ep0_direction();
706 controller.ep0_data_phase = false;
709 list_del_init(&ci_req->queue);
710 ci_ep->req_primed = false;
712 switch (SETUP(r.bRequestType, r.bRequest)) {
713 case SETUP(USB_RECIP_ENDPOINT, USB_REQ_CLEAR_FEATURE):
714 _num = r.wIndex & 15;
715 _in = !!(r.wIndex & 0x80);
717 if ((r.wValue == 0) && (r.wLength == 0)) {
719 for (i = 0; i < NUM_ENDPOINTS; i++) {
720 struct ci_ep *ep = &controller.ep[i];
724 num = ep->desc->bEndpointAddress
725 & USB_ENDPOINT_NUMBER_MASK;
726 in = (ep->desc->bEndpointAddress
728 if ((num == _num) && (in == _in)) {
729 ep_enable(num, in, ep->ep.maxpacket);
730 usb_ep_queue(controller.gadget.ep0,
738 case SETUP(USB_RECIP_DEVICE, USB_REQ_SET_ADDRESS):
740 * write address delayed (will take effect
741 * after the next IN txn)
743 writel((r.wValue << 25) | (1 << 24), &udc->devaddr);
745 usb_ep_queue(controller.gadget.ep0, req, 0);
748 case SETUP(USB_DIR_IN | USB_RECIP_DEVICE, USB_REQ_GET_STATUS):
750 buf = (char *)req->buf;
751 buf[0] = 1 << USB_DEVICE_SELF_POWERED;
753 usb_ep_queue(controller.gadget.ep0, req, 0);
756 /* pass request up to the gadget driver */
757 if (controller.driver)
758 status = controller.driver->setup(&controller.gadget, &r);
764 DBG("STALL reqname %s type %x value %x, index %x\n",
765 reqname(r.bRequest), r.bRequestType, r.wValue, r.wIndex);
766 writel((1<<16) | (1 << 0), &udc->epctrl[0]);
769 static void stop_activity(void)
772 struct ept_queue_head *head;
773 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
774 writel(readl(&udc->epcomp), &udc->epcomp);
775 #ifdef CONFIG_CI_UDC_HAS_HOSTPC
776 writel(readl(&udc->epsetupstat), &udc->epsetupstat);
778 writel(readl(&udc->epstat), &udc->epstat);
779 writel(0xffffffff, &udc->epflush);
781 /* error out any pending reqs */
782 for (i = 0; i < NUM_ENDPOINTS; i++) {
784 writel(0, &udc->epctrl[i]);
785 if (controller.ep[i].desc) {
786 num = controller.ep[i].desc->bEndpointAddress
787 & USB_ENDPOINT_NUMBER_MASK;
788 in = (controller.ep[i].desc->bEndpointAddress
790 head = ci_get_qh(num, in);
791 head->info = INFO_ACTIVE;
799 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
800 unsigned n = readl(&udc->usbsts);
801 writel(n, &udc->usbsts);
804 n &= (STS_SLI | STS_URI | STS_PCI | STS_UI | STS_UEI);
809 DBG("-- reset --\n");
813 DBG("-- suspend --\n");
817 int speed = USB_SPEED_FULL;
819 #ifdef CONFIG_CI_UDC_HAS_HOSTPC
820 bit = (readl(&udc->hostpc1_devlc) >> 25) & 3;
822 bit = (readl(&udc->portsc) >> 26) & 3;
824 DBG("-- portchange %x %s\n", bit, (bit == 2) ? "High" : "Full");
826 speed = USB_SPEED_HIGH;
829 controller.gadget.speed = speed;
830 for (i = 1; i < NUM_ENDPOINTS; i++) {
831 if (controller.ep[i].ep.maxpacket > max)
832 controller.ep[i].ep.maxpacket = max;
837 printf("<UEI %x>\n", readl(&udc->epcomp));
839 if ((n & STS_UI) || (n & STS_UEI)) {
840 #ifdef CONFIG_CI_UDC_HAS_HOSTPC
841 n = readl(&udc->epsetupstat);
843 n = readl(&udc->epstat);
848 n = readl(&udc->epcomp);
850 writel(n, &udc->epcomp);
852 for (i = 0; i < NUM_ENDPOINTS && n; i++) {
853 if (controller.ep[i].desc) {
854 num = controller.ep[i].desc->bEndpointAddress
855 & USB_ENDPOINT_NUMBER_MASK;
856 in = (controller.ep[i].desc->bEndpointAddress
858 bit = (in) ? EPT_TX(num) : EPT_RX(num);
860 handle_ep_complete(&controller.ep[i]);
866 int usb_gadget_handle_interrupts(int index)
869 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
871 value = readl(&udc->usbsts);
878 void udc_disconnect(void)
880 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
883 writel(USBCMD_FS2, &udc->usbcmd);
885 if (controller.driver)
886 controller.driver->disconnect(&controller.gadget);
889 static int ci_pullup(struct usb_gadget *gadget, int is_on)
891 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
894 writel(USBCMD_ITC(MICRO_8FRAME) | USBCMD_RST, &udc->usbcmd);
897 ci_init_after_reset(controller.ctrl);
899 writel((unsigned long)controller.epts, &udc->epinitaddr);
901 /* select DEVICE mode */
902 writel(USBMODE_DEVICE, &udc->usbmode);
904 #if !defined(CONFIG_USB_GADGET_DUALSPEED)
905 /* Port force Full-Speed Connect */
906 setbits_le32(&udc->portsc, PFSC);
909 writel(0xffffffff, &udc->epflush);
911 /* Turn on the USB connection by enabling the pullup resistor */
912 setbits_le32(&udc->usbcmd, USBCMD_ITC(MICRO_8FRAME) |
921 static int ci_udc_probe(void)
923 struct ept_queue_head *head;
926 const int num = 2 * NUM_ENDPOINTS;
928 const int eplist_min_align = 4096;
929 const int eplist_align = roundup(eplist_min_align, ARCH_DMA_MINALIGN);
930 const int eplist_raw_sz = num * sizeof(struct ept_queue_head);
931 const int eplist_sz = roundup(eplist_raw_sz, ARCH_DMA_MINALIGN);
933 /* The QH list must be aligned to 4096 bytes. */
934 controller.epts = memalign(eplist_align, eplist_sz);
935 if (!controller.epts)
937 memset(controller.epts, 0, eplist_sz);
939 controller.items_mem = memalign(ILIST_ALIGN, ILIST_SZ);
940 if (!controller.items_mem) {
941 free(controller.epts);
944 memset(controller.items_mem, 0, ILIST_SZ);
946 for (i = 0; i < 2 * NUM_ENDPOINTS; i++) {
948 * Configure QH for each endpoint. The structure of the QH list
949 * is such that each two subsequent fields, N and N+1 where N is
950 * even, in the QH list represent QH for one endpoint. The Nth
951 * entry represents OUT configuration and the N+1th entry does
952 * represent IN configuration of the endpoint.
954 head = controller.epts + i;
956 head->config = CONFIG_MAX_PKT(EP0_MAX_PACKET_SIZE)
957 | CONFIG_ZLT | CONFIG_IOS;
959 head->config = CONFIG_MAX_PKT(EP_MAX_PACKET_SIZE)
961 head->next = TERMINATE;
970 INIT_LIST_HEAD(&controller.gadget.ep_list);
973 memcpy(&controller.ep[0].ep, &ci_ep_init[0], sizeof(*ci_ep_init));
974 controller.ep[0].desc = &ep0_desc;
975 INIT_LIST_HEAD(&controller.ep[0].queue);
976 controller.ep[0].req_primed = false;
977 controller.gadget.ep0 = &controller.ep[0].ep;
978 INIT_LIST_HEAD(&controller.gadget.ep0->ep_list);
981 for (i = 1; i < 4; i++) {
982 memcpy(&controller.ep[i].ep, &ci_ep_init[i],
983 sizeof(*ci_ep_init));
984 INIT_LIST_HEAD(&controller.ep[i].queue);
985 controller.ep[i].req_primed = false;
986 list_add_tail(&controller.ep[i].ep.ep_list,
987 &controller.gadget.ep_list);
991 for (i = 4; i < NUM_ENDPOINTS; i++) {
992 memcpy(&controller.ep[i].ep, &ci_ep_init[4],
993 sizeof(*ci_ep_init));
994 INIT_LIST_HEAD(&controller.ep[i].queue);
995 controller.ep[i].req_primed = false;
996 list_add_tail(&controller.ep[i].ep.ep_list,
997 &controller.gadget.ep_list);
1000 ci_ep_alloc_request(&controller.ep[0].ep, 0);
1001 if (!controller.ep0_req) {
1002 free(controller.items_mem);
1003 free(controller.epts);
1010 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1016 if (!driver->bind || !driver->setup || !driver->disconnect)
1018 if (driver->speed != USB_SPEED_FULL && driver->speed != USB_SPEED_HIGH)
1021 #if CONFIG_IS_ENABLED(DM_USB)
1022 ret = usb_setup_ehci_gadget(&controller.ctrl);
1024 ret = usb_lowlevel_init(0, USB_INIT_DEVICE, (void **)&controller.ctrl);
1029 ret = ci_udc_probe();
1031 DBG("udc probe failed, returned %d\n", ret);
1035 ret = driver->bind(&controller.gadget);
1037 DBG("driver->bind() returned %d\n", ret);
1040 controller.driver = driver;
1045 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1049 driver->unbind(&controller.gadget);
1050 controller.driver = NULL;
1052 ci_ep_free_request(&controller.ep[0].ep, &controller.ep0_req->req);
1053 free(controller.items_mem);
1054 free(controller.epts);
1059 bool dfu_usb_get_reset(void)
1061 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
1063 return !!(readl(&udc->usbsts) & STS_URI);