drivers/usb/eth/asix.c

   1 /*
   2  * Copyright (c) 2011 The Chromium OS Authors.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <dm.h>
   9 #include <usb.h>
  10 #include <malloc.h>
  11 #include <linux/mii.h>
  12 #include "usb_ether.h"
  13
  14 /* ASIX AX8817X based USB 2.0 Ethernet Devices */
  15
  16 #define AX_CMD_SET_SW_MII               0x06
  17 #define AX_CMD_READ_MII_REG             0x07
  18 #define AX_CMD_WRITE_MII_REG            0x08
  19 #define AX_CMD_SET_HW_MII               0x0a
  20 #define AX_CMD_READ_EEPROM              0x0b
  21 #define AX_CMD_READ_RX_CTL              0x0f
  22 #define AX_CMD_WRITE_RX_CTL             0x10
  23 #define AX_CMD_WRITE_IPG0               0x12
  24 #define AX_CMD_READ_NODE_ID             0x13
  25 #define AX_CMD_WRITE_NODE_ID    0x14
  26 #define AX_CMD_READ_PHY_ID              0x19
  27 #define AX_CMD_WRITE_MEDIUM_MODE        0x1b
  28 #define AX_CMD_WRITE_GPIOS              0x1f
  29 #define AX_CMD_SW_RESET                 0x20
  30 #define AX_CMD_SW_PHY_SELECT            0x22
  31
  32 #define AX_SWRESET_CLEAR                0x00
  33 #define AX_SWRESET_PRTE                 0x04
  34 #define AX_SWRESET_PRL                  0x08
  35 #define AX_SWRESET_IPRL                 0x20
  36 #define AX_SWRESET_IPPD                 0x40
  37
  38 #define AX88772_IPG0_DEFAULT            0x15
  39 #define AX88772_IPG1_DEFAULT            0x0c
  40 #define AX88772_IPG2_DEFAULT            0x12
  41
  42 /* AX88772 & AX88178 Medium Mode Register */
  43 #define AX_MEDIUM_PF            0x0080
  44 #define AX_MEDIUM_JFE           0x0040
  45 #define AX_MEDIUM_TFC           0x0020
  46 #define AX_MEDIUM_RFC           0x0010
  47 #define AX_MEDIUM_ENCK          0x0008
  48 #define AX_MEDIUM_AC            0x0004
  49 #define AX_MEDIUM_FD            0x0002
  50 #define AX_MEDIUM_GM            0x0001
  51 #define AX_MEDIUM_SM            0x1000
  52 #define AX_MEDIUM_SBP           0x0800
  53 #define AX_MEDIUM_PS            0x0200
  54 #define AX_MEDIUM_RE            0x0100
  55
  56 #define AX88178_MEDIUM_DEFAULT  \
  57         (AX_MEDIUM_PS | AX_MEDIUM_FD | AX_MEDIUM_AC | \
  58          AX_MEDIUM_RFC | AX_MEDIUM_TFC | AX_MEDIUM_JFE | \
  59          AX_MEDIUM_RE)
  60
  61 #define AX88772_MEDIUM_DEFAULT  \
  62         (AX_MEDIUM_FD | AX_MEDIUM_RFC | \
  63          AX_MEDIUM_TFC | AX_MEDIUM_PS | \
  64          AX_MEDIUM_AC | AX_MEDIUM_RE)
  65
  66 /* AX88772 & AX88178 RX_CTL values */
  67 #define AX_RX_CTL_SO                    0x0080
  68 #define AX_RX_CTL_AB                    0x0008
  69
  70 #define AX_DEFAULT_RX_CTL       \
  71         (AX_RX_CTL_SO | AX_RX_CTL_AB)
  72
  73 /* GPIO 2 toggles */
  74 #define AX_GPIO_GPO2EN          0x10    /* GPIO2 Output enable */
  75 #define AX_GPIO_GPO_2           0x20    /* GPIO2 Output value */
  76 #define AX_GPIO_RSE             0x80    /* Reload serial EEPROM */
  77
  78 /* local defines */
  79 #define ASIX_BASE_NAME "asx"
  80 #define USB_CTRL_SET_TIMEOUT 5000
  81 #define USB_CTRL_GET_TIMEOUT 5000
  82 #define USB_BULK_SEND_TIMEOUT 5000
  83 #define USB_BULK_RECV_TIMEOUT 5000
  84
  85 #define AX_RX_URB_SIZE 2048
  86 #define PHY_CONNECT_TIMEOUT 5000
  87
  88 /* asix_flags defines */
  89 #define FLAG_NONE                       0
  90 #define FLAG_TYPE_AX88172       (1U << 0)
  91 #define FLAG_TYPE_AX88772       (1U << 1)
  92 #define FLAG_TYPE_AX88772B      (1U << 2)
  93 #define FLAG_EEPROM_MAC         (1U << 3) /* initial mac address in eeprom */
  94
  95
  96 /* driver private */
  97 struct asix_private {
  98         int flags;
  99 #ifdef CONFIG_DM_ETH
 100         struct ueth_data ueth;
 101 #endif
 102 };
 103
 104 #ifndef CONFIG_DM_ETH
 105 /* local vars */
 106 static int curr_eth_dev; /* index for name of next device detected */
 107 #endif
 108
 109 /*
 110  * Asix infrastructure commands
 111  */
 112 static int asix_write_cmd(struct ueth_data *dev, u8 cmd, u16 value, u16 index,
 113                              u16 size, void *data)
 114 {
 115         int len;
 116
 117         debug("asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x "
 118                 "size=%d\n", cmd, value, index, size);
 119
 120         len = usb_control_msg(
 121                 dev->pusb_dev,
 122                 usb_sndctrlpipe(dev->pusb_dev, 0),
 123                 cmd,
 124                 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 125                 value,
 126                 index,
 127                 data,
 128                 size,
 129                 USB_CTRL_SET_TIMEOUT);
 130
 131         return len == size ? 0 : -1;
 132 }
 133
 134 static int asix_read_cmd(struct ueth_data *dev, u8 cmd, u16 value, u16 index,
 135                             u16 size, void *data)
 136 {
 137         int len;
 138
 139         debug("asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
 140                 cmd, value, index, size);
 141
 142         len = usb_control_msg(
 143                 dev->pusb_dev,
 144                 usb_rcvctrlpipe(dev->pusb_dev, 0),
 145                 cmd,
 146                 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 147                 value,
 148                 index,
 149                 data,
 150                 size,
 151                 USB_CTRL_GET_TIMEOUT);
 152         return len == size ? 0 : -1;
 153 }
 154
 155 static inline int asix_set_sw_mii(struct ueth_data *dev)
 156 {
 157         int ret;
 158
 159         ret = asix_write_cmd(dev, AX_CMD_SET_SW_MII, 0x0000, 0, 0, NULL);
 160         if (ret < 0)
 161                 debug("Failed to enable software MII access\n");
 162         return ret;
 163 }
 164
 165 static inline int asix_set_hw_mii(struct ueth_data *dev)
 166 {
 167         int ret;
 168
 169         ret = asix_write_cmd(dev, AX_CMD_SET_HW_MII, 0x0000, 0, 0, NULL);
 170         if (ret < 0)
 171                 debug("Failed to enable hardware MII access\n");
 172         return ret;
 173 }
 174
 175 static int asix_mdio_read(struct ueth_data *dev, int phy_id, int loc)
 176 {
 177         ALLOC_CACHE_ALIGN_BUFFER(__le16, res, 1);
 178
 179         asix_set_sw_mii(dev);
 180         asix_read_cmd(dev, AX_CMD_READ_MII_REG, phy_id, (__u16)loc, 2, res);
 181         asix_set_hw_mii(dev);
 182
 183         debug("asix_mdio_read() phy_id=0x%02x, loc=0x%02x, returns=0x%04x\n",
 184                         phy_id, loc, le16_to_cpu(*res));
 185
 186         return le16_to_cpu(*res);
 187 }
 188
 189 static void
 190 asix_mdio_write(struct ueth_data *dev, int phy_id, int loc, int val)
 191 {
 192         ALLOC_CACHE_ALIGN_BUFFER(__le16, res, 1);
 193         *res = cpu_to_le16(val);
 194
 195         debug("asix_mdio_write() phy_id=0x%02x, loc=0x%02x, val=0x%04x\n",
 196                         phy_id, loc, val);
 197         asix_set_sw_mii(dev);
 198         asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, (__u16)loc, 2, res);
 199         asix_set_hw_mii(dev);
 200 }
 201
 202 /*
 203  * Asix "high level" commands
 204  */
 205 static int asix_sw_reset(struct ueth_data *dev, u8 flags)
 206 {
 207         int ret;
 208
 209         ret = asix_write_cmd(dev, AX_CMD_SW_RESET, flags, 0, 0, NULL);
 210         if (ret < 0)
 211                 debug("Failed to send software reset: %02x\n", ret);
 212         else
 213                 udelay(150 * 1000);
 214
 215         return ret;
 216 }
 217
 218 static inline int asix_get_phy_addr(struct ueth_data *dev)
 219 {
 220         ALLOC_CACHE_ALIGN_BUFFER(u8, buf, 2);
 221
 222         int ret = asix_read_cmd(dev, AX_CMD_READ_PHY_ID, 0, 0, 2, buf);
 223
 224         debug("asix_get_phy_addr()\n");
 225
 226         if (ret < 0) {
 227                 debug("Error reading PHYID register: %02x\n", ret);
 228                 goto out;
 229         }
 230         debug("asix_get_phy_addr() returning 0x%02x%02x\n", buf[0], buf[1]);
 231         ret = buf[1];
 232
 233 out:
 234         return ret;
 235 }
 236
 237 static int asix_write_medium_mode(struct ueth_data *dev, u16 mode)
 238 {
 239         int ret;
 240
 241         debug("asix_write_medium_mode() - mode = 0x%04x\n", mode);
 242         ret = asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode,
 243                         0, 0, NULL);
 244         if (ret < 0) {
 245                 debug("Failed to write Medium Mode mode to 0x%04x: %02x\n",
 246                         mode, ret);
 247         }
 248         return ret;
 249 }
 250
 251 static u16 asix_read_rx_ctl(struct ueth_data *dev)
 252 {
 253         ALLOC_CACHE_ALIGN_BUFFER(__le16, v, 1);
 254
 255         int ret = asix_read_cmd(dev, AX_CMD_READ_RX_CTL, 0, 0, 2, v);
 256
 257         if (ret < 0)
 258                 debug("Error reading RX_CTL register: %02x\n", ret);
 259         else
 260                 ret = le16_to_cpu(*v);
 261         return ret;
 262 }
 263
 264 static int asix_write_rx_ctl(struct ueth_data *dev, u16 mode)
 265 {
 266         int ret;
 267
 268         debug("asix_write_rx_ctl() - mode = 0x%04x\n", mode);
 269         ret = asix_write_cmd(dev, AX_CMD_WRITE_RX_CTL, mode, 0, 0, NULL);
 270         if (ret < 0) {
 271                 debug("Failed to write RX_CTL mode to 0x%04x: %02x\n",
 272                                 mode, ret);
 273         }
 274         return ret;
 275 }
 276
 277 static int asix_write_gpio(struct ueth_data *dev, u16 value, int sleep)
 278 {
 279         int ret;
 280
 281         debug("asix_write_gpio() - value = 0x%04x\n", value);
 282         ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, value, 0, 0, NULL);
 283         if (ret < 0) {
 284                 debug("Failed to write GPIO value 0x%04x: %02x\n",
 285                         value, ret);
 286         }
 287         if (sleep)
 288                 udelay(sleep * 1000);
 289
 290         return ret;
 291 }
 292
 293 static int asix_write_hwaddr_common(struct ueth_data *dev, uint8_t *enetaddr)
 294 {
 295         int ret;
 296         ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buf, ETH_ALEN);
 297
 298         memcpy(buf, enetaddr, ETH_ALEN);
 299
 300         ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN, buf);
 301         if (ret < 0)
 302                 debug("Failed to set MAC address: %02x\n", ret);
 303
 304         return ret;
 305 }
 306
 307 /*
 308  * mii commands
 309  */
 310
 311 /*
 312  * mii_nway_restart - restart NWay (autonegotiation) for this interface
 313  *
 314  * Returns 0 on success, negative on error.
 315  */
 316 static int mii_nway_restart(struct ueth_data *dev)
 317 {
 318         int bmcr;
 319         int r = -1;
 320
 321         /* if autoneg is off, it's an error */
 322         bmcr = asix_mdio_read(dev, dev->phy_id, MII_BMCR);
 323
 324         if (bmcr & BMCR_ANENABLE) {
 325                 bmcr |= BMCR_ANRESTART;
 326                 asix_mdio_write(dev, dev->phy_id, MII_BMCR, bmcr);
 327                 r = 0;
 328         }
 329
 330         return r;
 331 }
 332
 333 static int asix_read_mac_common(struct ueth_data *dev,
 334                                 struct asix_private *priv, uint8_t *enetaddr)
 335 {
 336         ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buf, ETH_ALEN);
 337         int i;
 338
 339         if (priv->flags & FLAG_EEPROM_MAC) {
 340                 for (i = 0; i < (ETH_ALEN >> 1); i++) {
 341                         if (asix_read_cmd(dev, AX_CMD_READ_EEPROM,
 342                                           0x04 + i, 0, 2, buf) < 0) {
 343                                 debug("Failed to read SROM address 04h.\n");
 344                                 return -1;
 345                         }
 346                         memcpy(enetaddr + i * 2, buf, 2);
 347                 }
 348         } else {
 349                 if (asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf)
 350                      < 0) {
 351                         debug("Failed to read MAC address.\n");
 352                         return -1;
 353                 }
 354                 memcpy(enetaddr, buf, ETH_ALEN);
 355         }
 356
 357         return 0;
 358 }
 359
 360 static int asix_basic_reset(struct ueth_data *dev)
 361 {
 362         int embd_phy;
 363         u16 rx_ctl;
 364
 365         if (asix_write_gpio(dev,
 366                         AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5) < 0)
 367                 return -1;
 368
 369         /* 0x10 is the phy id of the embedded 10/100 ethernet phy */
 370         embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0);
 371         if (asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT,
 372                                 embd_phy, 0, 0, NULL) < 0) {
 373                 debug("Select PHY #1 failed\n");
 374                 return -1;
 375         }
 376
 377         if (asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL) < 0)
 378                 return -1;
 379
 380         if (asix_sw_reset(dev, AX_SWRESET_CLEAR) < 0)
 381                 return -1;
 382
 383         if (embd_phy) {
 384                 if (asix_sw_reset(dev, AX_SWRESET_IPRL) < 0)
 385                         return -1;
 386         } else {
 387                 if (asix_sw_reset(dev, AX_SWRESET_PRTE) < 0)
 388                         return -1;
 389         }
 390
 391         rx_ctl = asix_read_rx_ctl(dev);
 392         debug("RX_CTL is 0x%04x after software reset\n", rx_ctl);
 393         if (asix_write_rx_ctl(dev, 0x0000) < 0)
 394                 return -1;
 395
 396         rx_ctl = asix_read_rx_ctl(dev);
 397         debug("RX_CTL is 0x%04x setting to 0x0000\n", rx_ctl);
 398
 399         dev->phy_id = asix_get_phy_addr(dev);
 400         if (dev->phy_id < 0)
 401                 debug("Failed to read phy id\n");
 402
 403         asix_mdio_write(dev, dev->phy_id, MII_BMCR, BMCR_RESET);
 404         asix_mdio_write(dev, dev->phy_id, MII_ADVERTISE,
 405                         ADVERTISE_ALL | ADVERTISE_CSMA);
 406         mii_nway_restart(dev);
 407
 408         if (asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT) < 0)
 409                 return -1;
 410
 411         if (asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
 412                                 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
 413                                 AX88772_IPG2_DEFAULT, 0, NULL) < 0) {
 414                 debug("Write IPG,IPG1,IPG2 failed\n");
 415                 return -1;
 416         }
 417
 418         return 0;
 419 }
 420
 421 static int asix_init_common(struct ueth_data *dev)
 422 {
 423         int timeout = 0;
 424 #define TIMEOUT_RESOLUTION 50   /* ms */
 425         int link_detected;
 426
 427         debug("** %s()\n", __func__);
 428
 429         if (asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL) < 0)
 430                 goto out_err;
 431
 432         do {
 433                 link_detected = asix_mdio_read(dev, dev->phy_id, MII_BMSR) &
 434                         BMSR_LSTATUS;
 435                 if (!link_detected) {
 436                         if (timeout == 0)
 437                                 printf("Waiting for Ethernet connection... ");
 438                         udelay(TIMEOUT_RESOLUTION * 1000);
 439                         timeout += TIMEOUT_RESOLUTION;
 440                 }
 441         } while (!link_detected && timeout < PHY_CONNECT_TIMEOUT);
 442         if (link_detected) {
 443                 if (timeout != 0)
 444                         printf("done.\n");
 445         } else {
 446                 printf("unable to connect.\n");
 447                 goto out_err;
 448         }
 449
 450         return 0;
 451 out_err:
 452         return -1;
 453 }
 454
 455 static int asix_send_common(struct ueth_data *dev, void *packet, int length)
 456 {
 457         int err;
 458         u32 packet_len;
 459         int actual_len;
 460         ALLOC_CACHE_ALIGN_BUFFER(unsigned char, msg,
 461                 PKTSIZE + sizeof(packet_len));
 462
 463         debug("** %s(), len %d\n", __func__, length);
 464
 465         packet_len = (((length) ^ 0x0000ffff) << 16) + (length);
 466         cpu_to_le32s(&packet_len);
 467
 468         memcpy(msg, &packet_len, sizeof(packet_len));
 469         memcpy(msg + sizeof(packet_len), (void *)packet, length);
 470
 471         err = usb_bulk_msg(dev->pusb_dev,
 472                                 usb_sndbulkpipe(dev->pusb_dev, dev->ep_out),
 473                                 (void *)msg,
 474                                 length + sizeof(packet_len),
 475                                 &actual_len,
 476                                 USB_BULK_SEND_TIMEOUT);
 477         debug("Tx: len = %zu, actual = %u, err = %d\n",
 478                         length + sizeof(packet_len), actual_len, err);
 479
 480         return err;
 481 }
 482
 483 #ifndef CONFIG_DM_ETH
 484 /*
 485  * Asix callbacks
 486  */
 487 static int asix_init(struct eth_device *eth, bd_t *bd)
 488 {
 489         struct ueth_data *dev = (struct ueth_data *)eth->priv;
 490
 491         return asix_init_common(dev);
 492 }
 493
 494 static int asix_send(struct eth_device *eth, void *packet, int length)
 495 {
 496         struct ueth_data *dev = (struct ueth_data *)eth->priv;
 497
 498         return asix_send_common(dev, packet, length);
 499 }
 500
 501 static int asix_recv(struct eth_device *eth)
 502 {
 503         struct ueth_data *dev = (struct ueth_data *)eth->priv;
 504         ALLOC_CACHE_ALIGN_BUFFER(unsigned char, recv_buf, AX_RX_URB_SIZE);
 505         unsigned char *buf_ptr;
 506         int err;
 507         int actual_len;
 508         u32 packet_len;
 509
 510         debug("** %s()\n", __func__);
 511
 512         err = usb_bulk_msg(dev->pusb_dev,
 513                                 usb_rcvbulkpipe(dev->pusb_dev, dev->ep_in),
 514                                 (void *)recv_buf,
 515                                 AX_RX_URB_SIZE,
 516                                 &actual_len,
 517                                 USB_BULK_RECV_TIMEOUT);
 518         debug("Rx: len = %u, actual = %u, err = %d\n", AX_RX_URB_SIZE,
 519                 actual_len, err);
 520         if (err != 0) {
 521                 debug("Rx: failed to receive\n");
 522                 return -1;
 523         }
 524         if (actual_len > AX_RX_URB_SIZE) {
 525                 debug("Rx: received too many bytes %d\n", actual_len);
 526                 return -1;
 527         }
 528
 529         buf_ptr = recv_buf;
 530         while (actual_len > 0) {
 531                 /*
 532                  * 1st 4 bytes contain the length of the actual data as two
 533                  * complementary 16-bit words. Extract the length of the data.
 534                  */
 535                 if (actual_len < sizeof(packet_len)) {
 536                         debug("Rx: incomplete packet length\n");
 537                         return -1;
 538                 }
 539                 memcpy(&packet_len, buf_ptr, sizeof(packet_len));
 540                 le32_to_cpus(&packet_len);
 541                 if (((~packet_len >> 16) & 0x7ff) != (packet_len & 0x7ff)) {
 542                         debug("Rx: malformed packet length: %#x (%#x:%#x)\n",
 543                               packet_len, (~packet_len >> 16) & 0x7ff,
 544                               packet_len & 0x7ff);
 545                         return -1;
 546                 }
 547                 packet_len = packet_len & 0x7ff;
 548                 if (packet_len > actual_len - sizeof(packet_len)) {
 549                         debug("Rx: too large packet: %d\n", packet_len);
 550                         return -1;
 551                 }
 552
 553                 /* Notify net stack */
 554                 net_process_received_packet(buf_ptr + sizeof(packet_len),
 555                                             packet_len);
 556
 557                 /* Adjust for next iteration. Packets are padded to 16-bits */
 558                 if (packet_len & 1)
 559                         packet_len++;
 560                 actual_len -= sizeof(packet_len) + packet_len;
 561                 buf_ptr += sizeof(packet_len) + packet_len;
 562         }
 563
 564         return err;
 565 }
 566
 567 static void asix_halt(struct eth_device *eth)
 568 {
 569         debug("** %s()\n", __func__);
 570 }
 571
 572 static int asix_write_hwaddr(struct eth_device *eth)
 573 {
 574         struct ueth_data *dev = (struct ueth_data *)eth->priv;
 575
 576         return asix_write_hwaddr_common(dev, eth->enetaddr);
 577 }
 578
 579 /*
 580  * Asix probing functions
 581  */
 582 void asix_eth_before_probe(void)
 583 {
 584         curr_eth_dev = 0;
 585 }
 586
 587 struct asix_dongle {
 588         unsigned short vendor;
 589         unsigned short product;
 590         int flags;
 591 };
 592
 593 static const struct asix_dongle asix_dongles[] = {
 594         { 0x05ac, 0x1402, FLAG_TYPE_AX88772 },  /* Apple USB Ethernet Adapter */
 595         { 0x07d1, 0x3c05, FLAG_TYPE_AX88772 },  /* D-Link DUB-E100 H/W Ver B1 */
 596         { 0x2001, 0x1a02, FLAG_TYPE_AX88772 },  /* D-Link DUB-E100 H/W Ver C1 */
 597         /* Cables-to-Go USB Ethernet Adapter */
 598         { 0x0b95, 0x772a, FLAG_TYPE_AX88772 },
 599         { 0x0b95, 0x7720, FLAG_TYPE_AX88772 },  /* Trendnet TU2-ET100 V3.0R */
 600         { 0x0b95, 0x1720, FLAG_TYPE_AX88172 },  /* SMC */
 601         { 0x0db0, 0xa877, FLAG_TYPE_AX88772 },  /* MSI - ASIX 88772a */
 602         { 0x13b1, 0x0018, FLAG_TYPE_AX88172 },  /* Linksys 200M v2.1 */
 603         { 0x1557, 0x7720, FLAG_TYPE_AX88772 },  /* 0Q0 cable ethernet */
 604         /* DLink DUB-E100 H/W Ver B1 Alternate */
 605         { 0x2001, 0x3c05, FLAG_TYPE_AX88772 },
 606         /* ASIX 88772B */
 607         { 0x0b95, 0x772b, FLAG_TYPE_AX88772B | FLAG_EEPROM_MAC },
 608         { 0x0b95, 0x7e2b, FLAG_TYPE_AX88772B },
 609         { 0x0000, 0x0000, FLAG_NONE }   /* END - Do not remove */
 610 };
 611
 612 /* Probe to see if a new device is actually an asix device */
 613 int asix_eth_probe(struct usb_device *dev, unsigned int ifnum,
 614                       struct ueth_data *ss)
 615 {
 616         struct usb_interface *iface;
 617         struct usb_interface_descriptor *iface_desc;
 618         int ep_in_found = 0, ep_out_found = 0;
 619         int i;
 620
 621         /* let's examine the device now */
 622         iface = &dev->config.if_desc[ifnum];
 623         iface_desc = &dev->config.if_desc[ifnum].desc;
 624
 625         for (i = 0; asix_dongles[i].vendor != 0; i++) {
 626                 if (dev->descriptor.idVendor == asix_dongles[i].vendor &&
 627                     dev->descriptor.idProduct == asix_dongles[i].product)
 628                         /* Found a supported dongle */
 629                         break;
 630         }
 631
 632         if (asix_dongles[i].vendor == 0)
 633                 return 0;
 634
 635         memset(ss, 0, sizeof(struct ueth_data));
 636
 637         /* At this point, we know we've got a live one */
 638         debug("\n\nUSB Ethernet device detected: %#04x:%#04x\n",
 639               dev->descriptor.idVendor, dev->descriptor.idProduct);
 640
 641         /* Initialize the ueth_data structure with some useful info */
 642         ss->ifnum = ifnum;
 643         ss->pusb_dev = dev;
 644         ss->subclass = iface_desc->bInterfaceSubClass;
 645         ss->protocol = iface_desc->bInterfaceProtocol;
 646
 647         /* alloc driver private */
 648         ss->dev_priv = calloc(1, sizeof(struct asix_private));
 649         if (!ss->dev_priv)
 650                 return 0;
 651
 652         ((struct asix_private *)ss->dev_priv)->flags = asix_dongles[i].flags;
 653
 654         /*
 655          * We are expecting a minimum of 3 endpoints - in, out (bulk), and
 656          * int. We will ignore any others.
 657          */
 658         for (i = 0; i < iface_desc->bNumEndpoints; i++) {
 659                 /* is it an BULK endpoint? */
 660                 if ((iface->ep_desc[i].bmAttributes &
 661                      USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_BULK) {
 662                         u8 ep_addr = iface->ep_desc[i].bEndpointAddress;
 663                         if (ep_addr & USB_DIR_IN) {
 664                                 if (!ep_in_found) {
 665                                         ss->ep_in = ep_addr &
 666                                                 USB_ENDPOINT_NUMBER_MASK;
 667                                         ep_in_found = 1;
 668                                 }
 669                         } else {
 670                                 if (!ep_out_found) {
 671                                         ss->ep_out = ep_addr &
 672                                                 USB_ENDPOINT_NUMBER_MASK;
 673                                         ep_out_found = 1;
 674                                 }
 675                         }
 676                 }
 677
 678                 /* is it an interrupt endpoint? */
 679                 if ((iface->ep_desc[i].bmAttributes &
 680                     USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_INT) {
 681                         ss->ep_int = iface->ep_desc[i].bEndpointAddress &
 682                                 USB_ENDPOINT_NUMBER_MASK;
 683                         ss->irqinterval = iface->ep_desc[i].bInterval;
 684                 }
 685         }
 686         debug("Endpoints In %d Out %d Int %d\n",
 687                   ss->ep_in, ss->ep_out, ss->ep_int);
 688
 689         /* Do some basic sanity checks, and bail if we find a problem */
 690         if (usb_set_interface(dev, iface_desc->bInterfaceNumber, 0) ||
 691             !ss->ep_in || !ss->ep_out || !ss->ep_int) {
 692                 debug("Problems with device\n");
 693                 return 0;
 694         }
 695         dev->privptr = (void *)ss;
 696         return 1;
 697 }
 698
 699 int asix_eth_get_info(struct usb_device *dev, struct ueth_data *ss,
 700                                 struct eth_device *eth)
 701 {
 702         struct asix_private *priv = (struct asix_private *)ss->dev_priv;
 703
 704         if (!eth) {
 705                 debug("%s: missing parameter.\n", __func__);
 706                 return 0;
 707         }
 708         sprintf(eth->name, "%s%d", ASIX_BASE_NAME, curr_eth_dev++);
 709         eth->init = asix_init;
 710         eth->send = asix_send;
 711         eth->recv = asix_recv;
 712         eth->halt = asix_halt;
 713         if (!(priv->flags & FLAG_TYPE_AX88172))
 714                 eth->write_hwaddr = asix_write_hwaddr;
 715         eth->priv = ss;
 716
 717         if (asix_basic_reset(ss))
 718                 return 0;
 719
 720         /* Get the MAC address */
 721         if (asix_read_mac_common(ss, priv, eth->enetaddr))
 722                 return 0;
 723         debug("MAC %pM\n", eth->enetaddr);
 724
 725         return 1;
 726 }
 727 #endif
 728
 729 #ifdef CONFIG_DM_ETH
 730 static int asix_eth_start(struct udevice *dev)
 731 {
 732         struct asix_private *priv = dev_get_priv(dev);
 733
 734         return asix_init_common(&priv->ueth);
 735 }
 736
 737 void asix_eth_stop(struct udevice *dev)
 738 {
 739         debug("** %s()\n", __func__);
 740 }
 741
 742 int asix_eth_send(struct udevice *dev, void *packet, int length)
 743 {
 744         struct asix_private *priv = dev_get_priv(dev);
 745
 746         return asix_send_common(&priv->ueth, packet, length);
 747 }
 748
 749 int asix_eth_recv(struct udevice *dev, int flags, uchar **packetp)
 750 {
 751         struct asix_private *priv = dev_get_priv(dev);
 752         struct ueth_data *ueth = &priv->ueth;
 753         uint8_t *ptr;
 754         int ret, len;
 755         u32 packet_len;
 756
 757         len = usb_ether_get_rx_bytes(ueth, &ptr);
 758         debug("%s: first try, len=%d\n", __func__, len);
 759         if (!len) {
 760                 if (!(flags & ETH_RECV_CHECK_DEVICE))
 761                         return -EAGAIN;
 762                 ret = usb_ether_receive(ueth, AX_RX_URB_SIZE);
 763                 if (ret == -EAGAIN)
 764                         return ret;
 765
 766                 len = usb_ether_get_rx_bytes(ueth, &ptr);
 767                 debug("%s: second try, len=%d\n", __func__, len);
 768         }
 769
 770         /*
 771          * 1st 4 bytes contain the length of the actual data as two
 772          * complementary 16-bit words. Extract the length of the data.
 773          */
 774         if (len < sizeof(packet_len)) {
 775                 debug("Rx: incomplete packet length\n");
 776                 goto err;
 777         }
 778         memcpy(&packet_len, ptr, sizeof(packet_len));
 779         le32_to_cpus(&packet_len);
 780         if (((~packet_len >> 16) & 0x7ff) != (packet_len & 0x7ff)) {
 781                 debug("Rx: malformed packet length: %#x (%#x:%#x)\n",
 782                       packet_len, (~packet_len >> 16) & 0x7ff,
 783                       packet_len & 0x7ff);
 784                 goto err;
 785         }
 786         packet_len = packet_len & 0x7ff;
 787         if (packet_len > len - sizeof(packet_len)) {
 788                 debug("Rx: too large packet: %d\n", packet_len);
 789                 goto err;
 790         }
 791
 792         *packetp = ptr + sizeof(packet_len);
 793         return packet_len;
 794
 795 err:
 796         usb_ether_advance_rxbuf(ueth, -1);
 797         return -EINVAL;
 798 }
 799
 800 static int asix_free_pkt(struct udevice *dev, uchar *packet, int packet_len)
 801 {
 802         struct asix_private *priv = dev_get_priv(dev);
 803
 804         if (packet_len & 1)
 805                 packet_len++;
 806         usb_ether_advance_rxbuf(&priv->ueth, sizeof(u32) + packet_len);
 807
 808         return 0;
 809 }
 810
 811 int asix_write_hwaddr(struct udevice *dev)
 812 {
 813         struct eth_pdata *pdata = dev_get_platdata(dev);
 814         struct asix_private *priv = dev_get_priv(dev);
 815
 816         if (priv->flags & FLAG_TYPE_AX88172)
 817                 return -ENOSYS;
 818
 819         return asix_write_hwaddr_common(&priv->ueth, pdata->enetaddr);
 820 }
 821
 822 static int asix_eth_probe(struct udevice *dev)
 823 {
 824         struct eth_pdata *pdata = dev_get_platdata(dev);
 825         struct asix_private *priv = dev_get_priv(dev);
 826         struct ueth_data *ss = &priv->ueth;
 827         int ret;
 828
 829         priv->flags = dev->driver_data;
 830         ret = usb_ether_register(dev, ss, AX_RX_URB_SIZE);
 831         if (ret)
 832                 return ret;
 833
 834         ret = asix_basic_reset(ss);
 835         if (ret)
 836                 goto err;
 837
 838         /* Get the MAC address */
 839         ret = asix_read_mac_common(ss, priv, pdata->enetaddr);
 840         if (ret)
 841                 goto err;
 842         debug("MAC %pM\n", pdata->enetaddr);
 843
 844         return 0;
 845
 846 err:
 847         return usb_ether_deregister(ss);
 848 }
 849
 850 static const struct eth_ops asix_eth_ops = {
 851         .start  = asix_eth_start,
 852         .send   = asix_eth_send,
 853         .recv   = asix_eth_recv,
 854         .free_pkt = asix_free_pkt,
 855         .stop   = asix_eth_stop,
 856         .write_hwaddr = asix_write_hwaddr,
 857 };
 858
 859 U_BOOT_DRIVER(asix_eth) = {
 860         .name   = "asix_eth",
 861         .id     = UCLASS_ETH,
 862         .probe = asix_eth_probe,
 863         .ops    = &asix_eth_ops,
 864         .priv_auto_alloc_size = sizeof(struct asix_private),
 865         .platdata_auto_alloc_size = sizeof(struct eth_pdata),
 866 };
 867
 868 static const struct usb_device_id asix_eth_id_table[] = {
 869         /* Apple USB Ethernet Adapter */
 870         { USB_DEVICE(0x05ac, 0x1402), .driver_info = FLAG_TYPE_AX88772 },
 871         /* D-Link DUB-E100 H/W Ver B1 */
 872         { USB_DEVICE(0x07d1, 0x3c05), .driver_info = FLAG_TYPE_AX88772 },
 873         /* D-Link DUB-E100 H/W Ver C1 */
 874         { USB_DEVICE(0x2001, 0x1a02), .driver_info = FLAG_TYPE_AX88772 },
 875         /* Cables-to-Go USB Ethernet Adapter */
 876         { USB_DEVICE(0x0b95, 0x772a), .driver_info = FLAG_TYPE_AX88772 },
 877         /* Trendnet TU2-ET100 V3.0R */
 878         { USB_DEVICE(0x0b95, 0x7720), .driver_info = FLAG_TYPE_AX88772 },
 879         /* SMC */
 880         { USB_DEVICE(0x0b95, 0x1720), .driver_info = FLAG_TYPE_AX88172 },
 881         /* MSI - ASIX 88772a */
 882         { USB_DEVICE(0x0db0, 0xa877), .driver_info = FLAG_TYPE_AX88772 },
 883         /* Linksys 200M v2.1 */
 884         { USB_DEVICE(0x13b1, 0x0018), .driver_info = FLAG_TYPE_AX88172 },
 885         /* 0Q0 cable ethernet */
 886         { USB_DEVICE(0x1557, 0x7720), .driver_info = FLAG_TYPE_AX88772 },
 887         /* DLink DUB-E100 H/W Ver B1 Alternate */
 888         { USB_DEVICE(0x2001, 0x3c05), .driver_info = FLAG_TYPE_AX88772 },
 889         /* ASIX 88772B */
 890         { USB_DEVICE(0x0b95, 0x772b),
 891                 .driver_info = FLAG_TYPE_AX88772B | FLAG_EEPROM_MAC },
 892         { USB_DEVICE(0x0b95, 0x7e2b), .driver_info = FLAG_TYPE_AX88772B },
 893         { }             /* Terminating entry */
 894 };
 895
 896 U_BOOT_USB_DEVICE(asix_eth, asix_eth_id_table);
 897 #endif