2 * Driver for 8250/16550-type serial ports
4 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
6 * Copyright (C) 2001 Russell King.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
14 #include <linux/serial_8250.h>
16 struct old_serial_port {
18 unsigned int baud_base;
23 unsigned char io_type;
24 unsigned char *iomem_base;
25 unsigned short iomem_reg_shift;
26 unsigned long irqflags;
29 struct serial8250_config {
31 unsigned short fifo_size;
32 unsigned short tx_loadsz;
37 #define UART_CAP_FIFO (1 << 8) /* UART has FIFO */
38 #define UART_CAP_EFR (1 << 9) /* UART has EFR */
39 #define UART_CAP_SLEEP (1 << 10) /* UART has IER sleep */
40 #define UART_CAP_AFE (1 << 11) /* MCR-based hw flow control */
41 #define UART_CAP_UUE (1 << 12) /* UART needs IER bit 6 set (Xscale) */
42 #define UART_CAP_RTOIE (1 << 13) /* UART needs IER bit 4 set (Xscale, Tegra) */
43 #define UART_CAP_HFIFO (1 << 14) /* UART has a "hidden" FIFO */
45 #define UART_BUG_QUOT (1 << 0) /* UART has buggy quot LSB */
46 #define UART_BUG_TXEN (1 << 1) /* UART has buggy TX IIR status */
47 #define UART_BUG_NOMSR (1 << 2) /* UART has buggy MSR status bits (Au1x00) */
48 #define UART_BUG_THRE (1 << 3) /* UART has buggy THRE reassertion */
49 #define UART_BUG_PARITY (1 << 4) /* UART mishandles parity if FIFO enabled */
51 #define PROBE_RSA (1 << 0)
52 #define PROBE_ANY (~0)
54 #define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8)
56 #ifdef CONFIG_SERIAL_8250_SHARE_IRQ
57 #define SERIAL8250_SHARE_IRQS 1
59 #define SERIAL8250_SHARE_IRQS 0
62 static inline int serial_in(struct uart_8250_port *up, int offset)
64 return up->port.serial_in(&up->port, offset);
67 static inline void serial_out(struct uart_8250_port *up, int offset, int value)
69 up->port.serial_out(&up->port, offset, value);
72 void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);
74 static inline int serial_dl_read(struct uart_8250_port *up)
76 return up->dl_read(up);
79 static inline void serial_dl_write(struct uart_8250_port *up, int value)
81 up->dl_write(up, value);
84 #if defined(__alpha__) && !defined(CONFIG_PCI)
86 * Digital did something really horribly wrong with the OUT1 and OUT2
87 * lines on at least some ALPHA's. The failure mode is that if either
88 * is cleared, the machine locks up with endless interrupts.
90 #define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1)
91 #elif defined(CONFIG_SBC8560)
93 * WindRiver did something similarly broken on their SBC8560 board. The
94 * UART tristates its IRQ output while OUT2 is clear, but they pulled
95 * the interrupt line _up_ instead of down, so if we register the IRQ
96 * while the UART is in that state, we die in an IRQ storm. */
97 #define ALPHA_KLUDGE_MCR (UART_MCR_OUT2)
99 #define ALPHA_KLUDGE_MCR 0
102 #ifdef CONFIG_SERIAL_8250_PNP
103 int serial8250_pnp_init(void);
104 void serial8250_pnp_exit(void);
106 static inline int serial8250_pnp_init(void) { return 0; }
107 static inline void serial8250_pnp_exit(void) { }
110 #ifdef CONFIG_ARCH_OMAP1
111 static inline int is_omap1_8250(struct uart_8250_port *pt)
115 switch (pt->port.mapbase) {
116 case OMAP1_UART1_BASE:
117 case OMAP1_UART2_BASE:
118 case OMAP1_UART3_BASE:
129 static inline int is_omap1510_8250(struct uart_8250_port *pt)
131 if (!cpu_is_omap1510())
134 return is_omap1_8250(pt);
137 static inline int is_omap1_8250(struct uart_8250_port *pt)
141 static inline int is_omap1510_8250(struct uart_8250_port *pt)